Commit Graph

33 Commits

Author SHA1 Message Date
Thierry Reding 032f11f3ac ARM: tegra: Add Tegra114 gr3d support
Add the gr3d device tree node. The gr3d block on Tegra114 is backwards-
compatible with the one on Tegra20.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-19 17:07:54 -07:00
Thierry Reding 5648b260cf ARM: tegra: Add Tegra114 gr2d support
Add the device tree for the gr2d hardware found on Tegra114 SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-19 17:07:53 -07:00
Thierry Reding 7e4ba90fb9 ARM: tegra: Add Tegra114 DSI support
Add device tree nodes for the DSI controllers found on Tegra114 SoCs.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-19 17:07:52 -07:00
Mikko Perttunen 65344b936e ARM: tegra: Add host1x, DC and HDMI to Tegra114 device tree
Add host1x, DC (display controller) and HDMI devices to Tegra114
device tree.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-19 17:07:52 -07:00
Thierry Reding e3d04d179c ARM: tegra: Add MIPI calibration DT entries for Tegra114
Add a device node for the MIPI calibration block on Tegra114. There is
no need to disable it by default because it only enables the clock while
performing calibration and therefore shouldn't be consuming any power
when unused.

Signed-off-by: Thierry Reding <treding@nvidia.com>
[swarren, add unit address to new DT node name]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-19 17:07:31 -07:00
Laxman Dewangan 5fc6b0dd31 ARM: tegra: convert dts files of Tegra114 platforms to use pinctrl defines
Use Tegra pinconrol dt-binding macro to set the values of different pinmux
properties of Tegra114 platforms.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:20 -07:00
Stephen Warren 58ecb23f64 ARM: tegra: add missing unit addresses to DT
DT node names should include a unit address iff the node has a reg
property. For Tegra DTs at least, we were previously applying a different
rule, namely that node names only needed to include a unit address if it
was required to make the node name unique. Consequently, many unit
addresses are missing. Add them.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:16 -07:00
Stephen Warren 74511c4bef ARM: tegra: remove legacy DMA entries from DT
Now that all Tegra drivers have been converted to use DMA APIs which
retrieve DMA channel information from standard DMA DT properties, we can
remove all the legacy DT DMA-related properties.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-11 16:45:02 -07:00
Stephen Warren 2bd541ffaa ARM: tegra: remove legacy clock entries from DT
Now that all Tegra drivers have been converted to use the common reset
framework, we can remove all the legacy DT clocks/clock-names entries for
"clocks" that were only used with the old custom Tegra module reset API.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-11 16:44:55 -07:00
Stephen Warren 034d023f67 ARM: tegra: update DT files to add DMA properties
This patch switches the Tegra DT files to use the standard DMA DT bindings
rather than custom properties. Note that the legacy properties are not yet
removed; the drivers must be updated to use the new properties first.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2013-12-11 16:42:38 -07:00
Stephen Warren 3393d42205 ARM: tegra: update DT files to add reset properties
An earlier patch updated the Tegra DT bindings to require resets and
reset-names properties to be filled in. This patch updates the DT files
to include those properties.

Note that any legacy clocks and clock-names entries that are replaced by
reset properties are not yet removed; the drivers must be updated to use
the new resets and reset-names properties first.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-11 16:42:32 -07:00
Hiroshi Doyu 4cca959326 ARM: tegra: fix Tegra114 IOMMU register address
The IOMMU node's reg property contains completely bogus values! Somehow,
this had no practical effect, despite the fact the IOMMU driver appears
to be writing to those registers. I suppose that since no HW modules is
actually at that address, the writes simply had no effect.

Note that I'm not CCing stable here, even though the problem exists as
far back as v3.9, simply because this patch doesn't fix any observed
issue, and I don't want to run the risk of suddenly writing to some
registers and causing a regression.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[swarren, wrote commit description]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2013-10-30 17:38:27 -07:00
Mikko Perttunen 328dc0ecc9 ARM: tegra: add USB DT entries for Tegra114, Dalmore
Device tree entries for the three EHCI controllers on Tegra114.
Enables the the third controller (USB host) on Dalmore.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-13 12:40:52 -06:00
Stephen Warren 15e5c64727 ARM: tegra: add audio-related nodes to Tegra114 DT
Add nodes for the Tegra114 AHUB and I2S controllers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:51 -06:00
Hiroshi Doyu a1c85860e2 ARM: tegra114: convert device tree files to use CLK defines
Use the Tegra114 CAR binding header (tegra114-car.h) to replace magic
numbers in the device tree. For example,

-               clocks = <&tegra_car 28>;
+               clocks = <&tegra_car CLK_HOST1X>;

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[swarren, updated since tegra20-car.h moved for consistency]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:51 -06:00
Stephen Warren 6cecf916b9 ARM: tegra: convert device tree files to use IRQ defines
Use the GIC and standard IRQ binding defines in all IRQ specifiers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:50 -06:00
Stephen Warren 3325f1bcd0 ARM: tegra: convert device tree files to use GPIO defines
Use TEGRA_GPIO() macro to name all GPIOs referenced by GPIO properties,
and some interrupts properties. Use standard GPIO flag defines too.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:49 -06:00
Stephen Warren 1bd0bd499d ARM: tegra: use #include for all device trees
Replace /include/ (dtc) with #include (C pre-processor) for all Tegra DT
files, so that gcc -E handles the entire include tree, and hence any of
those files can #include some other file e.g. for constant definitions.

This allows future use of #defines and header files in order to define
names for various constants, such as the IDs and flags in GPIO
specifiers. Use of those features will increase the readability of the
device tree files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:49 -06:00
Laxman Dewangan 6ea0297e39 ARM: tegra: add SPI nodes to Tegra114 DT
NVIDIA's Tegra114 has 6 SPI controllers. These controllers are
redesign on T114 with different register interface.

Add DT entry for spi controllers and make it compatible with
"nvidia,tegra114-spi", since they are a new incompatible design.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: fixed reg property for 3rd SPI controller]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:41 -06:00
Laxman Dewangan cd467b7d0c ARM: tegra: add KBC nodes to Tegra114 DT
NVIDIA's Tegra114 SoCs have the matrix keyboard controller which
supports 11x8 type of matrix. The number of rows and columns
are configurable.

Add DT entry for KBC controller with compatibility as "nvidia,tegra114-kbc".

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:41 -06:00
Laxman Dewangan 0fb2209670 ARM: tegra: add aliases and DMA requestor for serial nodes of Tegra114
Add APB DMA requestor and serial aliases for serial controller.
There are two serial drivers i.e. 8250 based simple serial driver
and APB DMA based serial driver for higher baudrate and performace.

The simple serial driver is selected by compatible value
"nvidia,tegra114-uart", "nvidia,tegra20-uart", and the APB DMA based
driver is selected by compatible value "nvidia,tegra114-hsuart",
"nvidia,tegra30-hsuart".

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:41 -06:00
Laxman Dewangan 3fc2f94eba ARM: tegra: add I2C nodes to Tegra114 DT
NVIDIA's Tegra114 has 5 I2C controllers. These controllers have the
following changes which makes incompatible with previous hardware:
- Single clock source to I2C controller.
- Interrupt support for per packet transfer.

Add DT entry for I2C controllers and make it compatible with
"nvidia,tegra114-i2c".

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: fixed location of status property for consistency]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:40 -06:00
Laxman Dewangan c5d9da4aab ARM: tegra: add APB DMA nodes to Tegra114 DT
NVIDIA's Tegra114 has 32 channels APB DMA controller. Add DT entry for
APB DMA controllers and make it compatible with "nvidia,tegra114-apbdma".

Tegra114 DMA controller is not compatible with Tegra30/Tegra20 DMA
controller driver as in Tegra114, the global pause also clock gate the
DMA register and hence it iw not possible to write the DMA register
with global pause.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: fixed DT node order]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:40 -06:00
Andrew Chew 6c716db57f ARM: tegra: add PWM nodes to Tegra114 DT
This patch adds a device tree node for the four PWM controllers present
on Tegra114.

Signed-off-by: Andrew Chew <achew@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:40 -06:00
Pritesh Raithatha 933d87a56e ARM: tegra: add SDHCI nodes with common properties
This patch adds in the SDHCI nodes for the busses supported on Tegra114
boards.

Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
[Rhyland added clk refs to & reordered sdhci nodes and removed spaces]
Signed-off-by: Rhyland Klein <rklein@nvidia.com>
[swarren: fixed DT node sort order]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:39 -06:00
Peter De Schrijver 672d889c0a ARM: dt: Add references to tegra_car clocks
Add references to tegra_car clocks for the basic device nodes. Also remove
the clock-frequency property of the serial node as the UART driver can now
use the clock framework to obtain the frequency.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:13 -06:00
Joseph Lo 7021d12205 ARM: tegra: add clock source of PMC to device trees
Adding the bindings of the clock source of PMC in DT.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-03 14:29:56 -06:00
Joseph Lo 2b84e53beb ARM: tegra: fix the PMC compatible string in DT
The PMC HW is not 100% compatible across all Tegra series. We need to
specify them in DT.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-11 14:29:44 -06:00
Laxman Dewangan 031b77afc3 ARM: DT: tegra114: add pinmux DT entry
Add DT entry for pinmux and drive configuration addresses.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-29 11:02:15 -07:00
Laxman Dewangan b16f9183c7 ARM: DT: tegra114: add GPIO DT entry
Tegra114 has the GPIO controllers with 8 GPIO bank and each bank
supports 32 pins.

Add DT entry for GPIO controller. Tegra114 GPIO controller is
compatible with Tegra30 GPIO controller driver.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-29 11:02:14 -07:00
Hiroshi Doyu 2da139657b ARM: tegra: Add SMMU entry to Tegra114 DT
Add SMMU entry.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-29 11:01:14 -07:00
Hiroshi Doyu 0dfe42edcc ARM: tegra: add AHB entry to Tegra114 DT
Add AHB entry.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:57:08 -07:00
Hiroshi Doyu 18a4df7051 ARM: dt: tegra114: Add new SoC base, Tegra114 SoC
Initial support for Tegra 114 SoC. This is expected to be included in
the board DTS files, Tegra 114 SoC based evaluation board family.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:23:05 -07:00