Commit Graph

23 Commits

Author SHA1 Message Date
Eric Brower 4c696500bc ARM: tegra: enable USB2 on Tegra30 Beaver
Enable USB2 on Beaver, exposed via the mini-PCIe connector.

Signed-off-by: Eric Brower <ebrower@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-20 09:48:57 -07:00
Stephen Warren 553c0a200e ARM: tegra: set up /aliases entries for RTCs
This ensures that the PMIC RTC provides the system time, rather than
the on-SoC RTC, which is not battery-backed.

tegra124-venice2.dts isn't touched yet since we haven't added any off-
SoC RTC device to its device tree.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-18 14:10:48 -07:00
Laxman Dewangan a47c662aad ARM: tegra: convert dts files of Tegra30 platforms to use pinctrl defines
Use Tegra pinconrol dt-binding macro to set the values of different pinmux
properties of Tegra30 platforms.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:20 -07:00
Stephen Warren 578990537a ARM: tegra: fix node sort order
For Tegra DT files, I've been attempting to keep the nodes sorted in
the order:
1) Nodes with reg, in order of reg.
2) Nodes without reg, alphabetically.

This patch fixes a few escapees that I missed:-(

The diffs look larger than they really are, because sometimes when one
node was moved up or down, diff chose to represent this as many other
nodes being moved the other way!

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:17 -07:00
Stephen Warren 58ecb23f64 ARM: tegra: add missing unit addresses to DT
DT node names should include a unit address iff the node has a reg
property. For Tegra DTs at least, we were previously applying a different
rule, namely that node names only needed to include a unit address if it
was required to make the node name unique. Consequently, many unit
addresses are missing. Add them.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:16 -07:00
Stephen Warren ac472284e3 ARM: tegra: add Mic Jack to Beaver device tree
This enables the microphone input jack, and hence allows audio to be
captured as well as played back.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-15 09:35:07 -06:00
Tuomas Tynkkynen cc34c9f79c ARM: tegra: add USB DT entries for Tegra30
Add device tree entries for the 3 USB controllers and PHYs and
enable the third controller on Cardhu and Beaver boards.

Fix VBUS regulator entries on Beaver. The GPIO pins were wrong.
Also, internal pullups need to be enabled on those pins.

Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-13 12:40:47 -06:00
Stephen Warren 44fefab459 ARM: tegra: Fix Beaver's PCIe lane configuration
Beaver's PCIe lane configuration most closely matches x2 x2 x2 rather
than x4 x1 x1, since clocks 0 and 2 are used, and lanes 0 and 5 are used,
and the only way those align is with a x2 x2 x2 configuration.

Also, disable root port 1; there's nothing connected to it. Root port 0
is the on-board PCIe Ethernet, and port 2 is the mini-PCIe slot.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-12 14:20:36 -06:00
Thierry Reding bb034cb5eb ARM: tegra: Enable PCIe controller on Beaver
PCIe lane 0 is connected to an onboard Gigabit Ethernet (RTL8168evl) and
lane 4 is routed to the board's miniPCIe slot.

Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-12 14:20:22 -06:00
Joseph Lo 47d2d63ba6 ARM: tegra: enable LP1 suspend mode
Enabling the LP1 suspend mode for Tegra devices.

Tested-by: Marc Dietrich <marvin24@gmx.de> # paz00 board
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-12 12:23:14 -06:00
Thierry Reding 9bd80b41c5 ARM: tegra: beaver: Enable HDMI output
Enable the HDMI output as well as DDC and hotplug detection on Beaver.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-12 10:13:17 -06:00
Stephen Warren 23037bbd96 ARM: tegra: enable audio on Beaver
Beaver uses the RT5640 audio CODEC. Instantiate this on the I2C bus, and
add the top-level "sound" node to hook everything together and provide a
"sound card" device.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-06-12 14:56:40 -06:00
Stephen Warren 6cecf916b9 ARM: tegra: convert device tree files to use IRQ defines
Use the GIC and standard IRQ binding defines in all IRQ specifiers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:50 -06:00
Stephen Warren 3325f1bcd0 ARM: tegra: convert device tree files to use GPIO defines
Use TEGRA_GPIO() macro to name all GPIOs referenced by GPIO properties,
and some interrupts properties. Use standard GPIO flag defines too.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:49 -06:00
Stephen Warren 1bd0bd499d ARM: tegra: use #include for all device trees
Replace /include/ (dtc) with #include (C pre-processor) for all Tegra DT
files, so that gcc -E handles the entire include tree, and hence any of
those files can #include some other file e.g. for constant definitions.

This allows future use of #defines and header files in order to define
names for various constants, such as the IDs and flags in GPIO
specifiers. Use of those features will increase the readability of the
device tree files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:49 -06:00
Eric Brower b4dd3e0c0c ARM: tegra: Add gpio-leds to Tegra30 Beaver
Add support for general-purpose LEDs present on Beaver

Signed-off-by: Eric Brower <ebrower@nvidia.com>
[swarren: put new node in correct sort order]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:49 -06:00
Stephen Warren 30022bb43d ARM: tegra: fix memory size on Beaver
Tegra30's boot ROM masks the top 1MiB of RAM. Fix the memory node in
Beaver's DT file to reflect this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:49 -06:00
Joseph Lo a44a019d45 ARM: dts: tegra: add the PM configurations of PMC
Adding the PM configuration of PMC when the platform support suspend
function.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:43 -06:00
Joseph Lo 7a2617a64d ARM: tegra: add non-removable and keep-power-in-suspend property for MMC
This patch adds "non-removable" property of MMC host where the eMMC device
is for Tegra platform.

And the "keep-power-in-suspend" property was used for the SDIO device that
need this to go into suspend mode (e.g. BRCM43xx series).

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:43 -06:00
Joseph Lo 7021d12205 ARM: tegra: add clock source of PMC to device trees
Adding the bindings of the clock source of PMC in DT.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-03 14:29:56 -06:00
Joseph Lo 908ab93688 ARM: dts: tegra: fix the activate polarity of cd-gpio in mmc host
The GPIO pin of SD slot card detection should active low.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-11 14:25:10 -06:00
Stephen Warren abf80c276d ARM: tegra: move serial clock-frequency attr into the Tegra30 dtsi
No Tegra30 Platform is running PLL_P at another rate than 408MHz, nor is
any using any other PLL as UART source clock. Move attribute into SoC
level dtsi file to slim down board DT files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:09 -07:00
Bryan Wu d7df69fe25 ARM: DT: tegra: Add Tegra30 Beaver board support
This patch adds support for Tegra30 Beaver board in upstream kernel.

Beaver board is a Tegra30 SoC based development board, it has
following features:
 - T30 or T33 SoC (Qual core ARM Cortex A9)
 - 2 GB DDR3L
 - 16 GB EMMC
 - 1 SD slot
 - 1 USB Standart A port and 1 USB micro AB port
 - PCI-E Gig Ethernet
 - Audio input/output
 - SATA port
 - HDMI output
 - UART and JTAG

Signed-off-by: Bryan Wu <pengw@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:07 -07:00