Commit Graph

28 Commits

Author SHA1 Message Date
Thierry Reding 02b1fea2e4 ARM: tegra: Enable LVDS on Cardhu
Add backlight and panel nodes for the Cardhu 10.1" WXGA TFT LCD panel.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-19 13:07:38 -07:00
Stephen Warren 553c0a200e ARM: tegra: set up /aliases entries for RTCs
This ensures that the PMIC RTC provides the system time, rather than
the on-SoC RTC, which is not battery-backed.

tegra124-venice2.dts isn't touched yet since we haven't added any off-
SoC RTC device to its device tree.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-18 14:10:48 -07:00
Laxman Dewangan a47c662aad ARM: tegra: convert dts files of Tegra30 platforms to use pinctrl defines
Use Tegra pinconrol dt-binding macro to set the values of different pinmux
properties of Tegra30 platforms.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:20 -07:00
Stephen Warren 578990537a ARM: tegra: fix node sort order
For Tegra DT files, I've been attempting to keep the nodes sorted in
the order:
1) Nodes with reg, in order of reg.
2) Nodes without reg, alphabetically.

This patch fixes a few escapees that I missed:-(

The diffs look larger than they really are, because sometimes when one
node was moved up or down, diff chose to represent this as many other
nodes being moved the other way!

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:17 -07:00
Stephen Warren 58ecb23f64 ARM: tegra: add missing unit addresses to DT
DT node names should include a unit address iff the node has a reg
property. For Tegra DTs at least, we were previously applying a different
rule, namely that node names only needed to include a unit address if it
was required to make the node name unique. Consequently, many unit
addresses are missing. Add them.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-16 14:09:16 -07:00
Wei Ni 7c7de6b03a ARM: tegra: add vcc supply for nct1008 to Cardhu
Add vcc-supply property in the nct1008 node, and set it
as sys_3v3_reg.
change the name of this node to temp-sensor.

Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-10-07 13:17:35 -06:00
Tuomas Tynkkynen cc34c9f79c ARM: tegra: add USB DT entries for Tegra30
Add device tree entries for the 3 USB controllers and PHYs and
enable the third controller on Cardhu and Beaver boards.

Fix VBUS regulator entries on Beaver. The GPIO pins were wrong.
Also, internal pullups need to be enabled on those pins.

Signed-off-by: Tuomas Tynkkynen <ttynkkynen@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-13 12:40:47 -06:00
Jay Agarwal 89e7ada416 ARM: tegra: Enable PCIe controller on Cardhu
Root port 2 is routed to the bottom connector on Cardhu and is used by
the development dock to provide gigabit ethernet and USB functionality.

Signed-off-by: Jay Agarwal <jagarwal@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-12 14:19:33 -06:00
Joseph Lo 47d2d63ba6 ARM: tegra: enable LP1 suspend mode
Enabling the LP1 suspend mode for Tegra devices.

Tested-by: Marc Dietrich <marvin24@gmx.de> # paz00 board
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-08-12 12:23:14 -06:00
Stephen Warren 2b8584d5d2 ARM: tegra: fix DT node ordering in Tegra30 Cardhu
Nodes should be sorted by reg. Fix location of the tps62361 node.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-07-15 11:14:16 -06:00
Wei Ni 74ecab275d ARM: tegra: add DT entry for nct1008 to Cardhu
Enable thermal sensor nct1008 for Tegra30 Cardhu.

Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-07-15 10:46:52 -06:00
Hiroshi Doyu 05849c9381 ARM: tegra30: convert device tree files to use CLK defines
Use the Tegra30 CAR binding header (tegra30-car.h) to replace magic
numbers in the device tree. For example,

-               clocks = <&tegra_car 28>;
+               clocks = <&tegra_car CLK_HOST1X>;

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
[swarren, updated since tegra30-car.h moved for consistency]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:50 -06:00
Stephen Warren 6cecf916b9 ARM: tegra: convert device tree files to use IRQ defines
Use the GIC and standard IRQ binding defines in all IRQ specifiers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:50 -06:00
Stephen Warren 3325f1bcd0 ARM: tegra: convert device tree files to use GPIO defines
Use TEGRA_GPIO() macro to name all GPIOs referenced by GPIO properties,
and some interrupts properties. Use standard GPIO flag defines too.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:49 -06:00
Stephen Warren 1bd0bd499d ARM: tegra: use #include for all device trees
Replace /include/ (dtc) with #include (C pre-processor) for all Tegra DT
files, so that gcc -E handles the entire include tree, and hence any of
those files can #include some other file e.g. for constant definitions.

This allows future use of #defines and header files in order to define
names for various constants, such as the IDs and flags in GPIO
specifiers. Use of those features will increase the readability of the
device tree files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-05-28 16:13:49 -06:00
Joseph Lo a44a019d45 ARM: dts: tegra: add the PM configurations of PMC
Adding the PM configuration of PMC when the platform support suspend
function.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:43 -06:00
Joseph Lo 7a2617a64d ARM: tegra: add non-removable and keep-power-in-suspend property for MMC
This patch adds "non-removable" property of MMC host where the eMMC device
is for Tegra platform.

And the "keep-power-in-suspend" property was used for the SDIO device that
need this to go into suspend mode (e.g. BRCM43xx series).

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:43 -06:00
Stephen Warren f9cd2b3bf4 ARM: tegra: add clocks property to sound nodes
Audio-related clocks need to be represented in the device tree. Update
bindings to describe which clocks are needed, and DT files to include
those clocks.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-04 17:17:42 -06:00
Joseph Lo 7021d12205 ARM: tegra: add clock source of PMC to device trees
Adding the bindings of the clock source of PMC in DT.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-04-03 14:29:56 -06:00
Joseph Lo 908ab93688 ARM: dts: tegra: fix the activate polarity of cd-gpio in mmc host
The GPIO pin of SD slot card detection should active low.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-03-11 14:25:10 -06:00
Stephen Warren abf80c276d ARM: tegra: move serial clock-frequency attr into the Tegra30 dtsi
No Tegra30 Platform is running PLL_P at another rate than 408MHz, nor is
any using any other PLL as UART source clock. Move attribute into SoC
level dtsi file to slim down board DT files.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:09 -07:00
Laxman Dewangan ecfd6c7f05 ARM: tegra: cardhu: register UARTC
UARTC is used for the interfacing with bluetooth device.
Register this UART channel as high speed serial channel
so that it can use the APB DMA for data transfer.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-01-28 11:24:08 -07:00
Laxman Dewangan c42cb1c379 ARM: tegra: dts: cardhu: enable SLINK4
Enable SLINK4 and connected device in Tegra30 based
platform Cardhu.
Setting maximum spi frequency to 25MHz.

SPI serial flash is connected on CS1 of SLINK4 on
cardhu platform.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: swapped reg/compatible order to be consistent]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:07:29 -07:00
Wei Ni 6fb11131ef ARM: dt: t30 cardhu: set pinmux and power for wlan
Configure pinmux as required for WiFi.
Enable the SDHCI1 controller for a02 and a04 board, which is connected to the
WiFi module.
For now, always enable the regulator that provides power to the Wifi module.

Signed-off-by: Wei Ni <wni@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:07:28 -07:00
Stephen Warren b9c665d75b ARM: tegra: update *.dts for regulator-compatible deprecation
Commit 13511de "regulator: deprecate regulator-compatible DT property"
now allows for simpler content within the regulators node within a PMIC.
Modify all the Tegra device tree files to take advantage of this.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Thierry Reding <thierry.reding@avionic-design.de>
2012-11-05 11:36:04 -07:00
Stephen Warren 44b12ef781 ARM: dt: tegra: configure power off for some boards
For Seaboard, Ventana, and Cardhu, add DT property to tell the regulator
that it should provide the pm_power_off() implementation. This allows
"shutdown" to work.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-11 13:48:36 -06:00
Laxman Dewangan fa4a925230 ARM: tegra: cardhu: add dt entry for fixed regulators
Cadhu have multiple power rails which are controlled by
GPIOs. Add support of these power rail control through
fixed regulators. Add entry for all fixed regulators for
cardhu-a02 and a04.
The details are taken from downstream kernel.

Some points on this change are:

* Add the tps65910-LDO5 entry and make it always ON
 to supply power to SDMMC. Once the sd driver support
 regulator handling, this flag will be remove.

* Dropping registration of rail vdd_sdmmc1 as the gpio
  is used by sdhci power-gpio. This need to fix in
  sdhci driver and then need to add the registration
  mechanism. Just removing power-gpio and adding fixed
  regulator with this gpio is causing the sd  access to
  fail because first probe call of this regulator fails
  due to non-available of parent and so it calls
  gpio_free() which disable the pins in gpio mode make
  pin output to LOW causes power to OFF. In probe retry,
  it got success and it powered-on but it again need to
  do again numeration of card here.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-06 11:48:38 -06:00
Laxman Dewangan 640a7af58b ARM: dt: tegra: cardhu: split dts file for support multiple board versions
There is multiple version of cardhu starting from A01 to A07.
Cardhu A01 and A03 are not supported. Cardhu A02 will have
different sets of GPIOs for fixed regulator compare to
cardhu A04. The Cardhu A05, A06, A07 are compatibe with A04.
Based on cardhu version, the related dts file need to be chosen
like for cardhu A02, use tegra30-cardhu-a02.dts, cardhu A04 and
more, use tegra30-cardhu-a04.dts.
This patch create the DTS file A02 and A04 and convert tegra30-cardhu.dts
as dts include file.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-09-06 11:48:38 -06:00