mirror of https://gitee.com/openkylin/linux.git
410 Commits
| Author | SHA1 | Message | Date |
|---|---|---|---|
Suravee Suthikulpanit
|
471036b2b8 |
acpi: pci: Setup MSI domain for ACPI based pci devices
This patch introduces pci_msi_register_fwnode_provider() for irqchip to register a callback, to provide a way to determine appropriate MSI domain for a pci device. It also introduces pci_host_bridge_acpi_msi_domain(), which returns the MSI domain of the specified PCI host bridge with DOMAIN_BUS_PCI_MSI bus token. Then, it is assigned to pci device. Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Rafael J. Wysocki <rjw@rjwysocki.net> Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
|
|
Rafael J. Wysocki
|
a3767e3c9d |
Merge branches 'acpi-smbus', 'acpi-ec' and 'acpi-pci'
* acpi-smbus: Revert "ACPI / SBS: Add 5 us delay to fix SBS hangs on MacBook" ACPI / SMBus: Fix boot stalls / high CPU caused by reentrant code * acpi-ec: ACPI-EC: Drop unnecessary check made before calling acpi_ec_delete_query() * acpi-pci: PCI: Fix OF logic in pci_dma_configure() |
|
|
Suravee Suthikulpanit
|
768acd64d6 |
PCI: Fix OF logic in pci_dma_configure()
This patch fixes a bug introduced by previous commit,
which incorrectly checkes the of_node of the end-point device.
Instead, it should check the of_node of the host bridge.
Fixes:
|
|
|
Linus Torvalds
|
be23c9d20b |
More power management and ACPI updates for v4.4-rc1
- Support for the ACPI _CCA configuration object intended to tell
the OS whether or not a bus master device supports hardware
managed cache coherency and a new set of functions to allow
drivers to check the cache coherency support for devices in a
platform firmware interface agnostic way (Suravee Suthikulpanit,
Jeremy Linton).
- ACPI backlight quirks for ESPRIMO Mobile M9410 and Dell XPS L421X
(Aaron Lu, Hans de Goede).
- Fixes for the arm_big_little and s5pv210-cpufreq cpufreq drivers
(Jon Medhurst, Nicolas Pitre).
- kfree()-related fixup for the recently introduced CPPC cpufreq
frontend (Markus Elfring).
- intel_pstate fix reducing kernel log noise on systems where
P-states are managed by hardware (Prarit Bhargava).
- intel_pstate maintainers information update (Srinivas Pandruvada).
- cpufreq core optimization related to the handling of delayed work
items used by governors (Viresh Kumar).
- Locking fixes and cleanups of the Operating Performance Points
(OPP) framework (Viresh Kumar).
- Generic power domains framework cleanups (Lina Iyer).
- cpupower tool updates (Jacob Tanenbaum, Sriram Raghunathan,
Thomas Renninger).
- turbostat tool updates (Len Brown).
/
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQIcBAABCAAGBQJWQ96OAAoJEILEb/54YlRxyYYQALJ1HXu76SvYX1re2aawOw6Y
WgzF3Ly7JX034E1VvA2xP6wgkWpBRBDcpnRDeltNA4dYXPBDei/eTcRZTLX12N3g
AfFRGjGWTtLJfpNPecNMmUyF5xHjgDgMIQRabY+Is5NfP5STkPHJeqULnEpvTtx8
bd0lnC5jc4vuZiPEh1xVb+ClYDqWS8YQPyFJVjV/BaIf8Qwe5+oRX36byMBaKc9D
ZgmvmCk5n/HLQQ1uQsqe4xnhFLHN2rypt2BLvFrOtlnSz9VNNpQyB+OIW1mgCD4f
LhpKIwjP8NhZNQUq8HFu7nDlm8ciQtWmeMPB5NdGQ+OESu7yfKAOzQ+3U6Gl2Gaf
66zVGyV6SOJJwfDVJ3qKTtroWps9QV7ZClOJ+zJGgiujwU+tJ3pDQyZM9pa7CL3C
s7ZAUsI6IigSBjD3nJVOyG4DO0a8KQFCIE1mDmyqId45Qz8xJoOrYP33/ZnDuOdo
2OtL/emyfWsz9ixbHVfwIhb7EC6aoaUxQrhSWmNraaQS43YfioZR7h4we8gwenph
X4E1KY4SdML+uFf2VKIcd45NM3IBprCxx5UgFAJdrqe8+otqPNF2AVosG4iqhg/b
k4nxwuIvw2a8Fm77U9ytyXDYMItU/wIlAHMbnmgx+oTwRv6AbZ07MHkyfuQLYuhD
tq5Y14qSiTS7prNacx98
=XZiP
-----END PGP SIGNATURE-----
Merge tag 'pm+acpi-4.4-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull more power management and ACPI updates from Rafael Wysocki:
"The only new feature in this batch is support for the ACPI _CCA device
configuration object, which it a pre-requisite for future ACPI PCI
support on ARM64, but should not affect the other architectures.
The rest is fixes and cleanups, mostly in cpufreq (including
intel_pstate), the Operating Performace Points (OPP) framework and
tools (cpupower and turbostat).
Specifics:
- Support for the ACPI _CCA configuration object intended to tell the
OS whether or not a bus master device supports hardware managed
cache coherency and a new set of functions to allow drivers to
check the cache coherency support for devices in a platform
firmware interface agnostic way (Suravee Suthikulpanit, Jeremy
Linton).
- ACPI backlight quirks for ESPRIMO Mobile M9410 and Dell XPS L421X
(Aaron Lu, Hans de Goede).
- Fixes for the arm_big_little and s5pv210-cpufreq cpufreq drivers
(Jon Medhurst, Nicolas Pitre).
- kfree()-related fixup for the recently introduced CPPC cpufreq
frontend (Markus Elfring).
- intel_pstate fix reducing kernel log noise on systems where
P-states are managed by hardware (Prarit Bhargava).
- intel_pstate maintainers information update (Srinivas Pandruvada).
- cpufreq core optimization related to the handling of delayed work
items used by governors (Viresh Kumar).
- Locking fixes and cleanups of the Operating Performance Points
(OPP) framework (Viresh Kumar).
- Generic power domains framework cleanups (Lina Iyer).
- cpupower tool updates (Jacob Tanenbaum, Sriram Raghunathan, Thomas
Renninger).
- turbostat tool updates (Len Brown)"
* tag 'pm+acpi-4.4-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (32 commits)
PCI: ACPI: Add support for PCI device DMA coherency
PCI: OF: Move of_pci_dma_configure() to pci_dma_configure()
of/pci: Fix pci_get_host_bridge_device leak
device property: ACPI: Remove unused DMA APIs
device property: ACPI: Make use of the new DMA Attribute APIs
device property: Adding DMA Attribute APIs for Generic Devices
ACPI: Adding DMA Attribute APIs for ACPI Device
device property: Introducing enum dev_dma_attr
ACPI: Honor ACPI _CCA attribute setting
cpufreq: CPPC: Delete an unnecessary check before the function call kfree()
PM / OPP: Add opp_rcu_lockdep_assert() to _find_device_opp()
PM / OPP: Hold dev_opp_list_lock for writers
PM / OPP: Protect updates to list_dev with mutex
PM / OPP: Propagate error properly from dev_pm_opp_set_sharing_cpus()
cpufreq: s5pv210-cpufreq: fix wrong do_div() usage
MAINTAINERS: update for intel P-state driver
Creating a common structure initialization pattern for struct option
cpupower: Enable disabled Cstates if they are below max latency
cpupower: Remove debug message when using cpupower idle-set -D switch
cpupower: cpupower monitor reports uninitialized values for offline cpus
...
|
|
|
Rafael J. Wysocki
|
f2115faaf0 |
Merge branch 'acpi-pci'
* acpi-pci: PCI: ACPI: Add support for PCI device DMA coherency PCI: OF: Move of_pci_dma_configure() to pci_dma_configure() of/pci: Fix pci_get_host_bridge_device leak device property: ACPI: Remove unused DMA APIs device property: ACPI: Make use of the new DMA Attribute APIs device property: Adding DMA Attribute APIs for Generic Devices ACPI: Adding DMA Attribute APIs for ACPI Device device property: Introducing enum dev_dma_attr ACPI: Honor ACPI _CCA attribute setting Conflicts: drivers/crypto/ccp/ccp-platform.c |
|
|
Suthikulpanit, Suravee
|
29dbe1f0af |
PCI: ACPI: Add support for PCI device DMA coherency
This patch adds support for setting up PCI device DMA coherency from ACPI _CCA object that should normally be specified in the DSDT node of its PCI host bridge. Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
|
|
Suthikulpanit, Suravee
|
50230713b6 |
PCI: OF: Move of_pci_dma_configure() to pci_dma_configure()
This patch move of_pci_dma_configure() to a more generic pci_dma_configure(), which can be extended by non-OF code (e.g. ACPI). This has no functional change. Signed-off-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> Acked-by: Rob Herring <robh+dt@kernel.org> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
|
|
Linus Torvalds
|
3c87b79188 |
PCI changes for the v4.4 merge window:
Resource management
Add support for Enhanced Allocation devices (Sean O. Stalley)
Add Enhanced Allocation register entries (Sean O. Stalley)
Handle IORESOURCE_PCI_FIXED when sizing resources (David Daney)
Handle IORESOURCE_PCI_FIXED when assigning resources (David Daney)
Handle Enhanced Allocation capability for SR-IOV devices (David Daney)
Clear IORESOURCE_UNSET when reverting to firmware-assigned address (Bjorn Helgaas)
Make Enhanced Allocation bitmasks more obvious (Bjorn Helgaas)
Expand Enhanced Allocation BAR output (Bjorn Helgaas)
Add of_pci_check_probe_only to parse "linux,pci-probe-only" (Marc Zyngier)
Fix lookup of linux,pci-probe-only property (Marc Zyngier)
Add sparc mem64 resource parsing for root bus (Yinghai Lu)
PCI device hotplug
pciehp: Queue power work requests in dedicated function (Guenter Roeck)
Driver binding
Add builtin_pci_driver() to avoid registration boilerplate (Paul Gortmaker)
Virtualization
Set SR-IOV NumVFs to zero after enumeration (Alexander Duyck)
Remove redundant validation of SR-IOV offset/stride registers (Alexander Duyck)
Remove VFs in reverse order if virtfn_add() fails (Alexander Duyck)
Reorder pcibios_sriov_disable() (Alexander Duyck)
Wait 1 second between disabling VFs and clearing NumVFs (Alexander Duyck)
Fix sriov_enable() error path for pcibios_enable_sriov() failures (Alexander Duyck)
Enable SR-IOV ARI Capable Hierarchy before reading TotalVFs (Ben Shelton)
Don't try to restore VF BARs (Wei Yang)
MSI
Don't alloc pcibios-irq when MSI is enabled (Joerg Roedel)
Add msi_controller setup_irqs() method for special multivector setup (Lucas Stach)
Export all remapped MSIs to sysfs attributes (Romain Bezut)
Disable MSI on SiS 761 (Ondrej Zary)
AER
Clear error status registers during enumeration and restore (Taku Izumi)
Generic host bridge driver
Fix lookup of linux,pci-probe-only property (Marc Zyngier)
Allow multiple hosts with different map_bus() methods (David Daney)
Pass starting bus number to pci_scan_root_bus() (David Daney)
Fix address window calculation for non-zero starting bus (David Daney)
Altera host bridge driver
Add msi.h to ARM Kbuild (Ley Foon Tan)
Add Altera PCIe host controller driver (Ley Foon Tan)
Add Altera PCIe MSI driver (Ley Foon Tan)
APM X-Gene host bridge driver
Remove msi_controller assignment (Duc Dang)
Broadcom iProc host bridge driver
Fix header comment "Corporation" misspelling (Florian Fainelli)
Fix code comment to match code (Ray Jui)
Remove unused struct iproc_pcie.irqs[] (Ray Jui)
Call pci_fixup_irqs() for ARM64 as well as ARM (Ray Jui)
Fix PCIe reset logic (Ray Jui)
Improve link detection logic (Ray Jui)
Update PCIe device tree bindings (Ray Jui)
Add outbound mapping support (Ray Jui)
Freescale i.MX6 host bridge driver
Return real error code from imx6_add_pcie_port() (Fabio Estevam)
Add PCIE_PHY_RX_ASIC_OUT_VALID definition (Fabio Estevam)
Freescale Layerscape host bridge driver
Remove ls_pcie_establish_link() (Minghuan Lian)
Ignore PCIe controllers in Endpoint mode (Minghuan Lian)
Factor out SCFG related function (Minghuan Lian)
Update ls_add_pcie_port() (Minghuan Lian)
Remove unused fields from struct ls_pcie (Minghuan Lian)
Add support for LS1043a and LS2080a (Minghuan Lian)
Add ls_pcie_msi_host_init() (Minghuan Lian)
HiSilicon host bridge driver
Add HiSilicon SoC Hip05 PCIe driver (Zhou Wang)
Marvell MVEBU host bridge driver
Return zero for reserved or unimplemented config space (Russell King)
Use exact config access size; don't read/modify/write (Russell King)
Use of_get_available_child_count() (Russell King)
Use for_each_available_child_of_node() to walk child nodes (Russell King)
Report full node name when reporting a DT error (Russell King)
Use port->name rather than "PCIe%d.%d" (Russell King)
Move port parsing and resource claiming to separate function (Russell King)
Fix memory leaks and refcount leaks (Russell King)
Split port parsing and resource claiming from port setup (Russell King)
Use gpio_set_value_cansleep() (Russell King)
Use devm_kcalloc() to allocate an array (Russell King)
Use gpio_desc to carry around gpio (Russell King)
Improve clock/reset handling (Russell King)
Add PCI Express root complex capability block (Russell King)
Remove code restricting accesses to slot 0 (Russell King)
NVIDIA Tegra host bridge driver
Wrap static pgprot_t initializer with __pgprot() (Ard Biesheuvel)
Renesas R-Car host bridge driver
Build pci-rcar-gen2.c only on ARM (Geert Uytterhoeven)
Build pcie-rcar.c only on ARM (Geert Uytterhoeven)
Make PCI aware of the I/O resources (Phil Edworthy)
Remove dependency on ARM-specific struct hw_pci (Phil Edworthy)
Set root bus nr to that provided in DT (Phil Edworthy)
Fix I/O offset for multiple host bridges (Phil Edworthy)
ST Microelectronics SPEAr13xx host bridge driver
Fix dw_pcie_cfg_read/write() usage (Gabriele Paoloni)
Synopsys DesignWare host bridge driver
Make "clocks" and "clock-names" optional DT properties (Bhupesh Sharma)
Use exact access size in dw_pcie_cfg_read() (Gabriele Paoloni)
Simplify dw_pcie_cfg_read/write() interfaces (Gabriele Paoloni)
Require config accesses to be naturally aligned (Gabriele Paoloni)
Make "num-lanes" an optional DT property (Gabriele Paoloni)
Move calculation of bus addresses to DRA7xx (Gabriele Paoloni)
Replace ARM pci_sys_data->align_resource with global function pointer (Gabriele Paoloni)
Factor out MSI msg setup (Lucas Stach)
Implement multivector MSI IRQ setup (Lucas Stach)
Make get_msi_addr() return phys_addr_t, not u32 (Lucas Stach)
Set up high part of MSI target address (Lucas Stach)
Fix PORT_LOGIC_LINK_WIDTH_MASK (Zhou Wang)
Revert "PCI: designware: Program ATU with untranslated address" (Zhou Wang)
Use of_pci_get_host_bridge_resources() to parse DT (Zhou Wang)
Make driver arch-agnostic (Zhou Wang)
Miscellaneous
Make x86 pci_subsys_init() static (Alexander Kuleshov)
Turn off Request Attributes to avoid Chelsio T5 Completion erratum (Hariprasad Shenai)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWPM9aAAoJEFmIoMA60/r89f8QALFMHegqKk5M08ZcCaG7unLF
5U5t88y6KF/kNYF6HOqLQiHh79U3ToU5HdrNaAtutr0UnvgbFC2WulLqKYgLiq6Y
YJnwR3EfgGmdG7DKAVAXq19+nc2hgTPAEe8sciU7HKlTbqQmGj6//y3sQULGNLx3
zur0C33DCtrDgKDP7to273lkHO8Vl0YuLzyqwt0ePCMNcXR0h1dK8QxSTjuXBxaR
c+T1V1Hw64MTxLz3xJd1/1ipy32u+9LnqqcdRz0zRq6qi48G9ch/i4Z6DHa8kTbj
DUZrrTYKILQ2TcjcZSBmTueX11Z1Xa4/I/45sehIi6gVWL9qQbmGpt2E5YtFED+4
GdcmBSbWG/qsNsabXk38uiM3ww7+ltXEOhTXbcK+EgjvIhE6gSK/plYG0fU9pybs
AKViEXVdHoT1X0N1dLK12mq7kvDCQvShHn08lz97Q9YrZ32wv1Fnij6WVSbJvfWt
DubtPtisVM+rVy+VTpOImNR9wO54lTmG5jK53yNqH7I20K89y1kqARlN9nMXMB1a
2nQnwe9yWlsGj9gVNCn1KmyQSPOWjg+3Z+ekfwbxpca14s1AaN3Jm0N9Z61dXFoF
y2ygoQtZ/z9BHr3quBpxXGt+aVUg2kcNw5GYeDYiALxXdJSObyzRrZ6HDb/zicU2
ZH9hBj0ctXvucmy6I2mt
=uZrt
-----END PGP SIGNATURE-----
Merge tag 'pci-v4.4-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas:
"Resource management:
- Add support for Enhanced Allocation devices (Sean O. Stalley)
- Add Enhanced Allocation register entries (Sean O. Stalley)
- Handle IORESOURCE_PCI_FIXED when sizing resources (David Daney)
- Handle IORESOURCE_PCI_FIXED when assigning resources (David Daney)
- Handle Enhanced Allocation capability for SR-IOV devices (David Daney)
- Clear IORESOURCE_UNSET when reverting to firmware-assigned address (Bjorn Helgaas)
- Make Enhanced Allocation bitmasks more obvious (Bjorn Helgaas)
- Expand Enhanced Allocation BAR output (Bjorn Helgaas)
- Add of_pci_check_probe_only to parse "linux,pci-probe-only" (Marc Zyngier)
- Fix lookup of linux,pci-probe-only property (Marc Zyngier)
- Add sparc mem64 resource parsing for root bus (Yinghai Lu)
PCI device hotplug:
- pciehp: Queue power work requests in dedicated function (Guenter Roeck)
Driver binding:
- Add builtin_pci_driver() to avoid registration boilerplate (Paul Gortmaker)
Virtualization:
- Set SR-IOV NumVFs to zero after enumeration (Alexander Duyck)
- Remove redundant validation of SR-IOV offset/stride registers (Alexander Duyck)
- Remove VFs in reverse order if virtfn_add() fails (Alexander Duyck)
- Reorder pcibios_sriov_disable() (Alexander Duyck)
- Wait 1 second between disabling VFs and clearing NumVFs (Alexander Duyck)
- Fix sriov_enable() error path for pcibios_enable_sriov() failures (Alexander Duyck)
- Enable SR-IOV ARI Capable Hierarchy before reading TotalVFs (Ben Shelton)
- Don't try to restore VF BARs (Wei Yang)
MSI:
- Don't alloc pcibios-irq when MSI is enabled (Joerg Roedel)
- Add msi_controller setup_irqs() method for special multivector setup (Lucas Stach)
- Export all remapped MSIs to sysfs attributes (Romain Bezut)
- Disable MSI on SiS 761 (Ondrej Zary)
AER:
- Clear error status registers during enumeration and restore (Taku Izumi)
Generic host bridge driver:
- Fix lookup of linux,pci-probe-only property (Marc Zyngier)
- Allow multiple hosts with different map_bus() methods (David Daney)
- Pass starting bus number to pci_scan_root_bus() (David Daney)
- Fix address window calculation for non-zero starting bus (David Daney)
Altera host bridge driver:
- Add msi.h to ARM Kbuild (Ley Foon Tan)
- Add Altera PCIe host controller driver (Ley Foon Tan)
- Add Altera PCIe MSI driver (Ley Foon Tan)
APM X-Gene host bridge driver:
- Remove msi_controller assignment (Duc Dang)
Broadcom iProc host bridge driver:
- Fix header comment "Corporation" misspelling (Florian Fainelli)
- Fix code comment to match code (Ray Jui)
- Remove unused struct iproc_pcie.irqs[] (Ray Jui)
- Call pci_fixup_irqs() for ARM64 as well as ARM (Ray Jui)
- Fix PCIe reset logic (Ray Jui)
- Improve link detection logic (Ray Jui)
- Update PCIe device tree bindings (Ray Jui)
- Add outbound mapping support (Ray Jui)
Freescale i.MX6 host bridge driver:
- Return real error code from imx6_add_pcie_port() (Fabio Estevam)
- Add PCIE_PHY_RX_ASIC_OUT_VALID definition (Fabio Estevam)
Freescale Layerscape host bridge driver:
- Remove ls_pcie_establish_link() (Minghuan Lian)
- Ignore PCIe controllers in Endpoint mode (Minghuan Lian)
- Factor out SCFG related function (Minghuan Lian)
- Update ls_add_pcie_port() (Minghuan Lian)
- Remove unused fields from struct ls_pcie (Minghuan Lian)
- Add support for LS1043a and LS2080a (Minghuan Lian)
- Add ls_pcie_msi_host_init() (Minghuan Lian)
HiSilicon host bridge driver:
- Add HiSilicon SoC Hip05 PCIe driver (Zhou Wang)
Marvell MVEBU host bridge driver:
- Return zero for reserved or unimplemented config space (Russell King)
- Use exact config access size; don't read/modify/write (Russell King)
- Use of_get_available_child_count() (Russell King)
- Use for_each_available_child_of_node() to walk child nodes (Russell King)
- Report full node name when reporting a DT error (Russell King)
- Use port->name rather than "PCIe%d.%d" (Russell King)
- Move port parsing and resource claiming to separate function (Russell King)
- Fix memory leaks and refcount leaks (Russell King)
- Split port parsing and resource claiming from port setup (Russell King)
- Use gpio_set_value_cansleep() (Russell King)
- Use devm_kcalloc() to allocate an array (Russell King)
- Use gpio_desc to carry around gpio (Russell King)
- Improve clock/reset handling (Russell King)
- Add PCI Express root complex capability block (Russell King)
- Remove code restricting accesses to slot 0 (Russell King)
NVIDIA Tegra host bridge driver:
- Wrap static pgprot_t initializer with __pgprot() (Ard Biesheuvel)
Renesas R-Car host bridge driver:
- Build pci-rcar-gen2.c only on ARM (Geert Uytterhoeven)
- Build pcie-rcar.c only on ARM (Geert Uytterhoeven)
- Make PCI aware of the I/O resources (Phil Edworthy)
- Remove dependency on ARM-specific struct hw_pci (Phil Edworthy)
- Set root bus nr to that provided in DT (Phil Edworthy)
- Fix I/O offset for multiple host bridges (Phil Edworthy)
ST Microelectronics SPEAr13xx host bridge driver:
- Fix dw_pcie_cfg_read/write() usage (Gabriele Paoloni)
Synopsys DesignWare host bridge driver:
- Make "clocks" and "clock-names" optional DT properties (Bhupesh Sharma)
- Use exact access size in dw_pcie_cfg_read() (Gabriele Paoloni)
- Simplify dw_pcie_cfg_read/write() interfaces (Gabriele Paoloni)
- Require config accesses to be naturally aligned (Gabriele Paoloni)
- Make "num-lanes" an optional DT property (Gabriele Paoloni)
- Move calculation of bus addresses to DRA7xx (Gabriele Paoloni)
- Replace ARM pci_sys_data->align_resource with global function pointer (Gabriele Paoloni)
- Factor out MSI msg setup (Lucas Stach)
- Implement multivector MSI IRQ setup (Lucas Stach)
- Make get_msi_addr() return phys_addr_t, not u32 (Lucas Stach)
- Set up high part of MSI target address (Lucas Stach)
- Fix PORT_LOGIC_LINK_WIDTH_MASK (Zhou Wang)
- Revert "PCI: designware: Program ATU with untranslated address" (Zhou Wang)
- Use of_pci_get_host_bridge_resources() to parse DT (Zhou Wang)
- Make driver arch-agnostic (Zhou Wang)
Miscellaneous:
- Make x86 pci_subsys_init() static (Alexander Kuleshov)
- Turn off Request Attributes to avoid Chelsio T5 Completion erratum (Hariprasad Shenai)"
* tag 'pci-v4.4-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (94 commits)
PCI: altera: Add Altera PCIe MSI driver
PCI: hisi: Add HiSilicon SoC Hip05 PCIe driver
PCI: layerscape: Add ls_pcie_msi_host_init()
PCI: layerscape: Add support for LS1043a and LS2080a
PCI: layerscape: Remove unused fields from struct ls_pcie
PCI: layerscape: Update ls_add_pcie_port()
PCI: layerscape: Factor out SCFG related function
PCI: layerscape: Ignore PCIe controllers in Endpoint mode
PCI: layerscape: Remove ls_pcie_establish_link()
PCI: designware: Make "clocks" and "clock-names" optional DT properties
PCI: designware: Make driver arch-agnostic
ARM/PCI: Replace pci_sys_data->align_resource with global function pointer
PCI: designware: Use of_pci_get_host_bridge_resources() to parse DT
Revert "PCI: designware: Program ATU with untranslated address"
PCI: designware: Move calculation of bus addresses to DRA7xx
PCI: designware: Make "num-lanes" an optional DT property
PCI: designware: Require config accesses to be naturally aligned
PCI: designware: Simplify dw_pcie_cfg_read/write() interfaces
PCI: designware: Use exact access size in dw_pcie_cfg_read()
PCI: spear: Fix dw_pcie_cfg_read/write() usage
...
|
|
|
Bjorn Helgaas
|
1f9a30ec2a |
Merge branches 'pci/aer', 'pci/hotplug', 'pci/misc', 'pci/msi', 'pci/resource' and 'pci/virtualization' into next
* pci/aer: PCI/AER: Clear error status registers during enumeration and restore * pci/hotplug: PCI: pciehp: Queue power work requests in dedicated function * pci/misc: PCI: Turn off Request Attributes to avoid Chelsio T5 Completion erratum x86/PCI: Make pci_subsys_init() static PCI: Add builtin_pci_driver() to avoid registration boilerplate PCI: Remove unnecessary "if" statement * pci/msi: x86/PCI: Don't alloc pcibios-irq when MSI is enabled PCI/MSI: Export all remapped MSIs to sysfs attributes PCI: Disable MSI on SiS 761 * pci/resource: sparc/PCI: Add mem64 resource parsing for root bus PCI: Expand Enhanced Allocation BAR output PCI: Make Enhanced Allocation bitmasks more obvious PCI: Handle Enhanced Allocation capability for SR-IOV devices PCI: Add support for Enhanced Allocation devices PCI: Add Enhanced Allocation register entries PCI: Handle IORESOURCE_PCI_FIXED when assigning resources PCI: Handle IORESOURCE_PCI_FIXED when sizing resources PCI: Clear IORESOURCE_UNSET when reverting to firmware-assigned address * pci/virtualization: PCI: Fix sriov_enable() error path for pcibios_enable_sriov() failures PCI: Wait 1 second between disabling VFs and clearing NumVFs PCI: Reorder pcibios_sriov_disable() PCI: Remove VFs in reverse order if virtfn_add() fails PCI: Remove redundant validation of SR-IOV offset/stride registers PCI: Set SR-IOV NumVFs to zero after enumeration PCI: Enable SR-IOV ARI Capable Hierarchy before reading TotalVFs PCI: Don't try to restore VF BARs |
|
|
Sean O. Stalley
|
938174e59f |
PCI: Add support for Enhanced Allocation devices
Add support for devices using Enhanced Allocation entries instead of BARs. This allows the kernel to parse the EA Extended Capability structure in PCI config space and claim the BAR-equivalent resources. See https://pcisig.com/sites/default/files/specification_documents/ECN_Enhanced_Allocation_23_Oct_2014_Final.pdf [bhelgaas: add spec URL, s/pci_ea_set_flags/pci_ea_flags/, consolidate declarations, print unknown property in hex to match spec] Signed-off-by: Sean O. Stalley <sean.stalley@intel.com> [david.daney@cavium.com: Add more support/checking for Entry Properties, allow EA behind bridges, rewrite some error messages.] Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
|
|
Marc Zyngier
|
54fa97eeb9 |
PCI/MSI: Allow the MSI domain to be device-specific
So far, we've always considered that for a given PCI device, its MSI controller was either set by the architecture-specific pcibios hook, or simply inherited from the host bridge. This doesn't cover things like firmware-defined topologies like msi-map (DT) or IORT (ACPI), which can provide information about which MSI controller to use on a per-device basis. This patch adds the necessary hook into the MSI code to allow this feature, and provides the msi-map functionnality as a first implementation. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
|
|
Marc Zyngier
|
098259eb16 |
PCI: Add per-device MSI domain hook
So far, we have considered that the MSI domain for a device was either set via the architecture-dependent pcibios implementation or inherited from the host bridge. As we're about to break that assumption, add pci_dev_msi_domain which is the equivalent of pci_host_bridge_msi_domain, but for a single device. Other than moving things around a bit, this patch on its own has no effect. Acked-by: Rob Herring <robh@kernel.org> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> |
|
|
Alex Williamson
|
38ea72bdb6 |
PCI/MSI: Fix MSI IRQ domains for VFs on virtual buses
SR-IOV creates a virtual bus where bus->self is NULL. When we add VFs and
scan for an MSI domain, pci_set_bus_msi_domain() dereferences bus->self,
which causes a kernel NULL pointer dereference oops.
Scan up to the parent bus until we find a real bridge where we can get the
MSI domain.
[bhelgaas: changelog]
Fixes:
|
|
|
Taku Izumi
|
b07461a8e4 |
PCI/AER: Clear error status registers during enumeration and restore
AER errors might be recorded when powering-on devices. These errors can be ignored, so firmware usually clears them before the OS enumerates devices. However, firmware is not involved when devices are added via hotplug, so the OS may discover power-up errors that should be ignored. The same may happen when powering up devices when resuming after suspend. Clear the AER error status registers during enumeration and resume. [bhelgaas: changelog, remove repetitive comments] Signed-off-by: Taku Izumi <izumi.taku@jp.fujitsu.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
|
|
Bjorn Helgaas
|
237865f195 |
PCI: Revert "PCI: Call pci_read_bridge_bases() from core instead of arch code"
Revert |
|
|
Linus Torvalds
|
12f03ee606 |
libnvdimm for 4.3:
1/ Introduce ZONE_DEVICE and devm_memremap_pages() as a generic
mechanism for adding device-driver-discovered memory regions to the
kernel's direct map. This facility is used by the pmem driver to
enable pfn_to_page() operations on the page frames returned by DAX
('direct_access' in 'struct block_device_operations'). For now, the
'memmap' allocation for these "device" pages comes from "System
RAM". Support for allocating the memmap from device memory will
arrive in a later kernel.
2/ Introduce memremap() to replace usages of ioremap_cache() and
ioremap_wt(). memremap() drops the __iomem annotation for these
mappings to memory that do not have i/o side effects. The
replacement of ioremap_cache() with memremap() is limited to the
pmem driver to ease merging the api change in v4.3. Completion of
the conversion is targeted for v4.4.
3/ Similar to the usage of memcpy_to_pmem() + wmb_pmem() in the pmem
driver, update the VFS DAX implementation and PMEM api to provide
persistence guarantees for kernel operations on a DAX mapping.
4/ Convert the ACPI NFIT 'BLK' driver to map the block apertures as
cacheable to improve performance.
5/ Miscellaneous updates and fixes to libnvdimm including support
for issuing "address range scrub" commands, clarifying the optimal
'sector size' of pmem devices, a clarification of the usage of the
ACPI '_STA' (status) property for DIMM devices, and other minor
fixes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJV6Nx7AAoJEB7SkWpmfYgCWyYQAI5ju6Gvw27RNFtPovHcZUf5
JGnxXejI6/AqeTQ+IulgprxtEUCrXOHjCDA5dkjr1qvsoqK1qxug+vJHOZLgeW0R
OwDtmdW4Qrgeqm+CPoxETkorJ8wDOc8mol81kTiMgeV3UqbYeeHIiTAmwe7VzZ0C
nNdCRDm5g8dHCjTKcvK3rvozgyoNoWeBiHkPe76EbnxDICxCB5dak7XsVKNMIVFQ
NuYlnw6IYN7+rMHgpgpRux38NtIW8VlYPWTmHExejc2mlioWMNBG/bmtwLyJ6M3e
zliz4/cnonTMUaizZaVozyinTa65m7wcnpjK+vlyGV2deDZPJpDRvSOtB0lH30bR
1gy+qrKzuGKpaN6thOISxFLLjmEeYwzYd7SvC9n118r32qShz+opN9XX0WmWSFlA
sajE1ehm4M7s5pkMoa/dRnAyR8RUPu4RNINdQ/Z9jFfAOx+Q26rLdQXwf9+uqbEb
bIeSQwOteK5vYYCstvpAcHSMlJAglzIX5UfZBvtEIJN7rlb0VhmGWfxAnTu+ktG1
o9cqAt+J4146xHaFwj5duTsyKhWb8BL9+xqbKPNpXEp+PbLsrnE/+WkDLFD67jxz
dgIoK60mGnVXp+16I2uMqYYDgAyO5zUdmM4OygOMnZNa1mxesjbDJC6Wat1Wsndn
slsw6DkrWT60CRE42nbK
=o57/
-----END PGP SIGNATURE-----
Merge tag 'libnvdimm-for-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm
Pull libnvdimm updates from Dan Williams:
"This update has successfully completed a 0day-kbuild run and has
appeared in a linux-next release. The changes outside of the typical
drivers/nvdimm/ and drivers/acpi/nfit.[ch] paths are related to the
removal of IORESOURCE_CACHEABLE, the introduction of memremap(), and
the introduction of ZONE_DEVICE + devm_memremap_pages().
Summary:
- Introduce ZONE_DEVICE and devm_memremap_pages() as a generic
mechanism for adding device-driver-discovered memory regions to the
kernel's direct map.
This facility is used by the pmem driver to enable pfn_to_page()
operations on the page frames returned by DAX ('direct_access' in
'struct block_device_operations').
For now, the 'memmap' allocation for these "device" pages comes
from "System RAM". Support for allocating the memmap from device
memory will arrive in a later kernel.
- Introduce memremap() to replace usages of ioremap_cache() and
ioremap_wt(). memremap() drops the __iomem annotation for these
mappings to memory that do not have i/o side effects. The
replacement of ioremap_cache() with memremap() is limited to the
pmem driver to ease merging the api change in v4.3.
Completion of the conversion is targeted for v4.4.
- Similar to the usage of memcpy_to_pmem() + wmb_pmem() in the pmem
driver, update the VFS DAX implementation and PMEM api to provide
persistence guarantees for kernel operations on a DAX mapping.
- Convert the ACPI NFIT 'BLK' driver to map the block apertures as
cacheable to improve performance.
- Miscellaneous updates and fixes to libnvdimm including support for
issuing "address range scrub" commands, clarifying the optimal
'sector size' of pmem devices, a clarification of the usage of the
ACPI '_STA' (status) property for DIMM devices, and other minor
fixes"
* tag 'libnvdimm-for-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm: (34 commits)
libnvdimm, pmem: direct map legacy pmem by default
libnvdimm, pmem: 'struct page' for pmem
libnvdimm, pfn: 'struct page' provider infrastructure
x86, pmem: clarify that ARCH_HAS_PMEM_API implies PMEM mapped WB
add devm_memremap_pages
mm: ZONE_DEVICE for "device memory"
mm: move __phys_to_pfn and __pfn_to_phys to asm/generic/memory_model.h
dax: drop size parameter to ->direct_access()
nd_blk: change aperture mapping from WC to WB
nvdimm: change to use generic kvfree()
pmem, dax: have direct_access use __pmem annotation
dax: update I/O path to do proper PMEM flushing
pmem: add copy_from_iter_pmem() and clear_pmem()
pmem, x86: clean up conditional pmem includes
pmem: remove layer when calling arch_has_wmb_pmem()
pmem, x86: move x86 PMEM API to new pmem.h header
libnvdimm, e820: make CONFIG_X86_PMEM_LEGACY a tristate option
pmem: switch to devm_ allocations
devres: add devm_memremap
libnvdimm, btt: write and validate parent_uuid
...
|
|
|
Linus Torvalds
|
17e6b00ac4 |
Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq updates from Thomas Gleixner:
"This updated pull request does not contain the last few GIC related
patches which were reported to cause a regression. There is a fix
available, but I let it breed for a couple of days first.
The irq departement provides:
- new infrastructure to support non PCI based MSI interrupts
- a couple of new irq chip drivers
- the usual pile of fixlets and updates to irq chip drivers
- preparatory changes for removal of the irq argument from interrupt
flow handlers
- preparatory changes to remove IRQF_VALID"
* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (129 commits)
irqchip/imx-gpcv2: IMX GPCv2 driver for wakeup sources
irqchip: Add bcm2836 interrupt controller for Raspberry Pi 2
irqchip: Add documentation for the bcm2836 interrupt controller
irqchip/bcm2835: Add support for being used as a second level controller
irqchip/bcm2835: Refactor handle_IRQ() calls out of MAKE_HWIRQ
PCI: xilinx: Fix typo in function name
irqchip/gic: Ensure gic_cpu_if_up/down() programs correct GIC instance
irqchip/gic: Only allow the primary GIC to set the CPU map
PCI/MSI: pci-xgene-msi: Consolidate chained IRQ handler install/remove
unicore32/irq: Prepare puv3_gpio_handler for irq argument removal
tile/pci_gx: Prepare trio_handle_level_irq for irq argument removal
m68k/irq: Prepare irq handlers for irq argument removal
C6X/megamode-pic: Prepare megamod_irq_cascade for irq argument removal
blackfin: Prepare irq handlers for irq argument removal
arc/irq: Prepare idu_cascade_isr for irq argument removal
sparc/irq: Use access helper irq_data_get_affinity_mask()
sparc/irq: Use helper irq_data_get_irq_handler_data()
parisc/irq: Use access helper irq_data_get_affinity_mask()
mn10300/irq: Use access helper irq_data_get_affinity_mask()
irqchip/i8259: Prepare i8259_irq_dispatch for irq argument removal
...
|
|
|
Linus Torvalds
|
26f8b7edc9 |
PCI changes for the v4.3 merge window:
Enumeration
Allocate ATS struct during enumeration (Bjorn Helgaas)
Embed ATS info directly into struct pci_dev (Bjorn Helgaas)
Reduce size of ATS structure elements (Bjorn Helgaas)
Stop caching ATS Invalidate Queue Depth (Bjorn Helgaas)
iommu/vt-d: Cache PCI ATS state and Invalidate Queue Depth (Bjorn Helgaas)
Move MPS configuration check to pci_configure_device() (Bjorn Helgaas)
Set MPS to match upstream bridge (Keith Busch)
ARM/PCI: Set MPS before pci_bus_add_devices() (Murali Karicheri)
Add pci_scan_root_bus_msi() (Lorenzo Pieralisi)
ARM/PCI, designware, xilinx: Use pci_scan_root_bus_msi() (Lorenzo Pieralisi)
Resource management
Call pci_read_bridge_bases() from core instead of arch code (Lorenzo Pieralisi)
PCI device hotplug
pciehp: Remove unused interrupt events (Bjorn Helgaas)
pciehp: Remove ignored MRL sensor interrupt events (Bjorn Helgaas)
pciehp: Handle invalid data when reading from non-existent devices (Jarod Wilson)
pciehp: Simplify pcie_poll_cmd() (Yijing Wang)
Use "slot" and "pci_slot" for struct hotplug_slot and struct pci_slot (Yijing Wang)
Protect pci_bus->slots with pci_slot_mutex, not pci_bus_sem (Yijing Wang)
Hold pci_slot_mutex while searching bus->slots list (Yijing Wang)
Power management
Disable async suspend/resume for JMicron multi-function SATA/AHCI (Zhang Rui)
Virtualization
Add ACS quirks for Intel I219-LM/V (Alex Williamson)
Restore ACS configuration as part of pci_restore_state() (Alexander Duyck)
MSI
Add pcibios_alloc_irq() and pcibios_free_irq() (Jiang Liu)
x86: Implement pcibios_alloc_irq() and pcibios_free_irq() (Jiang Liu)
Add helpers to manage pci_dev->irq and pci_dev->irq_managed (Jiang Liu)
Free legacy IRQ when enabling MSI/MSI-X (Jiang Liu)
ARM/PCI: Remove msi_controller from struct pci_sys_data (Lorenzo Pieralisi)
Remove unused pcibios_msi_controller() hook (Lorenzo Pieralisi)
Generic host bridge driver
Remove dependency on ARM-specific struct hw_pci (Jayachandran C)
Build setup-irq.o for arm64 (Jayachandran C)
Add arm64 support (Jayachandran C)
APM X-Gene host bridge driver
Add APM X-Gene PCIe 64-bit prefetchable window (Duc Dang)
Add support for a 64-bit prefetchable memory window (Duc Dang)
Drop owner assignment from platform_driver (Krzysztof Kozlowski)
Broadcom iProc host bridge driver
Allow BCMA bus driver to be built as module (Hauke Mehrtens)
Delete unnecessary checks before phy calls (Markus Elfring)
Add arm64 support (Ray Jui)
Synopsys DesignWare host bridge driver
Don't complain missing *config* reg space if va_cfg0 is set (Murali Karicheri)
TI DRA7xx host bridge driver
Disable pm_runtime on get_sync failure (Kishon Vijay Abraham I)
Add PM support (Kishon Vijay Abraham I)
Clear MSE bit during suspend so clocks will idle (Kishon Vijay Abraham I)
Add support to make GPIO drive PERST# line (Kishon Vijay Abraham I)
Xilinx AXI host bridge driver
Check for MSI interrupt flag before handling as INTx (Russell Joyce)
Miscellaneous
Fix Intersil/Techwell TW686[4589] AV capture class code (Krzysztof Hałasa)
Use PCI_CLASS_SERIAL_USB instead of bare number (Bjorn Helgaas)
Fix generic NCR 53c810 class code quirk (Bjorn Helgaas)
Fix TI816X class code quirk (Bjorn Helgaas)
Remove unused "pci_probe" flags (Bjorn Helgaas)
Host bridge driver code simplifications (Fabio Estevam)
Add dev_flags bit to access VPD through function 0 (Mark Rustad)
Add VPD function 0 quirk for Intel Ethernet devices (Mark Rustad)
Kill off set_irq_flags() usage (Rob Herring)
Remove Intel Cherrytrail D3 delays (Srinidhi Kasagar)
Clean up pci_find_capability() (Wei Yang)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJV5FE/AAoJEFmIoMA60/r8I2QP/R9b9MrvH2i9tN98/lTDl7g3
czE58ZM1d4kMYtW3Pm/DrYI6y6RprAaB4ZEp5rHxlFLqBPZEQwWodA19NkjECcb6
g5qKWOdIWA4T6Jaab6a/yCmAFa0jni7iAmmTYqca9o3Xj7tFovxDxqPSYkh+rer0
v+1sAr/4HXSiN339KR6teEF3VZqLFp6ewMydQlVS+R7kAOHHYQDqoo9WF6JnIoL5
PO3Kbmr1WN3fZY3s98yLq1x6XmLrLlmGdJI+2r+KewO4r/05CL6wTVP/oTMi+Eti
dueseeISlOTcTAUhk87Vap23uJPeB/rJbYoFdCr7+0AkZGe/U/E2dpZm2wyMcCvq
OrATuFymgzIuJm5uUPsdH4lzsX97U9BcDccracfC38rYnP5u3bqHCjw8HJzANR7p
VYbFBzc5ZCCUYtQAjyrKt2820AvTFo+Bu+z75IsJO8LQQgv/zGtQQ8grIQeAjH+l
sAe3xOTwzZnq6Obl4qb/GElHmIGUbQ1X4Dx1mliiijKMKkhYHOA0iFnB/OBILmEZ
wHzKU8chWcI9lip0aaX8q9i/qovdVUt2+rdo/N40l7YY66x4jkNgQQXZX+FSKk6H
stTvEBQgK28EKCHDxMsgzTGIqllSyk4DnRMA7ij1hRWqdUbGk7wOPTvm9QSwNDWe
SokuWzAQD9YeMRGdsYjZ
=DX1r
-----END PGP SIGNATURE-----
Merge tag 'pci-v4.3-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI updates from Bjorn Helgaas:
"PCI changes for the v4.3 merge window:
Enumeration:
- Allocate ATS struct during enumeration (Bjorn Helgaas)
- Embed ATS info directly into struct pci_dev (Bjorn Helgaas)
- Reduce size of ATS structure elements (Bjorn Helgaas)
- Stop caching ATS Invalidate Queue Depth (Bjorn Helgaas)
- iommu/vt-d: Cache PCI ATS state and Invalidate Queue Depth (Bjorn Helgaas)
- Move MPS configuration check to pci_configure_device() (Bjorn Helgaas)
- Set MPS to match upstream bridge (Keith Busch)
- ARM/PCI: Set MPS before pci_bus_add_devices() (Murali Karicheri)
- Add pci_scan_root_bus_msi() (Lorenzo Pieralisi)
- ARM/PCI, designware, xilinx: Use pci_scan_root_bus_msi() (Lorenzo Pieralisi)
Resource management:
- Call pci_read_bridge_bases() from core instead of arch code (Lorenzo Pieralisi)
PCI device hotplug:
- pciehp: Remove unused interrupt events (Bjorn Helgaas)
- pciehp: Remove ignored MRL sensor interrupt events (Bjorn Helgaas)
- pciehp: Handle invalid data when reading from non-existent devices (Jarod Wilson)
- pciehp: Simplify pcie_poll_cmd() (Yijing Wang)
- Use "slot" and "pci_slot" for struct hotplug_slot and struct pci_slot (Yijing Wang)
- Protect pci_bus->slots with pci_slot_mutex, not pci_bus_sem (Yijing Wang)
- Hold pci_slot_mutex while searching bus->slots list (Yijing Wang)
Power management:
- Disable async suspend/resume for JMicron multi-function SATA/AHCI (Zhang Rui)
Virtualization:
- Add ACS quirks for Intel I219-LM/V (Alex Williamson)
- Restore ACS configuration as part of pci_restore_state() (Alexander Duyck)
MSI:
- Add pcibios_alloc_irq() and pcibios_free_irq() (Jiang Liu)
- x86: Implement pcibios_alloc_irq() and pcibios_free_irq() (Jiang Liu)
- Add helpers to manage pci_dev->irq and pci_dev->irq_managed (Jiang Liu)
- Free legacy IRQ when enabling MSI/MSI-X (Jiang Liu)
- ARM/PCI: Remove msi_controller from struct pci_sys_data (Lorenzo Pieralisi)
- Remove unused pcibios_msi_controller() hook (Lorenzo Pieralisi)
Generic host bridge driver:
- Remove dependency on ARM-specific struct hw_pci (Jayachandran C)
- Build setup-irq.o for arm64 (Jayachandran C)
- Add arm64 support (Jayachandran C)
APM X-Gene host bridge driver:
- Add APM X-Gene PCIe 64-bit prefetchable window (Duc Dang)
- Add support for a 64-bit prefetchable memory window (Duc Dang)
- Drop owner assignment from platform_driver (Krzysztof Kozlowski)
Broadcom iProc host bridge driver:
- Allow BCMA bus driver to be built as module (Hauke Mehrtens)
- Delete unnecessary checks before phy calls (Markus Elfring)
- Add arm64 support (Ray Jui)
Synopsys DesignWare host bridge driver:
- Don't complain missing *config* reg space if va_cfg0 is set (Murali Karicheri)
TI DRA7xx host bridge driver:
- Disable pm_runtime on get_sync failure (Kishon Vijay Abraham I)
- Add PM support (Kishon Vijay Abraham I)
- Clear MSE bit during suspend so clocks will idle (Kishon Vijay Abraham I)
- Add support to make GPIO drive PERST# line (Kishon Vijay Abraham I)
Xilinx AXI host bridge driver:
- Check for MSI interrupt flag before handling as INTx (Russell Joyce)
Miscellaneous:
- Fix Intersil/Techwell TW686[4589] AV capture class code (Krzysztof Hałasa)
- Use PCI_CLASS_SERIAL_USB instead of bare number (Bjorn Helgaas)
- Fix generic NCR 53c810 class code quirk (Bjorn Helgaas)
- Fix TI816X class code quirk (Bjorn Helgaas)
- Remove unused "pci_probe" flags (Bjorn Helgaas)
- Host bridge driver code simplifications (Fabio Estevam)
- Add dev_flags bit to access VPD through function 0 (Mark Rustad)
- Add VPD function 0 quirk for Intel Ethernet devices (Mark Rustad)
- Kill off set_irq_flags() usage (Rob Herring)
- Remove Intel Cherrytrail D3 delays (Srinidhi Kasagar)
- Clean up pci_find_capability() (Wei Yang)"
* tag 'pci-v4.3-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (72 commits)
PCI: Disable async suspend/resume for JMicron multi-function SATA/AHCI
PCI: Set MPS to match upstream bridge
PCI: Move MPS configuration check to pci_configure_device()
PCI: Drop references acquired by of_parse_phandle()
PCI/MSI: Remove unused pcibios_msi_controller() hook
ARM/PCI: Remove msi_controller from struct pci_sys_data
ARM/PCI, designware, xilinx: Use pci_scan_root_bus_msi()
PCI: Add pci_scan_root_bus_msi()
ARM/PCI: Replace panic with WARN messages on failures
PCI: generic: Add arm64 support
PCI: Build setup-irq.o for arm64
PCI: generic: Remove dependency on ARM-specific struct hw_pci
PCI: imx6: Simplify a trivial if-return sequence
PCI: spear: Use BUG_ON() instead of condition followed by BUG()
PCI: dra7xx: Remove unneeded use of IS_ERR_VALUE()
PCI: Remove pci_ats_enabled()
PCI: Stop caching ATS Invalidate Queue Depth
PCI: Move ATS declarations to linux/pci.h so they're all together
PCI: Clean up ATS error handling
PCI: Use pci_physfn() rather than looking up physfn by hand
...
|
|
|
Bjorn Helgaas
|
9ca678d1df |
Merge branches 'pci/enumeration' and 'pci/misc' into next
* pci/enumeration: PCI: Set MPS to match upstream bridge PCI: Move MPS configuration check to pci_configure_device() PCI: Drop references acquired by of_parse_phandle() PCI/MSI: Remove unused pcibios_msi_controller() hook ARM/PCI: Remove msi_controller from struct pci_sys_data ARM/PCI, designware, xilinx: Use pci_scan_root_bus_msi() PCI: Add pci_scan_root_bus_msi() ARM/PCI: Replace panic with WARN messages on failures PCI: generic: Add arm64 support PCI: Build setup-irq.o for arm64 PCI: generic: Remove dependency on ARM-specific struct hw_pci ARM/PCI: Set MPS before pci_bus_add_devices() * pci/misc: PCI: Disable async suspend/resume for JMicron multi-function SATA/AHCI |
|
|
Guilherme G. Piccoli
|
22b6839b91 |
PCI: Make pci_msi_setup_pci_dev() non-static for use by arch code
Commit |
|
|
Keith Busch
|
27d868b5e6 |
PCI: Set MPS to match upstream bridge
Firmware typically configures the PCIe fabric with a consistent Max Payload Size setting based on the devices present at boot. A hot-added device typically has the power-on default MPS setting (128 bytes), which may not match the fabric. The previous Linux default, in the absence of any "pci=pcie_bus_*" options, was PCIE_BUS_TUNE_OFF, in which we never touch MPS, even for hot-added devices. Add a new default setting, PCIE_BUS_DEFAULT, in which we make sure every device's MPS setting matches the upstream bridge. This makes it more likely that a hot-added device will work in a system with optimized MPS configuration. Note that if we hot-add a device that only supports 128-byte MPS, it still likely won't work because we don't reconfigure the rest of the fabric. Booting with "pci=pcie_bus_peer2peer" is a workaround for this because it sets MPS to 128 for everything. [bhelgaas: changelog, new default, rework for pci_configure_device() path] Tested-by: Keith Busch <keith.busch@intel.com> Tested-by: Jordan Hargrave <jharg93@gmail.com> Signed-off-by: Keith Busch <keith.busch@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Yinghai Lu <yinghai@kernel.org> |
|
|
Bjorn Helgaas
|
9dae3a9729 |
PCI: Move MPS configuration check to pci_configure_device()
Previously we checked for invalid MPS settings, i.e., a device with MPS different than its upstream bridge, in pcie_bus_detect_mps(). We only did this if the arch or hotplug driver called pcie_bus_configure_settings(), and then only if PCIe bus tuning was disabled (PCIE_BUS_TUNE_OFF). Move the MPS checking code to pci_configure_device(), so we do it in the pci_device_add() path for every device. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
|
|
Lorenzo Pieralisi
|
d2a7926d42 |
PCI: Add pci_scan_root_bus_msi()
Add a pci_scan_root_bus_msi() interface so an arch can specify the MSI controller up front. This removes the need for a pcibios callback to set the MSI controller later. This is not exported because I'd like to replace the variety of "scan root bus" interfaces with a single, more extensible interface that can handle the MSI controller, domain, pci_ops, resources, etc. I hope this interface is temporary. [bhelgaas: changelog, split into separate patch] Suggested-by: Russell King <linux@arm.linux.org.uk> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Jingoo Han <jingoohan1@gmail.com> |
|
|
Yijing Wang
|
b35b1df5e6 |
PCI: Tolerate hierarchies with no Root Port
We should not assume any particular hardware topology. Commit
|
|
|
Bjorn Helgaas
|
1f408d5743 |
Merge branches 'pci/hotplug', 'pci/iommu', 'pci/irq' and 'pci/virtualization' into next
* pci/hotplug: PCI: pciehp: Remove ignored MRL sensor interrupt events PCI: pciehp: Remove unused interrupt events PCI: pciehp: Handle invalid data when reading from non-existent devices PCI: Hold pci_slot_mutex while searching bus->slots list PCI: Protect pci_bus->slots with pci_slot_mutex, not pci_bus_sem PCI: pciehp: Simplify pcie_poll_cmd() PCI: Use "slot" and "pci_slot" for struct hotplug_slot and struct pci_slot * pci/iommu: PCI: Remove pci_ats_enabled() PCI: Stop caching ATS Invalidate Queue Depth PCI: Move ATS declarations to linux/pci.h so they're all together PCI: Clean up ATS error handling PCI: Use pci_physfn() rather than looking up physfn by hand PCI: Inline the ATS setup code into pci_ats_init() PCI: Rationalize pci_ats_queue_depth() error checking PCI: Reduce size of ATS structure elements PCI: Embed ATS info directly into struct pci_dev PCI: Allocate ATS struct during enumeration iommu/vt-d: Cache PCI ATS state and Invalidate Queue Depth * pci/irq: PCI: Kill off set_irq_flags() usage * pci/virtualization: PCI: Add ACS quirks for Intel I219-LM/V |
|
|
Bjorn Helgaas
|
edc90fee91 |
PCI: Allocate ATS struct during enumeration
Previously, we allocated pci_ats structures when an IOMMU driver called
pci_enable_ats(). An SR-IOV VF shares the STU setting with its PF, so when
enabling ATS on the VF, we allocated a pci_ats struct for the PF if it
didn't already have one. We held the sriov->lock to serialize threads
concurrently enabling ATS on several VFS so only one would allocate the PF
pci_ats.
Gregor reported a deadlock here:
pci_enable_sriov
sriov_enable
virtfn_add
mutex_lock(dev->sriov->lock) # acquire sriov->lock
pci_device_add
device_add
BUS_NOTIFY_ADD_DEVICE notifier chain
iommu_bus_notifier
amd_iommu_add_device # iommu_ops.add_device
init_iommu_group
iommu_group_get_for_dev
iommu_group_add_device
__iommu_attach_device
amd_iommu_attach_device # iommu_ops.attach_device
attach_device
pci_enable_ats
mutex_lock(dev->sriov->lock) # deadlock
There's no reason to delay allocating the pci_ats struct, and if we
allocate it for each device at enumeration-time, there's no need for
locking in pci_enable_ats().
Allocate pci_ats struct during enumeration, when we initialize other
capabilities.
Note that this implementation requires ATS to be enabled on the PF first,
before on any of the VFs because the PF controls the STU for all the VFs.
Link: http://permalink.gmane.org/gmane.linux.kernel.iommu/9433
Reported-by: Gregor Dick <gdick@solarflare.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Joerg Roedel <jroedel@suse.de>
|
|
|
Dan Williams
|
92b19ff50e |
cleanup IORESOURCE_CACHEABLE vs ioremap()
Quoting Arnd:
I was thinking the opposite approach and basically removing all uses
of IORESOURCE_CACHEABLE from the kernel. There are only a handful of
them.and we can probably replace them all with hardcoded
ioremap_cached() calls in the cases they are actually useful.
All existing usages of IORESOURCE_CACHEABLE call ioremap() instead of
ioremap_nocache() if the resource is cacheable, however ioremap() is
uncached by default. Clearly none of the existing usages care about the
cacheability. Particularly devm_ioremap_resource() never worked as
advertised since it always fell back to plain ioremap().
Clean this up as the new direction we want is to convert
ioremap_<type>() usages to memremap(..., flags).
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
|
|
|
Bjorn Helgaas
|
5a4f3cf0d1 |
Merge branches 'pci/irq', 'pci/misc', 'pci/resource' and 'pci/virtualization' into next
* pci/irq:
PCI/MSI: Free legacy IRQ when enabling MSI/MSI-X
PCI: Add helpers to manage pci_dev->irq and pci_dev->irq_managed
PCI, x86: Implement pcibios_alloc_irq() and pcibios_free_irq()
PCI: Add pcibios_alloc_irq() and pcibios_free_irq()
* pci/misc:
PCI: Remove unused "pci_probe" flags
PCI: Add VPD function 0 quirk for Intel Ethernet devices
PCI: Add dev_flags bit to access VPD through function 0
PCI / ACPI: Fix pci_acpi_optimize_delay() comment
PCI: Remove a broken link in quirks.c
PCI: Remove useless redundant code
PCI: Simplify pci_find_(ext_)capability() return value checks
PCI: Move PCI_FIND_CAP_TTL to pci.h and use it in quirks
PCI: Add pcie_downstream_port() (true for Root and Switch Downstream Ports)
PCI: Fix pcie_port_device_resume() comment
PCI: Shift PCI_CLASS_NOT_DEFINED consistently with other classes
PCI: Revert
|
|
|
Yijing Wang
|
017ffe64e8 |
PCI: Hold pci_slot_mutex while searching bus->slots list
Previously, pci_setup_device() and similar functions searched the pci_bus->slots list without any locking. It was possible for another thread to update the list while we searched it. Add pci_dev_assign_slot() to search the list while holding pci_slot_mutex. [bhelgaas: changelog, fold in CONFIG_SYSFS fix] Tested-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
|
|
Marc Zyngier
|
b165e2b60b |
PCI/MSI: Add support for OF-provided msi_domain
In order to populate the PCI host bridge msi_domain, use the "msi-parent" attribute to lookup a corresponding irq domain. If found, this is our MSI domain. This gets plugged into the core PCI code. Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: Yijing Wang <wangyijing@huawei.com> Cc: Ma Jun <majun258@huawei.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Duc Dang <dhdang@apm.com> Cc: Hanjun Guo <hanjun.guo@linaro.org> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/1438091186-10244-6-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de> |
|
|
Marc Zyngier
|
44aa0c657e |
PCI/MSI: Add hooks to populate the msi_domain field
In order to be able to populate the device msi_domain field, add the necessary hooks to propagate the host bridge msi_domain across secondary busses to devices. So far, nobody populates the initial msi_domain. Acked-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Cc: <linux-arm-kernel@lists.infradead.org> Cc: Yijing Wang <wangyijing@huawei.com> Cc: Ma Jun <majun258@huawei.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Duc Dang <dhdang@apm.com> Cc: Jiang Liu <jiang.liu@linux.intel.com> Cc: Jason Cooper <jason@lakedaemon.net> Link: http://lkml.kernel.org/r/1438091186-10244-5-git-send-email-marc.zyngier@arm.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de> |
|
|
Lorenzo Pieralisi
|
dff22d2054 |
PCI: Call pci_read_bridge_bases() from core instead of arch code
When we scan a PCI bus, we read PCI-PCI bridge window registers with pci_read_bridge_bases() so we can validate the resource hierarchy. Most architectures call pci_read_bridge_bases() from pcibios_fixup_bus(), but PCI-PCI bridges are not arch-specific, so this doesn't need to be in arch-specific code. Call pci_read_bridge_bases() directly from the PCI core instead of from arch code. For alpha and mips, we now call pci_read_bridge_bases() always; previously we only called it if PCI_PROBE_ONLY was set. [bhelgaas: changelog] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Ralf Baechle <ralf@linux-mips.org> CC: James E.J. Bottomley <jejb@parisc-linux.org> CC: Michael Ellerman <mpe@ellerman.id.au> CC: Bjorn Helgaas <bhelgaas@google.com> CC: Richard Henderson <rth@twiddle.net> CC: Benjamin Herrenschmidt <benh@kernel.crashing.org> CC: David Howells <dhowells@redhat.com> CC: Russell King <linux@arm.linux.org.uk> CC: Tony Luck <tony.luck@intel.com> CC: David S. Miller <davem@davemloft.net> CC: Ingo Molnar <mingo@redhat.com> CC: Guenter Roeck <linux@roeck-us.net> CC: Michal Simek <monstr@monstr.eu> CC: Chris Zankel <chris@zankel.net> |
|
|
Bjorn Helgaas
|
2b4aed1d1f |
PCI: Shift PCI_CLASS_NOT_DEFINED consistently with other classes
The PCI class in dev->class is a three-byte value comprising a base class, sub-class, and interface type. PCI_CLASS_NOT_DEFINED includes the base class and sub-class, but not the interface type, so it should be shifted to make space for the interface. It happens that PCI_CLASS_NOT_DEFINED is zero, so it doesn't matter in the end, but we should still use it consistently with other class definitions. Treat PCI_CLASS_NOT_DEFINED as a base class/sub-class value that should appear in bits 8-23 of dev->class. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
|
|
Bjorn Helgaas
|
0ff9b9bad6 |
Merge branches 'pci/aspm', 'pci/enumeration', 'pci/hotplug', 'pci/misc', 'pci/msi', 'pci/resource' and 'pci/virtualization' into next
* pci/aspm: PCI/ASPM: Simplify Clock Power Management setting PCI: Use dev->has_secondary_link to find downstream PCIe links PCI/ASPM: Use dev->has_secondary_link to find downstream links PCI: Add dev->has_secondary_link to track downstream PCIe links PCI/ASPM: Remove redundant PCIe port type checking PCI/ASPM: Drop __pci_disable_link_state() useless "force" parameter * pci/enumeration: PCI: Remove unused pci_scan_bus_parented() xen/pcifront: Don't use deprecated function pci_scan_bus_parented() PCI: designware: Use pci_scan_root_bus() for simplicity PCI: tegra: Remove tegra_pcie_scan_bus() PCI: mvebu: Remove mvebu_pcie_scan_bus() * pci/hotplug: PCI: pciehp: Wait for hotplug command completion where necessary PCI: Propagate the "ignore hotplug" setting to parent ACPI / hotplug / PCI: Check ignore_hotplug for all downstream devices PCI: pciehp: Drop pointless label from pciehp_probe() PCI: pciehp: Drop pointless ACPI-based "slot detection" check * pci/misc: PCI: Remove unused pci_dma_burst_advice() PCI: Remove unused pcibios_select_root() (again) PCI: Remove unnecessary #includes of <asm/pci.h> PCI: Include <linux/pci.h>, not <asm/pci.h> * pci/msi: PCI/MSI: Remove unused pci_msi_off() PCI/MSI: Drop pci_msi_off() calls from quirks ntb: Drop pci_msi_off() call during probe virtio_pci: drop pci_msi_off() call during probe PCI/MSI: Disable MSI at enumeration even if kernel doesn't support MSI PCI/MSI: Export pci_msi_set_enable(), pci_msix_clear_and_set_ctrl() PCI/MSI: Rename msi_set_enable(), msix_clear_and_set_ctrl() * pci/resource: PCI: Add pci_bus_addr_t * pci/virtualization: ACPI / PCI: Account for ARI in _PRT lookups PCI: Move pci_ari_enabled() to global header PCI: Add function 1 DMA alias quirk for Marvell 9120 PCI: Add ACS quirks for Intel 9-series PCH root ports |
|
|
Yijing Wang
|
c0300089fd |
PCI: Remove unused pci_scan_bus_parented()
No one uses pci_scan_bus_parented() any more, remove it. Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
|
|
Yinghai Lu
|
3a9ad0b4fd |
PCI: Add pci_bus_addr_t
David Ahern reported that |
|
|
Yijing Wang
|
777e61ea40 |
PCI: Use dev->has_secondary_link to find downstream PCIe links
Previously we assumed that PCIe Root Ports and Downstream Ports had Links on their secondary side. That is true in most systems, but it is possible to connect a switch with either an Upstream or a Downstream Port leading downstream. Instead of relying on the component type to identify devices that have links leading downstream, use the "dev->has_secondary_link" field. [bhelgaas: changelog] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> |
|
|
Yijing Wang
|
d0751b98df |
PCI: Add dev->has_secondary_link to track downstream PCIe links
A PCIe Port is an interface to a Link. A Root Port is a PCI-PCI bridge in
a Root Complex and has a Link on its secondary (downstream) side. For
other Ports, the Link may be on either the upstream (closer to the Root
Complex) or downstream side of the Port.
The usual topology has a Root Port connected to an Upstream Port. We
previously assumed this was the only possible topology, and that a
Downstream Port's Link was always on its downstream side, like this:
+---------------------+
+------+ | Downstream |
| Root | | Upstream Port +--Link--
| Port +--Link--+ Port |
+------+ | Downstream |
| Port +--Link--
+---------------------+
But systems do exist (see URL below) where the Root Port is connected to a
Downstream Port. In this case, a Downstream Port's Link may be on either
the upstream or downstream side:
+---------------------+
+------+ | Upstream |
| Root | | Downstream Port +--Link--
| Port +--Link--+ Port |
+------+ | Downstream |
| Port +--Link--
+---------------------+
We can't use the Port type to determine which side the Link is on, so add a
bit in struct pci_dev to keep track.
A Root Port's Link is always on the Port's secondary side. A component
(Endpoint or Port) on the other end of the Link obviously has the Link on
its upstream side. If that component is a Port, it is part of a Switch or
a Bridge. A Bridge has a PCI or PCI-X bus on its secondary side, not a
Link. The internal bus of a Switch connects the Port to another Port whose
Link is on the downstream side.
[bhelgaas: changelog, comment, cache "type", use if/else]
Link: http://lkml.kernel.org/r/54EB81B2.4050904@pobox.com
Link: https://bugzilla.kernel.org/show_bug.cgi?id=94361
Suggested-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
|
|
|
Michael S. Tsirkin
|
1851617cd2 |
PCI/MSI: Disable MSI at enumeration even if kernel doesn't support MSI
If we enable MSI, then kexec a new kernel, the new kernel may receive MSIs
it is not prepared for. Commit
|
|
|
Bjorn Helgaas
|
4dd1f57956 |
Merge branches 'pci/host-exynos', 'pci/host-iproc', 'pci/host-keystone', 'pci/host-layerscape', 'pci/host-mvebu', 'pci/host-rcar' and 'pci/host-versatile' into next
* pci/host-exynos: PCI: exynos: Fix INTx enablement statement termination error * pci/host-iproc: PCI: iproc: Add Broadcom iProc PCIe support PCI: iproc: Add DT docs for Broadcom iProc PCIe driver PCI: Export symbols required for loadable host driver modules * pci/host-keystone: PCI: keystone: Don't dereference possible NULL pointer * pci/host-layerscape: PCI: layerscape: Simplify platform_get_resource_byname() failure checking * pci/host-mvebu: PCI: mvebu: Add suspend/resume support * pci/host-rcar: PCI: rcar: Verify that mem_res is 64K-aligned PCI: rcar: Change PCIEPARL and PCIEPARH to PCIEPALR and PCIEPAUR PCI: rcar: Write zeroes to reserved PCIEPARL bits PCI: rcar: Fix position of MSI enable bit * pci/host-versatile: PCI: versatile: Check for devm_ioremap_resource() failures |
|
|
Ray Jui
|
e6b29deafa |
PCI: Export symbols required for loadable host driver modules
Export the following symbols so they can be referenced by a PCI host bridge driver compiled as a kernel loadable module: pci_common_swizzle pci_create_root_bus pci_stop_root_bus pci_remove_root_bus pci_assign_unassigned_bus_resources pci_fixup_irqs Signed-off-by: Ray Jui <rjui@broadcom.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Arnd Bergmann <arnd@arndb.de> |
|
|
Bjorn Helgaas
|
8e795840e4 |
Merge branches 'pci/enumeration' and 'pci/virtualization' into next
* pci/enumeration: PCI: Cleanup control flow sparc/PCI: Claim bus resources before pci_bus_add_devices() PCI: Assign resources before drivers claim devices (pci_scan_root_bus()) PCI: Assign resources before drivers claim devices (pci_scan_bus()) * pci/virtualization: PCI: Add ACS quirks for Intel 1G NICs |
|
|
Yijing Wang
|
b97ea289cf |
PCI: Assign resources before drivers claim devices (pci_scan_root_bus())
Previously, pci_scan_root_bus() created a root PCI bus, enumerated the
devices on it, and called pci_bus_add_devices(), which made the devices
available for drivers to claim them.
Most callers assigned resources to devices after pci_scan_root_bus()
returns, which may be after drivers have claimed the devices. This is
incorrect; the PCI core should not change device resources while a driver
is managing the device.
Remove pci_bus_add_devices() from pci_scan_root_bus() and do it after any
resource assignment in the callers.
Note that ARM's pci_common_init_dev() already called pci_bus_add_devices()
after pci_scan_root_bus(), so we only need to remove the first call:
pci_common_init_dev
pcibios_init_hw
pci_scan_root_bus
pci_bus_add_devices # first call
pci_bus_assign_resources
pci_bus_add_devices # second call
[bhelgaas: changelog, drop "root_bus" var in alpha common_init_pci(),
return failure earlier in mn10300, add "return" in x86 pcibios_scan_root(),
return early if xtensa platform_pcibios_fixup() fails]
Signed-off-by: Yijing Wang <wangyijing@huawei.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
CC: Richard Henderson <rth@twiddle.net>
CC: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
CC: Matt Turner <mattst88@gmail.com>
CC: David Howells <dhowells@redhat.com>
CC: Tony Luck <tony.luck@intel.com>
CC: Michal Simek <monstr@monstr.eu>
CC: Ralf Baechle <ralf@linux-mips.org>
CC: Koichi Yasutake <yasutake.koichi@jp.panasonic.com>
CC: Sebastian Ott <sebott@linux.vnet.ibm.com>
CC: "David S. Miller" <davem@davemloft.net>
CC: Chris Metcalf <cmetcalf@ezchip.com>
CC: Chris Zankel <chris@zankel.net>
CC: Max Filippov <jcmvbkbc@gmail.com>
CC: Thomas Gleixner <tglx@linutronix.de>
|
|
|
Yijing Wang
|
c90570d951 |
PCI: Assign resources before drivers claim devices (pci_scan_bus())
Previously, pci_scan_bus() created a root PCI bus, enumerated the devices on it, and called pci_bus_add_devices(), which made the devices available for drivers to claim them. Most callers assigned resources to devices after pci_scan_bus() returns, which may be after drivers have claimed the devices. This is incorrect; the PCI core should not change device resources while a driver is managing the device. Remove pci_bus_add_devices() from pci_scan_bus() and do it after any resource assignment in the callers. [bhelgaas: changelog, check for failure in mcf_pci_init()] Signed-off-by: Yijing Wang <wangyijing@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: "David S. Miller" <davem@davemloft.net> CC: Geert Uytterhoeven <geert@linux-m68k.org> CC: Guan Xuetao <gxt@mprc.pku.edu.cn> CC: Richard Henderson <rth@twiddle.net> CC: Ivan Kokshaysky <ink@jurassic.park.msu.ru> CC: Matt Turner <mattst88@gmail.com> |
|
|
Murali Karicheri
|
de335bb492 |
PCI: Update DMA configuration from DT
If there is a DT node available for the root bridge's parent device, use the DMA configuration from that device node. For example, Keystone PCI devices would require dma_pfn_offset to be set correctly in the device structure of the PCI device in order to have the correct DMA mask. The DT node will have dma-ranges defined for this. Also support using the DT property dma-coherent to allow coherent DMA operation by the PCI device. Use the new helper function of_pci_dma_configure() to update the device DMA configuration. This fixes DMA on systems where DMA addresses are a constant offset from CPU physical addresses. Tested-by: Suravee Suthikulpanit <Suravee.Suthikulpanit@amd.com> (AMD Seattle) Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> CC: Joerg Roedel <joro@8bytes.org> CC: Grant Likely <grant.likely@linaro.org> CC: Rob Herring <robh+dt@kernel.org> CC: Russell King <linux@arm.linux.org.uk> CC: Arnd Bergmann <arnd@arndb.de> |
|
|
Jiang Liu
|
14d76b68f2 |
PCI: Use common resource list management code instead of private implementation
Use common resource list management data structure and interfaces instead of private implementation. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Acked-by: Will Deacon <will.deacon@arm.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> |
|
|
Linus Torvalds
|
c75059c462 |
PCI changes for the v3.19 merge window:
NUMA
- Allow numa_node override via sysfs (Prarit Bhargava)
Resource management
- Restore detection of read-only BARs (Myron Stowe)
- Shrink decoding-disabled window while sizing BARs (Myron Stowe)
- Add informational printk for invalid BARs (Myron Stowe)
- Remove fixed parameter in pci_iov_resource_bar() (Myron Stowe)
MSI
- Add pci_msi_ignore_mask to prevent writes to MSI/MSI-X Mask Bits (Yijing Wang)
- Revert "PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()" (Yijing Wang)
- s390/MSI: Use __msi_mask_irq() instead of default_msi_mask_irq() (Yijing Wang)
Virtualization
- xen: Process failure for pcifront_(re)scan_root() (Chen Gang)
- Make FLR and AF FLR reset warning messages different (Gavin Shan)
Generic host bridge driver
- Allocate config space windows after limiting bus number range (Lorenzo Pieralisi)
- Convert to DT resource parsing API (Lorenzo Pieralisi)
Freescale Layerscape
- Add Freescale Layerscape PCIe driver (Minghuan Lian)
NVIDIA Tegra
- Do not build on 64-bit ARM (Thierry Reding)
- Add Kconfig help text (Thierry Reding)
Renesas R-Car
- Make rcar_pci static (Jingoo Han)
Samsung Exynos
- Add exynos prefix to add_pcie_port(), pcie_init() (Jingoo Han)
ST Microelectronics SPEAr13xx
- Add spear prefix to add_pcie_port(), pcie_init() (Jingoo Han)
- Make spear13xx_add_pcie_port() __init (Jingoo Han)
- Remove unnecessary OOM message (Jingoo Han)
TI DRA7xx
- Add dra7xx prefix to add_pcie_port() (Jingoo Han)
- Make dra7xx_add_pcie_port() __init (Jingoo Han)
TI Keystone
- Make ks_dw_pcie_msi_domain_ops static (Jingoo Han)
- Remove unnecessary OOM message (Jingoo Han)
Miscellaneous
- Delete unnecessary NULL pointer checks (Markus Elfring)
- Remove unused to_hotplug_slot() (Gavin Shan)
- Whitespace cleanup (Jingoo Han)
- Simplify if-return sequences (Quentin Lambert)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJUhik9AAoJEFmIoMA60/r8tAQQAJ3Rv5MlHt63cXxgIMOcoLrR
OsFvW+2oMTyUkGg69SgI3YfF9IBjdwkJ3U6OnpfPGcbKyQvmSTxwCEZPVYM9r3mC
1UknItYLXSFsz682sXGrepHoL/N3Im0fhu56oEJwIL+htHNMgGKk+Sk6yW9rBVvz
J7fw31mlrs5YnjkLvwbDjmS3fpCmjqb5fkNlZHxwKcPtM/ODfbRnYYvSucN9Relt
xy2MyuXlZvp7aPwi03z7utZx1ezjzfVlGNlCWyVINERvqbKYeIrAGbfwmVdCVRRf
2kqNS5N6B1IHq6iHg5xbjh9ZOdzYu2bPO4v7qgDEUDWzT0JTes4mOrv5NJWk4ZV/
0erFLOkaCzHpriAXYN8qSfJilm40EYt+hKQI3f8jaTEOycOTWgOcVh9ci7uaNWgX
6Ia9Ch+FXbMg3deL+MwfFQFNbkMzgeNihLZW7xf54psWJobQ3v4eG2KTRqCaOqI0
87tMWPSzOqqnQEUWGw0rTSS7P5UxgKc27Qw83OaaIMz8G3ibSc4VhZT/PpBCQog9
M6ezsxNhJ6rj/81mM5jElzGHQeHUnsAahcQscvva07q6UcRx7JhWVLW0E6l+gyD+
u1XWZQi5b3PwVlJRyv3sKgFpFjsH8pu7wBL8F13NHd0eb4M5m3ZUZmBbXktF0dLc
V0H7kqLWqkTCXo7omekm
=kKg9
-----END PGP SIGNATURE-----
Merge tag 'pci-v3.19-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci
Pull PCI changes from Bjorn Helgaas:
"Here are the PCI changes intended for v3.19. I don't think there's
anything very exciting here, but there was a lot of MSI-related stuff
coming via Thomas.
Details:
NUMA
- Allow numa_node override via sysfs (Prarit Bhargava)
Resource management
- Restore detection of read-only BARs (Myron Stowe)
- Shrink decoding-disabled window while sizing BARs (Myron Stowe)
- Add informational printk for invalid BARs (Myron Stowe)
- Remove fixed parameter in pci_iov_resource_bar() (Myron Stowe)
MSI
- Add pci_msi_ignore_mask to prevent writes to MSI/MSI-X Mask Bits (Yijing Wang)
- Revert "PCI: Add x86_msi.msi_mask_irq() and msix_mask_irq()" (Yijing Wang)
- s390/MSI: Use __msi_mask_irq() instead of default_msi_mask_irq() (Yijing Wang)
Virtualization
- xen: Process failure for pcifront_(re)scan_root() (Chen Gang)
- Make FLR and AF FLR reset warning messages different (Gavin Shan)
Generic host bridge driver
- Allocate config space windows after limiting bus number range (Lorenzo Pieralisi)
- Convert to DT resource parsing API (Lorenzo Pieralisi)
Freescale Layerscape
- Add Freescale Layerscape PCIe driver (Minghuan Lian)
NVIDIA Tegra
- Do not build on 64-bit ARM (Thierry Reding)
- Add Kconfig help text (Thierry Reding)
Renesas R-Car
- Make rcar_pci static (Jingoo Han)
Samsung Exynos
- Add exynos prefix to add_pcie_port(), pcie_init() (Jingoo Han)
ST Microelectronics SPEAr13xx
- Add spear prefix to add_pcie_port(), pcie_init() (Jingoo Han)
- Make spear13xx_add_pcie_port() __init (Jingoo Han)
- Remove unnecessary OOM message (Jingoo Han)
TI DRA7xx
- Add dra7xx prefix to add_pcie_port() (Jingoo Han)
- Make dra7xx_add_pcie_port() __init (Jingoo Han)
TI Keystone
- Make ks_dw_pcie_msi_domain_ops static (Jingoo Han)
- Remove unnecessary OOM message (Jingoo Han)
Miscellaneous
- Delete unnecessary NULL pointer checks (Markus Elfring)
- Remove unused to_hotplug_slot() (Gavin Shan)
- Whitespace cleanup (Jingoo Han)
- Simplify if-return sequences (Quentin Lambert)"
* tag 'pci-v3.19-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (28 commits)
PCI: Remove fixed parameter in pci_iov_resource_bar()
PCI: Add informational printk for invalid BARs
PCI: tegra: Add Kconfig help text
PCI: tegra: Do not build on 64-bit ARM
PCI: spear: Remove unnecessary OOM message
PCI: mvebu: Add a blank line after declarations
PCI: designware: Add a blank line after declarations
PCI: exynos: Remove unnecessary return statement
PCI: imx6: Use tabs for indentation
PCI: keystone: Remove unnecessary OOM message
PCI: Remove unused and broken to_hotplug_slot()
PCI: Make FLR and AF FLR reset warning messages different
PCI: dra7xx: Add __init annotation to dra7xx_add_pcie_port()
PCI: spear: Add __init annotation to spear13xx_add_pcie_port()
PCI: spear: Rename add_pcie_port(), pcie_init() to spear13xx_add_pcie_port(), etc.
PCI: dra7xx: Rename add_pcie_port() to dra7xx_add_pcie_port()
PCI: layerscape: Add Freescale Layerscape PCIe driver
PCI: Simplify if-return sequences
PCI: Delete unnecessary NULL pointer checks
PCI: Shrink decoding-disabled window while sizing BARs
...
|
|
|
Bjorn Helgaas
|
18e88beceb |
Merge branches 'pci/enumeration', 'pci/hotplug', 'pci/misc', 'pci/numa' and 'pci/virtualization' into next
* pci/enumeration: PCI: Remove fixed parameter in pci_iov_resource_bar() PCI: Add informational printk for invalid BARs PCI: Shrink decoding-disabled window while sizing BARs PCI: Restore detection of read-only BARs * pci/hotplug: PCI: Remove unused and broken to_hotplug_slot() * pci/misc: PCI: Make FLR and AF FLR reset warning messages different PCI: Simplify if-return sequences PCI: Delete unnecessary NULL pointer checks * pci/numa: PCI: Allow numa_node override via sysfs * pci/virtualization: xen/pcifront: Process failure for pcifront_(re)scan_root() |
|
|
Myron Stowe
|
7e79c5f8ca |
PCI: Add informational printk for invalid BARs
As a consequence of restoring the detection of invalid BARs, add a new informational printk like the following when such occurrences are encountered. pci ssss:bb:dd.f: [Firmware Bug]: reg 0xXX: invalid BAR (can't size) Reported-by: William Unruh <unruh@physics.ubc.ca> Reported-by: Martin Lucina <martin@lucina.net> Signed-off-by: Myron Stowe <myron.stowe@redhat.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> CC: Matthew Wilcox <willy@linux.intel.com> |
|
|
Yinghai Lu
|
7fc986d8a9 |
PCI: Support 64-bit bridge windows if we have 64-bit dma_addr_t
Aaron reported that a 32-bit x86 kernel with Physical Address Extension
(PAE) support complains about bridge prefetchable memory windows above 4GB:
pci_bus 0000:00: root bus resource [mem 0x380000000000-0x383fffffffff]
...
pci 0000:03:00.0: reg 0x10: [mem 0x383fffc00000-0x383fffdfffff 64bit pref]
pci 0000:03:00.0: reg 0x20: [mem 0x383fffe04000-0x383fffe07fff 64bit pref]
pci 0000:03:00.1: reg 0x10: [mem 0x383fffa00000-0x383fffbfffff 64bit pref]
pci 0000:03:00.1: reg 0x20: [mem 0x383fffe00000-0x383fffe03fff 64bit pref]
pci 0000:00:02.2: PCI bridge to [bus 03-04]
pci 0000:00:02.2: bridge window [io 0x1000-0x1fff]
pci 0000:00:02.2: bridge window [mem 0x91900000-0x91cfffff]
pci 0000:00:02.2: can't handle 64-bit address space for bridge
In this kernel, unsigned long is 32 bits and dma_addr_t is 64 bits.
Previously we used "unsigned long" to hold the bridge window address. But
this is a bus address, so we should use dma_addr_t instead.
Use dma_addr_t to hold the bridge window base and limit.
The question of whether the CPU can actually *address* the window is
separate and depends on what the physical address space of the CPU is and
whether the host bridge does any address translation.
[bhelgaas: fix "shift count > width of type", changelog, stable tag]
Fixes:
|