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4 Commits

Author SHA1 Message Date
Carlo Caione b60e1157d8 ARM: dts: amlogic: Split pinctrl device for Meson8 / Meson8b 
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: Kevin Hilman <khilman@baylibre.com>
 2016-03-30 19:51:57 +02:00
Beniamino Galvani d9fea88c4f ARM: dts: meson8: add pinctrl node 
Add pinctrl node to the DTSI file for meson8 and sub-nodes for some
standard mux configurations.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
 2015-03-02 11:00:59 +01:00
Beniamino Galvani 550ab390d7 ARM: meson: DTS: enable L2 cache 
This enables the L2 cache controller available in Amlogic SoCs.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
 2014-11-18 16:36:14 +01:00
Beniamino Galvani aeff05a39a ARM: dts: add dtsi for Amlogic Meson8 SoCs 
This adds a dtsi for Amlogic Meson8 SoCs. It differs from the Meson6
dtsi for the number of Cortex-A9 cores (4 vs 2) and for the frequency
of clk81.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
 2014-11-18 16:36:06 +01:00