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3 Commits

Author SHA1 Message Date
Philipp Zabel c1b065b4f2 reset: zynqmp: Make reset_control_ops const 
The zynqmp_reset_ops structure is never modified. Make it const.

Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
 2019-10-22 14:39:01 +02:00
Rajan Vaja 3d03137864 drivers: Defer probe if firmware is not ready 
Driver needs ZynqMP firmware interface to call EEMI
APIs. In case firmware is not ready, dependent drivers
should wait until the firmware is ready.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Jolly Shah <jollys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
 2019-03-18 13:45:27 +01:00
Nava kishore Manne 62f0d7dc3b reset: reset-zynqmp: Adding support for Xilinx zynqmp reset controller. 
Add a reset controller driver for Xilinx Zynq UltraScale+ MPSoC.
The zynqmp reset-controller has the ability to reset lines
connected to different blocks and peripheral in the Soc.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
 2019-01-29 14:08:40 +01:00