Add comments to state which GPIO is used for some interrupts.
Signed-off-by: NeilBrown <neil@brown.name>
Signed-off-by: Tony Lindgren <tony@atomide.com>
mcbsp2 is used in gta04 soundcard config and by default
is disabled so enable it for gta04.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add minimal hwmod support that works at least on dm8168. This
is based on the code in the earlier TI CDP tree, and an earlier
patch by Aida Mynzhasova <aida.mynzhasova@skitlab.ru>.
I've set up things to work pretty much the same way as for
am33xx. We are basically using cm33xx.c with a different set
of clocks and clockdomains.
This code is based on the TI81XX-LINUX-PSP-04.04.00.02 patches
published at:
http://downloads.ti.com/dsps/dsps_public_sw/psp/LinuxPSP/TI81XX_04_04/04_04_00_02/index_FDS.html
Cc: Aida Mynzhasova <aida.mynzhasova@skitlab.ru>
Cc: Brian Hutchinson <b.hutchman@gmail.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds required definitions and structures for clockdomain
initialization, so omap3xxx_clockdomains_init() was substituted by
new ti81xx_clockdomains_init() while early initialization of
TI81XX platform.
Note that we now need to have 81xx in a separate CONFIG_SOC_TI81XX
block instead inside the ifdef block for omap3 to avoid make
randconfig build errors.
This code is based on the TI81XX-LINUX-PSP-04.04.00.02 patches
published at:
http://downloads.ti.com/dsps/dsps_public_sw/psp/LinuxPSP/TI81XX_04_04/04_04_00_02/index_FDS.html
Cc: Brian Hutchinson <b.hutchman@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Aida Mynzhasova <aida.mynzhasova@skitlab.ru>
[tony@atomide.com: updated to apply, renamed to clockdomains81xx.c,
fixed to use am33xx_clkdm_operations, various fixes suggested by
Paul Walmsley]
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This allows booting ti81xx boards when a .dts file
is in place.
Cc: Brian Hutchinson <b.hutchman@gmail.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This adds the device node for the ac97 controller.
Signed-off-by: Alexander Stein <alexanders83@web.de>
Acked-By Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Using the wm8904 device tree compatible string.
Signed-off-by: Alexander Morozov <linux@meltdown.ru>
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
As we introduce a new "atmel,sama5d4-nand" compatible string for sama5d4,
so we need to apply it for sama5d4 chip.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The SOC_AT91SAM9263 is being removed, stop using it.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
mach/system_rev.h is not used, remove it.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
In order to remove SOC_SAM9xxx options, stop using HAVE_AT91_DBGUx.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The PM initialization needs internal SRAM for allocating a gen_pool and
use it to store its PM code. So we need to have of_platform_populate() before
this code.
Suggested-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
As all sam9 SoCs are setting arm_pm_idle to at91sam9_idle(), do it from
sam9_dt_device_init().
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
[nicolas.ferre@atmel.com: adapt patch to newer series]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
sam9n12 and sam9x5 don't set arm_pm_idle because of an oversight, fix that.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
As long as there is no other non-const variable marked __initdata in the
same compilation unit it doesn't hurt. If there were one however
compilation would fail with
error: $variablename causes a section type conflict
because a section containing const variables is marked read only and so
cannot contain non-const variables.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
[nicolas.ferre@atmel.com: update the paths after having re-arranged the patches]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Newer SoCs: at91sam9x5, at91sam9n12, sama5d3 and sama5d4 embed a DDR controller
and have a different PMC status register layout than the at91sam9g45. Create
another at91_sam9x5_pm_init() function to match this compatibility.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
The DEBUG_AT91_UART Kconfig option was forgotten when moving the
AT91 debug-macro.S file. Add it and use it for the at91.S compilation.
Reported-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
eb4513482d
(ARM: shmobile: Enable kzm9g board in multiplatform defconfig)
dropped CONFIG_REGULATOR from shmobile_defconfig as it was
generated using a tree where CONFIG_REGULATOR is indirectly
selected by ARCH_SH73A0.
ARCH_SH73A0 is not queued up for v3.20 and thus, baring unforeseen
changes, CONFIG_REGULATOR will not be selected by shmobile_defconfig
in that release. This causes at least SDHI to stop working on
R-Car Gen2 SoCs.
Reported-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[horms: minimal patch targeted as a fix]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
A week's worth of fixes for various ARM platforms. Diff wise, the
largest fix is for OMAP to deal with how GIC now registers interrupts
(irq_domain_add_legacy() -> irq_domain_add_linear() changes).
Besides this, a few more renesas platforms needed the GIC instatiation
done for legacy boards. There's also a fix that disables coherency of
mvebu due to issues, and a few other smaller fixes.
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Merge tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"A week's worth of fixes for various ARM platforms. Diff wise, the
largest fix is for OMAP to deal with how GIC now registers interrupts
(irq_domain_add_legacy() -> irq_domain_add_linear() changes).
Besides this, a few more renesas platforms needed the GIC instatiation
done for legacy boards. There's also a fix that disables coherency of
mvebu due to issues, and a few other smaller fixes"
* tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
arm64: dts: add baud rate to Juno stdout-path
ARM: dts: imx25: Fix PWM "per" clocks
bus: mvebu-mbus: fix support of MBus window 13
Merge tag 'mvebu-fixes-3.19-3' of git://git.infradead.org/linux-mvebu into fixes
ARM: mvebu: completely disable hardware I/O coherency
ARM: OMAP: Work around hardcoded interrupts
ARM: shmobile: r8a7779: Instantiate GIC from C board code in legacy builds
ARM: shmobile: r8a7778: Instantiate GIC from C board code in legacy builds
arm: boot: dts: dra7: enable dwc3 suspend PHY quirk
This add support for Rayeager PX2, Rockchip PX2 based development board
made by ChipSPARK.
Signed-off-by: FUKAUMI Naoki <naobsd@gmail.com>
Tested-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This adds support for Firefly-RK3288, Rockchip RK3288 based development
boards made by Firefly.
There are 2 dts for 2 versions of the board. rk3288-firefly-beta.dts is
for the beta version, rk3288-firefly.dts is for the mass production version.
Signed-off-by: FUKAUMI Naoki <naobsd@gmail.com>
[removed gmac reference, due to the gmac node going through the net-tree]
Tested-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The rk3288 board uses the architected timers and these ones are shutdown when
the cpu is powered down. There is a need of a broadcast timer in this case to
ensure proper wakeup when the cpus are in sleep mode and a timer expires.
Add the timer node for the broadcast timer.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Commit f77d55a3b5 ("serial: 8250_dw: get index of serial line from DT
aliases") made the serial driver now use the serial aliases to get the tty
number, pointing out that our aliases have been wrong all along.
Remove them from the DTSI and add custom ones in the relevant boards.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The (non micro) A13-OLinuxIno has an axp203 pmic, enable support for this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: VishnuPatekar <vishnupatekar0510@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The commit (3d125f9c91) cause i.MX6SX sdb enet cannot work. The cause is
the commit add mdio node with un-correct phy address.
The patch just correct i.MX6sx sdb board enet phy address.
V2:
* As Shawn's suggestion that unit-address should match 'reg' property, so
update ethernet-phy unit-address.
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Currently, dwmac-rk uses a custom propety "phy_regulator" to get the name of the
right regulator to use to power on or power off the phy. This commit converts the
driver to use phy-supply devicetree property and the corresponding API, it cleans
the code a bit and make it simpler to maintain. This also replaces the property
phy_regulator by the standard property phy-supply in rk3288-evb-rk808.dts.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Now that we support the sun6i variant of the touchscreen controller,
add the device node to the dtsi so we can use it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
CONFIG_FHANDLE is required by systemd, which is the default init system
in more and more distributions. So lets enable it for Exynos as well
(it's already enabled in multi_v7_defconfig)
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Reviewed-by: Andreas Faerber <afaerber@suse.de>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Enable drivers for PMICs and MUICs present on Exynos-based devices:
- max14577: charger, extcon, fuel gauge (max17040), regulator,
used on: Gear 1, Gear 2,
- max77693: charger, extcon, fuel gauge (max17042),
used on: Trats2,
This allows full usage of charging stack on these devices along with
extcon connector.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
On enabling CONFIG_LOCKUP_DETECTOR the kernel to act as a watchdog
to detect hard and soft lockups. Enabling CONFIG_LOCKUP_DETECTOR
don't introduce much overhead on exyons SOC.
(CONFIG_LOCKUP_DETECTOR is enabled on multi_v7_defconfig.)
Tested on Exynos5422 ODROID XU3 board.
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Anand Moon <moon.linux@yahoo.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Last 22 MiB is RAM is reserved by secure monitor code and cannot be
accessed from Linux kernel, so adjust total RAM size to 0x7EA00000
(2 GiB - 22 MiB). This fixes random 'imprecise kernel abort' kernel
failures.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The odroid-xu3 has 4 INA231 current sensors on board which can be
accessed from the Linux via the hwmon interface.
There is one sensor for each of these power rails:
- A15 cluster: VDD_ARM
- A7 cluster: VDD_KFC
- GPU: VDD_G3D
- memory: VDD_MEM
In addition to adding the sensors, LDO26 from the PMIC needs to be
enabled because it's powering these sensor.
Cc: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
All currently supported boards use hsotg/dwc2 controller in device
('peripheral') mode, so add property which sets correct operation mode.
This patch fixes support in recent changes in dwc2 driver, which added
support for dual-role devices.
Suggested-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This patch replaces all custom samsung,power-domain dt
properties with generic power domain bindings and updates
documentation Samsung's devices referring to old binding.
Suggested-by: Kevin Hilman <khilman@kernel.org>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
[javier.martinez@collabora.co.uk: tested on the Exynos5800 Peach Pi Chromebook]
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
Everything uses dmaengine now, so there is no reason to
keep this around any longer. Thanks to everyone who was involved
in moving the users over to use the dmaengine APIs.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
* Various bug fixes and minor feature additions to scm code
* Added big-endian support to debug MSM uart
* Added big-endian support to ARCH_QCOM
* Cleaned up some Kconfig options associated with ARCH_QCOM
* Added Andy Gross as co-maintainer
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Merge tag 'qcom-soc-for-3.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into next/soc
merge "qcom SoC changes for v3.20-2" from Kumar Gala:
Qualcomm ARM Based SoC Updates for v3.20-2
* Various bug fixes and minor feature additions to scm code
* Added big-endian support to debug MSM uart
* Added big-endian support to ARCH_QCOM
* Cleaned up some Kconfig options associated with ARCH_QCOM
* Added Andy Gross as co-maintainer
* tag 'qcom-soc-for-3.20-2' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom:
MAINTAINERS: Add co-maintainer for ARM/Qualcomm Support
ARM: qcom: Drop unnecessary selects from ARCH_QCOM
ARM: qcom: Fix SCM interface for big-endian kernels
ARM: qcom: scm: Clarify boot interface
ARM: qcom: Add SCM warmboot flags for quad core targets.
ARM: qcom: scm: Add logging of actual return code from scm call
ARM: qcom: scm: Flush the command buffer only instead of the entire cache
ARM: qcom: scm: Get cacheline size from CTR
ARM: qcom: scm: Fix incorrect cache invalidation
ARM: qcom: Select ARCH_SUPPORTS_BIG_ENDIAN
ARM: debug: msm: Support big-endian CPUs
ARM: debug: Update MSM and QCOM DEBUG_LL help
Signed-off-by: Olof Johansson <olof@lixom.net>
A few bugfixes for the new DT overlay feature, documentation updates,
spelling corrections, and changes to MAINTAINERS. Nothing earth
shattering here.
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Merge tag 'devicetree-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux
Pull devicetree bug fixes and documentation updates from Grant Likely:
"A few bugfixes for the new DT overlay feature, documentation updates,
spelling corrections, and changes to MAINTAINERS. Nothing earth
shattering here"
* tag 'devicetree-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/glikely/linux:
of/unittest: Overlays with sub-devices tests
of/platform: Handle of_populate drivers in notifier
of/overlay: Do not generate duplicate nodes
devicetree: document the "qemu" and "virtio" vendor prefixes
devicetree: document ARM bindings for QEMU's Firmware Config interface
Documentation: of: fix typo in graph bindings
dma-mapping: fix debug print to display correct dma_pfn_offset
of: replace Asahi Kasei Corp vendor prefix
ARM: dt: GIC: Spelling s/specific/specifier/, s/flaggs/flags/
dt/bindings: arm-boards: Spelling s/pointong/pointing/
MAINTAINERS: Update DT website and git repository
MAINTAINERS: drop DT regex matching on of_get_property and of_match_table
This contains a couple of preparatory patches for 64-bit support. A new
feature is implemented in the power-management controller which allows
it to switch off the SoC if it overheats.
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Merge tag 'tegra-for-3.20-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc
Merge "ARM: tegra: Core code changes for v3.20" from Thierry Reding:
This contains a couple of preparatory patches for 64-bit support. A new
feature is implemented in the power-management controller which allows
it to switch off the SoC if it overheats.
* tag 'tegra-for-3.20-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc: tegra: Add thermal reset (thermtrip) support to PMC
ARM: tegra: Add PMC thermtrip programming to Jetson TK1 device tree
of: Add descriptions of thermtrip properties to Tegra PMC bindings
soc/tegra: pmc: Add Tegra132 support
soc/tegra: fuse: Add Tegra132 support
soc/tegra: fuse: Constify tegra_fuse_info structures
soc/tegra: Add Tegra132 support
clocksource: Build Tegra timer on 32-bit ARM only
soc/tegra: pmc: restrict compilation of suspend-related support to ARM
Signed-off-by: Olof Johansson <olof@lixom.net>
This is merely a regeneration of the default configuration to get rid of
two symbols that are now enabled by default or removed.
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Merge tag 'tegra-for-3.20-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/defconfig
Merge "ARM: tegra: Default configuration changes for v3.20" from Thierry Reding:
This is merely a regeneration of the default configuration to get rid of
two symbols that are now enabled by default or removed.
* tag 'tegra-for-3.20-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Regenerate defconfig based on v3.19-rc1
Signed-off-by: Olof Johansson <olof@lixom.net>
A couple of unit addresses fixes in device trees, addition of microphone
detection on Chromebook 13 and a vendor prefix update.
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Merge tag 'tegra-for-3.20-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt
Merge "ARM: tegra: Device tree changes for v3.20" from Thierry Reding:
A couple of unit addresses fixes in device trees, addition of microphone
detection on Chromebook 13 and a vendor prefix update.
* tag 'tegra-for-3.20-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Update isl29028 compatible string to use isil vendor prefix
ARM: tegra: Fix unit address for Cortex-A9 TWD timer
ARM: dts: tegra20: fix GR3D, DSI unit and reg base addresses
ARM: tegra: Enable the mic-detect gpio on Acer Chromebook 13
Signed-off-by: Olof Johansson <olof@lixom.net>
- Eneable FB_MXS, SPI_FSL_QUADSPI, POWER_RESET_SYSCON and module build
for a bunch of USB functions
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Merge tag 'imx-defconfig-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/defconfig
Merge "ARM: imx: defconfig update for 3.20" from Shawn Guo:
The i.MX defconfig update for 3.20:
- Eneable FB_MXS, SPI_FSL_QUADSPI, POWER_RESET_SYSCON and module build
for a bunch of USB functions
* tag 'imx-defconfig-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: imx_v6_v7_defconfig: enable more USB functions
ARM: imx_v6_v7_defconfig: Select CONFIG_FB_MXS
ARM: imx_v6_v7_defconfig: Select SPI_FSL_QUADSPI by default
ARM: imx_v6_v7_defconfig: add POWER_RESET_SYSCON
Signed-off-by: Olof Johansson <olof@lixom.net>
- Update i.MX6 operating-points setting in device tree to match the
latest i.MX6 data sheet
- Add i.MX6SX sabreauto board support
- Add imx6dl-udoo board support based off imx6q-udoo
- Update sabrelite board to include I2C and HDMI support
- Update the VPU compatible strings to also use cnm,coda<model>
- Remove the ocram clock from the VPU node, as the clock is already
provided inside the ocram node
- Add system reset controller and syscon-reboot for VF610
- Update VF610 device tree to use zero based naming for GPIO nodes,
so that the number scheme matches hardware manual
- A number of random device additions like watchdog for VF610, sahara
for i.MX53, QSPI for imx6sx-sdb board, etc.
Note: the branch imx/soc was merged into imx/dt because the SNVS device
tree node needs to refer to the new clock ID added by the imx/soc patch.
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Merge tag 'imx-dt-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt
Merge "ARM: imx: device tree changes for 3.20" from Shawn Guo:
The i.MX device tree update for 3.20:
- Update i.MX6 operating-points setting in device tree to match the
latest i.MX6 data sheet
- Add i.MX6SX sabreauto board support
- Add imx6dl-udoo board support based off imx6q-udoo
- Update sabrelite board to include I2C and HDMI support
- Update the VPU compatible strings to also use cnm,coda<model>
- Remove the ocram clock from the VPU node, as the clock is already
provided inside the ocram node
- Add system reset controller and syscon-reboot for VF610
- Update VF610 device tree to use zero based naming for GPIO nodes,
so that the number scheme matches hardware manual
- A number of random device additions like watchdog for VF610, sahara
for i.MX53, QSPI for imx6sx-sdb board, etc.
Note: the branch imx/soc was merged into imx/dt because the SNVS device
tree node needs to refer to the new clock ID added by the imx/soc patch.
* tag 'imx-dt-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (28 commits)
ARM: dts: imx28-evk: remove duplicate property
ARM: vf610: use zero based naming for GPIO nodes
ARM: dts: imx6q: enable dma for ecspi5
ARM: dts: vfxxx: Add SNVS node
ARM: imx: clk-vf610: Add clock for SNVS
ARM: imx: clk-vf610: Add clock for UART4 and UART5
ARM: imx: drop CPUIDLE_FLAG_TIME_VALID from cpuidle-imx6sx
ARM: dts: imx6dl-udoo: Add board support based off imx6q-udoo
ARM: imx: support arm power off in cpuidle for i.mx6sx
ARM: imx: remove unnecessary setting for DSM
ARM: dts: imx6sx: add i.mx6sx sabreauto board support
ARM: dts: imx6sx-sdb: Add QSPI support
ARM: dts: imx6qdl: Remove OCRAM clock from VPU node
ARM: imx: apf51dev: add gpio-backlight support
ARM: imx: correct the hardware clock gate setting for shared nodes
ARM: imx: pllv3: add shift for frequency multiplier
ARM vf610: add compatibilty strings of supported Vybrid SoC's
ARM: i.MX53: dts: add sahara module
ARM: dts: imx6dl: correct cpufreq volt/freq table
ARM: dts: imx6q: update cpufreq volt/freq table
...
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add .disable_unused function hook for shared gate clock to ensure
the clock tree use count matches the hardware state
- Add a deeper idle state for i.MX6SX cpuidle driver powering off the
ARM core
- One correction on i.MX6Q esai_ipg parent clock setting
- Add a missing iounmap call for imx6q_opp_check_speed_grading()
- Add missing clocks for VF610 UART4, UART5 and SNVS blocks
- Expand VF610 device tree compatible matching table to cover more
Vybrid family SoCs
- Expand i.MX clk-pllv3 a bit with the shift for frequency multiplier
to support Vybrid's USB PLL oddity
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Merge tag 'imx-soc-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc
Merge "ARM: imx: soc changes for 3.20" from Shawn Guo:
The i.MX SoC changes for 3.20:
- Add .disable_unused function hook for shared gate clock to ensure
the clock tree use count matches the hardware state
- Add a deeper idle state for i.MX6SX cpuidle driver powering off the
ARM core
- One correction on i.MX6Q esai_ipg parent clock setting
- Add a missing iounmap call for imx6q_opp_check_speed_grading()
- Add missing clocks for VF610 UART4, UART5 and SNVS blocks
- Expand VF610 device tree compatible matching table to cover more
Vybrid family SoCs
- Expand i.MX clk-pllv3 a bit with the shift for frequency multiplier
to support Vybrid's USB PLL oddity
* tag 'imx-soc-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: clk-imx6q: refine esai_ipg's parent
ARM i.MX6q: unmap memory mapped at imx6q_opp_check_speed_grading()
ARM: imx: clk-vf610: Add clock for SNVS
ARM: imx: clk-vf610: Add clock for UART4 and UART5
ARM: imx: drop CPUIDLE_FLAG_TIME_VALID from cpuidle-imx6sx
ARM: imx: support arm power off in cpuidle for i.mx6sx
ARM: imx: remove unnecessary setting for DSM
ARM: imx: correct the hardware clock gate setting for shared nodes
ARM: imx: pllv3: add shift for frequency multiplier
ARM vf610: add compatibilty strings of supported Vybrid SoC's
Signed-off-by: Olof Johansson <olof@lixom.net>
- Correct pwm clock assignment in i.MX25 device tree to fix the broken
pwm support on i.MX25
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Merge tag 'imx-fixes-3.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes
Merge "ARM: imx: fixes for 3.19, 2nd round" from Shawn Guo:
The i.MX fixes for 3.19, 2nd round:
- Correct pwm clock assignment in i.MX25 device tree to fix the broken
pwm support on i.MX25
* tag 'imx-fixes-3.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx25: Fix PWM "per" clocks
Signed-off-by: Olof Johansson <olof@lixom.net>
the pinctrl driver does not bloat the kernel binary.
Apart we change the Kconfig description and add the config option for mt6592
low-level debug option.
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Merge tag 'v3.20-next-soc1' of https://github.com/mbgg/linux-mediatek into next/soc
Merge "ARM: mediatek: soc changes for v3.20" from Matthias Brugger:
This adds config options for the different Mediatek SoC. We need this so that
the pinctrl driver does not bloat the kernel binary.
Apart we change the Kconfig description and add the config option for mt6592
low-level debug option.
* tag 'v3.20-next-soc1' of https://github.com/mbgg/linux-mediatek:
ARM: mediatek: Low-level-debug for mt6592
ARM: mediatek: Add config options for mediatek SoCs.
Signed-off-by: Olof Johansson <olof@lixom.net>
ARM: mvebu: make DTS comments reflect DEBUG_LL changes
ARM: mvebu: Armada 385 GP: Add regulators to the SATA port
ARM: Kirkwood: Added support for pogoplug e02 (pink/gray)
ARM: mvebu: fix compatible strings of MBus on Armada 375 and Armada 38x
dt: bindings: update mvebu-mbus DT binding with new compatible properties
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Merge tag 'mvebu-dt-3.20-2' of git://git.infradead.org/linux-mvebu into next/dt
Merge "mvebu/dt #2" from Andrew Lunn:
Second set of dt patches for mvebu for v3.20.
* tag 'mvebu-dt-3.20-2' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: make DTS comments reflect DEBUG_LL changes
ARM: mvebu: Armada 385 GP: Add regulators to the SATA port
ARM: Kirkwood: Added support for pogoplug e02 (pink/gray)
ARM: mvebu: fix compatible strings of MBus on Armada 375 and Armada 38x
dt: bindings: update mvebu-mbus DT binding with new compatible properties
Signed-off-by: Olof Johansson <olof@lixom.net>
Note these depend on mvebu-fixes-3.19-4, which in turn depends on
v3.19-rc4.
bus: mvebu-mbus: make sure SDRAM CS for DMA don't overlap the MBus bridge window
bus: mvebu-mbus: fix support of MBus window 13 on Armada XP/375/38x
ARM: mvebu: use arm_coherent_dma_ops and re-enable hardware I/O coherency
bus: mvebu-mbus: use automatic I/O synchronization barriers
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Merge tag 'mvebu-soc-3.20-2' of git://git.infradead.org/linux-mvebu into next/soc
Merge "mvebu/soc #2" from Andrew Lunn:
Soc patches for mvebu for v3.20, part #2.
* tag 'mvebu-soc-3.20-2' of git://git.infradead.org/linux-mvebu:
bus: mvebu-mbus: make sure SDRAM CS for DMA don't overlap the MBus bridge window
bus: mvebu-mbus: fix support of MBus window 13 on Armada XP/375/38x
ARM: mvebu: use arm_coherent_dma_ops and re-enable hardware I/O coherency
bus: mvebu-mbus: use automatic I/O synchronization barriers
bus: mvebu-mbus: fix support of MBus window 13
ARM: mvebu: completely disable hardware I/O coherency
Signed-off-by: Olof Johansson <olof@lixom.net>
sd-card clockspeed to 150mhz
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Merge tag 'v3.20-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "ARM: rockchip: soc updates for 3.20" [sic!] from Heiko Stübner:
dts part of core suspend support and limiting of rk3288
sd-card clockspeed to 150mhz
* tag 'v3.20-rockchip-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add suspend settings for rk3288-evb-rk808
ARM: dts: rockchip: add RK3288 suspend support
ARM: dts: rockchip: set dw_mmc max-freq 150Mhz
Signed-off-by: Olof Johansson <olof@lixom.net>
Cortex-A9 reference from the machine name.
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Merge tag 'v3.20-rockchip-soc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/soc
Merge "ARM: rockchip: soc updates for v3.20" from Heiko Stübner:
SoC parts of basic suspend support and removal of
Cortex-A9 reference from the machine name.
* tag 'v3.20-rockchip-soc1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: rockchip: remove cpu-core name from machine name
ARM: rockchip: Add pmu-sram binding
ARM: rockchip: add suspend and resume for RK3288
Signed-off-by: Olof Johansson <olof@lixom.net>
Pull ARM fixes from Russell King:
"Another round of small ARM fixes.
restore_user_regs early stack deallocation is buggy in the presence of
FIQs which switch to SVC mode, and could lead to corrupted registers
being returned to a user process given an inopportune FIQ event.
Another bug was spotted in the ARM perf code where it could lose track
of perf counter overflows, leading to incorrect perf results.
Lastly, a bug in arm_add_memory() was spotted where the memory sizes
aren't properly rounded. As most people pass properly rounded sizes,
this hasn't been noticed"
* 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm:
ARM: 8292/1: mm: fix size rounding-down of arm_add_memory() function
ARM: 8255/1: perf: Prevent wraparound during overflow
ARM: 8266/1: Remove early stack deallocation from restore_user_regs
This update deals mostly with regulator updates for fixing all the
cases where a default regulator is needed, with non device-tree
platforms. There's also a kconfig fix for device-tree pxa.
It should be noticed that all interrupts numbers were shifted by
16 (number of legacy interrupts).
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Merge tag 'pxa-for-3.20' of https://github.com/rjarzmik/linux into next/fixes-non-critical
Merge "pxa for v3.20" from Robert Jarzmik:
arm: pxa: pxa for v3.20
This update deals mostly with regulator updates for fixing all the
cases where a default regulator is needed, with non device-tree
platforms. There's also a kconfig fix for device-tree pxa.
It should be noticed that all interrupts numbers were shifted by
16 (number of legacy interrupts).
* tag 'pxa-for-3.20' of https://github.com/rjarzmik/linux:
hx4700: regulator: declare full constraints
ARM: pxa: add regulator_has_full_constraints to spitz board file
ARM: pxa: add regulator_has_full_constraints to poodle board file
ARM: pxa: add regulator_has_full_constraints to corgi board file
ARM: pxa: arbitrarily set first interrupt number
arm: pxa: fix pxa27x device-tree support kconfig
Signed-off-by: Olof Johansson <olof@lixom.net>
dm816x devices and clocks. Also adds a qspi device for
dra72x-evm.
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Merge tag 'omap-for-v3.20/dt-pt2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "omap device tree changes for v3.20, part 2" from Tony Lindgren:
More changes for omap dts files mostly to add support for
dm816x devices and clocks. Also adds a qspi device for
dra72x-evm.
* tag 'omap-for-v3.20/dt-pt2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: dra72-evm: Add qspi device
ARM: dts: Add minimal support for dm8168-evm
ARM: dts: Add basic clocks for dm816x
ARM: dts: Add basic dm816x device tree configuration
Signed-off-by: Olof Johansson <olof@lixom.net>
and to add few more drivers found on various boards.
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Merge tag 'omap-for-v3.20/defconfig-modular' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/defconfig
Merge "omap defconfig changes for v3.20" from Tony Lindgren:
Defconfig changes for omap2plus_defconfig to make it more modular,
and to add few more drivers found on various boards.
* tag 'omap-for-v3.20/defconfig-modular' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: omap2plus_defconfig: Enable OHCI & EHCI HCD support
ARM: omap2plus_defconfig: Enable misc options for BeagleBoard-X15 platform
ARM: omap2plus_defconfig: Enable pcf857x
ARM: omap2plus_defconfig: Add NOR flash support
ARM: omap2plus_defconfig: Enable support for davinci_emac
ARM: omap2plus_defconfig: enable TPS65218 power button
ARM: omap2plus_defconfig: reduce zImage size on omap2plus_defconfig
Signed-off-by: Olof Johansson <olof@lixom.net>
time now and we have at least a minimal dts file for the 3517
based boards. Also almost all the drivers are usable in device
tree mode. And if there are any drivers not yet supported in device
tree mode, those can be enabled using pdata quirks.
This leaves omap3430 to omap3730 as the only remaining mach-omap2
platforms still booting in legacy mode also. For those were are
printing a warning during the boot to get people to update their
systems to boot in device tree mode and slowly converting them
over to device tree based booting.
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Merge tag 'omap-for-v3.20/drop-legacy-3517-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
Merge "drop legacy booting for omap3517" from Tony Lindgren:
We have had omap3517 booting in device tree mode for quite some
time now and we have at least a minimal dts file for the 3517
based boards. Also almost all the drivers are usable in device
tree mode. And if there are any drivers not yet supported in device
tree mode, those can be enabled using pdata quirks.
This leaves omap3430 to omap3730 as the only remaining mach-omap2
platforms still booting in legacy mode also. For those were are
printing a warning during the boot to get people to update their
systems to boot in device tree mode and slowly converting them
over to device tree based booting.
* tag 'omap-for-v3.20/drop-legacy-3517-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP3: Add back Kconfig option MACH_OMAP3517EVM for ASoC
ARM: OMAP3: Remove legacy support for am35xx-emac
ARM: OMAP3: Remove cm-t3517 legacy support
ARM: OMAP3: Remove legacy support for am3517crane
ARM: OMAP3: Remove legacy support for am3517-evm
Signed-off-by: Olof Johansson <olof@lixom.net>
The Hyundai A7HD is a 7" 16:9 A10 powered tablet featuring 1G RAM, 8G
nand, 1024x600 IPS screen, a mini hdmi port, mini usb receptacle and a
headphones port for details see: http://linux-sunxi.org/Hyundai_A7HD
Cc: Mark Janssen <maniac@maniac.nl>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
We don't need to force gpiolib on everyone given that it isn't
required to actually boot the device and the multiplatform
Kconfig already selects ARCH_WANT_OPTIONAL_GPIOLIB. CLKSRC_OF is
already selected by CONFIG_ARCH_MULTIPLATFORM too, so we can drop
that here.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
The secure environment only runs in little-endian mode, so any
buffers shared with the secure environment should have their
contents converted to little-endian. We also mark such elements
with __le32 to allow sparse to catch such problems.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
The secure world only knows about 32-bit wide physical addresses
for the boot API. Clarify the kernel interface by explicitly
stating a u32 instead of phys_addr_t which could be 32 or 64 bits
depending on LPAE or not.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
This adds the required information to reset the board during an overheating
situation to the Jetson TK1 device tree. The thermal reset is handled by the
PMC by sending an I2C message to the PMIC. The entries specify the I2C
message to be sent.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
1. Generic
- sparse warning (make function static)
- optimize locking
- bugfixes for interrupt injection
- fix MVPG addressing modes
2. hrtimer/wakeup fun
A recent change can cause KVM hangs if adjtime is used in the host.
The hrtimer might wake up too early or too late. Too early is fatal
as vcpu_block will see that the wakeup condition is not met and
sleep again. This CPU might never wake up again.
This series addresses this problem. adjclock slowing down the host
clock will result in too late wakeups. This will require more work.
In addition to that we also change the hrtimer from REALTIME to
MONOTONIC to avoid similar problems with timedatectl set-time.
3. sigp rework
We will move all "slow" sigps to QEMU (protected with a capability that
can be enabled) to avoid several races between concurrent SIGP orders.
4. Optimize the shadow page table
Provide an interface to announce the maximum guest size. The kernel
will use that to make the pagetable 2,3,4 (or theoretically) 5 levels.
5. Provide an interface to set the guest TOD
We now use two vm attributes instead of two oneregs, as oneregs are
vcpu ioctl and we don't want to call them from other threads.
6. Protected key functions
The real HMC allows to enable/disable protected key CPACF functions.
Lets provide an implementation + an interface for QEMU to activate
this the protected key instructions.
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Merge tag 'kvm-s390-next-20150122' of git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into kvm-next
KVM: s390: fixes and features for kvm/next (3.20)
1. Generic
- sparse warning (make function static)
- optimize locking
- bugfixes for interrupt injection
- fix MVPG addressing modes
2. hrtimer/wakeup fun
A recent change can cause KVM hangs if adjtime is used in the host.
The hrtimer might wake up too early or too late. Too early is fatal
as vcpu_block will see that the wakeup condition is not met and
sleep again. This CPU might never wake up again.
This series addresses this problem. adjclock slowing down the host
clock will result in too late wakeups. This will require more work.
In addition to that we also change the hrtimer from REALTIME to
MONOTONIC to avoid similar problems with timedatectl set-time.
3. sigp rework
We will move all "slow" sigps to QEMU (protected with a capability that
can be enabled) to avoid several races between concurrent SIGP orders.
4. Optimize the shadow page table
Provide an interface to announce the maximum guest size. The kernel
will use that to make the pagetable 2,3,4 (or theoretically) 5 levels.
5. Provide an interface to set the guest TOD
We now use two vm attributes instead of two oneregs, as oneregs are
vcpu ioctl and we don't want to call them from other threads.
6. Protected key functions
The real HMC allows to enable/disable protected key CPACF functions.
Lets provide an implementation + an interface for QEMU to activate
this the protected key instructions.
The return value of kvm_arch_vcpu_postcreate is not checked in its
caller. This is okay, because only x86 provides vcpu_postcreate right
now and it could only fail if vcpu_load failed. But that is not
possible during KVM_CREATE_VCPU (kvm_arch_vcpu_load is void, too), so
just get rid of the unchecked return value.
Signed-off-by: Dominik Dingel <dingel@linux.vnet.ibm.com>
Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com>
Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com>
A comment in the dirty page logging patch series mentioned incorrectly
spelled config symbols, just fix them up to match the real thing.
Reported-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
PioD controller was not described in the device tree since we don't use
it. As pinctrl-at91 allows disabled gpio controllers in the device
tree, we can add it to complete the device description.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Add an hdmi node, and also add hdmi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Signed-off-by: Yakir Yang <ykk@rock-chips.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Tested-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add devicetree nodes for rk3288 VOP (Video Output Processors), and the
top level display-subsystem root node.
Later patches add endpoints (eDP, HDMI, LVDS, etc) that attach to the
VOPs' output ports.
Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Mark yao <mark.yao@rock-chips.com>
Reviewed-by: Stephane Marchesin <marcheu@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Convert the cns3xxx PCI driver to use the generic config access functions.
This changes accesses from __raw_readl/__raw_writel to readl/writel.
[arnd: remove extra open parenthesis]
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Krzysztof Hałasa <khalasa@piap.pl>
CC: Russell King <linux@arm.linux.org.uk>
CC: linux-arm-kernel@lists.infradead.org
Quad core targets like APQ8074, APQ8064, APQ8084 need SCM support set up
warm boot addresses in the Secure Monitor. Extend the SCM flags to
support warmboot addresses for secondary cores.
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
support for CDCE949 clock generator.
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Merge tag 'davinci-for-v3.20/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into next/cleanup
Merge "DaVinci cleanups for v3.20" from Sekhar Nori:
Removes an unused function and the unused
support for CDCE949 clock generator.
* tag 'davinci-for-v3.20/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
ARM: davinci: Remove CDCE949 driver
ARM: davinci: serial.c: remove unused serial_read_reg()
Signed-off-by: Olof Johansson <olof@lixom.net>
* Instantiate GIC from C board code in legacy builds on r8a7778 and r8a7779
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Merge tag 'renesas-soc-fixes2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes
Merge "Second Round of Renesas ARM Based SoC Fixes for v3.19" from Simon
Horman:
* Instantiate GIC from C board code in legacy builds on r8a7778 and r8a7779
* tag 'renesas-soc-fixes2-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7779: Instantiate GIC from C board code in legacy builds
ARM: shmobile: r8a7778: Instantiate GIC from C board code in legacy builds
Signed-off-by: Olof Johansson <olof@lixom.net>
* Add DT support for PM domains
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Merge tag 'renesas-soc2-for-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Merge "Second Round of Renesas ARM Based SoC Updates for v3.20" from Simon
Horman:
* Add DT support for PM domains
* tag 'renesas-soc2-for-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: R-Mobile: Add DT support for PM domains
ARM: shmobile: R-Mobile: Store SYSC base address in rmobile_pm_domain
ARM: shmobile: R-Mobile: Use generic_pm_domain.attach_dev() for pm_clk setup
Signed-off-by: Olof Johansson <olof@lixom.net>
First set of OMAP2+ hwmod patches for Linux v3.20. These are mostly
fixes for warnings, although there's one DRA7xx patch that fixes
CONFIG_DEBUG_LL for AM572x/DRA7xx SoCs that use UART3 for console,
such as the BeagleBoard-X15.
These patches entered Linux-next starting with the next-20150121 tag.
Basic build, boot, and PM test results can be found here:
http://www.pwsan.com/omap/testlogs/omap-hwmod-a-for-v3.20/20150121142621/
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Merge tag 'for-v3.20/omap-hwmod-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.20/fixes-not-urgent
ARM: OMAP2+: hwmod: first set of patches for v3.20
First set of OMAP2+ hwmod patches for Linux v3.20. These are mostly
fixes for warnings, although there's one DRA7xx patch that fixes
CONFIG_DEBUG_LL for AM572x/DRA7xx SoCs that use UART3 for console,
such as the BeagleBoard-X15.
These patches entered Linux-next starting with the next-20150121 tag.
Basic build, boot, and PM test results can be found here:
http://www.pwsan.com/omap/testlogs/omap-hwmod-a-for-v3.20/20150121142621/
am437x-idk and update am437x-sk boards. Also enabling new
devices for multiple boards.
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Merge tag 'omap-for-v3.20/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt
Merge "omap device tree changes for v3.20" from Tony Lindgren:
Device tree changes for omaps. Mostly to add support for new
am437x-idk and update am437x-sk boards. Also enabling new
devices for multiple boards.
* tag 'omap-for-v3.20/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (21 commits)
ARM: dts: omap3-gta04: Add handling for tv output
ARM: dts: cm-t3x: add NAND support
ARM: dts: am57xx-beagle-x15: Add GPIO controlled fan node
ARM: dts: am437x-idk: add gpio-based power key
ARM: dts: N950/N9: add twl_power
ARM: dts: am437x-sk: add power button binding
ARM: dts: add support for AM437x IDK
ARM: dts: am437x-gp-evm: add VPFE device tree data
ARM: dts: am437x-sk-evm: add VPFE device tree data
ARM: dts: am43x-epos-evm: add VPFE device tree data
ARM: dts: am4372: add VPFE DT node entries
ARM: dts: DRA7X: drop id property in pcie_phy
ARM: dts: omap3-n900: cleanup english
ARM: dts: am57xx-beagle-x15: Add dual ethernet
ARM: dts: am437x-sk: remove DSS pulls
ARM: dts: am437x-sk: remove internal i2c pullups
ARM: dts: am437x-sk: add explicit pinmux for both USB instances
ARM: dts: am437x-sk: remove ethernet pulls
ARM: dts: am437x-sk: add explicit MMC0 pinmux
ARM: dts: am437x-sk: remove internal pulls from QSPI
...
Signed-off-by: Olof Johansson <olof@lixom.net>
we've made several SoCs to boot in device tree only mode.
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Merge tag 'omap-for-v3.20/cleanup-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/cleanup
Merge "omap clean-up for v3.20" from Tony Lindgren:
Clean-up for omaps to remove dead code found with cppcheck after
we've made several SoCs to boot in device tree only mode.
* tag 'omap-for-v3.20/cleanup-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Remove unused ti81xx platform init code
ARM: OMAP3+: PRM: remove prm_get_reset_sources declaration from headers
ARM: OMAP2: CM: remove unused PLL functions
ARM: OMAP2: clock: remove unused apll code
ARM: OMAP: dma.c: Remove unused function
ARM: OMAP1: timer32k.c: Remove unused function
ARM: OMAP1: irq.c: Remove unused function
ARM: OMAP2+: omap-pm-noop.c: Remove some unused functions
ARM: OMAP2+: voltage: Remove some unused functions
ARM: OMAP2+: powerdomain.c: Remove some unused functions
ARM: OMAP2+: omap_hwmod.c: Remove some unused functions
ARM: OMAP2+: dpll44xx.c: Remove unused function
ARM: OMAP2+: cm33xx.c: Remove some unused functions
ARM: OMAP2+: clkt2xxx_apll.c: Remove some unused functions
Signed-off-by: Olof Johansson <olof@lixom.net>
broken half merged state for a few years now. This gets us to the
point where we can boot it properly once the related SoC data is
added. Note that we've already made dm816x device tree only by
removing the known broken board file.
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Merge tag 'omap-for-v3.20/fixes-not-urgent-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/fixes-non-critical
Merge "omap non-urgent fixes for v3.20" from Tony Lindgren:
Non-urgent fixes for omap variant dm816x that has been in a sorry
broken half merged state for a few years now. This gets us to the
point where we can boot it properly once the related SoC data is
added. Note that we've already made dm816x device tree only by
removing the known broken board file.
* tag 'omap-for-v3.20/fixes-not-urgent-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Disable omap3 PM init for ti81xx
ARM: OMAP2+: Fix reboot for 81xx
ARM: OMAP2+: Fix dm814 and dm816 for clocks and timer init
ARM: OMAP2+: Fix ti81xx class type
ARM: OMAP2+: Fix ti81xx devtype
ARM: OMAP2+: Fix error handling for omap2_clk_enable_init_clocks
Signed-off-by: Olof Johansson <olof@lixom.net>
The Kconfig symbol DEBUG_MVEBU_UART_ALTERNATE was renamed to
DEBUG_MVEBU_UART0_ALTERNATE. And the symbol DEBUG_MVEBU_UART1_ALTERNATE
was added to allow UART1 as a DEBUG_LL target. Make the comment at the
top of this DTS reflect those changes.
Since we're touching this DTS add comments to show which blocks describe
UART0 and UART1.
Signed-off-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
The pogoplug differs from the SheevaPlug only by a
few details, but especially in the led assignments.
This patch was tested under Gentoo Linux and is
based on dts files from Arch Linux ARM and OpenWrt.
Suggested-by: Felix Kaechele <heffer@fedoraproject.org>
Suggested-by: Oleg Rakhmanov <moonman.ca@gmail.com>
Signed-off-by: Christoph Junghans <ottxor@gentoo.org>
[Andrew Lunn <andrew@lunn.ch>: Fixed subject line]
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
- By reworking the PM code, we can remove the AT91 more specific initialization
- We are using DT for SRAM initialization now, so we can remove its explicit
mapping
- The PMC clock driver now hosts IDLE function for at91rm9200 with other
SoCs ones.
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Merge tag 'at91-cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/soc
Merge "at91: cleanup for 3.20 #2" from Nicolas Ferre:
Second batch of cleanup for 3.20:
- By reworking the PM code, we can remove the AT91 more specific initialization
- We are using DT for SRAM initialization now, so we can remove its explicit
mapping
- The PMC clock driver now hosts IDLE function for at91rm9200 with other
SoCs ones.
* tag 'at91-cleanup2' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91: (37 commits)
ARM: at91: move at91rm9200_idle() to clk/at91/pmc.c
ARM: at91: remove unused at91_init_sram
ARM: at91: sama5d4: remove useless call to at91_init_sram
ARM: at91: remove useless map_io
ARM: at91: pm: prepare for multiplatform
ARM: at91: pm: add UDP and UHP checks to newer SoCs
ARM: at91: pm: use the mmio-sram pool to access SRAM
ARM: at91: pm: rework cpu detection
ARM: at91: dts: sama5d3: add ov2640 camera sensor support
ARM: at91: dts: sama5d3: change name of pinctrl of ISI_MCK
ARM: at91: dts: sama5d3: change name of pinctrl_isi_{power,reset}
ARM: at91: dts: sama5d3: move the isi mck pin to mb
ARM: at91: dts: sama5d3: add missing pins of isi
ARM: at91: dts: sama5d3: split isi pinctrl
ARM: at91: dts: sama5d3: add isi clock
ARM: at91/dt: ethernut5: use at91sam9xe.dtsi
ARM: at91/dt: Add a dtsi for at91sam9xe
ARM: at91/dt: add SRAM nodes
ARM: at91/dt: at91rm9200ek: enable RTC
ARM: at91/dt: rm9200: add RTC node
...
Signed-off-by: Olof Johansson <olof@lixom.net>
* Enable kzm9g board in multiplatform defconfig
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Merge tag 'renesas-defconfig2-for-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/defconfig
Merge "Second Round of Renesas ARM Based SoC Defconfig Updates for v3.20" from
Simon Horman:
Second Round of Renesas ARM Based SoC Defconfig Updates for v3.20
* Enable kzm9g board in multiplatform defconfig
* tag 'renesas-defconfig2-for-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Enable kzm9g board in multiplatform defconfig
Signed-off-by: Olof Johansson <olof@lixom.net>
Add dts file for Hisilicon hip01 ca9x2 board
Signed-off-by: Wang Long <long.wanglong@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
[olof: Folded in smp enable-method from a different patch]
Signed-off-by: Olof Johansson <olof@lixom.net>
Enable smp for HiP01 board.
Signed-off-by: Wang Long <long.wanglong@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
[olof: split off the dts change to a separate commit]
Signed-off-by: Olof Johansson <olof@lixom.net>
As hix5hd2 and hip01 has the same secondary_startup
so rename hix5hd2_secondary_startup to
to hisi_secondary_startup.
the hip01 will use hisi_secondary_startup for the
secondary core boot.
Signed-off-by: Wang Long <long.wanglong@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
As hix5hd2 and hip01 has the same .smp_prepare_cpus
in struct smp_operations, so rename hix5hd2_smp_prepare_cpus
to hisi_common_smp_prepare_cpus.
the hip01 will use hisi_common_smp_prepare_cpus in its
struct smp_operations.
Signed-off-by: Wang Long <long.wanglong@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Make hip01 share the hisi_defconfig.
Signed-off-by: Wang Long <long.wanglong@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Enable Hisilicon HiP01 SoC. This HiP01 SoC series support both
one core or dual cores and quad cores. The core is Cortex A9.
Signed-off-by: Wang Long <long.wanglong@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Add the support of Hisilicon HiP01 debug uart.
The uart of hip01 is 8250 compatible.
Signed-off-by: Wang Long <long.wanglong@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This is the init support for CSR Atlas7 new SoC. Old Marco has never
shipped to customers and been dropped.
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Merge tag 'new-atlas7mach-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux into next/soc
Merge "CSR new atlas7 machine, and delete old marco machine for 3.20" from
Barry Song:
drop CSR Marco machine and add Atlas7 new machine
This is the init support for CSR Atlas7 new SoC. Old Marco has never
shipped to customers and been dropped.
* tag 'new-atlas7mach-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux:
ARM: sirf: add Atlas7 machine support
ARM: sirf: move to debug_ll_io_init and drop map_io
ARM: sirf: move platsmp to support Atlas7 SoC
ARM: sirf: drop Marco machine
ARM: sirf: drop Marco support in reset controller module
Signed-off-by: Olof Johansson <olof@lixom.net>
Because Marco chip has never shipped to customers and has been replaced
by Atlas7, so we do the below
- drop Marco's debug port
- add debug ports for Atlas7
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Merge tag 'atlas7-lldebug-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux into next/soc
Merge "CSR atlas7 debug ports for 3.20" from Barry Song:
add debug ports for CSRatlas7 SoC
Because Marco chip has never shipped to customers and has been replaced
by Atlas7, so we do the below
- drop Marco's debug port
- add debug ports for Atlas7
* tag 'atlas7-lldebug-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux:
ARM: sirf: add two debug ports for CSRatlas7 SoC
ARM: sirf: drop Marco low-level debug port
Signed-off-by: Olof Johansson <olof@lixom.net>
The Rockchip support is not limited to Cortex-A9 socs anymore and its
presence may confuse people reading /proc/cpuinfo. So remove the core
specific part.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
This line converts PHYS_OFFSET into PHYS_PFN_OFFSET.
It is better to use PAGE_SHIFT rather than the magic number 12.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This comment does not correspond to the actual code.
When zImage is loaded at a lower *OR* higher address of
the destination of Image, it won't overwrite itself.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
DMA contiguous allocations have been able to use highmem since commit
"95b0e65 ARM: mm: don't limit default CMA region only to low memory"
but a comment still notes the earlier "low memory" limitation. Update
the comment to remove the low memory limitation and fix the
s/contigouos/contiguous/ typo while we're at it.
Signed-off-by: George G. Davis <george_davis@mentor.com>
Acked-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
As of commit abda1bd5f4 __cpu_suspend()
takes only 2 arguments, and those arguments are passed by the platform
code. This comment thus makes no sense, as cpu_suspend() is not actually
hiding any arguments.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The current rounding of "size" is wrong:
- If "start" is sufficiently near the next page boundary, "size"
is decremented by more than enough and the last page is lost.
- If "size" is sufficiently small, it is wrapped around and gets
a bogus value.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
When building a multi_v7_defconfig kernel it is not possible to configure
DEBUG_LL to use any serial device except a ARM Primecell PL01X, or more
accurately and worse, it is possible to configure a different serial
device but KConfig does not honour this request. In fact this also
overrides the user selection for some of the single platform kernels, for
example I don't think DEBUG_LL can be targeted at ICE or semihosted
supervisor for ARCH_VERSATILE.
This happens because DEBUG_UART_PL01X is automatically enabled by
some architectures and this means user decisions made regarding
the DEBUG_LL backend will be overridden. Problem is fixed by removing the
automatic enabling of this option.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
On EP93XX uncompress.h uses CONFIG_DEBUG_UART_PHYS instead of a hard
coded serial port. This means the build breaks when DEBUG_LL
(and DEBUG_LL_UART_PL01X) is not enabled.
This is fixed by adding a new dependency.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
As part of the migration we introduce DEBUG_UART_PHYS/DEBUG_UART_VIRT
which default to UART1 but allow a user to configure UART2 or UART3.
We also introduce symbolic names for the registers and flags.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Acked-by: Arnd Bergmann <arnd.bergmann@linaro.org>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The omap1's debug-macro.S is similar to the generic 8250 code. Compared to
the 8520 code the omap1 macro automatically determines what UART to use
based on breadcrumbs left by the bootloader and automatically copes with
the eccentric register layout on OMAP7XX.
This patch drops both these features and relies instead on the generic
8250 macros:
1. Dropping support for the bootloader breadcrumbs is identical to the
way the migration was handled for OMAP2 (see 808b7e07464d...).
2. Support for OMAP7XX still exists but it must be configured by hand
(DEBUG_OMAP7XXUART1/2/3) rather than handled at runtime.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Cc: Arnd Bergmann <arnd.bergmann@linaro.org>
Cc: linux-omap@vger.kernel.org
Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
As part of the migration a couple of uart definitions have been copied
from of the platform specific header files.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Cc: Greg Ungerer <gerg@uclinux.org>
Cc: Arnd Bergmann <arnd.bergmann@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Only a very small handful of platforms support DEBUG_LL_UART_NONE but it
lurks in the menus of every single platform config ready to break the
build. This is an especial problem for defconfig/oldconfig since it is
often selected by default.
This patch solves the problem by removing this option. Any platforms
still depending upon this option must be migrated.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
All defconfigs touched by this patch already enable DEBUG_LL and by
default DEBUG_LL_UART_NONE will be selected. This causes no issues
today because due to some back compatibility magic we eventually need
to remove it is not actually honoured. Nevertheless DEBUG_LL_UART_8250
is the right value for these platforms and should be set in the config
files.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
The default value for DEBUG_CNS3xxx appears twice. This patch removes
the one with the wrong sort order.
Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch add support for Marsboard A10 board.
The Marsboard A10 is a A10 based development board with 1G RAM, 1G NAND,
micro SD card slot, SATA 2.0 socket, 10/100 ethernet, mini HDMI port,
1 USB OTG port and 2 USB 2.0 ports. Board does not use the AXP209 pmic,
it does not have a pmic at all.
Board also have 2 expansion 70 pin headers.
Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A80 Optimus Board has a 16GB eMMC connected to mmc2, with 8 bit
wide data bus.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
mmc2 is available on port C. Add a pinmux setting for 8 bit wide eMMC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Enable the micro-sd slot on the A80 Optimus Board, which is connected to
mmc0. This adds the card-detect gpio and enables mmc0.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The preferred method of referencing nodes from the dtsi is to use
labels, instead of copying the complete tree.
This patch converts sun9i-a80-optimus.dts to use label references.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A80 has 4 mmc controllers.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add the device tree nodes for the mmc config clock nodes.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch add missing mdio label for sun[457]i.
Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The mk802_a10s re-uses is the "classic" mk802 case and functionality, but has
an A10s SoC inside rather then the A10, it features 512M or 1G RAM, 4G nand,
a mini-hdmi female connector, USB-A receptacle, mini-usb receptacle (OTG)
and a sdio realtek wifi chip. Unlike the original mk802 it does have a pmic,
the axp152.
For more details see: http://linux-sunxi.org/Semitime_g2
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
[Maxime: Changed the compatible and node names labels]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The mk802ii is a revised version of the mk802 A10 based hdmi tv-stick, it
features 1G RAM, 4G nand, a hdmi male connector, USB-A receptacle, 2 micro
usb receptacles (OTG & power) and USB-wifi, and does come with an axp209 pmic.
For more details see: http://linux-sunxi.org/Rikomagic_mk802ii
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The mk802 is the "classic" Allwinner A10 based hdmi tv-stick, it features
512M or 1G RAM, 4G nand, a mini-hdmi female connector, USB-A receptacle,
mini-usb receptacle (OTG) and USB-wifi. Somewhat unique the mk802 does not
use the AXP209 pmic, it does not have a pmic at all.
For more details see: http://linux-sunxi.org/Rikomagic_mk802
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Chuwi V7 is an A10 (sun4i) based tablet with 1G of RAM, 16G of nand flash,
microsd slot, 7" 1024x768 lvds ips panel, mini hdmi out, headphones out,
stereo speakers, front & back camera and usb wifi.
It is clearly marked "CHUWI", "V7" and "Model: CW0825" on the back of the
tablet.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add support for the new Bananapro A20 development board from lemaker.org.
This board features 1G RAM, 2 USB A receptacles, 1 micro USB receptacle for
OTG, 1 micro USB receptacle for power, HDMI, sata, Gbit ethernet, ir receiver,
3.5 mm jack for a/v out, on board microphone, 40 gpio pins and sdio wifi.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A31 has non-initialized architected timers, without CNTFRQ or CNTVOFF set
by the Allwinner's bootloader.
Use the new DT property for such case, and enable the arch timers.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Using label references is preferred when override settings from the
included dtsi.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
mmc0 is only available on port F, and is always used with a 4 bit wide
bus for the onboard micro-sd slot.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Use the label to reference the pin controller node, so that we can use
sunxi-common-regulators with sunxi families that don't share the same
address space mappings, such as sun9i.
This patch is mostly space changes due to the reduction of node parents.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
of_clk_get_parent_name() uses the clock-indices property to resolve
clock phandle arguments in case that the argument index does not
match the clock-output-names sequence.
This is the case on sunxi, where we use the actual bit index as the
argument to the phandle. Add the clock-indices property so that
of_clk_get_parent_name() resolves the names correctly.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The mmc module clocks are A80 specific module 0 (storage) type clocks.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Alexander Bersenev <bay@hackerdom.ru>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Carlo Caione <carlo@caione.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Olliver Schinagl <oliver@schinagl.nl>
The current GPL only licensing on the DTSI makes it very impractical for other
software components licensed under another license.
In order to make it easier for them to reuse our device trees, relicense our
device trees under a GPL/X11 dual-license.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Alexander Bersenev <bay@hackerdom.ru>
Acked-by: Carlo Caione <carlo@caione.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Roman Byshko <rbyshko@gmail.com>
The Ippo Q8H v1.2 is almost identical to the v5, still it needs a separate
dtb file since some gpio-s surrounding the wlan/bluetooth are different,
it uses different camera sensors, and different DRAM timings.
Note that atm neither the wlan/bluetooth nor the camera are supported, so
atm their is no difference between the dts files, but because of the different
DRAM timings there are already separate u-boot configs for the 2 different
versions, and the 1.2 config refers to sun8i-a23-ippo-q8h-v1.2.dtb to be
future proof, so we need to provide a sun8i-a23-ippo-q8h-v1.2.dtb file.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The a23-ippo-q8h tablets have volume up/down buttons using the lradc. This
has been tested on both a v5 and a v1.2 tablet.
Tested-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The A23 has the same lradc controller as previous Allwinner SoCs.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch adds the regulator nodes for the axp209 by including
the axp209 dtsi. As the inputs of these regulators are from the
axp209's PS output, which is basically just a mux over the 2
inputs, it is considered to be unregulated. Thus we do not provide
input supply properties for them.
The regulator names and constraints are based on the board
schematics and the SoC datasheet.
DCDC2 is used as the cpu power supply. This patch also references
it from the cpu node.
Also get rid of axp209 properties already set in axp209.dtsi.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch adds the regulator nodes for the axp209 by including
the axp209 dtsi. As the inputs of these regulators are from the
axp209's PS output, which is basically just a mux over the 2
inputs, it is considered to be unregulated. Thus we do not provide
input supply properties for them.
The regulator names and constraints are based on the board
schematics and the SoC datasheet.
DCDC2 is used as the cpu power supply. This patch also references
it from the cpu node.
LDO3 powers the USB WiFi module. This patch also references it
from the usb-phy node.
Also get rid of axp209 properties already set in axp209.dtsi.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch adds the regulator nodes for the axp209 by including
the axp209 dtsi. As the inputs of these regulators are from the
axp209's PS output, which is basically just a mux over the 2
inputs, it is considered to be unregulated. Thus we do not provide
input supply properties for them.
The regulator names and constraints are based on the board
schematics and the SoC datasheet.
DCDC2 is used as the cpu power supply. This patch also references
it from the cpu node.
Also get rid of axp209 properties already set in axp209.dtsi.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch adds the regulator nodes for the axp209 by including
the axp209 dtsi. As the inputs of these regulators are from the
axp209's PS output, which is basically just a mux over the 2
inputs, it is considered to be unregulated. Thus we do not provide
input supply properties for them.
The regulator names and constraints are based on the board
schematics and the SoC datasheet.
DCDC2 is used as the cpu power supply. This patch also references
it from the cpu node.
Also get rid of axp209 properties already set in axp209.dtsi.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The core temperature sensor now supports thermal zones. Add a thermal
zone mapping for the cpus with passive cooling (cpufreq throttling).
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The core temperature sensor now supports thermal zones. Add a thermal
zone mapping for the cpus with passive cooling (cpufreq throttling).
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The core temperature sensor now supports thermal zones. Add a thermal
zone mapping for the cpus with passive cooling (cpufreq throttling).
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The AXP209 PMIC is used with some Allwinner SoCs. This patch adds
a dtsi file listing all the regulator nodes. The regulators are
initialized based on their device node names.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The pcDuino board has LEDs connected to PH15/PH16, and back/home/menu
buttons to PH17/18/19 respectively. Enable these via gpio-leds and
gpio-keys. This is shared across the v1 and v2 versions of the board.
Tested on a v2 and verified against the schematics of a v1.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
Acked-by: Hans de Goede <hdegoede@redhat.com>
[Maxime: Added some newlines between the button nodes]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add simplefb nodes for "[de_fe0-]de_be0-lcd0" and "[de_fe0-]de_be0-lcd0-tve0"
display pipelines for when u-boot has set up a pipeline to drive a LCD panel /
VGA output rather then the HDMI output.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The cpu core is clocked from the "cpu" clock. Add a reference to it
in the first cpu node. Also add "cpu0" label to the node.
The operating points were taken from the A10 FEX files in the
sunxi-boards repository. All FEX files have the same settings.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The cpu core is clocked from the "cpu" clock. Add a reference to it
in the first cpu node. Also add "cpu0" label to the node.
The operating points were taken from the A13 FEX files in the
sunxi-boards repository. All FEX files have the same settings.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The cpu core is clocked from the "cpu" clock. Add a reference to it
in the first cpu node. Also add "cpu0" label to the node.
The operating points were taken from the A20 FEX files in the
sunxi-boards repository. Not all boards have the same settings. The
settings in this patch are the most generic ones.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that the resistive touchpanel driver supports thermal sensors,
add the "#thermal-sensor-cells" property as required by the thermal
framework.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Eduardo Valentin <edubezval@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The NMI IRQ controller uses the standard flags definition for the IRQ level and
edges.
Use the common header to use defines instead of opaque numbers.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The GIC requires some extra opaque arguments to set the IRQ type and flags.
Convert the DTs to using the common defines.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The pinctrl nodes require some extra opaque arguments for the pull up and drive
strength values.
Introduce a new header file and convert the device trees to replace these
opaque numbers by defines.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The DMA engine for the A10/A20 and derivatives require an opaque extra
argument.
Add a dt-bindings header, and convert the device trees to it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Replace the various raw GPIO flags by their definition in the common
dt-bindings header.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The CSQ CS908 is an A31s based top-set box, with 1G RAM, 8G NAND,
rtl8188etv usb wifi, 2 USB A receptacles (1 connected through the OTG
controller), ethernet, 3.5 mm jack with a/v out and hdmi out.
Note it has no sdcard slot and therefore can only be fel booted.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add a dtsi file for A31s based boards.
Since the A31s is the same die as the A31 in a different package, this dtsi
simply includes sun6i-a31.dtsi and then overrides the pinctrl compatible to
reflect the different package, everything else is identical.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Mele M9 has an ir receiver, enable it.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add a node for the ir receiver found on the A31.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
[Maxime: Added a node label]
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add an ir_clk sub-node to the prcm node.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Only SPI0 is enabled, as the schematic denotes it as the only SPI bus,
while other pins are reserved for different peripherals.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
These are based on the available SPI configurations of Cubieboard,
Olimex LIME, and PcDuino. There is no pin group for SPI3, as all the
boards seem to use those pins for EMAC.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
On the Hummingbird A31 board, the RTL8211E ethernet phy has its reset
line connect to a gpio pin, instead of floating like on other boards.
Add the stmmac properties for describing the reset gpio.
The reset delays were taken from the RTL8211E datasheet.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Add pinmux settings for the ir receive pin of the A31.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Testing has shown that on sun4i the display backend engine does not have
deep enough fifo-s causing flickering / tearing in full-hd mode due to
fifo underruns. This can be avoided by letting the display frontend engine
do the dma from memory, and then letting it feed the data directly into
the backend unmodified, as the frontend does have deep enough fifo-s.
Note since u-boot-v2015.01 has been released using the de_be0-lcd0-hdmi
pipeline on sun4i, we need to keep that one around too (unfortunately).
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Pull RCU updates from Paul E. McKenney:
- Documentation updates.
- Miscellaneous fixes.
- Preemptible-RCU fixes, including fixing an old bug in the
interaction of RCU priority boosting and CPU hotplug.
- SRCU updates.
- RCU CPU stall-warning updates.
- RCU torture-test updates.
Signed-off-by: Ingo Molnar <mingo@kernel.org>
With commit '7dedd34: ARM: OMAP2+: hwmod: Fix a crash in _setup_reset()
with DEBUG_LL' we moved from parsing cmdline to identify uart used
for earlycon to using the requsite hwmod CONFIG_DEBUG_OMAPxUARTy FLAGS.
On DRA7 UART3 hwmod doesn't have this flag enabled, and atleast on
BeagleBoard-X15, where we use UART3 for console, boot fails with
DEBUG_LL enabled. Enable DEBUG_OMAP4UART3_FLAGS for UART3 hwmod.
For using DEBUG_LL, enable CONFIG_DEBUG_OMAP4UART3 in menuconfig.
Fixes: 90020c7b2c ("ARM: OMAP: DRA7: hwmod: Create initial DRA7XX SoC data")
Cc: <stable@vger.kernel.org> # v3.12+
Reviewed-by: Felipe Balbi <balbi@ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
This patch fixes: 'omap_hwmod: gpmc: _wait_target_disable failed'
error during suspend.
This is because smart idle is broken.
Tested in dra7-evm D1 board.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Set DSS core hwmod as the parent for all the DSS submodules. This fixes
the boot time DSS reset, removing the following warnings:
omap_hwmod: dss_dispc: cannot be enabled for reset (3)
omap_hwmod: dss_rfbi: cannot be enabled for reset (3)
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Fixed pr_debug to pr_err when hwmod returns an error when enabling
a module.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
It was accidentally left (& copied & pasted all around) from our
experiments with gpio-keys-polled.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Luxul XWC-1000 is a controller device based on BCM4708 SoC. The only
unusual thing in its DTS file is "ubi" partition on NAND flash.
Signed-off-by: Dan Haab <dhaab@luxul.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
With Xen configured into the arm64 kernel, any driver allocating
DMA'able memory for PCI operations, must be GPL compatible, regardless
of its interaction with Xen. This patch relaxes the GPL requirement of
xen_dma_ops and its dependencies to allow open source drivers to be
compiled for the arm64 architecture.
Signed-off-by: Chuck Tuffli <chuck.tuffli@emulex.com>
These add device tree entry for qspi device on dra72-evm.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable CONFIG_USB_EHCI_HCD and CONFIG_USB_OHCI_HCD to get USB supports
with omap2plus_defconfig.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
BeagleBoard-X15 has options such as rtc, fan that need to be functional
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
For a GICv2 there is always only one (v)CPU involved: the one that
does the access. On a GICv3 the access to a CPU redistributor is
memory-mapped, but not banked, so the (v)CPU affected is determined by
looking at the MMIO address region being accessed.
To allow passing the affected CPU into the accessors later, extend
struct kvm_exit_mmio to add an opaque private pointer parameter.
The current GICv2 emulation just does not use it.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
vgic.c is currently a mixture of generic vGIC emulation code and
functions specific to emulating a GICv2. To ease the addition of
GICv3, split off strictly v2 specific parts into a new file
vgic-v2-emul.c.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
-------
As the diff isn't always obvious here (and to aid eventual rebases),
here is a list of high-level changes done to the code:
* added new file to respective arm/arm64 Makefiles
* moved GICv2 specific functions to vgic-v2-emul.c:
- handle_mmio_misc()
- handle_mmio_set_enable_reg()
- handle_mmio_clear_enable_reg()
- handle_mmio_set_pending_reg()
- handle_mmio_clear_pending_reg()
- handle_mmio_priority_reg()
- vgic_get_target_reg()
- vgic_set_target_reg()
- handle_mmio_target_reg()
- handle_mmio_cfg_reg()
- handle_mmio_sgi_reg()
- vgic_v2_unqueue_sgi()
- read_set_clear_sgi_pend_reg()
- write_set_clear_sgi_pend_reg()
- handle_mmio_sgi_set()
- handle_mmio_sgi_clear()
- vgic_v2_handle_mmio()
- vgic_get_sgi_sources()
- vgic_dispatch_sgi()
- vgic_v2_queue_sgi()
- vgic_v2_map_resources()
- vgic_v2_init()
- vgic_v2_add_sgi_source()
- vgic_v2_init_model()
- vgic_v2_init_emulation()
- handle_cpu_mmio_misc()
- handle_mmio_abpr()
- handle_cpu_mmio_ident()
- vgic_attr_regs_access()
- vgic_create() (renamed to vgic_v2_create())
- vgic_destroy() (renamed to vgic_v2_destroy())
- vgic_has_attr() (renamed to vgic_v2_has_attr())
- vgic_set_attr() (renamed to vgic_v2_set_attr())
- vgic_get_attr() (renamed to vgic_v2_get_attr())
- struct kvm_mmio_range vgic_dist_ranges[]
- struct kvm_mmio_range vgic_cpu_ranges[]
- struct kvm_device_ops kvm_arm_vgic_v2_ops {}
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Currently the maximum number of vCPUs supported is a global value
limited by the used GIC model. GICv3 will lift this limit, but we
still need to observe it for guests using GICv2.
So the maximum number of vCPUs is per-VM value, depending on the
GIC model the guest uses.
Store and check the value in struct kvm_arch, but keep it down to
8 for now.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
With the introduction of a second emulated GIC model we need to let
userspace specify the GIC model to use for each VM. Pass the
userspace provided value down into the vGIC code and store it there
to differentiate later.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
The virtual MPIDR registers (containing topology information) for the
guest are currently mapped linearily to the vcpu_id. Improve this
mapping for arm64 by using three levels to not artificially limit the
number of vCPUs.
To help this, change and rename the kvm_vcpu_get_mpidr() function to
mask off the non-affinity bits in the MPIDR register.
Also add an accessor to later allow easier access to a vCPU with a
given MPIDR. Use this new accessor in the PSCI emulation.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
This patch changes the description of the low-level-debug port. SoC mt8127 and
mt6592 have the same uart port and the same mapping. We just change the
description to add low-level-debug to mt6592.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The upcoming MTK pinctrl driver have a big pin table for each SoC
and we don't want to bloat the kernel binary if we don't need it.
Add config options so we can build for one SoC only.
Signed-off-by: Yingjoe Chen <yingjoe.chen@mediatek.com>
Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
We still have SND_OMAP_SOC_AM3517EVM depending on MACH_OMAP3517EVM,
so let's keep MACH_OMAP3517EVM Kconfig option around for a little
bit longer.
This removes the dependency between ARM SoC changes and the ASoC
changes, and allows the following three options for the driver:
1. Update the driver for device tree based booting
2. Initialize the driver with legacy platform data, then update
the driver for device tree based booting
3. Just remove the driver if there are no audio users for
3517-evm board
Reported-by: Paul Bolle <pebolle@tiscali.nl>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Remove driver CDCE949 because it is not used anywhere in kernel.
It has remained unused for last 5 years.
Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se>
[nsekhar@ti.com: remove additional cdce949 support vestiges
and minor updates to commit text]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
It is not clear from the filename, and comment at the begining adds to the
confusion by not listing L310. Fix it.
Signed-off-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
CSRatlas7 is next-gen auto SoC from CSR.
It could bring to customers most integrated SoC solution:
- World leading Bluetooth 4.0 and GNSS baseband
- Audio processing, analog CODEC and ADC by DSP
- Analog video input
- SDR accelerators
- CAN bus support by Cortex-M3
Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
This patch moves to debug_ll_io_init(), then finally drops CSR map_io()
machine callbacks.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
This patch breaks Marco SMP support, but Marco project has been dropped.
So it corrects cpu1 jump/flag address for Atlas7 and removes scu related
logic as scu doesn't expose in cortex-a7.
Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Marco will not be supported any more. it has been replaced by CSR
Atlas7.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Marco will not be supported any more. It has been replaced by CSR
Atlas7.
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
this patch adds UART0 and UART1 as LLUART port, as the new Atlas7
registers layout are different, it also refines some names of old
hard-coded MARCOs and uses CONFIG_DEBUG_UART_PHYS/DEBUG_UART_VIRT
to define different base addresses for multiple ports.
Signed-off-by: Guo Zeng <Guo.Zeng@csr.com>
Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Seems to be a left-over from an automatic merge.
Signed-off-by: Michael Heimpold <mhei@heimpold.de>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
On Vybrid, all peripherals are numbered starting with zero,
including the GPIO and PORT module. However, the labels of the
corresponding device tree nodes start with one, which is confusing.
Fix that by renaming the labels of the gpio nodes in the device
tree.
Signed-off-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
USB Ethernet function at host mode
USB Media function(webcam) at host mode
USB Audio function at host mode
USB Serial function at host mode
USB EHSET driver at host mode (for OTG & EH Certification test)
Several USB Gadget functions:
- Configfs
- NCM
- Zero (used for test)
- Gadgetfs
- Serial
Above functions are built as module.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Currently PWM functionality is broken on mx25 due to the wrong assignment of the
PWM "per" clock.
According to Documentation/devicetree/bindings/clock/imx25-clock.txt:
pwm_ipg_per 52
,so update the pwm "per" to use 'pwm_ipg_per' instead of 'per10' clock.
With this change PWM can work fine on mx25.
Cc: <stable@vger.kernel.org>
Reported-by: Carlos Soto <csotoalonso@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
imx6q_opp_check_speed_grading() remaps memory to the base variable and
never unmaps it. I can't see how this can be of any use later so here I
unmap it.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
CONFIG_FB_MXS is the LCD driver for mx6solo-lite and mx6solox.
Enable it by default.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
* Tidy up #sound-dai-cells settings
* Drop "renesas,rcar_sound" compatible value
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Merge tag 'renesas-dt-cleanups2-for-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Merge "Second Round of Renesas ARM Based SoC DT Cleanups for v3.20" from Simon
Horman:
Second Round of Renesas ARM Based SoC DT Cleanups for v3.20
* Tidy up #sound-dai-cells settings
* Drop "renesas,rcar_sound" compatible value
* tag 'renesas-dt-cleanups2-for-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: r8a7791: tidyup #sound-dai-cells settings
ARM: shmobile: r8a7790: tidyup #sound-dai-cells settings
ARM: shmobile: r8a7791 dtsi: Drop "renesas,rcar_sound" compatible value
ARM: shmobile: r8a7790 dtsi: Drop "renesas,rcar_sound" compatible value
Signed-off-by: Olof Johansson <olof@lixom.net>
The file is roughly sorted alphabetically (with some exceptions where
old options have been split in two), so alphascale should go at the
top instead of at the bottom.
Also linewrap like other entries have been lately.
Signed-off-by: Olof Johansson <olof@lixom.net>
for now it is wary basic SoC description with most important IPs needed
to make this device work
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
The legacy interrupts on omap4 got broken when gic got changed to
use irq_domain_add_linear() instead of the irq_domain_add_legacy(). We
still have the hardcoded legacy IRQ numbers in use in several places,
most notably the in the legacy DMA. It took a while to figure out
what the problem was and how it should be fixed for the -rc series.
Also include is a regression fix for the dra7 dwc3 suspend.
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Merge tag 'omap-for-v3.19/gic-regression-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
Merge "Urgent omap4 legacy interrupt regression fix for v3.19-rc series" from
Tony Lindgren:
A rather urgent pull request to fix omap4 legacy interrupts.
The legacy interrupts on omap4 got broken when gic got changed to
use irq_domain_add_linear() instead of the irq_domain_add_legacy(). We
still have the hardcoded legacy IRQ numbers in use in several places,
most notably the in the legacy DMA. It took a while to figure out
what the problem was and how it should be fixed for the -rc series.
Also include is a regression fix for the dra7 dwc3 suspend.
* tag 'omap-for-v3.19/gic-regression-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP: Work around hardcoded interrupts
arm: boot: dts: dra7: enable dwc3 suspend PHY quirk
Signed-off-by: Olof Johansson <olof@lixom.net>
Now that we have enabled automatic I/O synchronization barriers, we no
longer need any explicit barriers. We can therefore simplify
arch/arm/mach-mvebu/coherency.c by using the existing
arm_coherent_dma_ops instead of our custom mvebu_hwcc_dma_ops, and
re-enable hardware I/O coherency support.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
[Andrew Lunn <andrew@lunn.ch>: Remove forgotten comment]
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
The commit (3d125f9c91) cause i.MX6SX sdb enet cannot work. The cause is
the commit add mdio node with un-correct phy address.
The patch just correct i.MX6sx sdb board enet phy address.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
This allows booting the device with basic functionality.
Note that at least on my revision c board the DDR3 does
not seem to work properly and only some of the memory
can be reliably used.
Also, the mainline u-boot does not seem to properly
initialize the ethernet, so I've been using the old TI
u-boot at:
http://arago-project.org/git/projects/?p=u-boot-omap3.git;a=summary
Cc: Brian Hutchinson <b.hutchman@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The clocks on dm816x are a bit different from the other omap
variants. The clocks are sourced from a FAPLL (Flying Adder PLL)
unlike on other omaps. Other than that, it's a similar setup
to am33xx with extra muxes and dividers that can be defined
as existing component clocks.
Cc: Brian Hutchinson <b.hutchman@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Similar to other omap variants, let's add dm816x support.
Note that this is based on generated data from the
TI81XX-LINUX-PSP-04.04.00.02 patches published at:
http://downloads.ti.com/dsps/dsps_public_sw/psp/LinuxPSP/TI81XX_04_04/04_04_00_02/index_FDS.html
I've verified the basic functionality, but have not been
able to test all the devices on dm8168-evm.
Cc: Brian Hutchinson <b.hutchman@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
- we remove DEBUG_LL from sama5 defconfig as all SoC are not compatible
- enable ISI and selected sensors
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Merge tag 'at91-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/defconfig
Merge "at91: defconfig for 3.20 #1" from Nicolas Ferre:
First batch of defconfig update for 3.20:
- we remove DEBUG_LL from sama5 defconfig as all SoC are not compatible
- enable ISI and selected sensors
* tag 'at91-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91: sama5: enable atmel-isi and ov2640 in defconfig
ARM: at91/config: sama5: Remove DEBUG_LL
Signed-off-by: Olof Johansson <olof@lixom.net>
We have pcf857x at least several boards. Let's enable it
as a loadable module.
Cc: Brian Hutchinson <b.hutchman@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Some omaps have NOR flash as the rootfs but we're missing
physmap and physmap_of to properly support it.
Signed-off-by: Tony Lindgren <tony@atomide.com>
- little typo and a LED declared
- addition of the Special Function Registers (SFR) + its binding
- RTC & SRAM nodes
- the at91sam9xe has its own .dtsi now. Not combined with at91sam9260 anymore
- addition of the Image Sensor Interface (ISI) DT part and supported sensors
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Merge tag 'at91-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt
Merge "at91: dt for 3.20 #1" from Nicolas Ferre:
First batch of DT changes for 3.20:
- little typo and a LED declared
- addition of the Special Function Registers (SFR) + its binding
- RTC & SRAM nodes
- the at91sam9xe has its own .dtsi now. Not combined with at91sam9260 anymore
- addition of the Image Sensor Interface (ISI) DT part and supported sensors
* tag 'at91-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91: dts: sama5d3: add ov2640 camera sensor support
ARM: at91: dts: sama5d3: change name of pinctrl of ISI_MCK
ARM: at91: dts: sama5d3: change name of pinctrl_isi_{power,reset}
ARM: at91: dts: sama5d3: move the isi mck pin to mb
ARM: at91: dts: sama5d3: add missing pins of isi
ARM: at91: dts: sama5d3: split isi pinctrl
ARM: at91: dts: sama5d3: add isi clock
ARM: at91/dt: ethernut5: use at91sam9xe.dtsi
ARM: at91/dt: Add a dtsi for at91sam9xe
ARM: at91/dt: add SRAM nodes
ARM: at91/dt: at91rm9200ek: enable RTC
ARM: at91/dt: rm9200: add RTC node
ARM: at91/dt: at91sam9n12: Add RTC node
ARM: at91: sama5d4: Add SFR
ARM: at91: sama5d3: Add SFR
ARM: at91: Add Special Function Registers binding documentation
ARM: at91/dt: sam9263: Fix typo: ac91_clk -> ac97_clk
ARM: at91/dt: sama5d3: enable D2 as the heartbeat LED
Signed-off-by: Olof Johansson <olof@lixom.net>
- Documentation for AT91 SoC
- Config options, files and functions removal to continue the big !DT
cleanup done in 3.19
- move of debug-macro.S to its usual location
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Merge tag 'at91-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/cleanup
Merge "at91: cleanup for 3.20 #1" from Nicolas Ferre:
First batch of cleanup for 3.20:
- Documentation for AT91 SoC
- Config options, files and functions removal to continue the big !DT
cleanup done in 3.19
- move of debug-macro.S to its usual location
* tag 'at91-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91: remove useless at91rm9200_set_type()
ARM: at91: remove useless at91rm9200_dt_initialize()
ARM: at91: move debug-macro.S into the common space
ARM: at91: remove useless at91_sysirq_mask_rtx
ARM: at91: remove useless config MACH_AT91SAM9_DT
ARM: at91: remove useless config MACH_AT91RM9200_DT
ARM: at91: remove unused mach/memory.h
ARM: at91: remove useless header file includes
ARM: at91: remove unneeded header file
rtc: at91/Kconfig: remove useless options
ARM: at91/Documentation: add a README for Atmel SoCs
Signed-off-by: Olof Johansson <olof@lixom.net>
CSR Marco SoC has never shipped to customers that could be interested
in mainline support. and new Atlas7 is a replacement SoC that is in
development.
so we drop Marco dts stuff, and add dts stuff for Atlas7.
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Merge tag 'atlas7-init-dts-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux into next/dt
Merge "CSR atlas7 init dts for 3.20" from Barry Song:
Drop Marco and add init dts stuff for Atlas7
CSR Marco SoC has never shipped to customers that could be interested
in mainline support. and new Atlas7 is a replacement SoC that is in
development.
So we drop Marco dts stuff, and add dts stuff for Atlas7.
* tag 'atlas7-init-dts-for-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/baohua/linux:
ARM: dts: add init dts file for CSR atlas7 SoC
ARM: dts: drop MARCO platform DT stuff
Signed-off-by: Olof Johansson <olof@lixom.net>
The interrupt is 16, not 32 (which it would be if we include PPIs
in the count of interrupts).
Cc: Andy Gross <agross@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Andy Gross <agross@codeaurora.org>
Tested-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
This changes muxes in gpio26 pin to function as gpio and adds support
for sd card detect for apq8064 based IFC6410 board.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Pramod Gurav <pramod.gurav@smartplayin.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
When an error occurs during an scm call the error returned is remapped so
we lose the original error code. This means that when an error occurs we
have no idea what actually failed within the secure environment.
Add a logging statement that will log the actual error code from scm call
allowing us to easily determine what caused the error to occur.
Signed-off-by: Olav Haugan <ohaugan@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
scm_call flushes the entire cache before calling into the secure world.
This is both a performance penalty as well as insufficient on SMP systems
where the CPUs possess a write-back L1 cache. Flush only the command and
response buffers instead, moving the responsibility of flushing any other
cached buffer (being passed to the secure world) to callers.
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Instead of hardcoding the cacheline size as 32, get the cacheline size from
the CTR register.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
The cache invalidation in scm_call() correctly rounds down the start
address to invalidate the beginning of the cacheline but doesn't properly
round up the 'end' address to make it aligned. The last chunk of the
buffer won't be invalidated when 'end' is not cacheline size aligned so
make sure to invalidate the last few bytes in such situations. It also
doesn't do anything about outer caches so make sure to invalidate and flush
those as well.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
We can run qcom platforms in big-endian mode. Select the option.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
We have this on at least 3517-evm and dm8168-evm. Let's
enable davinci_emac so those can be booted with NFSroot.
Cc: Brian Hutchinson <b.hutchman@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
If the CPU is in big-endian mode these macros will access the
hardware incorrectly. Reverse thins as necessary to fix this.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Add another SoC address for apq8064 and use DEBUG_UART_VIRT
instead of DEBUG_UART_BASE because the former actually exists.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
In preparation for having init_card() called for all card types (not
just SDIO), change pandora_wl1251_init_card() so it checks whether the
card type is SDIO.
Signed-off-by: Doug Anderson <dianders@chromium.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
We've been sitting on our fixes branch for a while, so this batch is
unfortunately on the large side.
A lot of these are tweaks and fixes to device trees, fixing various bugs
around clocks, reg ranges, etc. There's also a few defconfig updates
(which are on the late side, no more of those).
All in all the diffstat is bigger than ideal at this time, but the nothing
in here seems particularly risky.
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Merge tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"We've been sitting on our fixes branch for a while, so this batch is
unfortunately on the large side.
A lot of these are tweaks and fixes to device trees, fixing various
bugs around clocks, reg ranges, etc. There's also a few defconfig
updates (which are on the late side, no more of those).
All in all the diffstat is bigger than ideal at this time, but nothing
in here seems particularly risky"
* tag 'armsoc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (31 commits)
reset: sunxi: fix spinlock initialization
ARM: dts: disable CCI on exynos5420 based arndale-octa
drivers: bus: check cci device tree node status
ARM: rockchip: disable jtag/sdmmc autoswitching on rk3288
ARM: nomadik: fix up leftover device tree pins
ARM: at91: board-dt-sama5: add phy_fixup to override NAND_Tree
ARM: at91/dt: sam9263: Add missing clocks to lcdc node
ARM: at91: sama5d3: dt: correct the sound route
ARM: at91/dt: sama5d4: fix the timer reg length
ARM: exynos_defconfig: Enable LM90 driver
ARM: exynos_defconfig: Enable options for display panel support
arm: dts: Use pmu_system_controller phandle for dp phy
ARM: shmobile: sh73a0 legacy: Set .control_parent for all irqpin instances
ARM: dts: berlin: correct BG2Q's SM GPIO location.
ARM: dts: berlin: add broken-cd and set bus width for eMMC in Marvell DMP DT
ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 host
ARM: dts: Revert disabling of smc91x for n900
ARM: dts: imx51-babbage: Fix ULPI PHY reset modelling
ARM: dts: dra7-evm: fix qspi device tree partition size
ARM: omap2plus_defconfig: use CONFIG_CPUFREQ_DT
...
The current hardware I/O coherency is known to cause problems with DMA
coherent buffers, as it still requires explicit I/O synchronization
barriers, which is not compatible with the semantics expected by the
Linux DMA coherent buffers API.
So, in order to have enough time to validate a new solution based on
automatic I/O synchronization barriers, this commit disables hardware
I/O coherency entirely. Future patches will re-enable it.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: <stable@vger.kernel.org> # v3.8+
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Commit 9a1091ef00 ("irqchip: gic: Support hierarchy irq domain")
changed the GIC driver to use a non-legacy IRQ domain on DT
platforms. This patch assumes that DT-driven systems are getting
all of their interrupts from device tree.
Turns out that OMAP has quite a few hidden gems, and still uses
hardcoded interrupts despite having fairly complete DTs.
This patch attempts to work around these by offering a translation
method that can be called directly from the hwmod code, if present.
The same hack is sprinkled over PRCM and TWL.
It isn't pretty, but it seems to do the job without having to add
more hacks to the interrupt controller code.
Tested on OMAP4 (Panda-ES) and OMAP5 (UEVM5432).
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Nishanth Menon <nm@ti.com>
[tony@atomide.com: updated to fix make randconfig issue]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Merge "Renesas ARM Based SoC Fixes for v3.19" from Simon Horman:
Renesas ARM Based SoC Fixes for v3.19
This pull request is based on the last round of SoC updates for v3.19,
Fourth Round of Renesas ARM Based SoC Updates for v3.19, tagged as
renesas-soc3-for-v3.19, merged into your next/soc branch and included in
v3.19-rc1.
- ARM: shmobile: r8a7740: Instantiate GIC from C board code in legacy builds
Set .control_parent for all irqpin instances for sh73a0 SoC when booting
using legacy C.
- ARM: shmobile: r8a7740: Instantiate GIC from C board code in legacy builds
This fixes a long standing problem which has been present since
the sh73a0 SoC started using the INTC External IRQ pin driver.
The patch that introduced the problem is 341eb5465f ("ARM:
shmobile: INTC External IRQ pin driver on sh73a0") which was included
in v3.10.
* tag 'renesas-soc-fixes-for-v3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: sh73a0 legacy: Set .control_parent for all irqpin instances
ARM: shmobile: r8a7740: Instantiate GIC from C board code in legacy builds
The arndale-octa board was giving "imprecise external aborts" during
boot-up with MCPM enabled. CCI enablement of the boot cluster was found
to be the cause of these aborts (possibly because the secure f/w was not
allowing it). Hence, disable CCI for the arndale-octa board.
Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com>
Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Tested-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Tyler Baker <tyler.baker@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "at91: fixes for 3.19 #1 (ter)" from Nicolas Ferre:
First fixes batch for AT91 on 3.19:
- fix some DT entries
- correct clock entry for the at91sam9263 LCD
- add a phy_fixup for Eth1 on sama5d4
* tag 'at91-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91: board-dt-sama5: add phy_fixup to override NAND_Tree
ARM: at91/dt: sam9263: Add missing clocks to lcdc node
ARM: at91: sama5d3: dt: correct the sound route
ARM: at91/dt: sama5d4: fix the timer reg length
Signed-off-by: Olof Johansson <olof@lixom.net>
rk3288 SoCs have a function to automatically switch between jtag/sdmmc pinmux
settings depending on the card state. This collides with a lot of assumptions.
It only works when using the internal card-detect mechanism and breaks
horribly when using either the normal card-detect via the slot-gpio function
or via any other pin. Also there is of course no link between the mmc and jtag
on the software-side, so the jtag clocks may very well be disabled when the
card is ejected and the soc switches back to the jtag pinmux.
Leaving the switching function enabled did result in mmc timeouts and rcu
stalls thus hanging the system on 3.19-rc1. Therefore disable it in all cases,
as we expect the devicetree to explicitly select either mmc or jtag pinmuxes
anyway.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "ARM: berlin: Fixes for v3.19 (round 1)" from Sebastian Hesselbarth:
Marvell Berlin fixes for v3.19 round 1:
- SDHCI DT fixes for BG2Q and BG2Q reference board
- BG2Q SM GPIO DT node relocation
* tag 'berlin-fixes-for-3.19-1' of git://git.infradead.org/users/hesselba/linux-berlin:
ARM: dts: berlin: correct BG2Q's SM GPIO location.
ARM: dts: berlin: add broken-cd and set bus width for eMMC in Marvell DMP DT
ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 host
Signed-off-by: Olof Johansson <olof@lixom.net>
We altered the device tree bindings for the Nomadik family of
pin controllers to be standard, this file was merged out-of-order
so we missed fixing this. Fix it up.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "omap fixes against v3.19-rc1" from Tony Lindgren:
Fixes for omaps mostly to deal with dra7 timer issues
and hypervisor mode. The other fixes are minor fixes for
various boards. The summary of the fixes is:
- Fix real-time counter rate typos for some frequencies
- Fix counter frequency drift for am572x
- Fix booting of secondary CPU in HYP mode
- Fix n900 board name for legacy user space
- Fix cpufreq in omap2plus_defconfig after Kconfig change
- Fix dra7 qspi partitions
And also, let's re-enable smc91x on some n900 boards that
we have sitting in a few test boot systems after the boot
loader dependencies got fixed.
* tag 'omap-for-v3.19/fixes-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: Revert disabling of smc91x for n900
ARM: dts: dra7-evm: fix qspi device tree partition size
ARM: omap2plus_defconfig: use CONFIG_CPUFREQ_DT
ARM: OMAP2+: Fix n900 board name for legacy user space
ARM: omap5/dra7xx: Enable booting secondary CPU in HYP mode
ARM: dra7xx: Fix counter frequency drift for AM572x errata i856
ARM: omap5/dra7xx: Fix frequency typos
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "ARM: imx: fixes for 3.19" from Shawn Guo:
The i.MX fixes for 3.19:
- One fix for incorrect i.MX25 SPI1 clock assignment in device tree,
which causes system hang when accessing SPI1.
- Correct i.MX6SX QSPI parent clock configuration to fix a kernel Oops.
- Fix ULPI PHY reset modelling on imx51-babbage board to remove the
dependency on bootloader for USB3317 ULPI PHY reset.
- Correct video divider setting on i.MX6Q rev T0 1.0 to fix the issue
that HDMI is not working at high resolution on T0 1.0.
- One incremental fix for CODA960 VPU enabling in device tree to
correct interrupt order.
- LS1021A SCFG block works in BE mode, add device tree property
big-endian to make it right.
* tag 'imx-fixes-3.19' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: dts: imx51-babbage: Fix ULPI PHY reset modelling
ARM: imx6sx: Set PLL2 as parent of QSPI clocks
ARM: dts: imx25: Fix the SPI1 clocks
ARM: clk-imx6q: fix video divider for rev T0 1.0
ARM: dts: imx6qdl: Fix CODA960 interrupt order
ARM: ls1021a: dtsi: add 'big-endian' property for scfg node
Signed-off-by: Olof Johansson <olof@lixom.net>
Merge "ARM: rockchip: dts fix for 3.19" from Heiko Stübner:
Increase drive-strength to sdmmc pins on rk3288-evb to fix
an issue with the fixed highspeed card detection.
* tag 'v3.19-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: bump sd card pin drive strength up on rk3288-evb
Signed-off-by: Olof Johansson <olof@lixom.net>
As of commit 9a1091ef00 ("irqchip: gic: Support hierarchy irq
domain."), Marzen legacy hangs during boot with:
Image Name: 'Linux-3.19.0-rc4'
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 3445880 Bytes = 3.3 MiB
Load Address: 60008000
Entry Point: 60008000
Verifying Checksum ... OK
Loading Kernel Image ... OK
OK
Starting kernel ...
Enabling DEBUG_LL does not seem to change the situation, however this
patch by itself fixes this issue and re-enables normal boot.
This issue happens because the IRQ numbers of the GIC are now virtual,
and no longer match the hardcoded hardware IRQ numbers in the platform
board code.
To fix this, instantiate the GIC from platform board code when compiling
a legacy kernel, like is done for the sh73a0, r8a7740 and r8a7778 legacy code.
Follows same style as the r8a7740 legacy GIC fix by Geert Uytterhoeven,
thanks to him for the initial work.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
As of commit 9a1091ef00 ("irqchip: gic: Support hierarchy irq
domain."), Bock-W legacy hangs during boot with:
Unable to handle kernel paging request at virtual address cf86a128
pgd = c0004000
[cf86a128] *pgd=6f80041e(bad)
Internal error: Oops: 8000000d [#1] SMP ARM
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.19.0-rc4 #1
Hardware name: bockw
task: cf823b40 ti: cf824000 task.ti: cf824000
PC is at 0xcf86a128
LR is at request_threaded_irq+0xbc/0x124
This happens because the IRQ numbers of the GIC are now virtual, and no
longer match the hardcoded hardware IRQ numbers in the platform board
code.
To fix this, instantiate the GIC from platform board code when compiling
a legacy kernel, like is done for the sh73a0 and r8a7740 legacy code.
Follows same style as the r8a7740 legacy GIC fix by Geert Uytterhoeven,
thanks to him for the initial work.
Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Move at91rm9200_idle() along with at91sam9_idle() in clk/at91/pmc.c.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Michael Turquette <mturquette@linaro.org>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
SRAM initialization is now done through the mmio-sram driver and
at91_init_sram() is not called anymore, remove it.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Now that the SRAM is initialized by the mmio-sram driver, .map_io is useless.
remove it.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Split at91_pm_init() in three variants that are called by the respective SoCs
.init_machine. This allows to remove the of_machine_is_compatible() calls and
move at91_pm_init() out of arch_initcall() which is required for multiplatform.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Check UDP and UHP on sam9x5, sam9n12 and the sama5 series.
Check UHP on the sam9g45.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Now that the SRAM is part of a genpool, use it to allocate memory to use for the
slowclock implementation.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Store SoC differences in a struct to remove cpu_is_* usage.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
- little typo and a LED declared
- addition of the Special Function Registers (SFR) + its binding
- RTC & SRAM nodes
- the at91sam9xe has its own .dtsi now. Not combined with at91sam9260 anymore
- addition of the Image Sensor Interface (ISI) DT part and supported sensors
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Merge tag 'at91-dt' into at91-3.20-cleanup
There is an external resistor divider on PB16, acting like a pull-down,
the pull-up increase power consumption and prevent the vbus detect pin
to reach Vss voltage, ~1.5V mesured on my board, it might not even work
if the pull-up is stronger than usual.
Signed-off-by: Sylvain Rochet <sylvain.rochet@finsecur.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This code was restored with commit 080fc66fb5 ("ARM: Bring back ARMv3 IO
and user access code") because the RiscPC memory bus does not understand
half-word load/stores. However only the IO code needed restoring since
the alternative user access code contains no half-word accesses, is
already used when CONFIG_PREEMPT is set and runs faster on a StrongARM.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds device tree nodes for L2 cache controller present on
Exynos4 SoCs.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
On Exynos SoCs it is necessary to resume operation of L2C early in
assembly code, because otherwise certain systems will crash. This patch
adds necessary code to non-secure resume handler.
[rewrote the code accessing l2x0_saved_regs]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Exynos4 SoCs equipped with an L2C-310 cache controller and running under
secure firmware require certain registers of aforementioned IP to be
accessed only from secure mode. This means that SMC calls are required
for certain register writes. To handle this, an implementation of
.write_sec and .configure callbacks is provided by this patch.
[added comment and reworked unconditional call to SMC_CMD_L2X0INVALL]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Firmware on certain boards (e.g. ODROID-U3) can leave incorrect L2C prefetch
settings configured in registers leading to crashes if L2C is enabled
without overriding them. This patch introduces bindings to enable
prefetch settings to be specified from DT and necessary support in the
driver.
[mszyprow: rebased onto v3.18-rc1, added error message when prefetch related
dt property has been provided without any value]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Certain platforms (i.e. Exynos) might need to set .write_sec callback
from firmware initialization which is happenning in .init_early callback
of machine descriptor. However current code will overwrite the pointer
with whatever is present in machine descriptor, even though it can be
already set earlier. This patch fixes this by making the assignment
conditional, depending on whether current .write_sec callback is NULL.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Because certain secure hypervisor do not allow writes to individual L2C
registers, but rather expect set of parameters to be passed as argument
to secure monitor calls, there is a need to provide an interface for the
L2C driver to ask the firmware to configure the hardware according to
specified parameters. This patch adds such.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Certain implementations of secure hypervisors (namely the one found on
Samsung Exynos-based boards) do not provide access to individual L2C
registers. This makes the .write_sec()-based interface insufficient and
provoking ugly hacks.
This patch is first step to make the driver not rely on availability of
writes to individual registers. This is achieved by refactoring the
driver to use a commit-like operation scheme: all register values are
prepared first and stored in an instance of l2x0_regs struct and then a
single callback is responsible to flush those values to the hardware.
[mszyprow: rebased onto 'ARM: l2c: use l2c_write_sec() for restoring
latency and filter regs' patch]
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
All four register for latency and filter settings cannot be written in
non-secure mode and they should go through l2c_write_sec(). More on this
can be found in CoreLink Level 2 Cache Controller L2C-310 Technical
Reference Manual, 3.2. Register summary, table 3.1. This have been checked
the TRM for r3p3, but it should be uniform for all revisions.
Reported-by: Nishanth Menon <nm@ti.com>
Suggested-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch implements generic DT L2C initialisation (the one from
init_IRQ in arch/arm/kernel/irq.c) for Omap4 and AM43 platforms and
kills the SoC specific stuff in arch/arm/mach-omap2/omap4-common.c.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Tested-by: Nishanth Menon <nm@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch add bitrev.h file to support rbit instruction,
so that we can do bitrev operation by hardware.
Signed-off-by: Yalin Wang <yalin.wang@sonymobile.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch enables ARMv8 ditry page logging support. Plugs ARMv8 into generic
layer through Kconfig symbol, and drops earlier ARM64 constraints to enable
logging at architecture layer.
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Mario Smarduch <m.smarduch@samsung.com>
This patch adds support for 2nd stage page fault handling while dirty page
logging. On huge page faults, huge pages are dissolved to normal pages, and
rebuilding of 2nd stage huge pages is blocked. In case migration is
canceled this restriction is removed and huge pages may be rebuilt again.
Signed-off-by: Mario Smarduch <m.smarduch@samsung.com>
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Add support to track dirty pages between user space KVM_GET_DIRTY_LOG ioctl
calls. We call kvm_get_dirty_log_protect() function to do most of the work.
Reviewed-by: Christoffer Dall <christoffer.dall@linaro.org>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Mario Smarduch <m.smarduch@samsung.com>
Add support for initial write protection of VM memslots. This patch
series assumes that huge PUDs will not be used in 2nd stage tables, which is
always valid on ARMv7
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Mario Smarduch <m.smarduch@samsung.com>
This patch adds ARMv7 architecture TLB Flush function.
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Mario Smarduch <m.smarduch@samsung.com>
The MiPHY28lp is a Generic PHY which can serve various SATA, PCIe or
USB3 devices. The two first ports can be use for either; both SATA, both
PCIe or one of each in any configuration.
The Third port is only for USB3.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
B2199 HDK is the reference board for STiH418 SoC.
It has the following characteristics:
- 3GB DDR3
- 8GB eMMC / SD-Card slot
- 32MB NOR Flash
- 1 x Gbit Ethernet
- 1 x USB3.0 port
- 2 x USB2.0 ports
- 1 x Sata or Mini-PCIe port
- 1 x WiFi 802.11ac (Quantenna)
- 1 x HDMI out
- 1 x HDMI in
- 1 x SPDIF
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
The STiH418 is advanced UHD 60fps AVC processor with 3D graphic acceleration and
quad-core ARM Cortex A9 CPU.
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the DRM/KMS dt nodes.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@linaro.org>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This patch adds the DRM/KMS dt nodes.
This node can't be in stih407-family.dtsi file because in the future we
will integrate a new stih418-b2199 board. It's a stih407 family board
with different drm/kms dt nodes.
That is why i created the stih407.dtsi file.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Acked-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Add a special case for PM domains containing a memory-controller.
Such a PM domain must not be turned off if memory is in use.
On sh73a0 PM domains A4BC0 and A4BC1 each contain an SDRAM Bus State
Controller (SBSC). On r8a73a4 PM domain A3BC contains two DDR Bus
Controllers (DBSC). In both cases, there are no other devices in these
PM domains, so they were eligible for power down, crashing the system.
On r8a7740 the DDR3 Bus State Controller (DBSC3) is located in A4S,
whose child domain A3SM contains the CPU core. Hence A4S is never turned
off, and no crash happened.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>