f759ee57b2
ARC: Ensure DT mem base is same as what kernel is built with
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Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-10-28 16:13:42 +05:30
090749502f
ARC: add/fix some comments in code - no functional change
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Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-08-20 19:05:49 +05:30
e2fc61f384
ARCv2: [axs103] bump CPU frequency from 75 to 90 MHZ
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With up-to-date FPGA builds ARC cores are supposed to correctly operate
even with 90 MHz clock (which is a target frequency for AXS103 release).
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: arc-linux-dev@synopsys.com
2015-07-09 17:36:31 +05:30
5fa2daaa8d
ARCv2: [axs103] Support ARC SDP FPGA platform for HS38x cores
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Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2015-06-25 06:00:20 +05:30
Vineet Gupta