Commit Graph

4 Commits

Author SHA1 Message Date
Stephen Warren fea221e254 ARM: tegra: trimslice: enable SPI flash
TrimSlice contains a 1MiB SPI flash. Represent this in the device tree.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-11-15 15:07:30 -07:00
Stephen Warren a6a3dd1aed ARM: dt: tegra trimslice: enable USB2 port
This was accidentally disabled by commit 2a5fdc9 "ARM: dt: tegra:
invert status=disable vs status=okay".

Cc: <stable@vger.kernel.org> # v3.5 (file is named tegra-trimslice.dts there)
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-07-25 22:09:16 +02:00
Stephen Warren 01ad8063a5 ARM: dt: tegra trimslice: add vbus-gpio property
On TrimSlice, Tegra's USB1 port may be routed to either an external micro
USB port, or an internal USB->SATA bridge for SSD or HDD. This muxing is
controlled by a GPIO. Whilst not strictly a VBUS GPIO, the TrimSlice
board files caused this GPIO to be set appropriately to enable the SATA
bridge by passing it as the VBUS GPIO to the USB driver. Echo this same
configuration in device tree to enable the SATA bridge.

An alternative might be to implement a full USB bus mux driver. However,
that seems over-complex right now.

Cc: <stable@vger.kernel.org> # v3.5 (file is named tegra-trimslice.dts there)
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-07-25 22:09:16 +02:00
Stephen Warren 702b0e4f2f ARM: dt: tegra: rename board files to match SoC
Most ARM ${board}.dts files are already named ${soc}-${board}.dts. This
change modifies the Tegra board files to be named the same way for
consistency.

Once a related change is made in U-Boot, this will cause both U-Boot and
the kernel to use the same names for the .dts files and SoC identifiers,
thus allowing U-Boot's recently added "soc" and "board" environment
variables to be used to construct the name of Tegra .dtb files, and hence
allow board-generic U-Boot bootcmd scripts to be written.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-06-20 12:30:10 -06:00