2 Commits

Author	SHA1	Message	Date
Qipeng Zha	618a919b4c	pinctrl: intel: fix bug of register offset calculation ... The group size for registers PADCFGLOCK, HOSTSW_OWN, GPI_IS, GPI_IE, are not 24 for Broxton, Add a parameter to allow different platform to set correct value. Signed-off-by: Qi Zheng <qi.zheng@intel.com> Signed-off-by: Qipeng Zha <qipeng.zha@intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>	2015-12-10 23:01:41 +01:00
Mika Westerberg	ee1a6ca43d	pinctrl: intel: Add Intel Broxton pin controller support ... This driver adds pinctrl/GPIO support for Intel Broxton. The GPIO controller is based on the same hardware design that is already used in Intel Sunrisepoint so we leverage the core driver here. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>	2015-10-27 13:32:13 +01:00