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3 Commits

Author SHA1 Message Date
John Crispin 740c606e8e MIPS: lantiq: adds static clock for PP32 
The Lantiq DSL SoCs have an internal networking processor. Add code to read
the static clock rate.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4815/
 2013-02-17 00:15:17 +01:00
John Crispin 3a6ac5004c MIPS: lantiq: falcon clocks were not enabled properly 
As a result of a non populated ->bits field inside the clock struct, the clock
domains were never powered on the Falcon. Until now we only used domains that
were also used and powered by the bootloader.

Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4234/
 2012-08-23 00:08:18 +02:00
John Crispin d41ced01f2 MIPS: lantiq: implement support for FALCON soc 
Adds support for the FALCON SoC. This SoC is from the FTTH/GPON SoC family.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3814/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 2012-05-21 14:31:55 +01:00