Commit Graph

482270 Commits

Author SHA1 Message Date
Steven J. Hill 23d06e4fb7 MIPS: Add CP0 macros for extended EntryLo registers
Add read/write macros to access the upper bits of the
extended EntryLo0 and EntryLo1 registers used by XPA.

Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8455/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 22:47:31 +01:00
Ralf Baechle 1ca1f8f6b3 MIPS: Remove now unused definition of phys_t.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 22:47:31 +01:00
Ralf Baechle 15d45cce3a MIPS: Replace use of phys_t with phys_addr_t.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 22:47:31 +01:00
Ralf Baechle 34adb28d50 MIPS: Replace MIPS-specific 64BIT_PHYS_ADDR with generic PHYS_ADDR_T_64BIT
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 22:46:44 +01:00
Ralf Baechle f98614072c PCMCIA: Alchemy Don't select 64BIT_PHYS_ADDR in Kconfig.
For Alchemy 64BIT_PHYS_ADDR is already always set in arch/mips/Kconfig.
Also 64BIT_PHYS_ADDR is about to be removed.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 22:45:05 +01:00
Markos Chandras dd2adea415 MIPS: lib: memset: Clean up some MIPS{EL,EB} ifdefery
The toolchain defines exactly one of __MIPSEB__ and
__MIPSEL__. As a result, simplify the ifdefery a little bit.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8522/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:42 +01:00
Markos Chandras 0845bb721e MIPS: iomap: Use __mem_{read,write}{b,w,l} for MMIO
Using the __raw_{read,write}{b,w,l} functions to perform
repeatable MMIO could result in problems if the host bus
does not match the endianness of the PCI/ISA. This problem
is visible on big-endian SEAD3 configurations after commit
2925f6c0c7
"net: smc911x: use io{read,write}*_rep accessors". This effectively
moves away from using the __mem_* variants to __raw_* ones
and causes a kernel bug as follows:

Call Trace:
CPU 0 Unable to handle kernel paging request at virtual address 00000000,
epc == 00000000, ra == 8012b3b0
Oops[#1]:
Cpu 0
$ 0   : 00000000 00000065 00000000 00000004
$ 4   : 00000000 00000000 9a82dd60 00000000
$ 8   : 00000000 00000000 a00ae278 00000007
$12   : 0000000e 00000011 804c4228 ffff9411
$16   : 00000100 00000000 80560000 807fc6d0
$20   : 807fc8d0 807fcad0 807fbec0 00000100
$24   : 00009150 80109be0
$28   : 9a82c000 9a82dd28 00000001 8012b3b0
Hi    : 00000000
Lo    : 00000000
epc   : 00000000   (null)
    Not tainted
ra    : 8012b3b0 call_timer_fn.isra.39+0x24/0x84
Status: 10009503    KERNEL EXL IE
Cause : 00800808
BadVA : 00000000
PrId  : 00019c20 (MIPS M14Kc)
Modules linked in:
Process swapper (pid: 1, threadinfo=9a82c000, task=9a82ba18, tls=00000000)
Stack : 00000040 00000000 00000007 8056732c 80580000 00000001 9a82dd60 00200200
        80560000 8012b598 8056732c 80580000 00000001 00000000 9a82dd60 9a82dd60
        00000000 807fbd44 807fbd40 805664e0 0000000a 80800000 00000004 80125924
        0000fda0 000007f0 80000000 00000001 80800000 007f0000 00200140 80166338
        00000000 8100fda0 0000fda0 000007f0 80000000 00000001 80800000 007f0000
        ...
Call Trace:
[<8012b598>] run_timer_softirq+0x188/0x1f4
[<80125924>] __do_softirq+0xc4/0x18c
[<80166338>] handle_percpu_irq+0x54/0x84
[<80125aa4>] do_softirq+0x68/0x70
[<80103b50>] do_IRQ+0x18/0x28
[<80125d1c>] irq_exit+0x94/0xc0
[<80125aa4>] do_softirq+0x68/0x70
[<80102130>] ret_from_irq+0x0/0x4
[<80102130>] ret_from_irq+0x0/0x4
[<80125d1c>] irq_exit+0x94/0xc0
[<803165b0>] __bzero+0xd4/0x164
[<80346d0c>] mem32_serial_out+0x0/0x1c
[<8010d4ac>] free_init_pages+0x98/0xfc
[<80180a08>] free_hot_cold_page+0x2c/0x1c4
[<80180bd8>] __free_pages+0x38/0x98
[<8010d4a0>] free_init_pages+0x8c/0xfc
[<8010d4ac>] free_init_pages+0x98/0xfc
[<8049fb04>] kernel_init+0x28/0x15c
[<80147484>] schedule_tail+0x1c/0x60
[<8049fadc>] kernel_init+0x0/0x15c
[<80102178>] ret_from_kernel_thread+0x14/0x1c
[<8040a06f>] skb_pad+0xe7/0x13c

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: Steve Glendinning <steve.glendinning@shawell.net>
Cc: Ben Boeckel <mathstuf@gmail.com>
Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: netdev@vger.kernel.org
Cc: Jeffrey Deans <Jeffrey.Deans@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6672/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:42 +01:00
Ralf Baechle d98aefc384 MIPS: <asm/types.h> fix indentation.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:41 +01:00
Kevin Cernekee 70371cef11 MAINTAINERS: Add entry for BMIPS multiplatform kernel
Add myself as a maintainer for the new BMIPS target.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Cc: f.fainelli@gmail.com
Cc: jfraser@broadcom.com
Cc: dtor@chromium.org
Cc: tglx@linutronix.de
Cc: jason@lakedaemon.net
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8505/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:41 +01:00
Prem Karat ccd3988086 MIPS: Enable VDSO randomization
Based on commit 1091458d09 (mmap randomization)

For 32-bit address spaces randomize within a
16MB space, for 64-bit within a 256MB space.

Test Results:
------------
Without Patch (VDSO is not randomized)
---------------------------------------
root@Maleo:~# ./aslr vdso
FAIL: ASLR not functional (vdso always at 0x7fff7000)

root@Maleo:~# ./aslr rekey vdso
pre_val==cur_val
value=0x7fff7000

With patch:(VDSO is randmoized and doesn't interfere with stack)
----------------------------------------------------------------
root@cavium-octeon2:~# ./aslr rekey vdso
pre_val!=cur_val
previous_value=0x7f830ea2
current_value=0x776e2000
root@cavium-octeon2:~# ./aslr rekey vdso
pre_val!=cur_val
previous_value=0x7fb0cea2
current_value=0x77209000
root@cavium-octeon2:~# ./aslr rekey vdso
pre_val!=cur_val
previous_value=0x7f985ea2
current_value=0x7770c000
root@cavium-octeon2:~# ./aslr rekey vdso
pre_val!=cur_val
previous_value=0x7fbc6ea2
current_value=0x7fe25000

Maps file output:
-------------------------
root@cavium-octeon2:~# ./aslr rekey maps
78584000-785a5000 rwxp 00000000 00:00 0                                  [heap]
7f9d0000-7f9f1000 rw-p 00000000 00:00 0                                  [stack]
7ffa5000-7ffa6000 r-xp 00000000 00:00 0                                  [vdso]

root@cavium-octeon2:~# ./aslr rekey maps
77de0000-77e01000 rwxp 00000000 00:00 0                                  [heap]
7f91b000-7f93c000 rw-p 00000000 00:00 0                                  [stack]
7ff99000-7ff9a000 r-xp 00000000 00:00 0                                  [vdso]

root@cavium-octeon2:~# ./aslr rekey maps
77d7f000-77da0000 rwxp 00000000 00:00 0                                  [heap]
7fc2a000-7fc4b000 rw-p 00000000 00:00 0                                  [stack]
7fe09000-7fe0a000 r-xp 00000000 00:00 0                                  [vdso]

root@cavium-octeon2:~# ./aslr rekey maps
7794c000-7794d000 r-xp 00000000 00:00 0                                  [vdso]
77e4b000-77e6c000 rwxp 00000000 00:00 0                                  [heap]
7f6e7000-7f708000 rw-p 00000000 00:00 0                                  [stack]
root@cavium-octeon2:~#

Signed-off-by: Prem Karat <pkarat@mvista.com>
Cc: linux-mips@linux-mips.org
Cc: sergei.shtylyov@cogentembedded.com
Cc: ddaney.cavm@gmail.com
Patchwork: https://patchwork.linux-mips.org/patch/6812
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:38 +01:00
Ralf Baechle ac41f9c462 MIPS: Remove a temporary hack for debugging cache flushes in SMTC configuration
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: aaro.koskinen@iki.fi
Cc: david.daney@cavium.com
Cc: linux-kernel@vger.kernel.org
Cc: markos.chandras@imgtec.com
Cc: dengcheng.zhu@imgtec.com
Cc: chenhc@lemote.com
Cc: akpm@linux-foundation.org
Patchwork: https://patchwork.linux-mips.org/patch/8535/
2014-11-24 07:45:37 +01:00
Maarten ter Huurne 85546d7ec8 MIPS: Remove declaration of obsolete arch_init_clk_ops()
Signed-off-by: Maarten ter Huurne <maarten@treewalker.org>
Cc: Apelete Seketeli <apelete@seketeli.net>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7671/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:37 +01:00
Maciej W. Rozycki ddb3108e30 MIPS: atomic.h: Reformat to fit in 79 columns
Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8484/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:37 +01:00
Maciej W. Rozycki 0e525e48f7 MIPS: Apply `.insn' to fixup labels throughout
Fix the issue with the ISA bit being lost in fixups that jump to labels
placed just before a section switch.  Such a switch leads to the ISA bit
being lost, because GAS concludes there is no code that follows and
therefore the label refers to data.  Use the `.insn' pseudo-op to
convince the tool this is not the case.

This lack of label annotation leads to microMIPS compilation errors
like:

mips-linux-gnu-ld: arch/mips/built-in.o: .fixup+0x3b8: Unsupported jump between ISA modes; consider recompiling with interlinking enabled.
mips-linux-gnu-ld: final link failed: Bad value

Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8483/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:36 +01:00
Maciej W. Rozycki b0984c4370 MIPS: Fix microMIPS LL/SC immediate offsets
In the microMIPS encoding some memory access instructions have their
immediate offset reduced to 12 bits only.  That does not match the GCC
`R' constraint we use in some places to satisfy the requirement,
resulting in build failures like this:

{standard input}: Assembler messages:
{standard input}:720: Error: macro used $at after ".set noat"
{standard input}:720: Warning: macro instruction expanded into multiple instructions

Fix the problem by defining a macro, `GCC_OFF12_ASM', that expands to
the right constraint depending on whether microMIPS or standard MIPS
code is produced.  Also apply the fix to where `m' is used as in the
worst case this change does nothing, e.g. where the pointer was already
in a register such as a function argument and no further offset was
requested, and in the best case it avoids an extraneous sequence of up
to two instructions to load the high 20 bits of the address in the LL/SC
loop.  This reduces the risk of lock contention that is the higher the
more instructions there are in the critical section between LL and SC.

Strictly speaking we could just bulk-replace `R' with `ZC' as the latter
constraint adjusts automatically depending on the ISA selected.
However it was only introduced with GCC 4.9 and we keep supporing older
compilers for the standard MIPS configuration, hence the slightly more
complicated approach I chose.

The choice of a zero-argument function-like rather than an object-like
macro was made so that it does not look like a function call taking the
C expression used for the constraint as an argument.  This is so as not
to confuse the reader or formatting checkers like `checkpatch.pl' and
follows previous practice.

Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8482/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:36 +01:00
Maciej W. Rozycki aec711d563 MIPS: Kconfig: Only allow 32-bit microMIPS builds
Only allow 32-bit microMIPS builds, we're not ready yet for 64-bit
microMIPS support.

QEMU does have support for the 64-bit microMIPS ISA and with minor
tweaks it is possible to have a 64-bit processor emulated there that
runs microMIPS code, so despite the lack of actual 64-bit microMIPS
hardware there is a way to run 64-bit microMIPS Linux, but it can all be
considered early development and we are not there yet.  Userland tools
are lacking too, e.g. GCC produces bad code:

{standard input}: Assembler messages:
{standard input}:380: Warning: wrong size instruction in a 16-bit branch delay slot

And our build fails early on, so disable the configuration, for the sake
of automatic random config checkers if nothing else.  Whoever needs to
experiment with 64-bit microMIPS support can revert this change easily.

Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8481/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:36 +01:00
Maciej W. Rozycki 2fabc7d25d MIPS: signal.c: Fix an invalid cast in ISA mode bit handling
Fix:

arch/mips/kernel/signal.c: In function 'handle_signal':
arch/mips/kernel/signal.c:533:21: error: cast from pointer to integer of different size [-Werror=pointer-to-int-cast]
  unsigned int tmp = (unsigned int)current->mm->context.vdso;
                     ^
arch/mips/kernel/signal.c:536:9: error: cast to pointer from integer of different size [-Werror=int-to-pointer-cast]
  vdso = (void *)tmp;
         ^
cc1: all warnings being treated as errors

when building a 64-bit kernel.

This is not really a supported configuration, but the cast is wrong
either way, Linux makes the assumption that sizeof(void *) equals
sizeof(unsigned long) and therefore the latter type is expected to be
used where integer operations have to be applied to pointers for some
reason.

Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8480/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:36 +01:00
Maciej W. Rozycki c441d4a54c MIPS: mm: Only build one microassembler that is suitable
The microMIPS microassembler is only suitable for configurations where
the kernel itself is built to microMIPS machine code and not where only
user microMIPS software is supported.  The former is controlled with the
CPU_MICROMIPS configuration setting, whereas SYS_SUPPORTS_MICROMIPS is
used for the latter.

Not only that, but with a given microMIPS vs standard MIPS kernel
configuration only one microassembler is needed, that matches the ISA
selected -- CP0.Config3.ISAOnExc is mandatory on microMIPS processors,
so there is never a need to mix microMIPS and standard MIPS code.

Consequently build only the microassembler that matches the ISA selected
for the kernel.

Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8479/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:36 +01:00
Maciej W. Rozycki 424ebcdf28 MIPS: Kconfig: Enable microMIPS support for Malta
Add missing microMIPS support to Malta.  Currently the kernel only
enables support for the instruction set for the SEAD-3 board despite the
fact processor features have nothing to do with the board a processor is
installed in.

In this case there is no way to run microMIPS software in a fully
supported way under Linux on QEMU.  QEMU supports the emulation of a
Malta board, but does not emulate SEAD-3.  Linux supports running
microMIPS code on a SEAD-3 board, but hardcodes such support to off on
an emulated Malta board even if the processor selected has the microMIPS
instruction set implemented.

Adding support for the SEAD-3 to QEMU is a major project.  Flipping a
bit in the kernel that shouldn't have been cleared in the first place is
a trivial effort.  Thus the answer is plain...

Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8478/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:35 +01:00
Aaro Koskinen d47ff0ec0b MIPS: loongson: common: rtc: make loongson_rtc_resources static
Make loongson_rtc_resources static to eliminate the following
sparse warning:
warning: symbol 'loongson_rtc_resources' was not declared. Should it be static?

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8529/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:35 +01:00
Aaro Koskinen 8387efd26a MIPS: loongson: common: init: Add a missing include
Add a missing include to eliminate the following sparse warnings:
warning: symbol 'prom_init' was not declared. Should it be static?
warning: symbol 'prom_free_prom_memory' was not declared. Should it be static?

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8531/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:35 +01:00
Aaro Koskinen 65b432de80 MIPS: loongson: lemote-2f: reset: make ml2f_reboot static
Make ml2f_reboot static to elimite the following sparse warning:
warning: symbol 'ml2f_reboot' was not declared. Should it be static?

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8528/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:35 +01:00
Aaro Koskinen 55fa9889ca MIPS: loongson: lemote-2f: irq: Make internal data static
Make internal static to eliminate the following sparse warnings:
warning: symbol 'ip6_irqaction' was not declared. Should it be static?
warning: symbol 'cascade_irqaction' was not declared. Should it be static?

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8527/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:34 +01:00
Aaro Koskinen 15dd8eb0ee MIPS: loongson: common: Setup: add a missing include
Add a missing include to get rid of the following sparse warning:
warning: symbol 'plat_mem_setup' was not declared. Should it be static?

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8530/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:34 +01:00
Aaro Koskinen fdd6a1fd61 MIPS: Loongson: cs5536_pci: Add a missing include
Add a missing include to get rid of the following sparse warnings:
warning: symbol 'cs5536_pci_conf_write4' was not declared. Should it be static?
warning: symbol 'cs5536_pci_conf_read4' was not declared. Should it be static?

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8526/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:34 +01:00
Aaro Koskinen efa386f317 MIPS: Loongson: common: Fix array initializer syntax.
Fix array initializer syntax to get rid of the following sparse warnings:
"obsolete array initializer, use C99 syntax".

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8525/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:34 +01:00
Ralf Baechle 80219c6c6f MIPS: uaccess.h: Fix strnlen_user comment.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:33 +01:00
Joshua Kinard 7893165224 MIPS: IP22/IP32: Add line to arch/mips/Makefile archhelp about vmlinux.32
Building a 64bit kernel for the SGI O2 (IP32) and the SGI Indy (IP22) uses
the 'vmlinux.32' target, which converts the output 64-bit 'vmlinux' image
into a 32-bit wrapped image.  This is needed for certain revisions of the
IP22 and IP32 ARCS PROMs to boot correctly, but this target is missing
from the 'archhelp' info that is emitted by 'make help'.

Signed-off-by: Joshua Kinard <kumba@gentoo.org>
Cc: Linux MIPS List <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/7991/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:33 +01:00
Markos Chandras f4f7d86b77 MIPS: lib: mips-atomic.c: Remove obsolete ifdefery
Having #ifdefs just to guard comments is not really helpful
so drop them. Moreover, the code wasn't really reached anyway
since there is a #ifndef CONFIG_CPU_MIPSR2 on the top of the file.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8513/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:33 +01:00
Aaro Koskinen da85e36495 MIPS: Octeon: Mark octeon_model_get_string() with __init
Mark octeon_model_get_string() with __init and make internal functions
static.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nsn.com>
Cc: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7668/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:32 +01:00
Aaro Koskinen 653e052881 MIPS: Octeon: Move code to avoid forward declaration
Move code to avoid forward declarations.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nsn.com>
Cc: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7667/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:32 +01:00
Aaro Koskinen 4aa16510bf MIPS: Octeon: Delete potentially dangerous feature checks
We should not need to read fuses during normal operation, also the current
code has issues with that (not safe for concurrent access). Since there
are no in-kernel users for these, just delete them. Drivers should
not need such OCTEON_HAS_FEATURE mechanism in any case, instead the
information should be passed via device tree.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nsn.com>
Cc: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7665/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:32 +01:00
Aaro Koskinen 0f24017a10 MIPS: Octeon: Move cvmx_fuse_read_byte()
Move cvmx_fuse_read_byte() into a .c file.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nsn.com>
Cc: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: Aaro Koskinen <aaro.koskinen@nsn.com>
Patchwork: https://patchwork.linux-mips.org/patch/7666/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:32 +01:00
Aaro Koskinen 569309b42f MIPS: oprofile: Backtrace: don't fail on leaf functions
Continue the backtrace if we cannot find SP adjustment and RA save. In
that case, just assume the current RA. This allows us to get samples of
frequent callers of e.g. GLIBC memset().

Signed-off-by: Aaro Koskinen <aaro.koskinen@nsn.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8109/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:31 +01:00
Aaro Koskinen 1b48142a80 MIPS: oprofile: Enable backtrace on timer-based profiling
Allow unsupported CPU types to use backtrace with timer-based profiling.
Some CPUs (notably OCTEON) lack architecture-specific oprofile driver. In
such case oprofile can fallback to timer-based mode, and arch code can
still provide the backtrace functionality. So just set up the backtrace
hook always.

Signed-off-by: Aaro Koskinen <aaro.koskinen@nsn.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8108/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:31 +01:00
Markos Chandras 26b40ef1aa MIPS: traps: Dump the PageGrain and Wired registers on MC
They can be useful to determine how the MMU is configured on a MC
exception.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8401/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:31 +01:00
Markos Chandras 31ec86b854 MIPS: traps: Dump the HTW registers on a MC exception
The HTW registers can be useful to debug a MC exception.

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8400/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:31 +01:00
Markos Chandras 314727fe5c MIPS: traps: Replace printk with pr_err for MC exceptions
printk should not be used without a KERN_ facility level

Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8399/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:30 +01:00
Andrew Bresticker e12aa828ff clocksource: mips-gic: Add device-tree support
Parse the GIC timer frequency and interrupt from the device-tree.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8421/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:30 +01:00
Andrew Bresticker a7057270c2 irqchip: mips-gic: Add device-tree support
Add device-tree support for the MIPS GIC.  Update the GIC irqdomain's
xlate() callback to handle the three-cell specifier described in the
MIPS GIC binding document.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8422/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:30 +01:00
Andrew Bresticker 2ff404005e of: Add binding document for MIPS GIC
The Global Interrupt Controller (GIC) present on certain MIPS systems
can be used to route external interrupts to individual VPEs and CPU
interrupt vectors.  It also supports a timer and software-generated
interrupts.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8420/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:30 +01:00
Alban Bedel ebf71ec7e1 MIPS: ath79: Read the initrd address from the firmware environment
Allow loading an initrd passed by the firmware.

Signed-off-by: Alban Bedel <albeu@free.fr>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8354/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:30 +01:00
Alban Bedel 11a0f40bc9 MIPS: ath79: Use the firmware lib to parse the kernel command line
No need to duplicate code that is available in the firmware library.
It also give us access to the firmware environment which is needed
to read the initrd address and size.

Signed-off-by: Alban Bedel <albeu@free.fr>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8353/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:29 +01:00
Sergey Ryazanov d6a4c72ae4 MIPS: ath25: add Wireless device support
Atheros AR5312 and AR2315 both have a builtin wireless device, this
patch add helper code and register platform device for all supported
WiSoCs.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Cc: Linux MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/8249/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:29 +01:00
Sergey Ryazanov 164a974889 ath5k: update dependencies
- Use config symbol defined in the driver instead of arch specific one for
  conditional compilation.
- Rename the ATHEROS_AR231X config symbol to ATH25.
- Fix include (ar231x_platform.h -> ath25_platform.h).
- Some of AR231x SoCs (e.g. AR2315) have PCI bus support, so remove !PCI
  dependency, which block AHB support build.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Acked-by: John W. Linville <linville@tuxdriver.com>
Cc: Jiri Slaby <jirislaby@gmail.com>
Cc: Nick Kossifidis <mickflemm@gmail.com>
Cc: "Luis R. Rodriguez" <mcgrof@do-not-panic.com>
Cc: linux-wireless@vger.kernel.org
Cc: ath5k-devel@lists.ath5k.org
Cc: Linux MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/8248/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:29 +01:00
Sergey Ryazanov 0e5d3ab532 ath5k: revert AHB bus support removing
This reverts commit 093ec3c533.

AHB bus code has been removed, since we did not have support Atheros
AR231x SoC, required for building the AHB version of ath5k. Now that
support WiSoC chips added we can restore functionality back.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Acked-by: John W. Linville <linville@tuxdriver.com>
Cc: Jiri Slaby <jirislaby@gmail.com>
Cc: Nick Kossifidis <mickflemm@gmail.com>
Cc: "Luis R. Rodriguez" <mcgrof@do-not-panic.com>
Cc: linux-wireless@vger.kernel.org
Cc: ath5k-devel@lists.ath5k.org
Cc: Linux MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/8247/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:28 +01:00
Sergey Ryazanov 3ed7a2a702 MIPS: ath25: add AR2315 PCI host controller driver
Add PCI host controller driver and DMA address calculation hook.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Cc: Linux MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/8246/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:28 +01:00
Sergey Ryazanov d58eaa7ffd MIPS: ath25: register AR5312 flash controller
AR5312 SoC flash controller maps the flash content to memory and
translates the memory access operations to the flash access operations.
Such controller is fully supported by the physmap-flash driver.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>R5312 SoC flash
Cc: Linux MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/8245/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:28 +01:00
Sergey Ryazanov 1654861f6e MIPS: ath25: add SoC type detection
Detect SoC type based on device ID and board configuration data.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Cc: Linux MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/8244/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:28 +01:00
Sergey Ryazanov a747371748 MIPS: ath25: add board configuration detection
All boards based on AR5312/AR2315 SoC have a special structure located
at the end of flash. This structure contains board-specific data such as
Ethernet and Wireless MAC addresses. The flash is mapped to the memmory
at predefined location.

Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Cc: Linux MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/8243/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-11-24 07:45:27 +01:00