Commit Graph

325 Commits

Author SHA1 Message Date
Tony Lindgren 103fd8e7ac ARM: OMAP2+: Use signed value for sysc register offsets
We currently don't know if a revision register exists or not. Zero is
often a valid offset for the revision register. As we are still checking
device tree data against platform data, we will get bogus warnings with
correct device tree data because of incomplete platform data.

Let's fix the issue by using signed offsets and tag the revision registers
that don't exist with -ENODEV, and init the missing ones with the correct
revision register offset.

Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-04-30 12:04:51 -07:00
Arnd Bergmann 3bf5c70d06 Driver changes for ti-sysc for v4.17
This series of changes enables the use device tree based sysconfig
 data for ti-sysc driver. As we already have SmartReflex data configured,
 we use that as the first driver to enable. To do that in a way where
 SmartReflex is not probed twice, we need to prepare the SmartReflex
 driver before flipping dts data on for it in the last patch of the
 series.
 
 To avoid regressions, we are checking the passed dts data against
 existing platform data since we still have it available. Then after the
 dts files are converted, we can simply drop the related platform data
 at some point in the future.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlqdehERHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXMRihAA2jlmAf4dePwe0K5V1VlQINbAU/FV+tXN
 1oasvGwNBxaJMqJeZAdBd/veuXgrsprIbmlMmF+zP/wQDYiMccr0+ZvzMsUKJ9aA
 mgzpW/pkpZEbi0ncci4UhQVOuZLja1xxtQ+ZGx82Vo7MXyU2jU9/Wzk67B4BZLws
 1MGTsy5VZZh+wicq46eW9AspvFhKCMIw6Ylor3lfmm08H3V/cq9A8dHQeWX2jjsC
 hSw9RzglGMi58FQ8cqNkxbD38r1VZh74OOqzOOlcJ5CwLWzIJwanWfwDesVb4ZTL
 bdrn/Aps5b223LTAFN97vwUmyux/ja17YyCC5fU6C6wskgN+9jhPSslzFbFbU0kT
 4chc5OYcdq5Lhm+vLCe2H5rB14KQxy6Ugb6aT+XAUOq0hw6tRSG17kqlXk/KtwrG
 cDzPJzPjG/PDb8hW0Bd7JcjLqadmh7w1180KtT+9IayQM50XxcwwAOPT0XdUEUeP
 aKIp5cRfOm/75KUIiNomhmoAd1pxX1G6y2qo49p3fbY0nJx09MgtQvWlbDrbhL8+
 ACp2adGAlLqsW26E44cqNwMPPhyVcQXlVD9bc2D04nVhXapvRHtlrW4cRkkbQzfw
 dAiQHDaBn4geSBUqGayQaIvX1WWqeZ6nzpI0JlyHPMiQdkdDvtyUqhJuK2uaY39n
 vyRPw2H09ZM=
 =/hJY
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v4.17/ti-sysc-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

Pull "Driver changes for ti-sysc for v4.17" from Tony Lindgren:

This series of changes enables the use device tree based sysconfig
data for ti-sysc driver. As we already have SmartReflex data configured,
we use that as the first driver to enable. To do that in a way where
SmartReflex is not probed twice, we need to prepare the SmartReflex
driver before flipping dts data on for it in the last patch of the
series.

To avoid regressions, we are checking the passed dts data against
existing platform data since we still have it available. Then after the
dts files are converted, we can simply drop the related platform data
at some point in the future.

* tag 'omap-for-v4.17/ti-sysc-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Enable ti-sysc to use device tree data for smartreflex
  PM / AVS: SmartReflex: Prepare to use device tree based probing
  ARM: OMAP2+: Try to parse earlycon from parent too
  ARM: OMAP2+: Add checks for device tree based sysconfig data
  ARM: OMAP2+: Add functions to allocate module data from device tree
  bus: ti-sysc: Handle some devices in omap_device compatible way
  bus: ti-sysc: Add support for platform data callbacks
  bus: ti-sysc: Remove unnecessary debugging statements
  bus: ti-sysc: Improve handling for no-reset-on-init and no-idle-on-init
  bus: ti-sysc: Handle stdout-path for debug console
  bus: ti-sysc: Add suspend and resume handling
  bus: ti-sysc: Add fck clock alias for children with notifier_block
  ARM: OMAP2+: Prepare to pass auxdata for smartreflex
2018-03-07 16:26:43 +01:00
Tony Lindgren 1561825622 ARM: OMAP2+: Try to parse earlycon from parent too
With ti-sysc driver the "ti,hwmods" property will be moved to the
interconnect target module instead of the child device. To keep
earlycon working, we need to match against the interconnect target
module in the ti-sysc case.

Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-02-28 16:32:09 -08:00
Tony Lindgren a884430685 ARM: OMAP2+: Add checks for device tree based sysconfig data
We can check the device tree based sysconfig data against the existing
platform data to make sure we're not introducing regressions. Then at
some point after the sysconfig data comes from device tree, we can just
drop the related platform data.

Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-02-28 16:32:09 -08:00
Tony Lindgren 8c87970543 ARM: OMAP2+: Add functions to allocate module data from device tree
We can have ti-sysc driver manage the interconnect target module via
platform data callback functions to hwmod code. This allows initializing
and idling the devices using dts data instead of the legacy static data
for interconnect target modules.

Let's add functions to configure the module sysconfig data with platform
callbacks from ti-sysc driver.

Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-02-28 16:32:09 -08:00
Tony Lindgren 60c99c7749 Merge branch 'omap-for-v4.16/soc' into omap-for-v4.16/fixes 2018-02-14 08:27:41 -08:00
Linus Torvalds fe53d1443a ARM: SoC driver updates for 4.16
A number of new drivers get added this time, along with many low-priority
 bugfixes. The most interesting changes by subsystem are:
 
 bus drivers:
   - Updates to the Broadcom bus interface driver to support newer SoC types
   - The TI OMAP sysc driver now supports updated DT bindings
 
 memory controllers:
   - A new driver for Tegra186 gets added
   - A new driver for the ti-emif sram, to allow relocating
     suspend/resume handlers there
 
 SoC specific:
   - A new driver for Qualcomm QMI, the interface to the modem on MSM SoCs
   - A new driver for power domains on the actions S700 SoC
   - A driver for the Xilinx Zynq VCU logicoreIP
 
 reset controllers:
   - A new driver for Amlogic Meson-AGX
   - various bug fixes
 
 tee subsystem:
   - A new user interface got added to enable asynchronous communication
     with the TEE supplicant.
   - A new method of using user space memory for communication with
     the TEE is added
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJac0fQAAoJEGCrR//JCVIntjEQALc6kflEGJc/FPundbx9V3F/
 b+3+EX/uMnBnKsgZprz9ACPhx5eBH9QWja3A1zmIarb5c+q7zbBZDwhzUb8J8Yg8
 xEb0im7Wx/GcKjUYZVKYBxtz9KjkXDzhrq8IAvPg6ShNcIy/8hq7ZO3iOkGsTDcy
 /PyioWKC5g0dhJgtp91X1kgog5tuTaWOg39uUOqyEzwVu1vYVa4w+eeCzjEd6I//
 68R/zDQ52+hWw6WZGoYOsNYzuriOflnJRnNpwuGhMhLNULBJfWnd4hkqGm4E+hFa
 5dzW6vVAdIqjemFqPzCBT2WB4UG871aZX8DJ9HgnfX+g970nlsm1JY8Ck9MJNJum
 aDkqZG41ArUYzDFWu8vJ2SKsue5lEZp6TEO2mLEVYrdOjOgedj0Zxqmq2DYeigxd
 +ccOVgKJ9SsYw9ft1LkQ5BHCgOh3C7y9Kcg7oBnaEI5OTVvtf5PwEkT2cwbvgxYl
 EVKLhlJ0Af+QXOW8E5JbNQETpYw52DMm6UKHiYn/JCGxB/8J0bgJzImDJI4Dtu2h
 zqJITKJeTepqbfA5pmNfKa+20RhmsktdRCw2NN/QynY7EEtGjHAUVnlpZT2mrDco
 0m62b7Erek/776vJN5ECzE5e6XCs2N0MDE6Anp121C5zEmig/SMBrUosMzP7Jnis
 IDVC/QWkb3u85wK20Vc1
 =yz0k
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "A number of new drivers get added this time, along with many
  low-priority bugfixes. The most interesting changes by subsystem are:

  bus drivers:
   - Updates to the Broadcom bus interface driver to support newer SoC
     types
   - The TI OMAP sysc driver now supports updated DT bindings

  memory controllers:
   - A new driver for Tegra186 gets added
   - A new driver for the ti-emif sram, to allow relocating
     suspend/resume handlers there

  SoC specific:
   - A new driver for Qualcomm QMI, the interface to the modem on MSM
     SoCs
   - A new driver for power domains on the actions S700 SoC
   - A driver for the Xilinx Zynq VCU logicoreIP

  reset controllers:
   - A new driver for Amlogic Meson-AGX
   - various bug fixes

  tee subsystem:
   - A new user interface got added to enable asynchronous communication
     with the TEE supplicant.
   - A new method of using user space memory for communication with the
     TEE is added"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (84 commits)
  of: platform: fix OF node refcount leak
  soc: fsl: guts: Add a NULL check for devm_kasprintf()
  bus: ti-sysc: Fix smartreflex sysc mask
  psci: add CPU_IDLE dependency
  soc: xilinx: Fix Kconfig alignment
  soc: xilinx: xlnx_vcu: Use bitwise & rather than logical && on clkoutdiv
  soc: xilinx: xlnx_vcu: Depends on HAS_IOMEM for xlnx_vcu
  soc: bcm: brcmstb: Be multi-platform compatible
  soc: brcmstb: biuctrl: exit without warning on non brcmstb platforms
  Revert "soc: brcmstb: Only register SoC device on STB platforms"
  bus: omap: add MODULE_LICENSE tags
  soc: brcmstb: Only register SoC device on STB platforms
  tee: shm: Potential NULL dereference calling tee_shm_register()
  soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver
  dt-bindings: soc: xilinx: Add DT bindings to xlnx_vcu driver
  soc: xilinx: Create folder structure for soc specific drivers
  of: platform: populate /firmware/ node from of_platform_default_populate_init()
  soc: samsung: Add SPDX license identifiers
  soc: qcom: smp2p: Use common error handling code in qcom_smp2p_probe()
  tee: shm: don't put_page on null shm->pages
  ...
2018-02-01 16:35:31 -08:00
Arnd Bergmann 0ca14cdea7 ARM: omap: hwmod: fix section mismatch warnings
Older compilers choose not to inline _setup_clkctrl_provider(),
leading to a harmless warning:

WARNING: vmlinux.o(.text+0x27b34): Section mismatch in reference from the function _setup_clkctrl_provider() to the function .init.text:memblock_virt_alloc_try_nid()
The function _setup_clkctrl_provider() references
the function __init memblock_virt_alloc_try_nid().
This is often because _setup_clkctrl_provider lacks a __init
annotation or the annotation of memblock_virt_alloc_try_nid is wrong.

This annotates it as __init as well, which lets the linker
see that it is actually correct.

Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-01-22 12:39:36 +01:00
Tero Kristo 392ea5dd0f ARM: OMAP2+: hwmod_core: enable optional clocks before main clock
The optional clocks must be enabled before the main clock after the
transition to clkctrl controlled clocks is done. Otherwise the module
we attempt to enable might be stuck in transition.

Reported-by: Keerthy <j-keerthy@ti.com>
Tested-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-12-22 10:48:07 -08:00
Tony Lindgren 49a0a3d805 bus: ti-sysc: Make omap_hwmod_sysc_fields into sysc_regbits platform data
We want to be able to configure hwmod sysc data from ti-sysc driver using
platform data callbacks. So let's make struct omap_hwmod_sysc_fields into
struct sysc_data and have it available for both ti-sysc driver and hwmod
code.

Note that we can make it use s8 instead of u8 as the hwmod code uses the
feature flags to check for this field. However, for ti-sysc we can use
-ENODEV to indicate a feature is not supported in the hardware and can
simplify the code that way.

And let's add also emufree_shift as the dts files will be describing the
hardware for the SYSCONFIG register capbilities mask.

Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-12-21 07:28:54 -08:00
Tero Kristo 2b96be3df5 ARM: OMAP2+: hwmod: calculate physical register address on am33xx
Add support for the address translation logic for am33xx. Needed for
mapping hwmods towards their corresponding clkctrl providers and clocks.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2017-12-04 11:35:21 +02:00
Tero Kristo 6e83ecaa45 ARM: OMAP2+: hwmod: fix clkctrl address translation logic
There are cases where clkctrl clock offsets do not match the corresponding
clockdomain, and this case the existing mapping functionality will fail.
Fix this by adding the whole address range for a clkctrl provider and
matching the actual clkctrl registers against these ranges.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2017-12-04 11:35:21 +02:00
Tony Lindgren 9cffb1a050 ARM: OMAP2+: Drop legacy struct omap_hwmod_addr_space
With all of mach-omap2 booting now in device tree only mode,
we can get the module IO range from device tree and just drop
the legacy hwmod struct omap_hwmod_addr_space.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-10 14:27:33 -07:00
Tony Lindgren c2b84a9bb3 ARM: OMAP2+: Drop omap_hwmod_dma_info
We have all of mach-omap2 booting in device tree only
mode now, and this data is populated from device tree.

Note that once we have removed support for the omap legacy
DMA, we can also drop struct omap_dma_dev_attr.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-10 14:27:26 -07:00
Tony Lindgren fe97874a41 ARM: OMAP2+: Drop omap_hwmod_irq_info
With the previous patches removing the need for legacy IRQs
now that all of mach-omap2 is booting in device tree only mode,
we can drop struct omap_hwmod_irq_info.

Note that we can now also finally drop omap4_xlate_irq.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-10 14:27:19 -07:00
Tony Lindgren 6c72b35506 ARM: OMAP2+: Parse module IO range from dts for legacy "ti,hwmods" support
When removing legacy platform data for IO ranges for the hwmod
interconnect code, we still need to support the "ti,hwmods"
property.

And as we're going to use a generic sysc device driver to handle the
interconnect target instances, we can parse the information needed
for legacy "ti,hwmods" IO range from the dts. It's always the first
range the interconnect target module provides.

Note that we want to parse the range instead of the first child
device IO regs as the child device may not always be defined.

The child IP device node may not exist in cases where there is no
driver binding for the device, or when the child IP block may not
even be functional for some SoC revisions. But the IO range of the
interconnect target module is always known.

Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-10-10 14:23:27 -07:00
Tony Lindgren 8823ddf25d ARM: OMAP2+: Fix overwriting of clkctrl and modulemode values
We are currently overwiting the hwmod clkctrl registers if we
configure a clock ctrl clock from device tree.

While this does not expose any bugs except for kernel coders
when debugging things, it should be fixed for correctness.
It is now impossible to use the hwmod data for checking the
clkctrl register values after booting for debugging or
generating dts data from hwmod data.

Let's fix the issue by adding a helper to detect if clkctrl
clock is configured.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-09-19 11:04:44 -07:00
Rob Herring a8e65e06ec ARM: Convert to using %pOF instead of full_name
Now that we have a custom printf format specifier, convert users of
full_name to use %pOF instead. This is preparation to remove storing
of the full path string for each node.

Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: "Benoît Cousson" <bcousson@baylibre.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-08-16 22:25:30 +02:00
Tony Lindgren 67d00470ac Merge branch 'omap-for-v4.13/clkctrl' into omap-for-v4.13/soc-v4 2017-06-12 03:27:30 -07:00
Tony Lindgren 1aa8f0cb19 ARM: OMAP2+: Remove unused legacy code for interconnects
We are now booting all mach-omap2 in device tree only mode.
Any code that is only called in legacy boot mode where
of_have_populated_dt() is not set is safe to remove now.

Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-08 04:15:10 -07:00
Tero Kristo 70f05be321 ARM: OMAP2+: hwmod: populate clkctrl clocks for hwmods if available
If clkctrl clocks are available on a device, populate these automatically
to replace hwmod main_clk info. First, the patch parses all "ti,clkctrl"
compatible nodes and maps these against existing clockdomain data. Once
done, individual hwmod init routines can search for a clkctrl clock
handle based on the clockdomain info and the created mapping.

This patch also drops the obsolete "_mod_ck" search as the implementation
required for this was not accepted usptream.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-06-06 00:14:06 -07:00
Roger Quadros 8ff42da411 ARM: OMAP2+ hwmod: Allow modules to disable HW_AUTO
Introduce HWMOD_CLKDM_NOAUTO flag that allows the hwmod's
clockdomain to be prevented from HW_AUTO while the hwmod is active.

This is needed to workaround some modules which don't function
correctly with HW_AUTO. e.g. DCAN on DRA7.

Signed-off-by: Roger Quadros <rogerq@ti.com>
[nsekhar@ti.com: rebased to v4.9 kernel]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-03-23 13:19:59 -07:00
Tony Lindgren ca5339b18c ARM: OMAP2+: Remove unused CLOCKACT_TEST_ICLK
This is not used so let's remove it.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-03-14 13:13:19 -07:00
Tony Lindgren b8e1bddc98 ARM: OMAP2+: Use list_for_each_entry for hwmod slave_ports
We are just iterating over the slave_ports lists, so we can
use list_for_each_entry() no problem.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-03-14 13:13:19 -07:00
Tony Lindgren a1e312355d ARM: OMAP2+: Remove mostly unused hwmod linkspace
We want to be able to dynamically allocate struct omap_hwmod_ocp_if and
struct omap_hwmod at device driver probe time based on .dts data.

Current setup with the linkspace using memblock_virt_alloc() makes
this tricky, so let's get rid of struct linkspace and directly set up
struct omap_hwmod_ocp_if as the master and slave lists.

As we are currently not using the master_ports either, let's remove it
too. And let's add the struct omap_hwmod_ocp_if node directly to the
slave_ports list.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-03-14 13:13:19 -07:00
Olof Johansson f0d0b8cb6b SoC changes for omaps for v4.11 merge window. This adds support
for keeping the interconnect target module active for uart if
 earlycon is specified. And we're adding Aaro Koskinen as a
 co-maintainer for omap1 to make sure things stay working for
 omap1. The other changes are mostly clean-up of old legacy code:
 
 - Remove unused omap_display_init()
 
 - Make omapdss_find_dss_of_node() function static
 
 - Add support for earlycon
 
 - Tidy up omap1 usb logging output with pr_cont
 
 - Make omap_otg_init() static
 
 - Delete redundant CPU class checks for omap1
 
 - Remove unused mpurate cmdline option that has not done
   anything for past 1.5 years at least
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAliHc5MRHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXNVVBAAoNj2A8PfRJMYhQthtmUn0ORPe9QrF3k7
 5WaIRWhithkRIJl+kVuGLTzR0Uqvzo1CCXug+rJxs0JQ6PJEe+cp++ygioZzjZwE
 t0oHugvT1+MYCM475OwMG9ajgKYBX/GMsWDmuuG5nLm1JRzWQfMAQsmuyP0Oey+D
 bWOC0Hlz1gHn2xrlvjZah54rkERaWnKUIdi1YMqAAjmh/RuDED5VNskOcacVbqI1
 0C8wLC7mOviM3RyiQSCNTIKLC5illanjoZ/QHFnPLHV36KXJWCL/dB8gnAX+ORpF
 oCsL3t8erjq6cyhJIchs+UbqCEZv7HpIgbJBwc1oli3ExzS5iqmGQjhNkVN7Q+8Z
 TEQP6OhpPL4EXNEYOnE5pDgXATluWhD0rsg6XHt2CEsLZCOTzPTZCl0Of0vg3kcE
 eID7dz9CPXRquzyilVmyYla9Ty4XF3ePhdvLuI/06WgGU/M+6AvlZ40L8G73xKAu
 0wHx2rpN0H4ySXsAtnyanCxld5njPGiLn5Ehmnib0CQU16Zxc6mbxVQVfaaSSbAu
 LJrLHBdeqWYEkUJV6n+lBg1WeCgL4qDolMTm8aRhESTCBHQEaLYXe57dluYCt0g2
 2Rj1g/OuGFw+cViT2ICCvsAwE3jcHj32g8iJdnvfsypJ8pIO0znp2Sk7T7AYUXzw
 AafZ0ClGrws=
 =GiAL
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v4.11/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

SoC changes for omaps for v4.11 merge window. This adds support
for keeping the interconnect target module active for uart if
earlycon is specified. And we're adding Aaro Koskinen as a
co-maintainer for omap1 to make sure things stay working for
omap1. The other changes are mostly clean-up of old legacy code:

- Remove unused omap_display_init()
- Make omapdss_find_dss_of_node() function static
- Add support for earlycon
- Tidy up omap1 usb logging output with pr_cont
- Make omap_otg_init() static
- Delete redundant CPU class checks for omap1
- Remove unused mpurate cmdline option that has not done
  anything for past 1.5 years at least

* tag 'omap-for-v4.11/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP: clock: Remove unused mpurate cmdline option
  ARM: OMAP2+: omap_hwmod: Add support for earlycon
  MAINTAINERS: Add Aaro Koskinen as TI omap1 SoC co-maintainer
  ARM: OMAP1: USB: delete redundant CPU class checks
  ARM: OMAP1: USB: make omap_otg_init() static
  ARM: OMAP1: USB: tidy up logging output
  ARM: OMAP2+: Make the omapdss_find_dss_of_node() function static
  ARM: OMAP2+: Remove unused omap_display_init() function

Signed-off-by: Olof Johansson <olof@lixom.net>
2017-01-29 17:15:36 -08:00
Lokesh Vutla 8dd6666f49 ARM: OMAP2+: omap_hwmod: Add support for earlycon
Hwmod core tries to reset and idles each IP that is registered with hwmod.
In case of earlycon, that specific uart IP cannot be reset or keep it in
idle state else earlycon hangs once hwmod resets that uart IP. So add support
to not reset uart that is being used as earlycon only if CONFIG_SERIAL_EARLYCON
is enabled.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2017-01-20 10:39:10 -08:00
Maninder Singh 5066d5296f ARM: omap2+: fixing wrong strcat for Non-NULL terminated string
Issue caught with static analysis tool:
"Dangerous usage of 'name' (strncpy doesn't always 0-terminate it)"

Use strlcpy _includes_ the NUL terminator, and  strlcat() which ensures
that it won't overflow the buffer.

Reported-by: Maninder Singh <maninder1.s@samsung.com>
Signed-off-by: Vaneet Narang <v.narang@samsung.com>
CC: Russell King <linux@armlinux.org.uk>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-12-27 10:05:47 -08:00
Tony Lindgren b42814557f ARM: OMAP2+: Remove legacy hwmod mux code
This is no longer needed when booted with device tree.

Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-11-10 12:42:38 -07:00
Dave Gerlach 428929c79c ARM: OMAP4+: Have _omap4_wait_target_* check for valid clkctrl_offs
Previously the low-level CM call internal to the
_omap4_wait_target_ready/disable calls was responsible for checking for
a valid clkctrl_offs. Now we must also consider the value of the
prcm.omap4.flags because if HWMOD_OMAP4_ZERO_CLKCTRL_OFFSET is set in
the flags then clkctrl_offs of 0 is valid.

Let's add this check into the _omap4_wait_target_ready/disable where we
have access to both the clkctrl_offs and the flags values and simply
return 0 without calling the low level CM call at all, which would have
returned 0 anyway if the clktrl_offs was zero.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-07-22 23:10:15 -07:00
Tero Kristo 1d9a542565 ARM: OMAP2+: clockdomain: add usecounting support to autoidle APIs
The previous implementation was racy in many locations, where the current
status of the clockdomain was read out, some operations were executed,
and the previous status info was used afterwards to decide next state
for the clockdomain. Instead, fix the implementation of the allow_idle /
deny_idle APIs to properly have usecounting support. This allows clean
handling internally within the clockdomain core, and simplifies the
usage also within hwmod.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-07-04 07:15:38 -07:00
Tero Kristo 9fabc1a26e ARM: OMAP2+: hwmod: fetch main_clk based on hwmod name
With the transition to hwmod module clocks, all hwmods will have
their main clocks named <hwmod_name>_mod_ck. Use this info to
fetch main_clk, and use it if found.

Also, if a main_clk is found based on the hwmod name, disable
the direct PRCM modulemode access from hwmod.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2016-07-04 07:15:22 -07:00
Suman Anna c20c8f750d ARM: OMAP2+: hwmod: fix _idle() hwmod state sanity check sequence
The omap_hwmod _enable() function can return success without setting
the hwmod state to _HWMOD_STATE_ENABLED for IPs with reset lines when
all of the reset lines are asserted. The omap_hwmod _idle() function
also performs a similar check, but after checking for the hwmod state
first. This triggers the WARN when pm_runtime_get and pm_runtime_put
are invoked on IPs with all reset lines asserted. Reverse the checks
for hwmod state and reset lines status to fix this.

Issue found during a unbind operation on a device with reset lines
still asserted, example backtrace below

 ------------[ cut here ]------------
 WARNING: CPU: 1 PID: 879 at arch/arm/mach-omap2/omap_hwmod.c:2207 _idle+0x1e4/0x240()
 omap_hwmod: mmu_dsp: idle state can only be entered from enabled state
 Modules linked in:
 CPU: 1 PID: 879 Comm: sh Not tainted 4.4.0-00008-ga989d951331a #3
 Hardware name: Generic OMAP5 (Flattened Device Tree)
 [<c0018e60>] (unwind_backtrace) from [<c0014dc4>] (show_stack+0x10/0x14)
 [<c0014dc4>] (show_stack) from [<c037ac28>] (dump_stack+0x90/0xc0)
 [<c037ac28>] (dump_stack) from [<c003f420>] (warn_slowpath_common+0x78/0xb4)
 [<c003f420>] (warn_slowpath_common) from [<c003f48c>] (warn_slowpath_fmt+0x30/0x40)
 [<c003f48c>] (warn_slowpath_fmt) from [<c0028c20>] (_idle+0x1e4/0x240)
 [<c0028c20>] (_idle) from [<c0029080>] (omap_hwmod_idle+0x28/0x48)
 [<c0029080>] (omap_hwmod_idle) from [<c002a5a4>] (omap_device_idle+0x3c/0x90)
 [<c002a5a4>] (omap_device_idle) from [<c0427a90>] (__rpm_callback+0x2c/0x60)
 [<c0427a90>] (__rpm_callback) from [<c0427ae4>] (rpm_callback+0x20/0x80)
 [<c0427ae4>] (rpm_callback) from [<c0427f84>] (rpm_suspend+0x138/0x74c)
 [<c0427f84>] (rpm_suspend) from [<c0428b78>] (__pm_runtime_idle+0x78/0xa8)
 [<c0428b78>] (__pm_runtime_idle) from [<c041f514>] (__device_release_driver+0x64/0x100)
 [<c041f514>] (__device_release_driver) from [<c041f5d0>] (device_release_driver+0x20/0x2c)
 [<c041f5d0>] (device_release_driver) from [<c041d85c>] (unbind_store+0x78/0xf8)
 [<c041d85c>] (unbind_store) from [<c0206df8>] (kernfs_fop_write+0xc0/0x1c4)
 [<c0206df8>] (kernfs_fop_write) from [<c018a120>] (__vfs_write+0x20/0xdc)
 [<c018a120>] (__vfs_write) from [<c018a9cc>] (vfs_write+0x90/0x164)
 [<c018a9cc>] (vfs_write) from [<c018b1f0>] (SyS_write+0x44/0x9c)
 [<c018b1f0>] (SyS_write) from [<c0010420>] (ret_fast_syscall+0x0/0x1c)
 ---[ end trace a4182013c75a9f50 ]---

While at this, fix the sequence in _shutdown() as well, though there
is no easy reproducible scenario.

Fixes: 747834ab83 ("ARM: OMAP2+: hwmod: revise hardreset behavior")
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2016-04-10 13:20:11 -06:00
Lokesh Vutla 3ca4a23810 ARM: OMAP2+: hwmod: Fix updating of sysconfig register
Commit 127500ccb7 ("ARM: OMAP2+: Only write the sysconfig on idle
when necessary") talks about verification of sysconfig cache value before
updating it, only during idle path. But the patch is adding the
verification in the enable path. So, adding the check in a proper place
as per the commit description.

Not keeping this check during enable path as there is a chance of losing
context and it is safe to do on idle as the context of the register will
never be lost while the device is active.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Cc: Jon Hunter <jonathanh@nvidia.com>
Cc: <stable@vger.kernel.org> # 3.12+
Fixes: commit 127500ccb7 "ARM: OMAP2+: Only write the sysconfig on idle when necessary"
[paul@pwsan.com: appears to have been caused by my own mismerge of the
 originally posted patch]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2016-03-26 23:08:55 -06:00
Lokesh Vutla 2e18f5a1bc ARM: OMAP2+: hwmod: Introduce ti,no-idle dt property
Introduce a dt property, ti,no-idle, that prevents an IP to idle at any
point. This is to handle Errata i877, which tells that GMAC clocks
cannot be disabled.

Acked-by: Roger Quadros <rogerq@ti.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: <stable@vger.kernel.org>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2016-03-07 01:41:21 -07:00
Olof Johansson 45e2916be2 SoC changes for omaps for v4.5 merge window. The main change here is to
change the omap initcall levels a bit to initialize things later to allow
 early device drivers at core_initcall level. This makes things easier
 for us as most clocks can be made into regular device drivers except for
 a few early clocks needed to initialize system timers. I wanted to have
 these changes sit in Linux next for a few weeks before sending out a pull
 request, and so far now issues have showed up.
 
 The other changes in this series are timer changes for making use of the
 new PWM driver, and timer changes to support more high security SoCs.
 Also few minor improvments for module autoidle settings for ti81xx spinbox
 and dra7 debug on uart4 in hwmod code. The rest is pretty much just removal
 of platform data for SoCs that are all device tree only nowadays.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJWeGDyAAoJEBvUPslcq6Vz/PsQALn5JcQgZe5Od95l4clQKKLT
 OTDkRlfTUAWHNsDMNBqSAJZtRR4tWA4fECqusIyocJs2g74745MKcfuD1z0hSr+F
 kvyYX/7lnS1AwU0RalACIoPlSh/ZR3Jrp4pXfiaNQGjr180SEmAtAu3jTUA4xUjZ
 CdyILrzP7lckCUuF1vCguaM5hNqSEy0f6a1XCieG35k2nDrLq+C4QZ6YN8/ZGKLD
 HADCFWllMcxgmTvxLy4JtUMYK/ujHJOl8QTEpUujzxRnZasZVJpB+lGsosIyR+d1
 oXu9PaclyYYKK0/FtqQx2urhzu1POxaA8j2WDZB9k8Dt6csXZptkXoBdY7qJpOM2
 0rL/57uv95hC1ufHVz6oRiRjvik0G4QL8M8cIpG4i4puTR0Uw+3HYy7UfYMsnK60
 1piWmgaBb/VDYL/XTFE8FJW5WlEosWwezwoneY1yTCzMmtKX8KjFtxISYodrWuV8
 rwnmLf5mn4/1HjmnqlYZHnCnMwdfbDsAV+5SPGIspkHT10un4wFgrLs9+2k3wntL
 Je8H168+r9FS+ZND9kdN6HL+yf0ruC813l+p7cQ+RIy4hHyXoiFLeQnxAUcORNF5
 0vUR47WZCMpgD2IjIDuDg9ZJp3gzEVNMbxbz5VpAwm4vgx/2QAMNs5l9Q8vQQd2O
 uuHoE8Fi4KTY4LJTqPj6
 =69mE
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v4.5/soc-initcall' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

SoC changes for omaps for v4.5 merge window. The main change here is to
change the omap initcall levels a bit to initialize things later to allow
early device drivers at core_initcall level. This makes things easier
for us as most clocks can be made into regular device drivers except for
a few early clocks needed to initialize system timers. I wanted to have
these changes sit in Linux next for a few weeks before sending out a pull
request, and so far now issues have showed up.

The other changes in this series are timer changes for making use of the
new PWM driver, and timer changes to support more high security SoCs.
Also few minor improvments for module autoidle settings for ti81xx spinbox
and dra7 debug on uart4 in hwmod code. The rest is pretty much just removal
of platform data for SoCs that are all device tree only nowadays.

* tag 'omap-for-v4.5/soc-initcall' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: OMAP2+: Remove device creation for omap-pcm-audio
  ARM: OMAP1: Remove device creation for omap-pcm-audio
  ARM: OMAP2+: Change core_initcall levels to postcore_initcall
  ARM: DRA7: hwmod: Enable DEBUG_LL for UART4
  ARM: OMAP: RX-51: fix a typo in log writing
  ARM: omap4: hwmod: Remove elm address space from hwmod data
  ARM: OMAP2+: timer: Remove secure timer for DRA7xx HS devices
  ARM: OMAP: dmtimer: check for fixed timers during config
  ARM: OMAP2+: Remove omap_mmu_dev_attr structure
  ARM: OMAP4: hwmod data: Remove legacy IOMMU attr and addrs
  ARM: OMAP3: hwmod data: Remove legacy IOMMU data
  ARM: OMAP2+: Remove legacy device instantiation of IOMMUs
  ARM: OMAP2+: Add hwmod spinbox support for dm816x
  ARM: OMAP: add DT support for ti,dm816-timer
  ARM: OMAP: dmtimer: Add clock source from DT

Signed-off-by: Olof Johansson <olof@lixom.net>
2015-12-22 14:49:17 -08:00
Tony Lindgren 8dd5ea72b0 ARM: OMAP2+: Change core_initcall levels to postcore_initcall
We want to be able to probe a few selected device drivers before hwmod
code populates the clocks in omap_hwmod_setup_all(). This allows us to
convert most of the clock drivers into regular device drivers.

We only need a few minimal clock drivers early for the system timers to
select between the 32KiHz clock and the high frequency oscillator.

With these changes, initializing the clock drivers can be just done at
core_initcall time with something like:

np = of_find_node_by_name(NULL, "plls");
if (np)
	of_platform_populate(np, NULL, NULL, NULL);

And then these clocks will be available for the interconnect code to use.

Having most of the clock drivers being regular device drivers allows
us to use the nice things like devm_* functions and dev_err and dev_dbg.
As an extra bonus, this also allows us to develop the clock drivers for
new SoCs as loadable modules initially for cases where we can boot up
the system based on the bootloader configured clocks.

To do this, let's change the core_initcalls to postcore_initcall under
mach-omap2.

Cc: Felipe Balbi <balbi@ti.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-12-03 11:38:09 -08:00
Peter Ujfalusi c12ba8ce23 ARM: OMAP2+: hwmod: Add hwmod flag for HWMOD_OPT_CLKS_NEEDED
Some module needs more than one functional clock in order to be accessible,
like the McASPs found in DRA7xx family.
This flag will indicate that the opt_clks need to be handled at the same
time as the main_clk for the given hwmod, ensuring that all needed clocks
are enabled before we try to access the module's address space.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-11-12 09:57:44 -08:00
Linus Torvalds 50686e8a3a ARM: SoC platform updates for v4.3
New or improved SoC support:
 
 - Addition of support for Atmel's SAMA5D2 SoC
 - Addition of Freescale i.MX6UL
 - Improved support of TI's DM814x platform
 - Misc fixes and improvements for RockChip platforms
 - Marvell MVEBU suspend/resume support
 
 A few driver changes that ideally would belong in the drivers branch are
 also here (acked by appropriate maintainers):
 
 - Power key input driver for Freescale platforms (svns)
 - RTC driver updates for Freescale platforms (svns/mxc)
 - Clk fixes for TI DM814/816X
 
 + a bunch of other changes for various platforms
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJV5Mo6AAoJEIwa5zzehBx3VnMP/28LFJVUjIbd2xjJBo2gbSwV
 jN7uGlTkKU+1kHjZqnUPuirlBxBzsXKgRfBvCoeu0cPOggwmFcaF915/HHPz7xuz
 vTP7k98+Y5nSXScIohWkWCdZTpKKjve4sn74rXmiNakTUiuaHf5lKut/m7ldVrWd
 hN1o9W4LN+5O1mOYbc9ZD98v3bkDb6eu+a22oK7qemXiEiQi+NIMoDx+IR2bd4pA
 FeDaW7sOFWTEYU/p+M5nZNvI3n53P0/mlB5rPRiAYRjhQf9DrWHm5G7HdnMkUkgo
 /s8/QlVjBkJwhkY0TqpwtHY23JjSSB6UtCnXzb1eVAkX1nJN6PJQpcpCz1zJhd9q
 +sJ2k1zEvrfomJCK7/iZ1ubQE09KlJLEeb8xi5xCwD0MBOBAYC31bovDVAswCitV
 8NHnfltEG+wCMyX955eqqGkVxkcw8sJMJUK5A95aK6w+vKqjd7gUgLJjXFC1u4eN
 ECuVVUf1hVmUEmM799CDayTlfGDt4oGLmHGao+SiSCVc1XbG9HkWr7Lcgr6u9UHr
 lNv3RIe6Axb85xxIU0/9hqLHrtB85uEQjjlbnQx3o7u8RsSOeaiZvCz4BzcjP9E1
 VGyD6zkRWhuDiMFlPVXiAX0qIH5xSjIWkC0wPNJNy8eWFH9tkfGL0mOlLbl09oGR
 gtuvOrjbF/BhILkPw38y
 =8T5Z
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC platform updates from Olof Johansson:
 "New or improved SoC support:

   - add support for Atmel's SAMA5D2 SoC
   - add support for Freescale i.MX6UL
   - improved support for TI's DM814x platform
   - misc fixes and improvements for RockChip platforms
   - Marvell MVEBU suspend/resume support

  A few driver changes that ideally would belong in the drivers branch
  are also here (acked by appropriate maintainers):

   - power key input driver for Freescale platforms (svns)
   - RTC driver updates for Freescale platforms (svns/mxc)
   - clk fixes for TI DM814/816X

  + a bunch of other changes for various platforms"

* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
  ARM: rockchip: pm: Fix PTR_ERR() argument
  ARM: imx: mach-imx6ul: Fix allmodconfig build
  clk: ti: fix for definition movement
  ARM: uniphier: drop v7_invalidate_l1 call at secondary entry
  memory: kill off set_irq_flags usage
  rtc: snvs: select option REGMAP_MMIO
  ARM: brcmstb: select ARCH_DMA_ADDR_T_64BIT for LPAE
  ARM: BCM: Enable ARM erratum 798181 for BRCMSTB
  ARM: OMAP2+: Fix power domain operations regression caused by 81xx
  ARM: rockchip: enable PMU_GPIOINT_WAKEUP_EN when entering shallow suspend
  ARM: rockchip: set correct stabilization thresholds in suspend
  ARM: rockchip: rename osc_switch_to_32k variable
  ARM: imx6ul: add fec MAC refrence clock and phy fixup init
  ARM: imx6ul: add fec bits to GPR syscon definition
  rtc: mxc: add support of device tree
  dt-binding: document the binding for mxc rtc
  rtc: mxc: use a second rtc clock
  ARM: davinci: cp_intc: use IRQCHIP_SKIP_SET_WAKE instead of irq_set_wake callback
  soc: mediatek: Fix SCPSYS compilation
  ARM: at91/soc: add basic support for new sama5d2 SoC
  ...
2015-09-01 12:18:40 -07:00
Linus Torvalds f36fc04e4c The clk framework changes for 4.3 are mostly updates to existing drivers
and the addition of new clock drivers. Stephen Boyd has also done a lot
 of subsystem-wide driver clean-ups (thanks!). There are also fixes to
 the framework core and changes to better split clock provider drivers
 from clock consumer drivers.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJV5KelAAoJEKI6nJvDJaTUwaQP/RVb70v6XSgMIePuOq3iaECT
 bclCAyito3YFwykrPPmQ1DucHvEjlWopeFwKqEE9VjNl07TVIH/OMGeonb9yErIY
 aN+FMoA9RUGVexMhy004q5sSbOEihAqTgKWaOiYoY8zAfJfeTpYXUoy34FcrW7MB
 j/cDDJgigtWe9zzcdrW04oT454lXQaSQuGX39tDCR0s0S3soYU2JyjkyBGiO5Yid
 1yIMq/nzI8SrCwxwD/nFwQNtg7lqiAN291Nbi4At1vvG5r4RhNveuLGv8uJ50XRB
 xwy0sdHLIVJrIJ8OUcs1sY8wxu7ghDS8u+vjTNO2RzBf3KZWbuXWX+yVM7JQi4Ty
 0iL5hGbvERy5E9QSzzH+Ox2jVt5e/r/dyvRf3oBDPVrFXhKusYhn6JmdUVJkTZ83
 GTw2sQdEpcmry4z/50/MaqpZuXVZ09VTOCTqp8ToseJjsz9jXxVhQ4HdAwLc8cmV
 txWGRXuBxCB+2o8M0oky3IKS69VFFH5u6QQ0KG8+JYOrDDG7GcnJsFeV7mQjlu8g
 3evYUILNAUfJGBpkOeLs654KUBHwUyXc87cUIKwjGaPruWb2048+kdCVrL3IFwPb
 sS/7Qn3DQ90pHFUTssDnWLz3X0IWT3H0iV4zZyAqqdARugEo+mpykmXmMWcWc3VR
 MrD1l3GVxLegEf242Zpo
 =QAiQ
 -----END PGP SIGNATURE-----

Merge tag 'clk-for-linus-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Michael Turquette:
 "The clk framework changes for 4.3 are mostly updates to existing
  drivers and the addition of new clock drivers.  Stephen Boyd has also
  done a lot of subsystem-wide driver clean-ups (thanks!).  There are
  also fixes to the framework core and changes to better split clock
  provider drivers from clock consumer drivers"

* tag 'clk-for-linus-4.3' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (227 commits)
  clk: s5pv210: add missing call to samsung_clk_of_add_provider()
  clk: pistachio: correct critical clock list
  clk: pistachio: Fix PLL rate calculation in integer mode
  clk: pistachio: Fix override of clk-pll settings from boot loader
  clk: pistachio: Fix 32bit integer overflows
  clk: tegra: Fix some static checker problems
  clk: qcom: Fix MSM8916 prng clock enable bit
  clk: Add missing header for 'bool' definition to clk-conf.h
  drivers/clk: appropriate __init annotation for const data
  clk: rockchip: register pll mux before pll itself
  clk: add bindings for the Ux500 clocks
  clk/ARM: move Ux500 PRCC bases to the device tree
  clk: remove duplicated code with __clk_set_parent_after
  clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)
  clk: Constify clk_hw argument to provider APIs
  clk: Hi6220: add stub clock driver
  dt-bindings: clk: Hi6220: Document stub clock driver
  dt-bindings: arm: Hi6220: add doc for SRAM controller
  clk: atlas7: fix pll missed divide NR in fraction mode
  clk: atlas7: fix bit field and its root clk for coresight_tpiu
  ...
2015-08-31 17:26:48 -07:00
Tony Lindgren 24da741c67 Merge branch 'dm814x-soc' into omap-for-v4.3/soc
Update dm814x changes for sparse fixes to make data structures
static.

Conflicts:
	arch/arm/mach-omap2/omap_hwmod_81xx_data.c
2015-07-23 21:59:18 -07:00
Tony Lindgren 0f3ccb24c0 ARM: OMAP2: Add minimal dm814x hwmod support
Let's add minimal set of dm814x hwmods to have a bootable system.

Cc: Matthijs van Duin <matthijsvanduin@gmail.com>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-07-23 21:39:00 -07:00
Roger Quadros 9a258afa92 ARM: OMAP2+: hwmod: Fix _wait_target_ready() for hwmods without sysc
For hwmods without sysc, _init_mpu_rt_base(oh) won't be called and so
_find_mpu_rt_port(oh) will return NULL thus preventing ready state check
on those modules after the module is enabled.

This can potentially cause a bus access error if the module is accessed
before the module is ready.

Fix this by unconditionally calling _init_mpu_rt_base() during hwmod
_init(). Do ioremap only if we need SYSC access.

Eventhough _wait_target_ready() check doesn't really need MPU RT port but
just the PRCM registers, we still mandate that the hwmod must have an
MPU RT port if ready state check needs to be done. Else it would mean that
the module is not accessible by MPU so there is no point in waiting
for target to be ready.

e.g. this fixes the below DCAN bus access error on AM437x-gp-evm.

[   16.672978] ------------[ cut here ]------------
[   16.677885] WARNING: CPU: 0 PID: 1580 at drivers/bus/omap_l3_noc.c:147 l3_interrupt_handler+0x234/0x35c()
[   16.687946] 44000000.ocp:L3 Custom Error: MASTER M2 (64-bit) TARGET L4_PER_0 (Read): Data Access in User mode during Functional access
[   16.700654] Modules linked in: xhci_hcd btwilink ti_vpfe dwc3 videobuf2_core ov2659 bluetooth v4l2_common videodev ti_am335x_adc kfifo_buf industrialio c_can_platform videobuf2_dma_contig media snd_soc_tlv320aic3x pixcir_i2c_ts c_can dc
[   16.731144] CPU: 0 PID: 1580 Comm: rpc.statd Not tainted 3.14.26-02561-gf733aa036398 #180
[   16.739747] Backtrace:
[   16.742336] [<c0011108>] (dump_backtrace) from [<c00112a4>] (show_stack+0x18/0x1c)
[   16.750285]  r6:00000093 r5:00000009 r4:eab5b8a8 r3:00000000
[   16.756252] [<c001128c>] (show_stack) from [<c05a4418>] (dump_stack+0x20/0x28)
[   16.763870] [<c05a43f8>] (dump_stack) from [<c0037120>] (warn_slowpath_common+0x6c/0x8c)
[   16.772408] [<c00370b4>] (warn_slowpath_common) from [<c00371e4>] (warn_slowpath_fmt+0x38/0x40)
[   16.781550]  r8:c05d1f90 r7:c0730844 r6:c0730448 r5:80080003 r4:ed0cd210
[   16.788626] [<c00371b0>] (warn_slowpath_fmt) from [<c027fa94>] (l3_interrupt_handler+0x234/0x35c)
[   16.797968]  r3:ed0cd480 r2:c0730508
[   16.801747] [<c027f860>] (l3_interrupt_handler) from [<c0063758>] (handle_irq_event_percpu+0x54/0x1bc)
[   16.811533]  r10:ed005600 r9:c084855b r8:0000002a r7:00000000 r6:00000000 r5:0000002a
[   16.819780]  r4:ed0e6d80
[   16.822453] [<c0063704>] (handle_irq_event_percpu) from [<c00638f0>] (handle_irq_event+0x30/0x40)
[   16.831789]  r10:eb2b6938 r9:eb2b6960 r8:bf011420 r7:fa240100 r6:00000000 r5:0000002a
[   16.840052]  r4:ed005600
[   16.842744] [<c00638c0>] (handle_irq_event) from [<c00661d8>] (handle_fasteoi_irq+0x74/0x128)
[   16.851702]  r4:ed005600 r3:00000000
[   16.855479] [<c0066164>] (handle_fasteoi_irq) from [<c0063068>] (generic_handle_irq+0x28/0x38)
[   16.864523]  r4:0000002a r3:c0066164
[   16.868294] [<c0063040>] (generic_handle_irq) from [<c000ef60>] (handle_IRQ+0x38/0x8c)
[   16.876612]  r4:c081c640 r3:00000202
[   16.880380] [<c000ef28>] (handle_IRQ) from [<c00084f0>] (gic_handle_irq+0x30/0x5c)
[   16.888328]  r6:eab5ba38 r5:c0804460 r4:fa24010c r3:00000100
[   16.894303] [<c00084c0>] (gic_handle_irq) from [<c05a8d80>] (__irq_svc+0x40/0x50)
[   16.902193] Exception stack(0xeab5ba38 to 0xeab5ba80)
[   16.907499] ba20:                                                       00000000 00000006
[   16.916108] ba40: fa1d0000 fa1d0008 ed3d3000 eab5bab4 ed3d3460 c0842af4 bf011420 eb2b6960
[   16.924716] ba60: eb2b6938 eab5ba8c eab5ba90 eab5ba80 bf035220 bf07702c 600f0013 ffffffff
[   16.933317]  r7:eab5ba6c r6:ffffffff r5:600f0013 r4:bf07702c
[   16.939317] [<bf077000>] (c_can_plat_read_reg_aligned_to_16bit [c_can_platform]) from [<bf035220>] (c_can_get_berr_counter+0x38/0x64 [c_can])
[   16.952696] [<bf0351e8>] (c_can_get_berr_counter [c_can]) from [<bf010294>] (can_fill_info+0x124/0x15c [can_dev])
[   16.963480]  r5:ec8c9740 r4:ed3d3000
[   16.967253] [<bf010170>] (can_fill_info [can_dev]) from [<c0502fa8>] (rtnl_fill_ifinfo+0x58c/0x8fc)
[   16.976749]  r6:ec8c9740 r5:ed3d3000 r4:eb2b6780
[   16.981613] [<c0502a1c>] (rtnl_fill_ifinfo) from [<c0503408>] (rtnl_dump_ifinfo+0xf0/0x1dc)
[   16.990401]  r10:ec8c9740 r9:00000000 r8:00000000 r7:00000000 r6:ebd4d1b4 r5:ed3d3000
[   16.998671]  r4:00000000
[   17.001342] [<c0503318>] (rtnl_dump_ifinfo) from [<c050e6e4>] (netlink_dump+0xa8/0x1e0)
[   17.009772]  r10:00000000 r9:00000000 r8:c0503318 r7:ebf3e6c0 r6:ebd4d1b4 r5:ec8c9740
[   17.018050]  r4:ebd4d000
[   17.020714] [<c050e63c>] (netlink_dump) from [<c050ec10>] (__netlink_dump_start+0x104/0x154)
[   17.029591]  r6:eab5bd34 r5:ec8c9980 r4:ebd4d000
[   17.034454] [<c050eb0c>] (__netlink_dump_start) from [<c0505604>] (rtnetlink_rcv_msg+0x110/0x1f4)
[   17.043778]  r7:00000000 r6:ec8c9980 r5:00000f40 r4:ebf3e6c0
[   17.049743] [<c05054f4>] (rtnetlink_rcv_msg) from [<c05108e8>] (netlink_rcv_skb+0xb4/0xc8)
[   17.058449]  r8:eab5bdac r7:ec8c9980 r6:c05054f4 r5:ec8c9980 r4:ebf3e6c0
[   17.065534] [<c0510834>] (netlink_rcv_skb) from [<c0504134>] (rtnetlink_rcv+0x24/0x2c)
[   17.073854]  r6:ebd4d000 r5:00000014 r4:ec8c9980 r3:c0504110
[   17.079846] [<c0504110>] (rtnetlink_rcv) from [<c05102ac>] (netlink_unicast+0x180/0x1ec)
[   17.088363]  r4:ed0c6800 r3:c0504110
[   17.092113] [<c051012c>] (netlink_unicast) from [<c0510670>] (netlink_sendmsg+0x2ac/0x380)
[   17.100813]  r10:00000000 r8:00000008 r7:ec8c9980 r6:ebd4d000 r5:eab5be70 r4:eab5bee4
[   17.109083] [<c05103c4>] (netlink_sendmsg) from [<c04dfdb4>] (sock_sendmsg+0x90/0xb0)
[   17.117305]  r10:00000000 r9:eab5a000 r8:becdda3c r7:0000000c r6:ea978400 r5:eab5be70
[   17.125563]  r4:c05103c4
[   17.128225] [<c04dfd24>] (sock_sendmsg) from [<c04e1c28>] (SyS_sendto+0xb8/0xdc)
[   17.136001]  r6:becdda5c r5:00000014 r4:ecd37040
[   17.140876] [<c04e1b70>] (SyS_sendto) from [<c000e680>] (ret_fast_syscall+0x0/0x30)
[   17.148923]  r10:00000000 r8:c000e804 r7:00000122 r6:becdda5c r5:0000000c r4:becdda5c
[   17.157169] ---[ end trace 2b71e15b38f58bad ]---

Fixes: 6423d6df14 ("ARM: OMAP2+: hwmod: check for module address space during init")
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: <stable@vger.kernel.org>
2015-07-23 06:35:25 -06:00
Stephen Boyd f5b00f6f3a ARM: OMAP2+: Include clk.h
These files use the consumer API, so include clk.h explicitly.

Acked-by: Tero Kristo <t-kristo@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20 10:52:36 -07:00
Lokesh Vutla aaf2c0fbbb ARM: OMAP2+: hwmod: add support for lock and unlock hooks
Some IP blocks like RTC, needs an additional setting for writing to its
registers. This is to prevent any spurious writes from changing the
register values.

This patch adds optional lock and unlock function pointers to
the IP block's hwmod data. These unlock and lock function pointers
are called by hwmod code before and after writing sysconfig registers.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[paul@pwsan.com: fixed indentation level to conform with the rest of the
 structure members]
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-07-15 18:16:16 -06:00
Pali Rohár 6da233589f ARM: OMAP2+: Return correct error values from device and hwmod
Without this patch function pm_runtime_get_sync() returns 0 even when
some omap subfunction fails. This patch properly propagate error codes
from omap functions back to caller.

This patch fix problem, when loading omap-aes driver in qemu cause
kernel oops.

Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
[paul@pwsan.com: fix a checkpatch warning]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-06-01 19:22:59 -06:00
Tero Kristo a5bf00cd73 ARM: AM33xx+: hwmod: re-use omap4 implementations for reset functionality
The reset code functionality is mostly a copy paste between OMAP4+ and
AM33xx+. Re-use the omap4 code where possible, and just keep the special
implementation for de-asserting the hardreset lines for AM33xx, as
AM33xx+ devices have slightly different register layouts compared to
OMAP4+. This patch also fixes the hardreset issues faced on AM43xx.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reported-by: Dave Gerlach <d-gerlach@ti.com>
Reported-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-05-08 13:05:19 -06:00
Tero Kristo 4ebf5b288c ARM: OMAP4+: PRM: add support for passing status register/bit info to reset
AM43xx has slightly different reset register layout compared to OMAP4+,
with varying status bit shifts and status register offsets. Current
code assumes static offsets and identical status / reset control bit
shifts, which is wrong. This patch adds PRM core support for passing
the actual implementations from hwmod code. AM43xx mappings will be fixed
in subsequent patch.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Reported-by: Dave Gerlach <d-gerlach@ti.com>
Reported-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-05-08 13:05:15 -06:00
Tero Kristo 80d2518dfd ARM: OMAP2+: hwmod: fix deassert hardreset clkdm usecounting
Deasserting hardreset increases the usecount for the hwmod parent clockdomain
always, however usecount is only decreased at end in certain error cases.
This causes software supervised clockdomains to remain always on, preventing
idle. Fixed by always releasing the hwmods clockdomain parent when exiting
the function.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Carlos Hernandez <ceh@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-03-01 16:24:04 -07:00
Peter Ujfalusi 6931795238 ARM: omap2+: omap_hwmod: Set unique lock_class_key per hwmod
Add struct lock_class_key to omap_hwmod struct and use it to set unique
lockdep class per hwmod.
This will ensure that lockdep will know that each omap_hwmod->_lock should
be treated as separate class and will not give false warning about deadlock
or other issues due to nested use of hwmods.
DRA7x's ATL hwmod is one example for this since McASP can select ATL clock
as functional clock, which will trigger nested oh->_lock usage. This will
trigger false warning from lockdep validator as it is dealing with classes
and for it all hwmod clocks are the same class.

Suggested-by: Peter Zijlstra <peterz@infradead.org>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2015-02-26 00:00:51 -07:00