If we make all QSPI (SPI protocol) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and code and use a single setup for all.
So modify the ColdFire 5249 QSPI addressing so that:
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
. move chip select definitions (CS) to appropriate header
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
If we make all QSPI (SPI protocol) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and code and use a single setup for all.
So modify the ColdFire 523x QSPI addressing so that:
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
. move chip select definitions (CS) to appropriate header
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
If we make all QSPI (SPI protocol) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and code and use a single setup for all.
So modify the ColdFire 520x QSPI addressing so that:
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
. move chip select definitions (CS) to appropriate header
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
If we make all FEC (ethernet) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and use a single setup for all.
So modify the ColdFire 532x FEC addressing so that:
. FECs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
If we make all FEC (ethernet) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and use a single setup for all.
So modify the ColdFire 528x FEC addressing so that:
. FECs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
If we make all FEC (ethernet) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and use a single setup for all.
So modify the ColdFire 527x FEC addressing so that:
. FECs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
If we make all FEC (ethernet) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and use a single setup for all.
So modify the ColdFire 5272 FEC addressing so that:
. FECs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
If we make all FEC (ethernet) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and use a single setup for all.
So modify the ColdFire 523x FEC addressing so that:
. FECs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
If we make all FEC (ethernet) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and use a single setup for all.
So modify the ColdFire 520x FEC addressing so that:
. FECs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Some ColdFire CPU UART hardware modules can configure the IRQ they use.
Currently the same setup code is duplicated in the init code for each of
these ColdFire CPUs. Merge all this code to a single instance.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 54xx UART addressing so that:
. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 5407 UART addressing so that:
. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 532x UART addressing so that:
. UARTs are numbered from 0 up
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 528x UART addressing so that:
. UARTs are numbered from 0 up
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 5307 UART addressing so that:
. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 527x UART addressing so that:
. UARTs are numbered from 0 up
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 5272 UART addressing so that:
. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 5249 UART addressing so that:
. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 523x UART addressing so that:
. UARTs are numbered from 0 up
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 520x UART addressing so that:
. UARTs are numbered from 0 up
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
If we make all UART addressing consistent across all ColdFire family members
then we will be able to remove the duplicated plaform data and use a single
setup for all.
So modify the ColdFire 5206 UART addressing so that:
. UARTs are numbered from 0 up
. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
With a few small changes we can make the m68knommu timer init code the
same as the m68k code. By using the mach_sched_init function pointer
and reworking the current timer initializers to keep track of the common
m68k timer_interrupt() handler we end up with almost identical code for
m68knommu.
This will allow us to more easily merge the mmu and non-mmu m68k time.c
in future patches.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
The read_persistent_clock() code is different on m68knommu, for really no
reason. With a few changes to support function names and some code
re-organization the code can be made the same.
This will make it easier to merge the arch/m68k/kernel/time.c for m68k and
m68knommu in a future patch.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Conflicts:
drivers/net/ethernet/sfc/rx.c
Overlapping changes in drivers/net/ethernet/sfc/rx.c, one to change
the rx_buf->is_page boolean into a set of u16 flags, and another to
adjust how ->ip_summed is initialized.
Signed-off-by: David S. Miller <davem@davemloft.net>
This is useful for testing RX handling of frames with bad
CRCs.
Requires driver support to actually put the packet on the
wire properly.
Signed-off-by: Ben Greear <greearb@candelatech.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This one specifies where to start MSG_PEEK-ing queue data from. When
set to negative value means that MSG_PEEK works as ususally -- peeks
from the head of the queue always.
When some bytes are peeked from queue and the peeking offset is non
negative it is moved forward so that the next peek will return next
portion of data.
When non-peeking recvmsg occurs and the peeking offset is non negative
is is moved backward so that the next peek will still peek the proper
data (i.e. the one that would have been picked if there were no non
peeking recv in between).
The offset is set using per-proto opteration to let the protocol handle
the locking issues and to check whether the peeking offset feature is
supported by the protocol the socket belongs to.
Signed-off-by: Pavel Emelyanov <xemul@parallels.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
We had problems accessing our NOR flash trough mtd. The system always got
stuck at attaching UBI using ubiattach if booted from NFS or after mounting
squashfs as rootfs directly from NOR flash.
After some testing of the new changes introduced from v3.2-rc1 to v3.2-rc7
we had to apply the following patch to get mtd working again.
[gerg: The problem was ultimately caused by allocated kernel pages not having
the shared (SG) bit set. Without the SG bit set the MMU will look for page
matches incorporating the ASID as well. Things like module regions allocated
using vmalloc would fault when other processes run. ]
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k:
m68k: Fix assembler constraint to prevent overeager gcc optimisation
mac_esp: rename irq
mac_scsi: dont enable mac_scsi irq before requesting it
macfb: fix black and white modes
m68k/irq: Remove obsolete IRQ_FLG_* definitions
Fix up trivial conflict in arch/m68k/kernel/process_mm.c as per Geert.
* 'pm-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (76 commits)
PM / Hibernate: Implement compat_ioctl for /dev/snapshot
PM / Freezer: fix return value of freezable_schedule_timeout_killable()
PM / shmobile: Allow the A4R domain to be turned off at run time
PM / input / touchscreen: Make st1232 use device PM QoS constraints
PM / QoS: Introduce dev_pm_qos_add_ancestor_request()
PM / shmobile: Remove the stay_on flag from SH7372's PM domains
PM / shmobile: Don't include SH7372's INTCS in syscore suspend/resume
PM / shmobile: Add support for the sh7372 A4S power domain / sleep mode
PM: Drop generic_subsys_pm_ops
PM / Sleep: Remove forward-only callbacks from AMBA bus type
PM / Sleep: Remove forward-only callbacks from platform bus type
PM: Run the driver callback directly if the subsystem one is not there
PM / Sleep: Make pm_op() and pm_noirq_op() return callback pointers
PM/Devfreq: Add Exynos4-bus device DVFS driver for Exynos4210/4212/4412.
PM / Sleep: Merge internal functions in generic_ops.c
PM / Sleep: Simplify generic system suspend callbacks
PM / Hibernate: Remove deprecated hibernation snapshot ioctls
PM / Sleep: Fix freezer failures due to racy usermodehelper_is_disabled()
ARM: S3C64XX: Implement basic power domain support
PM / shmobile: Use common always on power domain governor
...
Fix up trivial conflict in fs/xfs/xfs_buf.c due to removal of unused
XBT_FORCE_SLEEP bit
* 'for-linus2' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: (165 commits)
reiserfs: Properly display mount options in /proc/mounts
vfs: prevent remount read-only if pending removes
vfs: count unlinked inodes
vfs: protect remounting superblock read-only
vfs: keep list of mounts for each superblock
vfs: switch ->show_options() to struct dentry *
vfs: switch ->show_path() to struct dentry *
vfs: switch ->show_devname() to struct dentry *
vfs: switch ->show_stats to struct dentry *
switch security_path_chmod() to struct path *
vfs: prefer ->dentry->d_sb to ->mnt->mnt_sb
vfs: trim includes a bit
switch mnt_namespace ->root to struct mount
vfs: take /proc/*/mounts and friends to fs/proc_namespace.c
vfs: opencode mntget() mnt_set_mountpoint()
vfs: spread struct mount - remaining argument of next_mnt()
vfs: move fsnotify junk to struct mount
vfs: move mnt_devname
vfs: move mnt_list to struct mount
vfs: switch pnode.h macros to struct mount *
...
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k: (21 commits)
m68k/mac: Make CONFIG_HEARTBEAT unavailable on Mac
m68k/serial: Remove references to obsolete serial config options
m68k/net: Remove obsolete IRQ_FLG_* users
m68k: Don't comment out syscalls used by glibc
m68k/atari: Move declaration of atari_SCC_reset_done to header file
m68k/serial: Remove references to obsolete CONFIG_SERIAL167
m68k/hp300: Export hp300_ledstate
m68k: Initconst section fixes
m68k/mac: cleanup macro case
mac_scsi: fix mac_scsi on some powerbooks
m68k/mac: fix powerbook 150 adb_type
m68k/mac: fix baboon irq disable and shutdown
m68k/mac: oss irq fixes
m68k/mac: fix nubus slot irq disable and shutdown
m68k/mac: enable via_alt_mapping on performa 580
m68k/mac: cleanup forward declarations
m68k/mac: cleanup mac_irq_pending
m68k/mac: cleanup mac_clear_irq
m68k/mac: early console
m68k/mvme16x: Add support for EARLY_PRINTK
...
Fix up trivial conflict in arch/m68k/Kconfig.debug due to new
EARLY_PRINTK config option addition clashing with movement of the
BOOTPARAM options.
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (56 commits)
m68k: allow ColdFire 547x and 548x CPUs to be built with MMU enabled
m68k/Kconfig: Separate classic m68k and coldfire early
m68k: add ColdFire with MMU enabled support to the m68k mem init code
m68k: do not use m68k startup or interrupt code for ColdFire CPUs
m68k: add ColdFire FPU support for the V4e ColdFire CPUs
m68k: adjustments to stack frame for ColdFire with MMU enabled
m68k: use non-MMU linker script for ColdFire MMU builds
m68k: ColdFire with MMU enabled uses same clocking code as non-MMU
m68k: add code to setup a ColdFire 54xx platform when MMU enabled
m68k: use non-MMU entry.S code when compiling for ColdFire CPU
m68k: create ColdFire MMU pgalloc code
m68k: compile appropriate mm arch files for ColdFire MMU support
m68k: ColdFire V4e MMU paging init code and miss handler
m68k: use ColdFire MMU read/write bit flags when ioremapping
m68k: modify cache push and clear code for ColdFire with MMU enable
m68k: use tracehook_report_syscall_entry/exit for ColdFire MMU ptrace path
m68k: ColdFire V4e MMU context support code
m68k: MMU enabled ColdFire needs 8k ELF alignment
m68k: set ColdFire MMU page size
m68k: define PAGE_OFFSET_RAW for ColdFire CPU with MMU enabled
...
The V4e ColdFire CPU family also has an integrated FPU (as well as the MMU).
So add code to support this hardware along side the existing m68k FPU code.
The ColdFire FPU is of course different to all previous 68k FP units. It is
close in operation to the 68060, but not completely compatible. The biggest
issue to deal with is that the ColdFire FPU multi-move instructions are
different. It does not support multi-moving the FP control registers, and
the multi-move of the FP data registers uses a different instruction
mnemonic.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
The different ColdFire V4e MMU requires its own dedicated paging init
code, and a TLB miss handler for its software driven TLB.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
The ColdFire MMU has separate read and write bits, unlike the Motorola
m68k MMU which has a single read-only bit.
Define a _PAGE_READWRITE value for the Motorola MMU, which is 0, so we
can unconditionaly include that in the page table entry bits when setting
up ioremapped pages.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Add code to manage the context's of the ColdFire V4e MMU. This code is
mostly taken from the Freescale 2.6.35 kernel BSP for MMU enabled ColdFire.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
Like the SUN3 hardware MMU the ColdFire MMU uses 8k pages. So we want
our ELF page size alingment to also be 8k. Modify the ELF alignment
setting.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
We use the ColdFire V4e MMU page size of 8KiB. Define PAGE_SHIFT
appropriately.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
The ColdFire CPU configurations need PAGE_OFFSET_RAW set to the base of
their RAM. It doesn't matter if they are running with the MMU enabled or
disabled, it is always set to the base of RAM.
We can keep the choices simple here and key of CONFIG_RAMBASE. If it is
defined we are on a plaftorm (ColdFire or other non-MMU systems) which
have a configurable RAM base, just use it.
Reported-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
The ColdFire V4e MMU is unlike any of the other m68k MMU hardware.
It needs its own TLB flush support code.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
Modify the cache setup for the ColdFire 54xx parts when running with
the MMU enabled.
We want to map the peripheral register space (MBAR region) as non
cacheable. And create an identity mapping for all of RAM for the
kernel.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
Add code to deal with instruction, data and branch caches of the V4e
ColdFire cores when they are running with the MMU enabled.
This code is loosely based on Freescales changes for the caches of the
V4e ColdFire in the 2.6.25 kernel BSP. That code was originally by
Kurt Mahan <kmahan@freescale.com> (now <kmahan@xmission.com>).
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
Define the page table size and attributes for the ColdFire V4e MMU.
Also setup the vmalloc and kmap regions we will use.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
The ColdFire V4e MMU is nothing like any of the other m68k MMU's.
So we need to create a set of definitions and support routines
for the kernels paging functions.
This is largely taken from Freescales BSP code for this (though it
was a 2.6.25 kernel). I have cleaned it up alot from the original.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
Virtual memory m68k systems build with register a2 dedicated to being the
current proc pointer (non-MMU don't do this). Add code to the ColdFire
interrupt and exception processing to set this on entry, and at context
switch time. We use the same GET_CURRENT() macro that MMU enabled code
uses - modifying it so that the assembler is ColdFire clean.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Add code to the 54xx ColdFire CPU init to setup memory ready for the m68k
paged memory start up.
Some of the RAM variables that were specific to the non-mmu code paths
now need to be used during this setup, so when CONFIG_MMU is enabled.
Move these out of page_no.h and into page.h.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
The ColdFire CPU family, and the original 68000, do not support separate
address spaces like the other 680x0 CPU types. Modify the set_fs()/get_fs()
functions and macros to use a thread_info addr_limit for address space
checking. This is pretty much what all other architectures that do not
support separate setable address spaces do.
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
Modify the user space access functions to support the ColdFire V4e cores
running with MMU enabled.
The ColdFire processors do not support the "moves" instruction used by
the traditional 680x0 processors for moving data into and out of another
address space. They only support the notion of a single address space,
and you use the usual "move" instruction to access that.
Create a new config symbol (CONFIG_CPU_HAS_ADDRESS_SPACES) to mark the
CPU types that support separate address spaces, and thus also support
the sfc/dfc registers and the "moves" instruction that go along with that.
The code is almost identical for user space access, so lets just use a
define to choose either the "move" or "moves" in the assembler code.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
The interrupt handling support defines and code is not so much conditional
on an MMU being present (CONFIG_MMU), as it is on which type of CPU we are
building for. So make the code conditional on the CPU types instead. The
current irq.h is mostly specific to the interrupt code for the 680x0 CPUs,
so it should only be used for them.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
Basic register level definitions to support the internal MMU of the
V4e ColdFire cores.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
Create machine and CPU definitions to support the ColdFire CPU family
members that have a virtual memory management unit.
The ColdFire V4e core contains an MMU, and it is quite different to
any other 68k family members.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Matt Waddel <mwaddel@yahoo.com>
Acked-by: Kurt Mahan <kmahan@xmission.com>
The traditional 68000 processors and the newer reduced instruction set
ColdFire processors do not support the 32*32->64 multiply or the 64/32->32
divide instructions. This is not a difference based on the presence of
a hardware MMU or not.
Create a new config symbol to mark that a CPU type doesn't support the
longer multiply/divide instructions. Use this then as a basis for using
the fast 64bit based divide (in div64.h) and for linking in the extra
libgcc functions that may be required (mulsi3, divsi3, etc).
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
We have two implementations of the IP checksuming code for the m68k arch.
One uses the more advanced instructions available in 68020 and above
processors, the other uses the simpler instructions available on the
original 68000 processors and the modern ColdFire processors.
This simpler code is pretty much the same as the generic lib implementation
of the IP csum functions. So lets just switch over to using that. That
means we can completely remove the checksum_no.c file, and only have the
local fast code used for the more complex 68k CPU family members.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
There is no reason we can't make the saved fp registers the same for all
m68k types and ColdFire. There is a little wasted space, but the code
consistency and cleanliness is a big win.
sigcontext.h is an exported header, but currently there is no in-mainline
users of the !__uClinux__ and __mcoldfire__ case that this change effects.
Even better this change actually makes this structure consistent with
the out-of-mainline ColdFire/MMU code.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Output a table of the kernel memory regions at boot time.
This is taken directly from the ARM architecture code that does this.
The table looks like this:
Virtual kernel memory layout:
vector : 0x00000000 - 0x00000400 ( 0 KiB)
kmap : 0xd0000000 - 0xe0000000 ( 256 MiB)
vmalloc : 0xc0000000 - 0xcfffffff ( 255 MiB)
lowmem : 0x00000000 - 0x02000000 ( 32 MiB)
.init : 0x00128000 - 0x00134000 ( 48 KiB)
.text : 0x00020000 - 0x00118d54 ( 996 KiB)
.data : 0x00118d60 - 0x00126000 ( 53 KiB)
.bss : 0x00134000 - 0x001413e0 ( 53 KiB)
This has been very useful while debugging the ColdFire virtual memory
support code. But in general I think it is nice to know extacly where
the kernel has layed everything out on boot.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Currently on m68k we have a comeplete thread_info structure stored inside
of the thread_struct, and we also have it in the initial part of the kernel
stack. Mostly the code currently uses the one inside of the thread_struct,
only using the "task" pointer from the stack based one.
This is wasteful and confusing, we should only have the single instance of
thread_info inside the stack page. And this is the norm for all other
architectures.
This change makes m68k handle thread_info consistently on both MMU enabled
and non-MMU setups.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
We have a duplicate name and definition for the offset of the thread.info
struct within the task struct in our asm-offsets.c code. Remove one of them,
and consolidate to use a single define, TASK_INFO.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
gpiolib provides __gpio_to_irq() to map gpiolib gpios to interrupts - hook
that up on m68k.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Conflicts:
net/bluetooth/l2cap_core.c
Just two overlapping changes, one added an initialization of
a local variable, and another change added a new local variable.
Signed-off-by: David S. Miller <davem@davemloft.net>
* master: (848 commits)
SELinux: Fix RCU deref check warning in sel_netport_insert()
binary_sysctl(): fix memory leak
mm/vmalloc.c: remove static declaration of va from __get_vm_area_node
ipmi_watchdog: restore settings when BMC reset
oom: fix integer overflow of points in oom_badness
memcg: keep root group unchanged if creation fails
nilfs2: potential integer overflow in nilfs_ioctl_clean_segments()
nilfs2: unbreak compat ioctl
cpusets: stall when updating mems_allowed for mempolicy or disjoint nodemask
evm: prevent racing during tfm allocation
evm: key must be set once during initialization
mmc: vub300: fix type of firmware_rom_wait_states module parameter
Revert "mmc: enable runtime PM by default"
mmc: sdhci: remove "state" argument from sdhci_suspend_host
x86, dumpstack: Fix code bytes breakage due to missing KERN_CONT
IB/qib: Correct sense on freectxts increment and decrement
RDMA/cma: Verify private data length
cgroups: fix a css_set not found bug in cgroup_attach_proc
oprofile: Fix uninitialized memory access when writing to writing to oprofilefs
Revert "xen/pv-on-hvm kexec: add xs_reset_watches to shutdown watches from old kernel"
...
Conflicts:
kernel/cgroup_freezer.c
Define again the syscalls that are used by glibc so that it is possible to
compile a feature-complete glibc with the newest kernel headers.
Signed-off-by: Andreas Schwab <schwab@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
The accidental loss of CONFIG_DIO in commit
0e152d8050 ("m68k: reorganize Kconfig options
to improve mmu/non-mmu selections") exposed a missing symbol export in
m68k allmodconfig. If CONFIG_HP300=y but CONFIG_HPLANCE (which is bool,
and depends on CONFIG_DIO) is not set, and CONFIG_MVME147=y and
CONFIG_MVME147_NET=m, 7990.c is compiled as a module, giving:
ERROR: "ledstate" [drivers/net/ethernet/amd/7990.ko] undefined!
Add the missing export, and rename ledstate to hp300_ledstate while we're
at it, as it's a too generic name.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Code style convention has macro names in uppercase. Change MAC_VIA_IIci to MAC_VIA_IICI.
Also remove an obsolete comment.
Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
The IOP driver calls into the OSS driver to enable its IRQ. This undesirable coupling between drivers only exists because the OSS driver doesn't correctly handle all of its machspec IRQs.
Fix OSS handling of enable/disable for VIA1 IRQs (8 thru 15) which includes MAC_IRQ_ADB.
Back when I implemented pmac_zilog support I redefined IRQ_MAC_SCC incorrectly. Change this to a machspec IRQ so that it works on OSS.
Clean up the unused OSS audio IRQ and OSS_IRQLEV_* cruft that only confuses things.
Fix the OSS description in macints.c and remove an obsolete comment.
Don't enable the VIA1 irq before registering the handler.
Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Improve NuBus slot interrupt handling code and documentation. This patch fixes the NuBus NIC (mac8390) in my Quadra 700.
Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Move some forward declarations into header files and adjust includes.
Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
mac_irq_pending() has only one caller (mac_esp.c). Nothing tests for Baboon, PSC or OSS pending interrupts. Until that need arises, let's keep it simple and remove all the unused abstraction. Replace it with a routine to check for SCSI DRQ.
Signed-off-by: Finn Thain <fthain@telegraphics.com.au>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Only define SERIAL_PORT_DFNS when CONFIG_ISA is defined. Otherwise the first
4 slots in the 8250 driver are unavailable on non-ISA machines.
Signed-off-by: Kars de Jong <jongk@linux-m68k.org>
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
The forcedeth changes had a conflict with the conversion over
to atomic u64 statistics in net-next.
The libertas cfg.c code had a conflict with the bss reference
counting fix by John Linville in net-next.
Conflicts:
drivers/net/ethernet/nvidia/forcedeth.c
drivers/net/wireless/libertas/cfg.c
The 802.1X EAPOL handshake hostapd does requires
knowing whether the frame was ack'ed by the peer.
Currently, we fudge this pretty badly by not even
transmitting the frame as a normal data frame but
injecting it with radiotap and getting the status
out of radiotap monitor as well. This is rather
complex, confuses users (mon.wlan0 presence) and
doesn't work with all hardware.
To get rid of that hack, introduce a real wifi TX
status option for data frame transmissions.
This works similar to the existing TX timestamping
in that it reflects the SKB back to the socket's
error queue with a SCM_WIFI_STATUS cmsg that has
an int indicating ACK status (0/1).
Since it is possible that at some point we will
want to have TX timestamping and wifi status in a
single errqueue SKB (there's little point in not
doing that), redefine SO_EE_ORIGIN_TIMESTAMPING
to SO_EE_ORIGIN_TXSTATUS which can collect more
than just the timestamp; keep the old constant
as an alias of course. Currently the internal APIs
don't make that possible, but it wouldn't be hard
to split them up in a way that makes it possible.
Thanks to Neil Horman for helping me figure out
the functions that add the control messages.
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
q40_irq_handler() must be kept to translate ISA IRQs to the range 1-15.
q40_probe_irq_o{ff,n}() become unused.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Richard Zidlicky <rz@linux-m68k.org>
- Rename m68k_handle_int() to generic_handle_irq(), and drop the unneeded
asmlinkage,
- Rename __m68k_handle_int() to do_IRQ().
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
This is a wrapper around m68k_setup_irq_chip() that discards its dummy
second parameter, to ease the future transition to genirq.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Make it more similar to the genirq version:
- Add an irq field
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Make it more similar to the genirq version:
- Remove lock (unused as we don't do SMP anyway),
- Prepend methods with irq_,
- Make irq_startup() return unsigned int.
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Create common extern definitions of _rambase, _ramstart and _ramend
instead of them being externed when used in code.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
We should be including and using sections.h to get at the extern
definitions of the linker sections in the m68knommu startup code.
Not defining them locally.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
The code for handling traps in the non-mmu case is a subset of the mmu
enabled case. Merge the non-mmu traps_no.c code back to a single traps.c.
There is actually no code mmu specific here at all, and the processor
specific code (for the more complex 68020/68030/68040/68060) is already
proplerly conditionaly used.
The format of console exception dump is a little different, but I don't
think will cause any one problems, it is purely for debug purposes.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
The changes in the mmu version of entry.h (entry_mm.h) and the non-mmu
version (entry_no.h) are not about the presence or use of an MMU at all.
The main changes are to support the ColdFire processors. The code for
trap entry and exit for all types of 68k processor outside coldfire is
the same.
So merge the files back to a single entry.h and share the common 68k
entry/exit code. Some changes are required for the non-mmu entry
handlers to adopt the differing macros for system call and interrupt
entry, but this is quite strait forward. The changes for the ColdFire
remove a couple of instructions for the separate a7 register case, and
are no worse for the older single a7 register case.
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
The problem has its root in the calculation of the set-port offsets (macro
MCFGPIO_SETR() in arch/m68k/include/asm/gpio.h), this assumes that all ports
have the same offset from the base port address (MCFGPIO_SETR) which is
defined in mcf520xsim.h as an alias of MCFGIO_PSETR_BUSCTL. Because the BUSCTL
and BE port do not have a set-register (see MCF5208 Reference Manual Page
13-10, Table 13-3) the offset calculations went wrong.
Because the BE and BUSCTL port do not seem useful in these parts, as they
lack a set register, I removed them and adapted the gpio chip bases which
are also used for the offset-calculations. Now both setting and resetting
the chip selects works as expected from userland and from the kernelspace.
Signed-off-by: Peter Turczak <peter@turczak.de>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Fixes fallout due to the removal of the cast in commit aa462abe8a
("mm: fix __page_to_pfn for a const struct page argument")
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: linux-m68k@lists.linux-m68k.org
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k:
m68k/math-emu: Remove unnecessary code
m68k/math-emu: Remove commented out old code
m68k: Kill warning in setup_arch() when compiling for Sun3
m68k/atari: Prefix GPIO_{IN,OUT} with CODEC_
sparc: iounmap() and *_free_coherent() - Use lookup_resource()
m68k/atari: Reserve some ST-RAM early on for device buffer use
m68k/amiga: Chip RAM - Use lookup_resource()
resources: Add lookup_resource()
sparc: _sparc_find_resource() should check for exact matches
m68k/amiga: Chip RAM - Offset resource end by CHIP_PHYSADDR
m68k/amiga: Chip RAM - Use resource_size() to fix off-by-one error
m68k/amiga: Chip RAM - Change chipavail to an atomic_t
m68k/amiga: Chip RAM - Always allocate from the start of memory
m68k/amiga: Chip RAM - Convert from printk() to pr_*()
m68k/amiga: Chip RAM - Use tabs for indentation
These defines are way to generic, and cause conflicts:
drivers/net/wireless/rtlwifi/rtl8192c/../rtl8192ce/reg.h:369:1: warning: "GPIO_IN" redefined
drivers/net/wireless/rtlwifi/rtl8192c/../rtl8192ce/reg.h:370:1: warning: "GPIO_OUT" redefined
drivers/net/wireless/rtlwifi/rtl8192se/reg.h:252:1: warning: "GPIO_IN" redefined
drivers/net/wireless/rtlwifi/rtl8192se/reg.h:253:1: warning: "GPIO_OUT" redefined
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Based on an original patch from Michael Schmitz:
Because mem_init() is now called before device init, devices that rely on
ST-RAM may find all ST-RAM already allocated to other users by the time
device init happens. In particular, a large initrd RAM disk may use up
enough of ST-RAM to cause atari_stram_alloc() to resort to
__get_dma_pages() allocation.
In the current state of Atari memory management, all of RAM is marked
DMA capable, so __get_dma_pages() may well return RAM that is not in actual
fact DMA capable. Using this for frame buffer or SCSI DMA buffer causes
subtle failure.
The ST-RAM allocator has been changed to allocate memory from a pool of
reserved ST-RAM of configurable size, set aside on ST-RAM init (i.e.
before mem_init()). As long as this pool is not exhausted, allocation of
real ST-RAM can be guaranteed.
Other changes:
- Replace the custom allocator in the ST-RAM pool by the existing allocator
in the resource subsystem,
- Remove mem_init_done and its hook, as memory init is now done before
device init,
- Remove /proc/stram, as ST-RAM usage now shows up under /proc/iomem, e.g.
005f2000-006f1fff : ST-RAM Pool
005f2000-0063dfff : atafb
0063e000-00641fff : ataflop
00642000-00642fff : SCSI
Signed-off-by: Michael Schmitz <schmitz@debian.org>
[Andreas Schwab <schwab@linux-m68k.org>: Use memparse()]
[Geert: Use the resource subsystem instead of a custom allocator]
Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
Greg Ungerer