mirror of https://gitee.com/openkylin/linux.git
2021 Commits
| Author | SHA1 | Message | Date |
|---|---|---|---|
Martin Blumenstingl
|
4881873f4c |
dt-bindings: reset: meson8b: fix duplicate reset IDs
According to the public S805 datasheet the RESET2 register uses the
following bits for the PIC_DC, PSC and NAND reset lines:
- PIC_DC is at bit 3 (meaning: RESET_VD_RMEM + 3)
- PSC is at bit 4 (meaning: RESET_VD_RMEM + 4)
- NAND is at bit 5 (meaning: RESET_VD_RMEM + 4)
Update the reset IDs of these three reset lines so they don't conflict
with PIC_DC and map to the actual hardware reset lines.
Fixes:
|
|
|
Linus Torvalds
|
eb275167d1 |
ARM: Device-tree updates
As always, the bulk of updates. Some of the news this cycle:
New SoC descriptions:
- Broadcom BCM2711
- Amlogic Meson A1 and G12
- Freescale S32V234
- Marvell Armada AP807/AP807-quad and CP115
- Realtek RTD1293 and RTD1296
- Rockchip RK3308
New boards and platforms:
- Allwinner: NanoPi Duo2
- Amlogic: Ugoos am6
- Atmel at91: Overkiz Kizbox2/4
- Broadcom: RPi4, Luxul XWC-2000
- Marvell: New Espressobin flavor
- NXP: i.MX8MN LPDDR4 EVK, i.MX8QXP Colibri, S32V234 EVB, Netronix
E60K02 and Kobo Clara HD, Kontron N6311 and N6411, OPOS6UL and
OPOS6ULDev
- Renesas: Salvator-XS
- Rockchip: Beelink A1 (rk3308), rk3308 eval boards, rk3399-roc-pc
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl3pQ9MPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3QEMP/3x70z+w+XIAtNSLyxZ2KYiiZA+QYjvIA0IO
6qdeTevmqT225bA8jeb9MyhfuPMqYADkMsa4yBKU3LyHs67cgc35JvTZT1lKcueC
bra5pj2kNulsLDGcinh6iSqD9DMk1NMmL2bBKbezOhOjJZMSDiljZBkl1Z6Yvope
Nfqy5kxq1Z6MktMzVj+ZP3sFYw2YXbF5TKpwGZVl4lbM8tfbGGCqTE7p0ycZO1JL
TsDw9ChCfswqLDCTJUqc6CRIIXmOwR89QxIiVZ6FabS+DbNfuTOH6UKoYfNEoOMM
SDy3x57Gh/TC/LdoQlagtxNLnzCoEOIKtro2D6Q8u9P1JbXvHgglhINnwJbMvBbe
xWouaDFNf+yL0rwHKdKzwRgALmabP7OB8pfHQ6HEyW5OkXT0DIL6HldXJ5R4rfPv
1mjUczwYELGIJKnI6Xg37pC/9mYbJxXkPNZKvJXMuF7dDBdmrUXzMJusp6QldBLb
fkLweh+qGuKnL9PehaIW+iS3zD8khUFtPHd8z/kCXD1TsTVkZTKO0TO71HL7pC/i
VJNYN7uQbaycnpNjmO7V9v2mR7eOMvm49A4TJ6mE6wDM4LUFKXrIWMs9mOqFszSj
R98nwE8WeSm35iEKtEO4vnPWJhIP3WbInQV3uglHkC3LxCWpNNuUHE4rkq1SSNDI
NX3wZRr0
=Fn8L
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM Device-tree updates from Olof Johansson:
"As always, the bulk of updates. Some of the news this cycle:
New SoC descriptions:
- Broadcom BCM2711
- Amlogic Meson A1 and G12
- Freescale S32V234
- Marvell Armada AP807/AP807-quad and CP115
- Realtek RTD1293 and RTD1296
- Rockchip RK3308
New boards and platforms:
- Allwinner: NanoPi Duo2
- Amlogic: Ugoos am6
- Atmel at91: Overkiz Kizbox2/4
- Broadcom: RPi4, Luxul XWC-2000
- Marvell: New Espressobin flavor
- NXP: i.MX8MN LPDDR4 EVK, i.MX8QXP Colibri, S32V234 EVB, Netronix
E60K02 and Kobo Clara HD, Kontron N6311 and N6411, OPOS6UL and
OPOS6ULDev
- Renesas: Salvator-XS
- Rockchip: Beelink A1 (rk3308), rk3308 eval boards, rk3399-roc-pc"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (653 commits)
ARM: dts: logicpd-torpedo: Disable USB Host
arm: dts: mt6323: add keys, power-controller, rtc and codec
arm64: dts: mt8183: add systimer0 device node
dt-bindings: mediatek: update bindings for MT8183 systimer
arm64: dts: rockchip: fix sdmmc detection on boot on rk3328-roc-cc
arm64: dts: rockchip: Split rk3399-roc-pc for with and without mezzanine board.
arm64: dts: rockchip: Add Beelink A1
dt-bindings: ARM: rockchip: Add Beelink A1
arm64: dts: rockchip: Add RK3328 audio pipelines
arm64: dts: ti: k3-j721e-common-proc-board: Add USB ports
arm64: dts: ti: k3-j721e-main: add USB controller nodes
ARM: dts: aspeed-g6: Add timer description
ARM: dts: aspeed: ast2600evb: Enable i2c buses
ARM: dts: at91: add a dts and dtsi file for kizbox2 based boards
dt-bindings: arm: at91: Document Kizbox2-2 board binding
arm64: dts: meson-gx: fix i2c compatible
arm64: dts: meson-gx: cec node should be disabled by default
arm64: dts: meson-g12b-odroid-n2: add missing amlogic, s922x compatible
arm64: dts: meson-gxm: fix gpu irq order
arm64: dts: meson-g12a: fix gpu irq order
...
|
|
|
Linus Torvalds
|
ec939e4c94 |
ARM: SoC-related driver updates
Various driver updates for platforms:
- A larger set of work on Tegra 2/3 around memory controller and
regulator features, some fuse cleanups, etc..
- MMP platform drivers, in particular for USB PHY, and other smaller
additions.
- Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
and ASV (adaptive voltage), allowing the platform to run at more
optimal operating points.
- Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas
- Clock/reset control driver for TI/OMAP
- Meson-A1 reset controller support
- Qualcomm sdm845 and sda845 SoC IDs for socinfo
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl3pORkPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3FK0P/0EG4lK+il7nE3pd9yIGUjlcYuumIjoxvyC9
9ef202POJLIO3yMlsNyGFR+aOknFO/GtGvDkDFhTtlsGCL40tVzVsyo7ZQo+8mXD
abr+H74NmRXImc+SISYR8X1CD6vEi3oi/no1y5dRzknlBikfsdSLKXJSMYBJ2A6t
DNLwu0h1IZhPk7XQQsxaElG/a9HN8eueMdP20J1IlhOh0GiOwm+rbsLSZNbA/W9m
53XhFs3Ag39SDE0BfXsS+XOWTE7FheZsZk2XQrOwYm9PnxjpIWH7FE2sYsk6uUIc
Pa1b6wB5zlRnxvVHP0m3GXhbTUJDYDK3oybHffI4Mzd0cyZQHC92LhUXFrlTxkaf
6kyhJOTdd5KMlZ2LS7jkwLqb30ieXBPKAREjdbRt6hpvu5P6G+bZQphTEeNAZC61
XnX8mQ/XeoHdoGY5MvS8ht6a1qDF29ebA0/02seicThGK6tS9Qsju6Zo0sg9H1NH
weK6jDuzLq5jpv/LB1apigrDSx+zddRzrwkwy85hR5aWOQhG0xjOoFBProbTS0to
wR46zCEkbGZv4uc0gRuIdp0NR/lguqgDWPeoLluoTqmcpKS6N3RyxD0bWzlvgDFA
fpYxVNKavHneWjfZ7U5RbYXD6jycJcuLaCOs16nrtUbMgJ9pqclLIaZXn7ZTRIuT
RW6NgfZV
=dk7w
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Olof Johansson:
"Various driver updates for platforms:
- A larger set of work on Tegra 2/3 around memory controller and
regulator features, some fuse cleanups, etc..
- MMP platform drivers, in particular for USB PHY, and other smaller
additions.
- Samsung Exynos 5422 driver for DMC (dynamic memory configuration),
and ASV (adaptive voltage), allowing the platform to run at more
optimal operating points.
- Misc refactorings and support for RZ/G2N and R8A774B1 from Renesas
- Clock/reset control driver for TI/OMAP
- Meson-A1 reset controller support
- Qualcomm sdm845 and sda845 SoC IDs for socinfo"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (150 commits)
firmware: arm_scmi: Fix doorbell ring logic for !CONFIG_64BIT
soc: fsl: add RCPM driver
dt-bindings: fsl: rcpm: Add 'little-endian' and update Chassis definition
memory: tegra: Consolidate registers definition into common header
memory: tegra: Ensure timing control debug features are disabled
memory: tegra: Introduce Tegra30 EMC driver
memory: tegra: Do not handle error from wait_for_completion_timeout()
memory: tegra: Increase handshake timeout on Tegra20
memory: tegra: Print a brief info message about EMC timings
memory: tegra: Pre-configure debug register on Tegra20
memory: tegra: Include io.h instead of iopoll.h
memory: tegra: Adapt for Tegra20 clock driver changes
memory: tegra: Don't set EMC rate to maximum on probe for Tegra20
memory: tegra: Add gr2d and gr3d to DRM IOMMU group
memory: tegra: Set DMA mask based on supported address bits
soc: at91: Add Atmel SFR SN (Serial Number) support
memory: atmel-ebi: switch to SPDX license identifiers
memory: atmel-ebi: move NUM_CS definition inside EBI driver
soc: mediatek: Refactor bus protection control
soc: mediatek: Refactor sram control
...
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Linus Torvalds
|
a5255bc316 |
dmaengine updates for v5.5-rc1
- New drivers for SiFive PDMA, Socionext Milbeaut HDMAC and XDMAC,
Freescale dpaa2 qDMA
- Support for X1000 in JZ4780
- Xilinx dma updates and support for Xilinx AXI MCDM controller
- New bindings for rcar R8A774B1
- Minor updates to dw, dma-jz4780, ti-edma, sprd drivers
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE+vs47OPLdNbVcHzyfBQHDyUjg0cFAl3gqOEACgkQfBQHDyUj
g0fD5A//cXMPYTZvVtuEIEMfaN6wGexJVQFuRpvHfFyGw8dHijKB/zySne8xPM8E
WuWwI9cpn29AgEa5ZR8wUHgNupA1w9owuuGWAtdVf9qKqg2iqyQDfm3768LQ9DAa
V+Fi68g0uou/NIS58cGAqqDvBFc6Gd7VCjkxvcUSq7r0diWAN2CH16332Oyzqb99
PPvvGwnsryTcrOyPilKhyLPaCCNfFqBke4FLFLK6hAv3fZAs2uOTDESjgwTaLxon
dkZY5L7HqOa1jMkuCxLUt9YH5QvTmjspRHY8ck9zgeNDql6y+qPkS9ifj48+mMIu
jy1KroOcLwMXE/eFrBH4NHFA6wTXyGhJY7i7zVLLjHTgivQ6IVF/6FG9jCvSLgRf
UgGgRQ6qKlKPkNHLT0GwkAR/oVEBb7Z2ff0AXQXq2cudF85Uuccahj/uocjZrEg5
v/yZ6X/jZy5MeDsG41Af2sSS8rLP/F2GAr9voo6/yhklzaRPRR4AL8e33PYeCW94
pU2DlXtkdotFpv9fLlxpKotGYAZ3VWX8darKOF0uRmJX8QSxjLRS4Br558NIhX+I
4kizRHqJrihwjb/fLdVNKi+X+VdwVNjzWNmuADdksT00QUOdbked5a3vHBqX3gkR
ztRiv0Qw8oOVJSCItLMLto3ckVUGav7HmeX4/pea2h9sxhkn/nk=
=bDMV
-----END PGP SIGNATURE-----
Merge tag 'dmaengine-5.5-rc1' of git://git.infradead.org/users/vkoul/slave-dma
Pull dmaengine updates from Vinod Koul:
"Here are the changes this time around, couple of new drivers and
updates to few more:
- New drivers for SiFive PDMA, Socionext Milbeaut HDMAC and XDMAC,
Freescale dpaa2 qDMA
- Support for X1000 in JZ4780
- Xilinx dma updates and support for Xilinx AXI MCDM controller
- New bindings for rcar R8A774B1
- Minor updates to dw, dma-jz4780, ti-edma, sprd drivers"
* tag 'dmaengine-5.5-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (61 commits)
dmaengine: Fix Kconfig indentation
dmaengine: sf-pdma: move macro to header file
dmaengine: sf-pdma: replace /** with /* for non-function comment
dmaengine: ti: edma: fix missed failure handling
dmaengine: mmp_pdma: add missed of_dma_controller_free
dmaengine: mmp_tdma: add missed of_dma_controller_free
dmaengine: sprd: Add wrap address support for link-list mode
MAINTAINERS: Add Green as SiFive PDMA driver maintainer
dmaengine: sf-pdma: add platform DMA support for HiFive Unleashed A00
dt-bindings: dmaengine: sf-pdma: add bindins for SiFive PDMA
dmaengine: zx: remove: removed dmam_pool_destroy
dmaengine: mediatek: hsdma_probe: fixed a memory leak when devm_request_irq fails
dmaengine: iop-adma: clean up an indentation issue
dmaengine: milbeaut-xdmac: remove redundant error log
dmaengine: milbeaut-hdmac: remove redundant error log
dmaengine: dma-jz4780: add missed clk_disable_unprepare in remove
dmaengine: JZ4780: Add support for the X1000.
dt-bindings: dmaengine: Add X1000 bindings.
dmaengine: xilinx_dma: Add Xilinx AXI MCDMA Engine driver support
dmaengine: xilinx_dma: Extend dma_config struct to store irq routine handle
...
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Linus Torvalds
|
ddebe839c6 |
This merge window we have one small clk provider API in the core framework and
then a bunch of driver updates and a handful of new drivers. In terms of
diffstat the Qualcomm and Amlogic drivers are high up there because of all the
clk data introcued by new drivers. The Nvidia Tegra driver had a lot of work
done this cycle too to support suspend/resume and memory controllers. And the
OMAP clk driver got proper clk and reset handling in place.
Rounding out the patches are various updates to remove unused data, mark things
static, correct incorrect data in drivers, etc. All the little things that
improve drivers and maintain code health. I will point out that there's a patch
in here for the GPIO clk driver, that almost nobody uses, which changes
behavior and causes clk_set_rate() to try to change the GPIO gate clk's parent.
Other than that things are fairly well SoC specific here.
Core:
- Add a clk provider API to get current parent index
- Plug a memory leak in clk_unregister() path
New Drivers:
- CGU in Ingenix X1000
- Bitmain BM1880 clks
- Qualcomm MSM8998 GPU clk controllers
- Qualcomm SC7180 GCC and RPMH clk controllers
- Qualcomm QCS404 Q6SSTOP clk controllers
- Add support for the Renesas R-Car M3-W+ (r8a77961) SoC
- Add support for the Renesas RZ/G2N (r8a774b1) SoC
- Add Tegra20/30 External Memory Clock (EMC) support
Updates:
- Make gpio gate clks propagate rate setting up to parent
- Prepare Armada 3700 for suspend to RAM by moving PCIe suspend/resume priority
- Drop unused variables, enums, etc. in various clk drivers
- Convert various drivers to use devm_platform_ioremap_resource()
- Use struct_size() some more in various clk drivers
- Improve Rockchip px30 clk tree
- Add suspend/resume support to Tegra210 clk driver
- Reimplement SOR clks on earlier Tegra SoCs, helping HDMI and DP
- Allwinner DT exports and H6 clk tree fixes
- Proper clk and reset handling for OMAP SoCs
- Revamped TI divider clk to clamp max divider
- Make 1443X/1416X PLL clock structure common for reusing among i.MX8 SoCs
- Drop IMX7ULP_CLK_MIPI_PLL clock, it shouldn't be used
- Add VIDEO2_PLL clock for imx8mq
- Add missing gate clock for pll1/2 fixed dividers on i.MX8 SoCs
- Add sm1 support in the Amlogic audio clock controller
- Switch some clocks on R-Car Gen2/3 to .determine_rate()
- Remove Renesas R-Car Gen2 legacy DT clock support
- Improve arithmetic divisions on Renesas R-Car Gen2 and Gen3
- Improve Renesas R-Car Gen3 SD clock handling
- Add rate table for Samsung exynos542x GPU and VPLL clks
- Fix potential CPU performance degradation after system suspend/resume cycle
on exynos542x SoCs
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAl3e6rMRHHNib3lkQGtl
cm5lbC5vcmcACgkQrQKIl8bklSUtWQ//a3epm5t5lQHZjhDJFLYXqavzkGTLcDnF
2+HWNwxLGatvmFqvLAxpB9QlFUntLOdQwjsI47UGKLVNwtXzqafl2yQGrMNYsdR+
6ka0zkytPRuRr+C6cUYUxaoLviDMKi/PXrluOawXbdQ1ZL/5TgURkmEgGglp4Mti
QHp2HO7uSk9pYA8T3TUK+hd9cqLXqW4xMn8MohuWfF3JxoquixOg+N7pE/OeGUyW
NueWWvwKJ86Gtx+OxY8bW3afAzstUynxCUDLC/t7a5y52jxGCwuhHTC/pNcDgYFC
z1H0rnoKG3pE74mm11Mh//zneoqvyzrWYGU6TNcaTxVgODogklGYY6doRLelZ0qc
4HFSqrtkUtx+lI++9Q73LcX5xdogTGxOnNv/hr3rCCR/w9tFmys14JKnfUDQCbhj
qRTFlr9IkIkhfCiRw5+zNo0oRf/hE7IOgYdU2ju31j4w/V5r8TUKPTq2VBh2sJaG
MJKQclaIBJOV5sxgJrI/XoocTes7H3WR0w5rSB1askbhzQnKkrhctPOEB6Rkvtyv
27z5VZb1AmPdYaa6TtHVZ5SQOB3Y9JaEl6t89X61kxk7mgylZlwhASUuBVRZpz53
WIjNfquYGpWnA+vc+SWnlMnaymqtlatGig8k8atdDn+eMiXphktL+gObIF1OFnm1
AhGhUxXf/Aw=
=qJNg
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"This merge window we have one small clk provider API in the core
framework and then a bunch of driver updates and a handful of new
drivers. In terms of diffstat the Qualcomm and Amlogic drivers are
high up there because of all the clk data introcued by new drivers.
The Nvidia Tegra driver had a lot of work done this cycle too to
support suspend/resume and memory controllers. And the OMAP clk driver
got proper clk and reset handling in place.
Rounding out the patches are various updates to remove unused data,
mark things static, correct incorrect data in drivers, etc. All the
little things that improve drivers and maintain code health. I will
point out that there's a patch in here for the GPIO clk driver, that
almost nobody uses, which changes behavior and causes clk_set_rate()
to try to change the GPIO gate clk's parent. Other than that things
are fairly well SoC specific here.
Core:
- Add a clk provider API to get current parent index
- Plug a memory leak in clk_unregister() path
New Drivers:
- CGU in Ingenix X1000
- Bitmain BM1880 clks
- Qualcomm MSM8998 GPU clk controllers
- Qualcomm SC7180 GCC and RPMH clk controllers
- Qualcomm QCS404 Q6SSTOP clk controllers
- Add support for the Renesas R-Car M3-W+ (r8a77961) SoC
- Add support for the Renesas RZ/G2N (r8a774b1) SoC
- Add Tegra20/30 External Memory Clock (EMC) support
Updates:
- Make gpio gate clks propagate rate setting up to parent
- Prepare Armada 3700 for suspend to RAM by moving PCIe
suspend/resume priority
- Drop unused variables, enums, etc. in various clk drivers
- Convert various drivers to use devm_platform_ioremap_resource()
- Use struct_size() some more in various clk drivers
- Improve Rockchip px30 clk tree
- Add suspend/resume support to Tegra210 clk driver
- Reimplement SOR clks on earlier Tegra SoCs, helping HDMI and DP
- Allwinner DT exports and H6 clk tree fixes
- Proper clk and reset handling for OMAP SoCs
- Revamped TI divider clk to clamp max divider
- Make 1443X/1416X PLL clock structure common for reusing among i.MX8
SoCs
- Drop IMX7ULP_CLK_MIPI_PLL clock, it shouldn't be used
- Add VIDEO2_PLL clock for imx8mq
- Add missing gate clock for pll1/2 fixed dividers on i.MX8 SoCs
- Add sm1 support in the Amlogic audio clock controller
- Switch some clocks on R-Car Gen2/3 to .determine_rate()
- Remove Renesas R-Car Gen2 legacy DT clock support
- Improve arithmetic divisions on Renesas R-Car Gen2 and Gen3
- Improve Renesas R-Car Gen3 SD clock handling
- Add rate table for Samsung exynos542x GPU and VPLL clks
- Fix potential CPU performance degradation after system
suspend/resume cycle on exynos542x SoCs"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (160 commits)
clk: aspeed: Add RMII RCLK gates for both AST2500 MACs
MAINTAINERS: Add entry for BM1880 SoC clock driver
clk: Add common clock driver for BM1880 SoC
dt-bindings: clock: Add devicetree binding for BM1880 SoC
clk: Add clk_hw_unregister_composite helper function definition
clk: Zero init clk_init_data in helpers
clk: ingenic: Allow drivers to be built with COMPILE_TEST
MAINTAINERS: Update section for Ux500 clock drivers
clk: mark clk_disable_unused() as __init
clk: Fix memory leak in clk_unregister()
clk: Ingenic: Add CGU driver for X1000.
dt-bindings: clock: Add X1000 bindings.
clk: tegra: Use match_string() helper to simplify the code
clk: pxa: fix one of the pxa RTC clocks
clk: sprd: Use IS_ERR() to validate the return value of syscon_regmap_lookup_by_phandle()
clk: armada-xp: remove unused code
clk: tegra: Fix build error without CONFIG_PM_SLEEP
clk: tegra: Add missing stubs for the case of !CONFIG_PM_SLEEP
clk: tegra: Optimize PLLX restore on Tegra20/30
clk: tegra: Add suspend and resume support on Tegra210
...
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|
|
Linus Torvalds
|
0dd09bc02c |
Staging / IIO patches for 5.5-rc1
Here is the big staging and iio set of patches for the 5.5-rc1 release. It's the usual huge collection of cleanup patches all over the drivers/staging/ area, along with a new staging driver, and a bunch of new IIO drivers as well. Full details are in the shortlog, but all of these have been in linux-next for a long time with no reported issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXd6lVQ8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ylFnwCgyvZ62uUyQTRey0zvNTe3I4fY9L4AnAnrz3ZC U6ZA2+Uj3O6qhAr5frRu =uv8S -----END PGP SIGNATURE----- Merge tag 'staging-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging Pull staging / iio updates from Greg KH: "Here is the big staging and iio set of patches for the 5.5-rc1 release. It's the usual huge collection of cleanup patches all over the drivers/staging/ area, along with a new staging driver, and a bunch of new IIO drivers as well. Full details are in the shortlog, but all of these have been in linux-next for a long time with no reported issues" * tag 'staging-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (548 commits) staging: vchiq: Have vchiq_dump_* functions return an error code staging: vchiq: Refactor indentation in vchiq_dump_* functions staging: fwserial: Fix Kconfig indentation (seven spaces) staging: vchiq_dump: Replace min with min_t staging: vchiq: Fix block comment format in vchiq_dump() staging: octeon: indent with tabs instead of spaces staging: comedi: usbduxfast: usbduxfast_ai_cmdtest rounding error staging: most: core: remove sysfs attr remove_link staging: vc04: Fix Kconfig indentation staging: pi433: Fix Kconfig indentation staging: nvec: Fix Kconfig indentation staging: most: Fix Kconfig indentation staging: fwserial: Fix Kconfig indentation staging: fbtft: Fix Kconfig indentation fbtft: Drop OF dependency fbtft: Make use of device property API fbtft: Drop useless #ifdef CONFIG_OF and dead code fbtft: Describe function parameters in kernel-doc fbtft: Make sure string is NULL terminated staging: rtl8723bs: remove set but not used variable 'change', 'pos' ... |
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Linus Torvalds
|
8f56e4ebe0 |
Char/Misc driver patches for 5.5-rc1
Here is the big set of char/misc and other driver patches for 5.5-rc1 Loads of different things in here, this feels like the catch-all of driver subsystems these days. Full details are in the shortlog, but nothing major overall, just lots of driver updates and additions. All of these have been in linux-next for a while with no reported issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXd6ewA8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ymNXACfebVkDrFOH9EqDgFArPvZ1i9EmZ4AoLbE1Wki ftJApk+Ov1BT2TvClOza =cXqg -----END PGP SIGNATURE----- Merge tag 'char-misc-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver updates from Greg KH: "Here is the big set of char/misc and other driver patches for 5.5-rc1 Loads of different things in here, this feels like the catch-all of driver subsystems these days. Full details are in the shortlog, but nothing major overall, just lots of driver updates and additions. All of these have been in linux-next for a while with no reported issues" * tag 'char-misc-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (198 commits) char: Fix Kconfig indentation, continued habanalabs: add more protection of device during reset habanalabs: flush EQ workers in hard reset habanalabs: make the reset code more consistent habanalabs: expose reset counters via existing INFO IOCTL habanalabs: make code more concise habanalabs: use defines for F/W files habanalabs: remove prints on successful device initialization habanalabs: remove unnecessary checks habanalabs: invalidate MMU cache only once habanalabs: skip VA block list update in reset flow habanalabs: optimize MMU unmap habanalabs: prevent read/write from/to the device during hard reset habanalabs: split MMU properties to PCI/DRAM habanalabs: re-factor MMU masks and documentation habanalabs: type specific MMU cache invalidation habanalabs: re-factor memory module code habanalabs: export uapi defines to user-space habanalabs: don't print error when queues are full habanalabs: increase max jobs number to 512 ... |
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Linus Torvalds
|
dc5fa46568 |
This is the bulk of pin control changes for the v5.5 kernel
series:
Core changes:
- Avoid taking direct references to device tree-supplied
device names: these may changed at runtime under certain
circumstances to kstrdup them.
GPIO related:
- Work is ongoing to move to passing the irqchip along as a
templated struct gpio_irq_chip when adding a standard
gpiolib-based irqchip to a GPIO controller, a few patches
in this cycle switches a few pin control drivers over to
using this method.
New hardware support:
- Intel Lightning Mountain SoC pin controller and GPIO
support, a first Intel platform to use device tree rather
than ACPI to configure the system. News reports says that
this SoC is a network processor.
- Qualcomm MSM8976 and MSM8956
- Qualcomm PMIC GPIO now also supports PM6150 and PM6150L
- Qualcomm SPMI MPP and SPMI GPIO for PM8950 and PMI8950
- Rockchip RK3308
- Renesas R8A77961
- Allwinner Meson-A1
Driver improvements:
- get_multiple and set_multiple support for the AT91-PIO4 driver.
- Convert Qualcomm SSBI GPIO to use the hierarchical IRQ helpers
in the GPIOlib irqchip.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAl3dPAMACgkQQRCzN7AZ
XXOckA/+K8++XpN15+DR3tWD6QOKU1pXH9Mam/41yDi5eHJZ8TOTZA9V3rXvy53e
6QYj0OOXnbLm0UhcbJRA2lOPFLHlaK3aZExfQcNT4U/qklZxyteJ8fxNFDzADqAd
7FrrdrWBW8bJw4GwGeV0jwjJENUAQ2WJ3W9rHX3WDoABIMEqxBmZtPmcK+HpnZFW
P6Gt0kMDS70IE4W+2IzXhpKWE41IwH6WV8QqOnCN1aIwmI9KhsFJ3WlbiowcRZoS
yyDgLryt5gEvSIZNzG0rnOC+Mn21gQn3KyuQdGalm4OfW2TT7IuPXJF/ZT502lGv
ypIhdjxwSIn4OxexS80j5HG8p/RNP2qjK3z8WBwh+IVUepPSV89kuk1lzH66B8VO
FXnH+lhd1WJTttBkcjHOO/pkK09WTO1MOyu+iYXZQ/cYJADCHL/KHvK30unuvrL4
J/npJbOzxzbxor/132hrjJCFo9VHDViInWrt4lC2MaBi3gBcsgukROBYIqCBHO7T
UtdemwB056sYr3WtwAsJ5GsBkFhhFmWUBf5i/hWGFT3vcop55Lnlo4HZ5ipSxjIc
1NAuymO/xyH6uDhQhfN7h7Dxc8fLYmslvOyiCROVxBBnzP0Am3UAb/fL7RXztHle
v1E4786GH/IGL6Q1q2U2NTNfAm2CPdB/yF2pN1DluIM+U1spAKU=
=uPLY
-----END PGP SIGNATURE-----
Merge tag 'pinctrl-v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for v5.5.
It is pretty much business as usual, the most interesting thing I
think is the pin controller for a new Intel chip called Lightning
Mountain, which is according to news reports some kind of embedded
network processor and what is surprising about it is that Intel have
decided to use device tree to describe the system rather than ACPI
that they have traditionally favored.
Core changes:
- Avoid taking direct references to device tree-supplied device
names: these may changed at runtime under certain circumstances to
kstrdup them.
GPIO related:
- Work is ongoing to move to passing the irqchip along as a templated
struct gpio_irq_chip when adding a standard gpiolib-based irqchip
to a GPIO controller, a few patches in this cycle switches a few
pin control drivers over to using this method.
New hardware support:
- Intel Lightning Mountain SoC pin controller and GPIO support, a
first Intel platform to use device tree rather than ACPI to
configure the system. News reports says that this SoC is a network
processor.
- Qualcomm MSM8976 and MSM8956
- Qualcomm PMIC GPIO now also supports PM6150 and PM6150L
- Qualcomm SPMI MPP and SPMI GPIO for PM8950 and PMI8950
- Rockchip RK3308
- Renesas R8A77961
- Allwinner Meson-A1
Driver improvements:
- get_multiple and set_multiple support for the AT91-PIO4 driver.
- Convert Qualcomm SSBI GPIO to use the hierarchical IRQ helpers in
the GPIOlib irqchip"
* tag 'pinctrl-v5.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (93 commits)
pinctrl: ingenic: Add OTG VBUS pin for the JZ4770
pinctrl: ingenic: Handle PIN_CONFIG_OUTPUT config
pinctrl: Fix Kconfig indentation
pinctrl: lewisburg: Update pin list according to v1.1v6
MAINTAINERS: Replace my email by one @kernel.org
pinctrl: armada-37xx: Fix irq mask access in armada_37xx_irq_set_type()
dt-bindings: pinctrl: intel: Add for new SoC
pinctrl: Add pinmux & GPIO controller driver for a new SoC
pinctrl: rza1: remove unnecessary static inline function
pinctrl: meson: add pinctrl driver support for Meson-A1 SoC
pinctrl: meson: add a new callback for SoCs fixup
pinctrl: nomadik: db8500: Add mc0_a_2 pin group without direction control
dt-bindings: pinctrl: Convert generic pin mux and config properties to schema
pinctrl: cherryview: Missed type change to unsigned int
pinctrl: intel: Missed type change to unsigned int
pinctrl: use devm_platform_ioremap_resource() to simplify code
pinctrl: just return if no valid maps
dt-bindings: pinctrl: qcom-pmic-mpp: Add support for PM/PMI8950
pinctrl: qcom: spmi-mpp: Add PM/PMI8950 compatible strings
dt-bindings: pinctrl: qcom-pmic-gpio: Add support for PM/PMI8950
...
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Stephen Boyd
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ec16ffe36d |
Merge branches 'clk-ingenic', 'clk-init-leak', 'clk-ux500' and 'clk-bitmain' into clk-next
- Support CGU in Ingenix X1000 - Support Bitmain BM1880 clks * clk-ingenic: clk: ingenic: Allow drivers to be built with COMPILE_TEST clk: Ingenic: Add CGU driver for X1000. dt-bindings: clock: Add X1000 bindings. * clk-init-leak: clk: mark clk_disable_unused() as __init clk: Fix memory leak in clk_unregister() * clk-ux500: MAINTAINERS: Update section for Ux500 clock drivers * clk-bitmain: MAINTAINERS: Add entry for BM1880 SoC clock driver clk: Add common clock driver for BM1880 SoC dt-bindings: clock: Add devicetree binding for BM1880 SoC clk: Add clk_hw_unregister_composite helper function definition clk: Zero init clk_init_data in helpers |
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Stephen Boyd
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dabedfede3 |
Merge branches 'clk-gpio-flags', 'clk-tegra', 'clk-rockchip', 'clk-sprd' and 'clk-pxa' into clk-next
- Make gpio gate clks propagate rate setting up to parent * clk-gpio-flags: clk: clk-gpio: propagate rate change to parent * clk-tegra: (23 commits) clk: tegra: Use match_string() helper to simplify the code clk: tegra: Fix build error without CONFIG_PM_SLEEP clk: tegra: Add missing stubs for the case of !CONFIG_PM_SLEEP clk: tegra: Optimize PLLX restore on Tegra20/30 clk: tegra: Add suspend and resume support on Tegra210 clk: tegra: Share clk and rst register defines with Tegra clock driver clk: tegra: Use fence_udelay() during PLLU init clk: tegra: clk-dfll: Add suspend and resume support clk: tegra: clk-super: Add restore-context support clk: tegra: clk-super: Fix to enable PLLP branches to CPU clk: tegra: periph: Add restore_context support clk: tegra: Support for OSC context save and restore clk: tegra: pll: Save and restore pll context clk: tegra: pllout: Save and restore pllout context clk: tegra: divider: Save and restore divider rate clk: tegra: Reimplement SOR clocks on Tegra210 clk: tegra: Reimplement SOR clock on Tegra124 clk: tegra: Rename sor0_lvds to sor0_out clk: tegra: Move SOR0 implementation to Tegra124 clk: tegra: Remove last remains of TEGRA210_CLK_SOR1_SRC ... * clk-rockchip: clk: rockchip: protect the pclk_usb_grf as critical on px30 clk: rockchip: add video-related niu clocks as critical on px30 clk: rockchip: move px30 critical clocks to correct clock controller clk: rockchip: Add div50 clocks for px30 sdmmc, emmc, sdio and nandc clk: rockchip: Add div50 clock-ids for sdmmc on px30 and nandc clk: rockchip: make clk_half_divider_ops static * clk-sprd: clk: sprd: Use IS_ERR() to validate the return value of syscon_regmap_lookup_by_phandle() * clk-pxa: clk: pxa: fix one of the pxa RTC clocks |
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Stephen Boyd
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6df24d0c2f |
Merge branches 'clk-ti', 'clk-allwinner', 'clk-qcom', 'clk-sa' and 'clk-aspeed' into clk-next
- Qualcomm MSM8998 GPU clk controllers - Qualcomm SC7180 GCC and RPMH clk controllers - Qualcomm QCS404 Q6SSTOP clk controllers - Use struct_size() some more in various clk drivers * clk-ti: clk/ti/adpll: allocate room for terminating null ARM: dts: omap3: fix DPLL4 M4 divider max value clk: ti: divider: convert to use min,max,mask instead of width clk: ti: divider: cleanup ti_clk_parse_divider_data API clk: ti: divider: cleanup _register_divider and ti_clk_get_div_table clk: ti: am43xx: drop idlest polling from gfx clock clk: ti: am33xx: drop idlest polling from gfx clock clk: ti: am33xx: drop idlest polling from pruss clkctrl clock clk: ti: am43xx: drop idlest polling from pruss clkctrl clock clk: ti: omap5: Drop idlest polling from IPU & DSP clkctrl clocks clk: ti: omap4: Drop idlest polling from IPU & DSP clkctrl clocks clk: ti: dra7xx: Drop idlest polling from IPU & DSP clkctrl clocks clk: ti: omap5: add IVA subsystem clkctrl data dt-bindings: clk: add omap5 iva clkctrl definitions clk: ti: clkctrl: add new exported API for checking standby info clk: ti: clkctrl: convert to use bit helper macros instead of bitops clk: ti: clkctrl: fix setting up clkctrl clocks * clk-allwinner: clk: sunxi-ng: h3: Export MBUS clock clk: sunxi-ng: h6: Allow GPU to change parent rate clk: sunxi-ng: h6: Use sigma-delta modulation for audio PLL * clk-qcom: clk: qcom: rpmh: Reuse sdm845 clks for sm8150 clk: qcom: Add MSM8998 GPU Clock Controller (GPUCC) driver clk: qcom: Allow constant ratio freq tables for rcg clk: qcom: smd: Add missing pnoc clock clk: qcom: Enumerate clocks and reset needed to boot the 8998 modem clk: qcom: clk-rpmh: Add support for RPMHCC for SC7180 dt-bindings: clock: Introduce RPMHCC bindings for SC7180 dt-bindings: clock: Add YAML schemas for the QCOM RPMHCC clock bindings clk: qcom: Add Global Clock controller (GCC) driver for SC7180 dt-bindings: clock: Add sc7180 GCC clock binding dt-bindings: clock: Add YAML schemas for the QCOM GCC clock bindings clk: qcom: common: Return NULL from clk_hw OF provider clk: qcom: rcg: update the DFS macro for RCG clk: qcom: remove unneeded semicolon clk: qcom: Add Q6SSTOP clock controller for QCS404 dt-bindings: clock: qcom: Add QCOM Q6SSTOP clock controller bindings * clk-sa: drivers/clk: convert VL struct to struct_size * clk-aspeed: clk: aspeed: Add RMII RCLK gates for both AST2500 MACs clk: ast2600: Add RMII RCLK gates for all four MACs dt-bindings: clock: Add AST2600 RMII RCLK gate definitions dt-bindings: clock: Add AST2500 RMII RCLK definitions |
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Stephen Boyd
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74ca928886 |
Merge branches 'clk-hisi', 'clk-amlogic', 'clk-samsung', 'clk-renesas' and 'clk-imx' into clk-next
* clk-hisi: clk: hi6220: use CLK_OF_DECLARE_DRIVER * clk-amlogic: clk: meson: axg-audio: use devm_platform_ioremap_resource() to simplify code clk: meson: axg_audio: add sm1 support clk: meson: axg-audio: provide clk top signal name clk: meson: axg-audio: prepare sm1 addition clk: meson: axg-audio: fix regmap last register clk: meson: axg-audio: remove useless defines dt-bindings: clock: meson: add sm1 resets to the axg-audio controller dt-bindings: clk: axg-audio: add sm1 bindings clk: meson: g12a: set CLK_MUX_ROUND_CLOSEST on the cpu clock muxes clk: meson: g12a: fix cpu clock rate setting clk: meson: gxbb: let sar_adc_clk_div set the parent clock rate * clk-samsung: clk: samsung: exynos5420: Add SET_RATE_PARENT flag to clocks on G3D path clk: samsung: exynos5420: Preserve CPU clocks configuration during suspend/resume clk: samsung: exynos5420: Add VPLL rate table clk: samsung: exynos5420: Preserve PLL configuration during suspend/resume clk: samsung: exynos542x: Move G3D subsystem clocks to its sub-CMU clk: samsung: exynos5433: Fix error paths * clk-renesas: (23 commits) clk: renesas: r8a7796: Add R8A77961 CPG/MSSR support clk: renesas: Rename CLK_R8A7796 to CLK_R8A77960 dt-bindings: clock: renesas: cpg-mssr: Document r8a77961 support clk: renesas: r8a77965: Remove superfluous semicolon dt-bindings: clock: renesas: rcar-usb2-clock-sel: Fix typo in example dt-bindings: clock: renesas: Remove R-Car Gen2 legacy DT bindings dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions dt-bindings: power: Add r8a77961 SYSC power domain definitions clk: renesas: rcar-gen3: Switch SD clocks to .determine_rate() clk: renesas: rcar-gen3: Switch Z clocks to .determine_rate() clk: renesas: rcar-gen2: Switch Z clock to .determine_rate() clk: renesas: r8a774b1: Add TMU clock clk: renesas: cpg-mssr: Add r8a774b1 support dt-bindings: clock: renesas: cpg-mssr: Document r8a774b1 binding clk: renesas: rcar-gen3: Loop to find best rate in cpg_sd_clock_round_rate() clk: renesas: rcar-gen3: Absorb cpg_sd_clock_calc_div() clk: renesas: rcar-gen3: Avoid double table iteration in SD .set_rate() clk: renesas: rcar-gen3: Improve arithmetic divisions clk: renesas: rcar-gen2: Improve arithmetic divisions clk: renesas: Remove R-Car Gen2 legacy DT clock support ... * clk-imx: clk: imx: imx8mq: fix sys3_pll_out_sels clk: imx7ulp: do not export out IMX7ULP_CLK_MIPI_PLL clock clk: imx: imx6ul: use imx_obtain_fixed_clk_hw to simplify code clk: imx: imx6sx: use imx_obtain_fixed_clk_hw to simplify code clk: imx: imx6sll: use imx_obtain_fixed_clk_hw to simplify code clk: imx: imx7d: use imx_obtain_fixed_clk_hw to simplify code clk: imx7ulp: Correct DDR clock mux options clk: imx7ulp: Correct system clock source option #7 clk: imx: imx8mq: mark sys1/2_pll as fixed clock clk: imx: imx8mn: mark sys_pll1/2 as fixed clock clk: imx: imx8mm: mark sys_pll1/2 as fixed clock clk: imx8mn: Define gates for pll1/2 fixed dividers clk: imx8mm: Define gates for pll1/2 fixed dividers clk: imx8mq: Define gates for pll1/2 fixed dividers clk: imx: clk-pll14xx: Make two variables static clk: imx8mq: Add VIDEO2_PLL clock clk: imx8mn: Use common 1443X/1416X PLL clock structure clk: imx8mm: Move 1443X/1416X PLL clock structure to common place clk: imx: pll14xx: Fix quick switch of S/K parameter |
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Linus Torvalds
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3f1b210a7f |
sound updates for 5.5-rc1
There have been some significant changes in the core side, both for
ALSA and ASoC, while lots of development have been seen in SOF, as
well as many small fixes/improvements for ASoC codecs and platforms.
Below is a highlight in this cycle:
Core:
- The unification of PCM vmalloc buffer allocation helpers into the
standard API
- Clean up of the default PCM mmap handling for vmalloc & SG-buffer
- Fix potential races at ALSA timer open
- A few new PCM API extensions; just preliminary core changes, the
actual changes in drivers will be merged in 5.6
- Continued ASoC componentization works; now almost everything is a
common ASoC component object. A lot of refactoring and
simplification have been done along with it.
ASoC:
- Many fixes to the Sound Open Firmware (SOF) code
- Wake on voice support for Chromebooks
- SPI support and trigger word detection for RT5677
- New drivers for Analog Devices ADAU7118, Intel Cannonlake systems
with RT1011 and RT5682, Texas Instruments TAS2562 and TAS2770
HD-audio:
- Improved Intel DSP configuration / probe code for SOF
- Plumbing the legacy HD-audio driver with Intel SOF HDMI
- DP-MST support for Nvidia HDMI codecs
- Realtek quirks cleanups and new additions as usual
Others:
- Lots of refactoring and cleanups for FireWire; period-size sharing,
h/w IRQ interval configuration, clock recovery improvements, etc
- USB-audio: Scarlett mixer quirks
- Cleanups of PCM calls in various drivers (including media and USB)
to adapt the core API changes
-----BEGIN PGP SIGNATURE-----
iQJCBAABCAAsFiEEIXTw5fNLNI7mMiVaLtJE4w1nLE8FAl3cAmcOHHRpd2FpQHN1
c2UuZGUACgkQLtJE4w1nLE9UXxAAnybNeJRjvq5jCXIdASNjT7L1GdvEpjsYaqis
LGibFi8ekJmbs6PH8ALn5aRaaZgM9EONIU/BJ3ItlsX96OZ/o+PT5QBy67osF39K
zgS0z37puptznj4wy5+istfn7aYuCCSobN9K/3xSS/yX5ibvneBr2d88gKa/u7mn
ubKKR8r+asBXLyKEHYhtif8IXN7lttYQgIiVGSTGe8a8V0C1VU2VQOFbCVAv2guv
tg7PYzaQYa/37XLKgdRIovvJGC6r498/aI3aA7dSttUuAlZge6HT9iD/TDhChvmA
OGyfnH7SViRtp8zlDfCyiwi2vlXSFHrkFYRQaf7Ov4uhAUPlQhehyEAs5SCl3zOB
Z9BSGYyiyzUCwoy6nnxzsjA+6CSaVx7ceW33Zc64wie4CsvmaWT+QssJ3IQkB+WF
VQTM0gnzaEKF1yR7jeTFc9ndWFnnHbCRR2WWWsn/U4lxsHczdpt/RoLi+TxTm3YP
Qb4atYtydgnwFcMvIlWGh68/MzaP3yK9lh0Ckr0GsRgRgMs/nqK/gZMlvCosDMRP
Hc8j7cSACXF1EZ+dGlVa+q/qiYD9rAFQa8f8h4WB4En6yqkZ+qilk/z/A7sdb8bt
VaaoOWTK4xEiVeV23RMO74+kPZazkkju636EWTvc2zBTJ6upkaT+geUV/e4g1aSc
r/gylz8=
=xGUt
-----END PGP SIGNATURE-----
Merge tag 'sound-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound updates from Takashi Iwai:
"There have been some significant changes in the core side, both for
ALSA and ASoC, while lots of development have been seen in SOF, as
well as many small fixes/improvements for ASoC codecs and platforms.
Below is a highlight in this cycle:
Core:
- The unification of PCM vmalloc buffer allocation helpers into the
standard API
- Clean up of the default PCM mmap handling for vmalloc & SG-buffer
- Fix potential races at ALSA timer open
- A few new PCM API extensions; just preliminary core changes, the
actual changes in drivers will be merged in 5.6
- Continued ASoC componentization works; now almost everything is a
common ASoC component object. A lot of refactoring and
simplification have been done along with it.
ASoC:
- Many fixes to the Sound Open Firmware (SOF) code
- Wake on voice support for Chromebooks
- SPI support and trigger word detection for RT5677
- New drivers for Analog Devices ADAU7118, Intel Cannonlake systems
with RT1011 and RT5682, Texas Instruments TAS2562 and TAS2770
HD-audio:
- Improved Intel DSP configuration / probe code for SOF
- Plumbing the legacy HD-audio driver with Intel SOF HDMI
- DP-MST support for Nvidia HDMI codecs
- Realtek quirks cleanups and new additions as usual
Others:
- Lots of refactoring and cleanups for FireWire; period-size sharing,
h/w IRQ interval configuration, clock recovery improvements, etc
- USB-audio: Scarlett mixer quirks
- Cleanups of PCM calls in various drivers (including media and USB)
to adapt the core API changes"
* tag 'sound-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (497 commits)
ALSA: usb-audio: Fix Focusrite Scarlett 6i6 gen1 - input handling
ALSA: hda/realtek - Enable internal speaker of ASUS UX431FLC
ALSA: aloop: Fix dependency on timer API
ASoC: DMI long name - avoid to add board name if matches with product name
ASoC: improve the DMI long card code in asoc-core
ASoC: rsnd: fix DALIGN register for SSIU
ALSA: aloop: Avoid unexpected timer event callback tasklets
ALSA: aloop: Remove redundant locking in timer open function
ASoC: component: Add sync_stop PCM ops
ASoC: pcm: Make ioctl ops optional
ALSA: hda/hdmi - Clear codec->relaxed_resume flag at unbinding
ALSA: hda - Disable audio component for legacy Nvidia HDMI codecs
ALSA: cs4236: fix error return comparison of an unsigned integer
ALSA: usb-audio: Fix NULL dereference at parsing BADD
ALSA: usb-audio: Fix Scarlett 6i6 Gen 2 port data
ALSA: hda/realtek - Enable the headset-mic on a Xiaomi's laptop
ALSA: hda/realtek - Move some alc236 pintbls to fallback table
ALSA: hda/realtek - Move some alc256 pintbls to fallback table
ALSA: docs: Update about the new PCM sync_stop ops
ALSA: pcm: Add card sync_irq field
...
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Linus Torvalds
|
9e7a03233e |
Power management updates for 5.5-rc1
- Use nanoseconds (instead of microseconds) as the unit of time in
the cpuidle core and simplify checks for disabled idle states in
the idle loop (Rafael Wysocki).
- Fix and clean up the teo cpuidle governor (Rafael Wysocki).
- Fix the cpuidle registration error code path (Zhenzhong Duan).
- Avoid excessive vmexits in the ACPI cpuidle driver (Yin Fengwei).
- Extend the idle injection infrastructure to be able to measure the
requested duration in nanoseconds and to allow an exit latency
limit for idle states to be specified (Daniel Lezcano).
- Fix cpufreq driver registration and clarify a comment in the
cpufreq core (Viresh Kumar).
- Add NULL checks to the show() and store() methods of sysfs
attributes exposed by cpufreq (Kai Shen).
- Update cpufreq drivers:
* Fix for a plain int as pointer warning from sparse in
intel_pstate (Jamal Shareef).
* Fix for a hardcoded number of CPUs and stack bloat in the
powernv driver (John Hubbard).
* Updates to the ti-cpufreq driver and DT files to support new
platforms and migrate bindings from opp-v1 to opp-v2 (Adam Ford,
H. Nikolaus Schaller).
* Merging of the arm_big_little and vexpress-spc drivers and
related cleanup (Sudeep Holla).
* Fix for imx's default speed grade value (Anson Huang).
* Minor cleanup of the s3c64xx driver (Nathan Chancellor).
* CPU speed bin detection fix for sun50i (Ondrej Jirman).
- Appoint Chanwoo Choi as the new devfreq maintainer.
- Update the devfreq core:
* Check NULL governor in available_governors_show sysfs to prevent
showing wrong governor information and fix a race condition
between devfreq_update_status() and trans_stat_show() (Leonard
Crestez).
* Add new 'interrupt-driven' flag for devfreq governors to allow
interrupt-driven governors to prevent the devfreq core from
polling devices for status (Dmitry Osipenko).
* Improve an error message in devfreq_add_device() (Matthias
Kaehlcke).
- Update devfreq drivers:
* tegra30 driver fixes and cleanups (Dmitry Osipenko).
* Removal of unused property from dt-binding documentation for
the exynos-bus driver (Kamil Konieczny).
* exynos-ppmu cleanup and DT bindings update (Lukasz Luba, Marek
Szyprowski).
- Add new CPU IDs for CometLake Mobile and Desktop to the Intel RAPL
power capping driver (Zhang Rui).
- Allow device initialization in the generic power domains (genpd)
framework to be more straightforward and clean it up (Ulf Hansson).
- Add support for adjusting OPP voltages at run time to the OPP
framework (Stephen Boyd).
- Avoid freeing memory that has never been allocated in the
hibernation core (Andy Whitcroft).
- Clean up function headers in a header file and coding style in the
wakeup IRQs handling code (Ulf Hansson, Xiaofei Tan).
- Clean up the SmartReflex adaptive voltage scaling (AVS) driver for
ARM (Ben Dooks, Geert Uytterhoeven).
- Wrap power management documentation to fit in 80 columns (Bjorn
Helgaas).
- Add pm-graph utility entry to MAINTAINERS (Todd Brandt).
- Update the cpupower utility:
* Fix the handling of set and info subcommands (Abhishek Goel).
* Fix build warnings (Nathan Chancellor).
* Improve mperf_monitor handling (Janakarajan Natarajan).
-----BEGIN PGP SIGNATURE-----
iQJGBAABCAAwFiEE4fcc61cGeeHD/fCwgsRv/nhiVHEFAl3dHGYSHHJqd0Byand5
c29ja2kubmV0AAoJEILEb/54YlRxMcgP/1bMSkxlRHFOXYSRwS4YcvkUjlBHrCSi
3qGRyYwhc+eRLqRc+2tcmQeQEeQRBqUt8etp7/9WxqS3nic/3Vdf6AFuhSpmJzo1
6JTEutHMU5eP8lwQuKoUCJncCNdIfEOkd5T35E12W/ar5PwyJio0UByZJBnJBjD/
p7/713ucq6ZH95OGncmCJ1S1UslFCZrSS2RRigDInu8gpEssnwN9zwaJbzUYrZHj
BmnKpBpT8FdLmkpbOtmmiT7q2ZGpUEHhkaO916Knf/+BFdvydTXoR90FVvXKy8Zr
QpOxaTdQB2ADifUa5zs8klVP6otmZhEO9vz8hVMUWGziqagObykQngzl8tqrKEBh
hLI8eEG1IkEBCv5ThQbLcoaRXNpwriXXfvWPTPB8s84HJxNZ09F6pXsv1SLh96qC
lj8Q5Yy2a3tlpsg4LB58XoJ54gOtlh8bWKkM0FytrFI/IP+HT4TUu/Rxgp1nDbGd
tKzLvpn4Yo2h10seeDbYk3l79mogUYj50RmwjjPn+9RwS/Df4eIpNb6ibllGZUN/
zcPZH5xlVfQRl2LKDufVN0nYSnoMZY/fU05p9XbUiJWd80LHYOb4Em1N6h/FNOyl
alDhVwlxEvc2BQwL/gjYmN6Qxc7SsPTBrSGVwjWYY+FghOYQd/wBDQqQUeM21QKg
ChOE3z/F/26r
=GJvT
-----END PGP SIGNATURE-----
Merge tag 'pm-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull power management updates from Rafael Wysocki:
"These include cpuidle changes to use nanoseconds (instead of
microseconds) as the unit of time and to simplify checks for disabled
idle states in the idle loop, some cpuidle fixes and governor updates,
assorted cpufreq updates (driver updates mostly and a few core fixes
and cleanups), devfreq updates (dominated by the tegra30 driver
changes), new CPU IDs for the RAPL power capping driver, relatively
minor updates of the generic power domains (genpd) and operation
performance points (OPP) frameworks, and assorted fixes and cleanups.
There are also two maintainer information updates: Chanwoo Choi will
be maintaining the devfreq subsystem going forward and Todd Brandt is
going to maintain the pm-graph utility (created by him).
Specifics:
- Use nanoseconds (instead of microseconds) as the unit of time in
the cpuidle core and simplify checks for disabled idle states in
the idle loop (Rafael Wysocki)
- Fix and clean up the teo cpuidle governor (Rafael Wysocki)
- Fix the cpuidle registration error code path (Zhenzhong Duan)
- Avoid excessive vmexits in the ACPI cpuidle driver (Yin Fengwei)
- Extend the idle injection infrastructure to be able to measure the
requested duration in nanoseconds and to allow an exit latency
limit for idle states to be specified (Daniel Lezcano)
- Fix cpufreq driver registration and clarify a comment in the
cpufreq core (Viresh Kumar)
- Add NULL checks to the show() and store() methods of sysfs
attributes exposed by cpufreq (Kai Shen)
- Update cpufreq drivers:
* Fix for a plain int as pointer warning from sparse in
intel_pstate (Jamal Shareef)
* Fix for a hardcoded number of CPUs and stack bloat in the
powernv driver (John Hubbard)
* Updates to the ti-cpufreq driver and DT files to support new
platforms and migrate bindings from opp-v1 to opp-v2 (Adam Ford,
H. Nikolaus Schaller)
* Merging of the arm_big_little and vexpress-spc drivers and
related cleanup (Sudeep Holla)
* Fix for imx's default speed grade value (Anson Huang)
* Minor cleanup of the s3c64xx driver (Nathan Chancellor)
* CPU speed bin detection fix for sun50i (Ondrej Jirman)
- Appoint Chanwoo Choi as the new devfreq maintainer.
- Update the devfreq core:
* Check NULL governor in available_governors_show sysfs to prevent
showing wrong governor information and fix a race condition
between devfreq_update_status() and trans_stat_show() (Leonard
Crestez)
* Add new 'interrupt-driven' flag for devfreq governors to allow
interrupt-driven governors to prevent the devfreq core from
polling devices for status (Dmitry Osipenko)
* Improve an error message in devfreq_add_device() (Matthias
Kaehlcke)
- Update devfreq drivers:
* tegra30 driver fixes and cleanups (Dmitry Osipenko)
* Removal of unused property from dt-binding documentation for the
exynos-bus driver (Kamil Konieczny)
* exynos-ppmu cleanup and DT bindings update (Lukasz Luba, Marek
Szyprowski)
- Add new CPU IDs for CometLake Mobile and Desktop to the Intel RAPL
power capping driver (Zhang Rui)
- Allow device initialization in the generic power domains (genpd)
framework to be more straightforward and clean it up (Ulf Hansson)
- Add support for adjusting OPP voltages at run time to the OPP
framework (Stephen Boyd)
- Avoid freeing memory that has never been allocated in the
hibernation core (Andy Whitcroft)
- Clean up function headers in a header file and coding style in the
wakeup IRQs handling code (Ulf Hansson, Xiaofei Tan)
- Clean up the SmartReflex adaptive voltage scaling (AVS) driver for
ARM (Ben Dooks, Geert Uytterhoeven)
- Wrap power management documentation to fit in 80 columns (Bjorn
Helgaas)
- Add pm-graph utility entry to MAINTAINERS (Todd Brandt)
- Update the cpupower utility:
* Fix the handling of set and info subcommands (Abhishek Goel)
* Fix build warnings (Nathan Chancellor)
* Improve mperf_monitor handling (Janakarajan Natarajan)"
* tag 'pm-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (83 commits)
PM: Wrap documentation to fit in 80 columns
cpuidle: Pass exit latency limit to cpuidle_use_deepest_state()
cpuidle: Allow idle injection to apply exit latency limit
cpuidle: Introduce cpuidle_driver_state_disabled() for driver quirks
cpuidle: teo: Avoid code duplication in conditionals
cpufreq: Register drivers only after CPU devices have been registered
cpuidle: teo: Avoid using "early hits" incorrectly
cpuidle: teo: Exclude cpuidle overhead from computations
PM / Domains: Convert to dev_to_genpd_safe() in genpd_syscore_switch()
mmc: tmio: Avoid boilerplate code in ->runtime_suspend()
PM / Domains: Implement the ->start() callback for genpd
PM / Domains: Introduce dev_pm_domain_start()
ARM: OMAP2+: SmartReflex: add omap_sr_pdata definition
PM / wakeirq: remove unnecessary parentheses
power: avs: smartreflex: Remove superfluous cast in debugfs_create_file() call
cpuidle: Use nanoseconds as the unit of time
PM / OPP: Support adjusting OPP voltages at runtime
PM / core: Clean up some function headers in power.h
cpufreq: Add NULL checks to show() and store() methods of cpufreq
cpufreq: intel_pstate: Fix plain int as pointer warning from sparse
...
|
|
|
Linus Torvalds
|
d873a0cd21 |
regulator: Updates for v5.5
Another fairly quiet release for the regulator API, some work all around
including some core work but mostly in specialist or driver specific
code:
- Fix for powering off boot-on regulators.
- Enhancements to the coupled regulator support introduced in the last
release.
- Conversion of a bunch of drivers to the fwnode API for GPIOs.
- Mode support for DA9062.
- New device support for Qualcomm PM1650, PM8004 and PM895 and Silergy
SR83X.
- Removal of obsolete AB8505 support.
-----BEGIN PGP SIGNATURE-----
iQFHBAABCgAxFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAl3b04ETHGJyb29uaWVA
a2VybmVsLm9yZwAKCRAk1otyXVSH0B82B/9Eto3rSo03EqkkKG3clSKPDGO9WSZG
LSLQ0lbHxsXL8cyIoOx8S/ygiyLn07SLFbLFVhkMi/JXNlPxlNMKMohY3yNffKMd
7DQgWiqeFDEyxU9bFoTR1mAWMfycNUCGFDWel2EjmnhJ0NA5hyjXzXwgoYIUWMPf
GQBMp6Qbxtl9SShNeuMNlzFdHdThAr8JNm014UVQLeg0Kx1DowMDWgCYVuHmRqDB
6VF37pNxaqPcGB/nqxJfSJULrj6brLJuQ9KFNGROxP9VPK8lt0+Aaeg3HsLq/LLe
z6q0bAJ9EVJYhAuJYrSpUgDdd5pxcshLj3rzl70kH0Ac+GWjQsqfoqTO
=jJ5N
-----END PGP SIGNATURE-----
Merge tag 'regulator-v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator
Pull regulator updates from Mark Brown:
"Another fairly quiet release for the regulator API, some work all
around including some core work but mostly in specialist or driver
specific code:
- Fix for powering off boot-on regulators
- Enhancements to the coupled regulator support introduced in the
last release
- Conversion of a bunch of drivers to the fwnode API for GPIOs
- Mode support for DA9062
- New device support for Qualcomm PM1650, PM8004 and PM895 and
Silergy SR83X
- Removal of obsolete AB8505 support"
* tag 'regulator-v5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (49 commits)
regulator: da9062: Return REGULATOR_MODE_INVALID for invalid mode
regulator: Fix Kconfig indentation
regulator: tps6105x: add optional devicetree support
tps6105x: add optional devicetree support
regulator: rn5t618: fix rc5t619 ldo10 enable
regulator: vexpress: Use PTR_ERR_OR_ZERO() to simplify code
dt-bindings: mfd: da9062: describe buck modes
regulator: da9062: add of_map_mode support for bucks
regulator: da9062: refactor buck modes into header
regulator: stpmic1: Set a default ramp delay value
regulator: core: Let boot-on regulators be powered off
regulator: core: Don't try to remove device links if add failed
regulator: ab8500: Remove SYSCLKREQ from enum ab8505_regulator_id
regulator: ab8500: Remove AB8505 USB regulator
regulator: fan53555: add chip id for Silergy SYR83X
regulator: fixed: add off-on-delay
dt-bindings: regulator: fixed: add off-on-delay-us property
regulator: core: Allow generic coupling only for always-on regulators
regulator: core: Release coupled_rdevs on regulator_init_coupling() error
regulator: bd70528: Add MODULE_ALIAS to allow module auto loading
...
|
|
|
Manivannan Sadhasivam
|
7046c6b018 |
dt-bindings: clock: Add devicetree binding for BM1880 SoC
Add YAML devicetree binding for Bitmain BM1880 SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lkml.kernel.org/r/20191115162901.17456-4-manivannan.sadhasivam@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
|
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Christoph Fritz
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7d34aec52d
|
regulator: da9062: refactor buck modes into header
This patch refactors buck modes into a header file so that device trees can make use of these mode constants. The new header filename uses da9063 because DA9063 was the earlier chip and its driver code will want updating at some point in a similar manner. Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com> Link: https://lore.kernel.org/r/1573652416-9848-2-git-send-email-chf.fritz@googlemail.com Signed-off-by: Mark Brown <broonie@kernel.org> |
|
|
Dan Murphy
|
4d66c56f7e |
dt-bindings: net: dp83869: Add TI dp83869 phy
Add dt bindings for the TI dp83869 Gigabit ethernet phy device. Signed-off-by: Dan Murphy <dmurphy@ti.com> CC: Rob Herring <robh+dt@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net> |
|
|
Zhou Yanjie
|
0b24748c3b |
dt-bindings: clock: Add X1000 bindings.
Add the clock bindings for the X1000 Soc from Ingenic. Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com> Link: https://lkml.kernel.org/r/1573378102-72380-2-git-send-email-zhouyanjie@zoho.com Reviewed-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
|
|
Thierry Reding
|
05308d7e7b |
clk: tegra: Reimplement SOR clocks on Tegra210
In order to allow the display driver to deal uniformly with all SOR generations, implement the SOR clocks in a way that is compatible with Tegra186 and later. Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
|
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Thierry Reding
|
991a051ea5 |
clk: tegra: Remove last remains of TEGRA210_CLK_SOR1_SRC
Later SoC generations implement this clock as SOR1_OUT. For consistency,
the Tegra210 implementation was adapted to match the same name in commit
|
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Olof Johansson
|
5588aa81d2 |
arm64: dts: Amlogic updates for v5.5
Hightlights - new board; ugoos am6, based on G12B SoC - g12: add thermal driver and cooling properties - sm1: enable audio on SEI610 board - IR: add several keymaps - sdio: add keep-power-in-suspend property for multiple boards - pcie: add support for G12A - multiple fixes, cleanups -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl3FFnEACgkQWTcYmtP7 xmWyeg//QE6hBYYjZfwiIbLCgRlpdv04HZg6e5bPqZ8A9x9/mdQoH6cqwbKVpKij bLrkHuwD+WtkWStbemdPtmPliEncAyX9jXGcvIor3eYa9IV6kTORZ8YWq6c8RDMM y8UafRFbt24MNvzi41uuUoSLtlsLUDp6dVfekD4wf1IvV7Ew5Yk5XyHMAjdVongC 07FA1aY6JOiPZeDcvNa11pxlzyciDf22YF8XLoZOsZ/cZN1itjBUMqGRefC51RQP cafmdk0Ms+Xgtq4GwDceLE5QMb/h1K582j4uVu38QMpPqR6WvTnpd/ra4chheJHE nhHHYiN4mWO3lgnp1ZZKooTUyBPAyf3kaP8I7YBrUXuuoy9GNRqKi25uJwALeVqh YKvZqpd6Uw4W/If5EW5zPXlKGv8xSJwaTh6q40sRI0OFMfniy1pLRM3mLKSVqJy6 DKk7Pt4wptWe6Bv6P1hK34acmX6TGcyq53Dg5Nq79E0qul1YRRmHoUHewOeUgwPC XSaaqPSItLQggRXplZVaUm9e8cmjcwU4Od3rqfb/A2JsTniONB3kAI6YoBCsK4O2 SwCbIVP8hkbCo/perun11C4SnsamPdQBmPs1if8PtT72LaNR8HAlFZTgX5yqEFAj ZP9vCgqtdlIE28W9cJLOEMT7KtAzCES2UYbKUDTx+E2GolvoYvA= =pQlU -----END PGP SIGNATURE----- Merge tag 'amlogic-dt64' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt arm64: dts: Amlogic updates for v5.5 Hightlights - new board; ugoos am6, based on G12B SoC - g12: add thermal driver and cooling properties - sm1: enable audio on SEI610 board - IR: add several keymaps - sdio: add keep-power-in-suspend property for multiple boards - pcie: add support for G12A - multiple fixes, cleanups * tag 'amlogic-dt64' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: (62 commits) arm64: dts: meson-gx: fix i2c compatible arm64: dts: meson-gx: cec node should be disabled by default arm64: dts: meson-g12b-odroid-n2: add missing amlogic, s922x compatible arm64: dts: meson-gxm: fix gpu irq order arm64: dts: meson-g12a: fix gpu irq order ARM64: dts: amlogic: adds crypto hardware node arm64: dts: meson-gxbb-vega-s95: set rc-vega-s9x ir keymap arm64: dts: meson-gxm-vega-s96: set rc-vega-s9x ir keymap arm64: dts: meson: g12b: add cooling properties arm64: dts: meson: g12a: add cooling properties arm64: dts: meson: g12: Add minimal thermal zone arm64: dts: meson: g12: add temperature sensor arm64: dts: meson: sei610: enable audio arm64: dts: meson: sm1: add audio devices dt-bindings: clock: meson: add sm1 resets to the axg-audio controller dt-bindings: clk: axg-audio: add sm1 bindings arm64: dts: meson-g12: add support for simplefb arm64: dts: meson: g12a: add audio devices resets arm64: dts: meson: odroid-c2: Add missing regulator linked to HDMI supply arm64: dts: meson: odroid-c2: Add missing regulator linked to VDDIO_AO3V3 regulator ... Link: https://lore.kernel.org/r/7hd0dzs0m1.fsf@baylibre.com Signed-off-by: Olof Johansson <olof@lixom.net> |
|
|
Olof Johansson
|
743f4e5bc0 |
ASPEED device tree updates for 5.5
- Lots of work on the AST2600 boards as bringup continues. There's the eval board, and two IBM boards called Tacoma and Rainier - A new flash layout for OpenBMC systems with larger flashes - Better support for the MAC clocking when talking to a NCSI device, making Linux less reliant on u-boot having done the correct thing - LED fixes for vesin and fp5280g2 - SGPIO support - Facebook network BMC cleanup with the common hardware moved to a shared dtsi -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+nHMAt9PCBDH63wBa3ZZB4FHcJ4FAl3D+0kACgkQa3ZZB4FH cJ6cchAAnM1DkLmnCx8DrNe56ucz5NrA/zLBg+UstQCNhEQZ1nx6qhGM1hz0+U8y I7hhKmGtzXETafFjGfYf1BwIZGtsT6O8/HG5NF6tpr8eh4vqFK7qK7iuusCpCpTh M5edacjiANPfCdJLZSVSVre+WehYracBKn79oDJmqMA9qXRITlYpoYqJTWEjzZtF krpwr9DQMsXAoJ5qQ7fmdWXwvM+n+pG4oF44SQ8dbv1hAQkwGHH6K9ZHpgs/aDT5 IBi6ax1Oawf0PE0zielWxcCeJvsagKhE/UPt5zen1uwbT9n2LSZqOdj3XdPla7QR PCDejNo6i3po7Of1/tzaHc0176pwMjkFW83YyzNmVIxi3VET3zoRJ5YALnrbw9a6 1B1s+XSVr/7/yGgb/mhrpuJ06tZs2DmvGGwiTXq3HmqCQEKEemK0cg2f8L/AXVlA YRMN2jM/JdSkdbTNLShIklTt8SeL/lJej5ke3RiCmUvtzc4Qi44YjNQIJrGg4t+K bDfnNgCEPt+yqkQnyXI+yuDCG8T4YhlDiJfuev3bUCXalHsZFMOKS91w5U5cCJjj VNbRNoDnRVoJOEG29INGXZyeUD0nL9wsOYu5uKNPzebbelUMxX/2X0ghC2q3ZyBW i0Z9fiF9y7R+c/UfW6J4f6gT66nNFp1O5vOqMFo90xgI5d0qJ8k= =79EI -----END PGP SIGNATURE----- Merge tag 'aspeed-5.5-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed into arm/dt ASPEED device tree updates for 5.5 - Lots of work on the AST2600 boards as bringup continues. There's the eval board, and two IBM boards called Tacoma and Rainier - A new flash layout for OpenBMC systems with larger flashes - Better support for the MAC clocking when talking to a NCSI device, making Linux less reliant on u-boot having done the correct thing - LED fixes for vesin and fp5280g2 - SGPIO support - Facebook network BMC cleanup with the common hardware moved to a shared dtsi * tag 'aspeed-5.5-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed: (48 commits) ARM: dts: aspeed-g6: Add timer description ARM: dts: aspeed: ast2600evb: Enable i2c buses ARM: dts: aspeed-g5: Add SGPIO description ARM: dts: aspeed: yamp: Use common dtsi ARM: dts: aspeed: minipack: Use common dtsi ARM: dts: aspeed: cmm: Use common dtsi ARM: dts: aspeed: Common dtsi for Facebook AST2500 Network BMCs ARM: dts: aspeed: rainier: gpio-keys for PSU presence ARM: dts: aspeed: rainier: Fix i2c eeprom size ARM: dts: tacoma: Hog LPC pinmux ARM: dts: aspeed: rainier: Enable VUART1 ARM: dts: aspeed: rainier: Add i2c eeproms ARM: dts: aspeed: tacoma: Use 64MB for firmware memory ARM: dts: aspeed: tacoma: Add host FSI description ARM: dts: ast2600evb: Enable UART workaround ARM: dts: aspeed: tacoma: Add UART1 and workaround ARM: dts: aspeed-g6: Add remaining UARTs ARM: dts: aspeed-g6: Fix i2c clock source ARM: dts: aspeed: Add RCLK to MAC clocks for RMII interfaces ARM: dts: aspeed: tacoma: Enable FMC and SPI devices ... Link: https://lore.kernel.org/r/CACPK8Xe8XiJ+oEp3_AXO5Mox-mXWVrOJKQLJMKJxg1WdYCTzMw@mail.gmail.com Signed-off-by: Olof Johansson <olof@lixom.net> |
|
|
Brian Masney
|
6120e5d821 |
dt-bindings: interconnect: qcom: add msm8974 bindings
Add device tree bindings for the Qualcomm MSM8974 interconnect providers that support setting system bandwidth requirements between various network-on-chip fabrics. Signed-off-by: Brian Masney <masneyb@onstation.org> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20191024103054.9770-2-masneyb@onstation.org Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Link: https://lore.kernel.org/r/20191108125349.24191-2-georgi.djakov@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
|
|
Jeffrey Hugo
|
95183d381a |
clk: qcom: Enumerate clocks and reset needed to boot the 8998 modem
We need to control five additional clocks and a reset inorder to boot the modem on msm8998. If we can boot the modem, we have a place to run the wlan firmware and get wifi up and running. Signed-off-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Link: https://lkml.kernel.org/r/20191107192136.5880-1-jeffrey.l.hugo@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Taniya Das
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8b9e0562f3 |
dt-bindings: clock: Add sc7180 GCC clock binding
Add device tree bindings for global clock subsystem clock controller for Qualcomm Technology Inc's SC7180 SoCs. Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lkml.kernel.org/r/20191014102308.27441-5-tdas@codeaurora.org Reviewed-by: Rob Herring <robh@kernel.org> [sboyd@kernel.org: Reword subject to make sc7180 specific, sort compatible] Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Govind Singh
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6cdef2738d |
clk: qcom: Add Q6SSTOP clock controller for QCS404
Add support for the Q6SSTOP clock control used on qcs404 based devices. This would allow wcss remoteproc driver to control the required WCSS Q6SSTOP clock/reset controls to bring the subsystem out of reset and shutdown the WCSS Q6DSP. Signed-off-by: Govind Singh <govinds@codeaurora.org> Link: https://lkml.kernel.org/r/20191011132928.9388-3-govinds@codeaurora.org [sboyd@kernel.org: Sort makefile] Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Michael Walle
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2c63221cd9 |
dt-bindings: net: phy: Add support for AT803X
Document the Atheros AR803x PHY bindings. Signed-off-by: Michael Walle <michael@walle.cc> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net> |
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Olof Johansson
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d4b0c97a80 |
Qualcomm ARM Based Driver Updates for v5.5
* Add Bjorn as QCOM co-maintainer * Add LLLC yaml bindings and SC7180 support * Fixups/Cleanup for LLLC * Add SMD-RPM MSM8976 compatible and interconnect device * Add missing RPMD SMD perf level -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJdwP5rAAoJEFKiBbHx2RXVpigQALkNC+SntAom44+EtGe8fZEm Zdd4piMEi2Yr1m07wfSDG0GvOi0W0JP1xJ84BpzNBqqe/oJpmWJlpqfMf9W3ZgM1 /e3QPa5/TvjNznwxUVTIwo4VPMy31pk9ZsRep6vXkGL1zU+vGcXs8/IzaRKHMx/A eE1I1O6dxXQFia0fwSioQpsD6MvhAp447Z2CUQu6JMrEHRIiI+AJ9LgRWynYekv2 elmYvuFKJT+6BWB52hG+ck8Q6efvyhFJTB+Af4emjNmFIRaI26ZvTEDp6XXlb+Pq 0btTKLeEPxveVK8PxPmdNhPHjXvh7582piKXz3LyelPu50LIsElRZv45ACgRgsIF iGawfjgY/eoWqT45dibg2N4Aq2q2p/4JxVZGPOs1inxPOeBfKeOEc1xieHtijMdP BJjzzqj+keDOklfSeKNbFpfIYlZn7QVYCp+3w+mwOYiCf+2qI9Vx1cNaWqL5dzAL t4X0axfjpKTkacL9HgVOibGVLpdaISEqUdtG3UoxhrVOHom01waKRlMQHoEZMICT wG3fipAu8mv/RGz645Lj49FqK4+7DNbS+M3anyfRNypThyt/CI7FnbR6GGLh7jcr jRdt2XO72xNJWV5lZu0Jll0PhstykeLoqPiEB/HlvH6Gl9HF6x5tdMt0ZKwTw2i7 20q3xSE4GCYWVUb51CTk =K+qQ -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers Qualcomm ARM Based Driver Updates for v5.5 * Add Bjorn as QCOM co-maintainer * Add LLLC yaml bindings and SC7180 support * Fixups/Cleanup for LLLC * Add SMD-RPM MSM8976 compatible and interconnect device * Add missing RPMD SMD perf level * tag 'qcom-drivers-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: MAINTAINERS: Add myself as co-maintainer for QCOM dt-bindings: msm: Add LLCC for SC7180 dt-bindings: msm: Convert LLCC bindings to YAML soc: qcom: llcc: Add configuration data for SC7180 soc: qcom: llcc: Move regmap config to local variable soc: qcom: llcc: Name regmaps to avoid collisions soc: qcom: Fix llcc-qcom definitions to include soc: qcom: rpmpd: Add rpm power domains for msm8976 dt-bindings: power: Add missing rpmpd smd performance level soc: qcom: smd-rpm: Add MSM8976 compatible soc: qcom: socinfo: add sdm845 and sda845 soc ids soc: qcom: smd-rpm: Create RPM interconnect proxy child device soc: qcom: Make llcc-qcom a generic driver soc: qcom: Rename llcc-slice to llcc-qcom soc: qcom: llcc cleanup to get rid of sdm845 specific driver file Link: https://lore.kernel.org/r/1573068840-13098-4-git-send-email-agross@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net> |
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Zhou Yanjie
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be80507d45 |
dt-bindings: dmaengine: Add X1000 bindings.
Add the dmaengine bindings for the X1000 Soc from Ingenic. Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/1571937670-30828-2-git-send-email-zhouyanjie@zoho.com Signed-off-by: Vinod Koul <vkoul@kernel.org> |
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Lukasz Luba
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fcbd8037f7 |
include: dt-bindings: add Performance Monitoring Unit for Exynos
This patch add support of a new feature which can be used in DT: Performance Monitoring Unit with defined event data type. In this patch the event data types are defined for Exynos PPMU. The patch also updates the MAINTAINERS file accordingly and adds the header file to devfreq event subsystem. Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Lukasz Luba <l.luba@partner.samsung.com> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> |
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Finley Xiao
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762539d699 |
clk: rockchip: Add div50 clock-ids for sdmmc on px30 and nandc
EMMC and SDIO already have these clock-ids (still unused) only sdmmc is missing them, so fix that. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20190917081903.25139-1-heiko@sntech.de |
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Jernej Skrabec
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4441b57ec2
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clk: sunxi-ng: h3: Export MBUS clock
MBUS clock will be referenced in MBUS controller node. Export it. Acked-by: Maxime Ripard <mripard@kernel.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Signed-off-by: Maxime Ripard <maxime@cerno.tech> |
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Qianggui Song
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26f6a7524d |
pinctrl: add compatible for Amlogic Meson A1 pin controller
Add new compatible name for Amlogic's Meson-A1 pin controller add a dt-binding header file which document the detail pin names. Note that A1 doesn't need DS bank reg any more, use gpio reg as base. Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Qianggui Song <qianggui.song@amlogic.com> Link: https://lore.kernel.org/r/1572004167-24150-2-git-send-email-qianggui.song@amlogic.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Olof Johansson
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c267d9960c |
dt-bindings: Changes for v5.5-rc1
This contains various updates to device tree bindings and includes that are related to driver changes in other Tegra branches. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl29jNkTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zoSciD/41eSVm8Y++rU95KB+XpmrYQTeRqP9F XLIrrY4sUgDpPwDgfIM/Fmyy2uIl7UtnsMDhBWkwfSkgWJGw083Tim0/eFZBTvGw j+z99xFivav2QjtK0XZp6xfKXWlWpWwQTOW7DKsq22LYiH+7bp1zMbFoy/RkCg/O klX16iwTZs69ym/0UDNj/qB6+MybOFxUffaIvo5cLXq9Us8XSOv7SCiH0TIDXk8f KcqvU5R1nzrrG15Cbxlg/2kkS1QvGSsYj2LC8n6s9dzsMK4Gp3D9DVVr+8W2xbv3 rVGAXffSu+BpzaAKbLGCojJ+lAvA7au9Q9Vm+gtq+QdbzjRgx49/EK0Ys7nC5Pll Txe38oKePEkzTrdD0Y0r5SztRORSGCED4WmgroThomTgX6r/vltEYGxYvIt2/L/F chgcBT4t82tlBf3JvD0YpoH40nmF6vWPnPVmDDIcrXDCBigmEjbztXV0tgBibaDl RuC0BpOGS7bKH9lSlfcRrQRzqnOQXrQoMeRa2/Mv6b6EAG9BZ4+rqaAlGuO1BmsC zSP+loJ96fdTHNWnjN+JHlZy5uVYCCwx/QaF/sVQ2LMiscq9y9QA7kW4p4To2r0r +45nF5CD+gft2fnBK1OmaAiDeFe4/XdMQBOJ+SlDDehWLBhN2xtzJl6UGYlGZOZ5 +QNEeVifuL41+Q== =LlnG -----END PGP SIGNATURE----- Merge tag 'tegra-for-5.5-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt dt-bindings: Changes for v5.5-rc1 This contains various updates to device tree bindings and includes that are related to driver changes in other Tegra branches. * tag 'tegra-for-5.5-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: memory: Add binding for NVIDIA Tegra30 External Memory Controller dt-bindings: memory: Add binding for NVIDIA Tegra30 Memory Controller dt-bindings: memory: tegra30: Convert to Tegra124 YAML dt-bindings: regulator: Document regulators coupling of NVIDIA Tegra20/30 SoCs dt-bindings: clock: tegra: Rename SOR0_LVDS to SOR0_OUT Link: https://lore.kernel.org/r/20191102144521.3863321-1-thierry.reding@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net> |
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Olof Johansson
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064652ad88 |
Renesas driver updates for v5.5 (take two)
- Initial support for the R-Car M3-W+ (r8a77961) SoC, - A minor fix. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXbxFoQAKCRCKwlD9ZEnx cF74AQD1/ZIzny7w792bZ4Pb5yhI9n/Af5Yv+6FZ2iLJITYbpwEA49dcEoq5qGQq wP3BMNwmqg94Y6pkuIUvkJXuStUlTws= =rY64 -----END PGP SIGNATURE----- Merge tag 'renesas-drivers-for-v5.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers Renesas driver updates for v5.5 (take two) - Initial support for the R-Car M3-W+ (r8a77961) SoC, - A minor fix. * tag 'renesas-drivers-for-v5.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: soc: renesas: rcar-sysc: Add R8A77961 support soc: renesas: rcar-rst: Add R8A77961 support soc: renesas: Identify R-Car M3-W+ soc: renesas: Add ARCH_R8A77961 for new R-Car M3-W+ soc: renesas: Add ARCH_R8A77960 for existing R-Car M3-W soc: renesas: Rename SYSC_R8A7796 to SYSC_R8A77960 soc: renesas: Add missing check for non-zero product register address dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions dt-bindings: power: Add r8a77961 SYSC power domain definitions Link: https://lore.kernel.org/r/20191101155842.31467-6-geert+renesas@glider.be Signed-off-by: Olof Johansson <olof@lixom.net> |
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Olof Johansson
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571d32c283 |
Renesas ARM64 DT updates for v5.5 (take two)
- Video-Input and Serial-ATA support on RZ/G2N,
- Color Management Module support on various R-Car Gen3 SoCs,
- Initial support for the R-Car M3-W+ (r8a77961) SoC on the
Salvator-XS board.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXbxHYgAKCRCKwlD9ZEnx
cNS0AQDofwzZRnNq8xUumbw9fg2I79qhVqqBFYpg+R8qV7qgQQD/WwOfSfE6UlCf
fTfpYowfPX8z985u7/vYDVfSv19d/Ag=
=qA0S
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm64-dt-for-v5.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM64 DT updates for v5.5 (take two)
- Video-Input and Serial-ATA support on RZ/G2N,
- Color Management Module support on various R-Car Gen3 SoCs,
- Initial support for the R-Car M3-W+ (r8a77961) SoC on the
Salvator-XS board.
* tag 'renesas-arm64-dt-for-v5.5-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-W+
arm64: dts: renesas: Add Renesas R8A77961 SoC support
arm64: dts: renesas: Prepare for rename of ARCH_R8A7796 to ARCH_R8A77960
dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions
dt-bindings: power: Add r8a77961 SYSC power domain definitions
arm64: dts: renesas: r8a774b1: Add SATA controller node
arm64: dts: renesas: rcar-gen3: Add CMM units
arm64: dts: renesas: r8a774b1: Add VIN and CSI-2 support
Link: https://lore.kernel.org/r/20191101155842.31467-5-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
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Olof Johansson
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a1094a7c27 |
Realtek ARM64 based SoC DT for v5.5
Add RTD1293 and RTD1296 DTs. Add the watchdog for all of RTD129x DTs. Add reset controllers for RTD129x and start using them for UARTs. -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEF08DRxvMIhphdW+W+i7RLT5+AT8FAl25CJkRHGFmYWVyYmVy QHN1c2UuZGUACgkQ+i7RLT5+AT8ndw/+PaYt6B92yzw5DwIYmONvSGuqgy51AFdu Wm6ATtdHGNJllXe7pAHh8a3cQMKAz04N/Xk+kMUfyYtnaQ2fvByS7yiXnMbVqIj7 Q8AmE++ijDM5wTNF45Q3T+Rd7zcMQujElAGu+8l9I4P3iMwItK6LMAAXwCgOelec 8brsLrqbjRNgtICFbds/7fMSn0ZaHiFu5gld07TyPHs5uTtq0raF8wL13X7IgBiB R70U62ux24Ld4SaFOShrgkJjDlPeZH8DH7bRh5PGlEmp822ZrFI//fc7a0HNpC8R ygBz2kmErZ1G9xPUwgEWtnTSh4D9QDJxI1btEaBuMbKI96Yaa9PIqV9tHtjJ0eWr lKEI8ymoFLaNqSQb9sMf7BGYEw/IXF7JAT42SL6APYYPccLezFUjKBRk9hRQBiy7 PNFGXsa+dmvMu5vpYLoyJKmJf8Z7HXkx3buk8rj39ru7AHr37kJdwy3SAqZdH4KZ vFt1r2bFeBBhB+i9PuSrAVS+oL49UDd2IcB/1lZkvy6Y1waxIkJKZJPQVXnkrvtE DUiaq8Fcl4iZHmxL3wIKGdldFb77vCERI5cGwMfbh/qCZ8x+3ra4lEwysOAE9dGb OWO5KkGHIITZkFDQuOJtNcwXXsM2W4EgKmMdfnStFXycim1Wc3V7ACPyB2GuUR4Y lgdneqA9dpo= =yVVf -----END PGP SIGNATURE----- Merge tag 'realtek-arm64-dt-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek into arm/dt Realtek ARM64 based SoC DT for v5.5 Add RTD1293 and RTD1296 DTs. Add the watchdog for all of RTD129x DTs. Add reset controllers for RTD129x and start using them for UARTs. * tag 'realtek-arm64-dt-for-5.5' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-realtek: arm64: dts: realtek: Add RTD129x UART resets arm64: dts: realtek: Add RTD129x reset controller nodes dt-bindings: reset: Add Realtek RTD1295 arm64: dts: realtek: Add watchdog node for RTD129x arm64: dts: realtek: Add oscillator for RTD129x arm64: dts: realtek: Add RTD1296 and Synology DS418 dt-bindings: arm: realtek: Document RTD1296 and Synology DS418 arm64: dts: realtek: Add RTD1293 and Synology DS418j arm64: dts: realtek: Change dual-license from MIT to BSD dt-bindings: arm: realtek: Document RTD1293 and Synology DS418j dt-bindings: arm: realtek: Tidy up conversion to json-schema Link: https://lore.kernel.org/r/20191030041000.31848-2-afaerber@suse.de Signed-off-by: Olof Johansson <olof@lixom.net> |
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Codrin Ciubotariu
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0b32928528 |
pinctrl: at91: Enable slewrate by default on SAM9X60
On SAM9X60, slewrate should be enabled on pins with a switching frequency below 50Mhz. Since most of our pins do not exceed this value, we enable slewrate by default. Pins with a switching value that exceeds 50Mhz will have to explicitly disable slewrate. This patch changes the ABI. However, the slewrate macros are only used by SAM9X60 and, at this moment, there are no device-tree files available for this platform. Suggested-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com> Link: https://lore.kernel.org/r/20191101092031.24896-1-codrin.ciubotariu@microchip.com Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Geert Uytterhoeven
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16208387bb |
Renesas R-Car M3-W+ DT Binding Definitions
Clock and Power Domain definitions for the Renesas R-Car M3-W+ (R8A77961) SoC, shared by driver and DT source files. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXbwQzAAKCRCKwlD9ZEnx cGA2AQDvA8Uaf/WQ1zzq5GgHPB6R35ciBFCVn3AG+6izUqsCPAEA0FGEHsrNtWyG rcJ+C/8vBJ+Pe359DmXaELorJ4Xm6wQ= =EV4L -----END PGP SIGNATURE----- Merge tag 'renesas-r8a77961-dt-binding-defs-tag' into renesas-drivers-for-v5.5 Renesas R-Car M3-W+ DT Binding Definitions Clock and Power Domain definitions for the Renesas R-Car M3-W+ (R8A77961) SoC, shared by driver and DT source files. |
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Geert Uytterhoeven
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7574ed0e08 |
Renesas R-Car M3-W+ DT Binding Definitions
Clock and Power Domain definitions for the Renesas R-Car M3-W+ (R8A77961) SoC, shared by driver and DT source files. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXbwQzAAKCRCKwlD9ZEnx cGA2AQDvA8Uaf/WQ1zzq5GgHPB6R35ciBFCVn3AG+6izUqsCPAEA0FGEHsrNtWyG rcJ+C/8vBJ+Pe359DmXaELorJ4Xm6wQ= =EV4L -----END PGP SIGNATURE----- Merge tag 'renesas-r8a77961-dt-binding-defs-tag' into renesas-arm64-dt-for-v5.5 Renesas R-Car M3-W+ DT Binding Definitions Clock and Power Domain definitions for the Renesas R-Car M3-W+ (R8A77961) SoC, shared by driver and DT source files. |
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Geert Uytterhoeven
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b07e816fc4 |
Renesas R-Car M3-W+ DT Binding Definitions
Clock and Power Domain definitions for the Renesas R-Car M3-W+ (R8A77961) SoC, shared by driver and DT source files. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCXbwQzAAKCRCKwlD9ZEnx cGA2AQDvA8Uaf/WQ1zzq5GgHPB6R35ciBFCVn3AG+6izUqsCPAEA0FGEHsrNtWyG rcJ+C/8vBJ+Pe359DmXaELorJ4Xm6wQ= =EV4L -----END PGP SIGNATURE----- Merge tag 'renesas-r8a77961-dt-binding-defs-tag' into clk-renesas-for-v5.5 Renesas R-Car M3-W+ DT Binding Definitions Clock and Power Domain definitions for the Renesas R-Car M3-W+ (R8A77961) SoC, shared by driver and DT source files. |
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Geert Uytterhoeven
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0b05ad22a2 |
dt-bindings: clock: Add r8a77961 CPG Core Clock Definitions
Add all Clock Pulse Generator Core Clock Outputs for the Renesas R-Car
M3-W+ (R8A77961) SoC, as listed in Table 8.2b ("List of Clocks [R-Car
M3-W/R-Car M3-W+]") of the R-Car Series, 3rd Generation Hardware User's
Manual (Rev. 2.00, Jul. 31, 2019). A gap is added for CSIREF, to
preserve compatibility with the definitions for R-Car M3-W (R8A77960).
Note that internal CPG clocks (S0, S1, S2, S3, SDSRC, SSPSRC, and POST2)
are not included, as they are used as internal clock sources only, and
never referenced from DT.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20191023122941.12342-3-geert+renesas@glider.be
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Geert Uytterhoeven
|
640f9606dc |
dt-bindings: power: Add r8a77961 SYSC power domain definitions
Add power domain indices for the R-Car M3-W+ (R8A77961) SoC. Based on Rev. 2.00 of the R-Car Series, 3rd Generation, Hardware User’s Manual (Jul. 31, 2019). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Eugeniu Rosca <erosca@de.adit-jv.com> Link: https://lore.kernel.org/r/20191023122911.12166-6-geert+renesas@glider.be |
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Andrew Jeffery
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d8d9ad83a4 |
dt-bindings: clock: Add AST2600 RMII RCLK gate definitions
The AST2600 has an explicit gate for the RMII RCLK for each of the four MACs. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Joel Stanley <joel@jms.id.au> |
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Andrew Jeffery
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5b468cc4b8 |
dt-bindings: clock: Add AST2500 RMII RCLK definitions
The AST2500 has an explicit gate for the RMII RCLK for each of the two MACs. Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Reviewed-by: Joel Stanley <joel@jms.id.au> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Joel Stanley <joel@jms.id.au> |
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Tero Kristo
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2d5f60afd2 |
dt-bindings: clk: add omap5 iva clkctrl definitions
OMAP5 device contains an IVA subsystem (Image and Video Accelerator.) IVA subsystem clkctrl definitions are currently missing, so add them. Signed-off-by: Tero Kristo <t-kristo@ti.com> |
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Thierry Reding
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cdc2d6685c |
dt-bindings: clock: tegra: Rename SOR0_LVDS to SOR0_OUT
Tegra186 and later call this clock SOR0_OUT. Rename it on Tegra124 and Tegra210 to make the names consistent. Keep the old name for now to keep device trees buildable until they have all been converted. Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Andreas Färber
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4df56a1eb1 |
dt-bindings: reset: Add Realtek RTD1295
Add a header with symbolic reset indices for Realtek RTD1295 SoC. Naming was derived from reset-names in an OEM's Device Tree. Acked-by: Rob Herring <robh@kernel.org> [AF: Dropped RTD1295 specific binding definition, updated SPDX] Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Andreas Färber <afaerber@suse.de> |
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Olof Johansson
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b7f7a0b58f |
Reset controller updates for v5.5
This tag adds support for Meson SM1 ARB resets, Uniphier Pro5 USB3 resets, the Meson-A1 reset controller, SocFPGA Agilex resets, and Realtek RTD1195/RTD1295 resets. It adds some reset controller API keywords for get_maintainers.pl and makes a few remaining reset_control_ops const. Also included are a conversion of the Qualcomm device tree bindings to yaml and a few small kerneldoc improvements. -----BEGIN PGP SIGNATURE----- iI0EABYIADUWIQRRO6F6WdpH1R0vGibVhaclGDdiwAUCXbbwUxcccC56YWJlbEBw ZW5ndXRyb25peC5kZQAKCRDVhaclGDdiwEKeAP498UhJ8+GB8PUCpRIPAmFwjAON n+2EFHTn5Od08ueqqAEA4SH13tR5PJBo6G/J6KgLULUFts4Uc/Hb760/2ai3eQw= =eyHx -----END PGP SIGNATURE----- Merge tag 'reset-for-v5.5' of git://git.pengutronix.de/git/pza/linux into arm/drivers Reset controller updates for v5.5 This tag adds support for Meson SM1 ARB resets, Uniphier Pro5 USB3 resets, the Meson-A1 reset controller, SocFPGA Agilex resets, and Realtek RTD1195/RTD1295 resets. It adds some reset controller API keywords for get_maintainers.pl and makes a few remaining reset_control_ops const. Also included are a conversion of the Qualcomm device tree bindings to yaml and a few small kerneldoc improvements. * tag 'reset-for-v5.5' of git://git.pengutronix.de/git/pza/linux: reset: document (devm_)reset_control_get_optional variants reset: improve of_xlate documentation reset: simple: Add Realtek RTD1195/RTD1295 reset: simple: Keep alphabetical order MAINTAINERS: add reset controller framework keywords reset: zynqmp: Make reset_control_ops const reset: hisilicon: hi3660: Make reset_control_ops const reset: build simple reset controller driver for Agilex reset: add support for the Meson-A1 SoC Reset Controller dt-bindings: reset: add bindings for the Meson-A1 SoC Reset Controller reset: uniphier-glue: Add Pro5 USB3 support dt-bindings: reset: pdc: Convert PDC Global bindings to yaml dt-bindings: reset: aoss: Convert AOSS reset bindings to yaml reset: Remove copy'n'paste redundancy in the comments reset: meson-audio-arb: add sm1 support reset: dt-bindings: meson: update arb bindings for sm1 Link: https://lore.kernel.org/r/ede6874508472d0917dca770ef80b90626b0f205.camel@pengutronix.de Signed-off-by: Olof Johansson <olof@lixom.net> |