Add low priority accumulator channel that can monitor multiple QMSS
queues. User for example could use the accumular queue for Netcp
Rx completion. While at it, also add an extra line end of each top
level node in DTS to make it more readable.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers attached
to them and also enable USB PHY device for the Porter board. We have to
enable everything in one patch since EHCI/OHCI devices are already linked
to the USB PHY device.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
As per mmc device tree binding documentation card detect gpio has
to be active low signal. When a hardware is designed with active
high card detect, gpio polarity has to be changed with
cd-inverted dt property.
In DRA74x, DRA72x and AM57xx EVMs the card detect gpio is
designed as active low gpio. So correcting the dt card detect
gpio definition.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As per mmc device tree binding documentation card detect gpio has
to be active low signal. When a hardware is designed with active
high card detect, gpio polarity has to be changed with
cd-inverted dt property.
In AM43xx the card detect gpio is designed as active low gpio.
So correcting the dt card detect gpio definition.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
As per mmc device tree binding documentation card detect gpio has
to be active low signal. When a hardware is designed with active
high card detect, gpio polarity has to be changed with
cd-inverted dt property.
In AM335x the card detect gpio is designed as active low gpio.
So correcting the dt card detect gpio definition.
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
uart2 pinmux is already defined in omap3-igep0020-common.dtsi, remove
the duplicate node.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use tabs instead of spaces for indentation.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The card detect GPIO is using IRQ_TYPE_LEVEL_LOW in the GPIO flag cells
but this defined constant is meant to be used for a IRQ and not a GPIO.
So instead use GPIO_ACTIVE_LOW that seems to be the original intention.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DRA74x family of SoCs have a second DSP, that also has
two MMUs just like the DSP1 subsystem. Add the IOMMU nodes
for this DSP2 subsystem in disabled state to the DRA74x
specific DTS file, the nodes would need to be enabled
appropriately in the respective board DTS files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DRA7xx family of SOCs have two IPUs and one DSP processor
subsystems in common. The IOMMU DT nodes have been added for
these processor subsystems, and have been disabled by default.
These MMUs are very similar to those on OMAP4 and OMAP5, with
the only difference being the presence of a second MMU within
the DSP subsystem for the EDMA port. The DSP IOMMUs also need
an additional 'ti,syscon-mmuconfig' property compared to the
IPU IOMMUs.
NOTE: The enabling of these nodes is left to the respective
board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DSP_SYSTEM sub-module is a dedicated system control logic
module present within a DRA7 DSP processor sub-system. This
module is responsible for power management, clock generation
and connection to the device PRCM module.
Add a syscon node for this module for the DSP2 processor
sub-system. This is added as a syscon node as it is a common
configuration module that can be used by the different IOMMU
instances and the corresponding remoteproc device.
The node is added to the dra74x.dtsi file, as the DSP2 processor
subsystem is usually present only on the DRA74x variants of the
DRA7 SoC family.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DSP_SYSTEM sub-module is a dedicated system control logic
module present within a DRA7 DSP processor sub-system. This
module is responsible for power management, clock generation
and connection to the device PRCM module.
Add a syscon node for this module for the DSP1 processor
sub-system. This is added as a syscon node as it is a common
configuration module that can be used by the different IOMMU
instances and the corresponding remoteproc device.
The node is added to the common dra7.dtsi file, as the DSP1
processor sub-system is mostly common across all the variants
of the DRA7 SoC family.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Many OMAP2+ DTS are not using the defined constants to express
the GPIO polarity. Replace these so the DTS are easier to read.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
SeeedStudio BeagleBone Green (BBG) is clone of the BeagleBone Black (BBB) minus
the HDMI port and addition of two Grove connectors (i2c2 and usart2).
This board can be identified by the 1A value after A335BNLT (BBB) in the at24 eeprom:
1A: [aa 55 33 ee 41 33 33 35 42 4e 4c 54 1a 00 00 00 |.U3.A335BNLT....|]
http://beagleboard.org/greenhttp://www.seeedstudio.com/wiki/Beaglebone_green
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
CC: Tony Lindgren <tony@atomide.com>
CC: Jason Kridner <jkridner@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable the System Mailboxes 5 and 6 and the corresponding child
sub-mailbox (IPC 3.x) nodes for the Beagle X15 EVM boards. This
is needed to enable communication with the respective remote
processors IPU1, IPU2, DSP1 and DSP2 from the MPU.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable the System Mailboxes 5 and 6 and the corresponding
child sub-mailbox (IPC 3.x) nodes for the DRA72 EVM board.
This is needed to enable communication with the respective
remote processors IPU1, IPU2, and DSP1 from the MPU.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Enable the System Mailboxes 5 and 6 and the corresponding
child sub-mailbox (IPC 3.x) nodes for the DRA7 EVM board.
This is needed to enable communication with the respective
remote processors IPU1, IPU2, DSP1 and DSP2 from the MPU.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the sub-mailbox nodes that are used to communicate between
MPU and the remote processors IPU1, IPU2 and DSP1. These match the
respective node definitions on DRA74x to maintain compatibility for
the equivalent remote processors. There is no DSP2 on DRA72x, and
so the corresponding sub-mailbox node is not added.
These sub-mailbox nodes are added to match the hard-coded mailbox
configuration used within the TI IPC 3.x software package. The
Dual-Cortex M4 IPU1 and IPU2 processor sub-systems are assumed to
be running in SMP-mode, and hence only a single sub-mailbox node
is added for each.
All these sub-mailbox nodes are left in disabled state, and should
be enabled (and modified if needed) as per the individual product
configuration in the corresponding board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add the sub-mailbox nodes that are used to communicate between
MPU and the remote processors IPU1, IPU2, DSP1 and DSP2.
The sub-mailbox nodes utilize the System Mailbox instances 5 and 6.
These sub-mailbox nodes are added to match the hard-coded mailbox
configuration used within the TI IPC 3.x software package. The
Dual-Cortex M4 IPU1 and IPU2 processor sub-systems are assumed to
be running in SMP-mode, and hence only a single sub-mailbox node
is added for each.
All these sub-mailbox nodes are left in disabled state, and should
be enabled (and modified if needed) as per the individual product
configuration in the corresponding board dts files.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Cleaned up the regulators on the wega board. Created a simple bus,
renamed the regulators according to the schematics and added missing
regulator on wega.
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
dra7-evm has 2 gpio keys wired through TS_LCD_GPIO3, TS_LCD_GPIO4
which in turn connected to PCF8575 GPIO pcf_lcd: gpio@20 expander
pins 2 and 3.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
dra7-evm has 4 user gpio leds connected to PCF8575 GPIO pcf_lcd:
gpio@20 expander pins [4,5,6,7], so add corresponding DT nodes.
Do not enable any triggers by default as not all of them are proved
to work on -RT.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch adds DT definition for CF8575 GPIO pcf_lcd: gpio@20
expander which is connected to i2c bus 1 and has slave address 0x20.
It allows to control:
- tc_lcd gpios, pins p0-p3
- user leds, pins p4-p7
- control LCD panel power, p15
PCF8575 GPIO pcf_lcd: gpio@20 expander supports interrupt controller
functionality and its INT line is connected to dra7 GPIO6.11 pin.
Cc: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The analog audio setup consists of:
McASP3 <-> tlv320aic3104 codec
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DVDD is supplied via TPS77018DBVT fixed regulator from vdd_3v3
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The board uses tlv320aic3106 codec connected to McASP3. The master clock
for the codec and McASP3 is coming from ATL2.
McASP3 is the master on the I2S bus.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The GPIO expander's p1 on i2c5 bus 0x26 address is used for selecting
between audio and VIN6 functionality. For VIN6 use an add on card is
needed while audio is present on the board itself.
Select the audio functionality over the VIN6 in the dts file.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The DVDD is supplied via TPS77018DBVT fixed regulator from evm_3v3
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Darren Etheridge <detheridge@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The board uses tlv320aic3106 codec connected to McASP3. The master clock
for the codec and McASP3 is coming from ATL2.
McASP3 is the master on the I2S bus.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This GPIO expander is used for controlling various muxes on the board.
By default select audio functionality over VIN6 by setting the P1
(vin6_sel_s0) pin to low.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
TPS77018DBVT is used to create 1.8V from avm_3v3_sw's 3.3V connected to
aic3106's DVDD.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use the name for the supply as it is in the schematics since the same
supply is used for other peripherals than MMC2, like audio.
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This cosmetic patch reorder nodes under internal-regs by increasing
address order, as expected.
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
By default, armada-370-xp.dtsi file has internal RTC enabled.
NETGEAR ReadyNAS 102, 104 and 2120 all use an Intersil ISL12057
I2C RTC chip. The internal RTC not being disabled in the .dts
files of those devices result in the following useless first
line during boot:
[ 4.500056] rtc-mv d0010300.rtc: internal RTC not ticking
[ 4.505684] i2c /dev entries driver
[ 4.513246] rtc-isl12057 0-0068: rtc core: registered rtc-isl12057 as rtc0
This patch marks Armada internal RTC as disabled in individual .dts
files of those devices.
Reported-by: TuxOholic <tuxoholic@hotmail.de>
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This patch adds DT support for the Seagate Personal Cloud 1 and 2-Bay.
Here are some information allowing to identify these devices:
Product name | Personal Cloud | Personal Cloud 2-Bay
Code name (board/PCB) | Cumulus | Cumulus Max
Model name (case sticker) | SRN21C | SRN22C
Material desc (product spec) | STCRxxxxxxx | STCSxxxxxxx
Chipset list:
- SoC Marvell Armada 370 88F6707, CPU @1GHz
- SDRAM memory: 512MB DDR3 667MHz (16-bits bandwidth)
- SPI flash 1MB (Macronix MX25L8006E)
- 1 or 2 SATA internal ports
- 1 Ethernet Gigabit port (PHY Marvell 88E1518)
- 1 USB3 host port (PCIe controller ASM1042)
- 1 USB2 host port (SoC)
- 2 push buttons (power and reset)
- 1 SATA LED (bi-color, white and red)
Note that support for the white SATA LED is missing. A dedicated LED
driver is needed.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
This patch adds DT support for the Seagate NAS 2 and 4-Bay.
Here are some information allowing to identify these devices:
Product name | Seagate NAS 2-Bay | Seagate NAS 4-Bay
Code name (board/PCB) | Dart 2-Bay | Dart 4-Bay
Model name (case sticker) | SRPD20 | SRPD40
Material desc (product spec) | STCTxxxxxxx | STCUxxxxxxx
Chipset list (common):
- SoC Marvell Armada 370 88F6707, CPU @1.2GHz
- SDRAM memory: 512MB DDR3 600MHz (16-bits bandwidth)
- NAND flash 256MB, 8-bits (Micron MT29F2G08AAB or Hinyx H27U2G8F2CTR-BC)
- 2 SATA II ports (SoC)
- 1 Ethernet Gigabit ports (PHY Marvell 88E1518)
- 2 USB3 host ports (PCIe controller ASM1042)
- GPIO fan (4 speeds)
- External I2C RTC (MCP7940NT)
- 3 push buttons (power, backup and reset)
- 2 SATA LEDs (bi-color, blue and red)
- 1 power LED (bi-color, blue and red)
Only on 4-Bay models:
- 2 extra SATA III ports (PCIe AHCI controller Marvell 88SE9170)
- 1 extra Ethernet Gigabit ports (PHY Marvell 88E1518)
- I2C GPIO expander (PCA9554A)
- 2 extra SATA LEDs (bi-color, blue and red)
Note that support for the white SATA LEDs associated with HDDs 0 and 1
is missing. A dedicated LED driver is needed.
Signed-off-by: Vincent Donnefort <vdonnefort@gmail.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Enable the PCIe controller and clock for the Porter board.
This patch is analogous to the commit 485f3ce67c ("ARM: shmobile:
henninger: Enable PCIe Controller & PCIe bus clock") as there are no
differences between the boards in this respect.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the Porter board dependent part of the QSPI device node.
Add device nodes for Spansion S25FL512S SPI flash and the MTD partitions
on it.
This patch is mostly analogous to the commit f59838d448 ("ARM:
shmobile: henninger: add QSPI DT support") as there are no differences
between the boards in this respect.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Replace console with stdout-path so that we don't have to put the
console on the kernel command line.
Remove earlyprintk to allow the kernel to boot on a system even
if DEBUG_LL is configured for another system.
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
Merge "Broadcom devicetree changes for v4.4" from Florian Fainelli:
This pull requests contains the following Broadcom SoCs Device Tree changes:
- Brian Norris documents the BCM7445 SoCs Power Management controllers and
hardware and updates the reference BCM7445 Device Tree with these nodes
- Florian Fainelli documents the BCM7xxx write-pairing feature in the top-level
BCM7xxx binding document
- Hauke Merthens enables the NAND controller for the Asus RT-AC87U and adds the
GPIO pin controlling the USB power supply on Netgear R6250
- Jon Mason adds support for the NorthStar Plus SoC by providing a top-level
binding document and the minimalist device tree skeleton for these SoCs
- Rafal Milecki adds support for the Netgear R7000 (BCM5301x SoC)
- Ray Jui provides a set of Cygnus DT changes that make the Device Tree clearer
and more correct with respect to how the hardware is designed. He also enables
the NAND controller on the bcm911360_entphn design, enables a bunch of
peripherals on the bcm958305k evaluation board, and adds a skeleton .dtsi file
for the touchscreen extansion board(s)
* tag 'arm-soc/for-4.4/devicetree' of http://github.com/Broadcom/stblinux:
ARM: dts: move aliases back to .dts in Cygnus
ARM: dts: fix Cygnus nand device node
ARM: dts: enable touchscreen support on Cygnus
ARM: dts: Enable NAND support on bcm911360_entphn
ARM: dts: Enable various peripherals on bcm958305k
ARM: dts: Reorder Cygnus peripherals
ARM: dts: Move all Cygnus peripherals into axi bus
ARM: dts: Put Cygnus core components under core bus
ARM: dts: Use label for device nodes in Cygnus dts
ARM: dts: consolidate aliases for Cygnus dt files
ARM: BCM5301X: Netgear R6250 add USB GPIO
Documentation: bindings: brcmstb: Document write-pairing
ARM: dts: brcmstb: add BCM7445 system PM DT nodes
Documentation: dt: brcmstb: add system PM bindings
ARM: BCM5301X: add NAND flash chip description for Asus RT-AC87U
ARM: BCM5301X: Add DT for Netgear R7000
ARM: NSP: add minimal Northstar Plus device tree
dt-bindings: Create Documentation for NSP DT bindings
system-on-module as well as the square baseboard. On top of that
a lot of mmc-related changes to improve speeds on the Cortex-A9
socs and also setting up the supplies for rk3288 mmc-controllers
for the following mmc-tuning support. And of course the dts-part
of the rk3288 power-domains.
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Merge tag 'v4.4-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Merge "Rockchip dts32 changes for 4.4" from Heiko Stuebner:
DTS changes including one new Veyron-board and the Radxa Rock2
system-on-module as well as the square baseboard. On top of that
a lot of mmc-related changes to improve speeds on the Cortex-A9
socs and also setting up the supplies for rk3288 mmc-controllers
for the following mmc-tuning support. And of course the dts-part
of the rk3288 power-domains.
* tag 'v4.4-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: add the support power-domain node on RK3288 SoCs
ARM: dts: rockchip: add rk3288-firefly iodomains
ARM: dts: rockchip: fixup firefly mmc supplies
ARM: dts: rockchip: add rk3288-popmetal iodomains
ARM: dts: rockchip: add rk3288-popmetal mmc supplies
ARM: dts: rockchip: add rk3288-popmetal board to dtb list
ARM: dts: rockchip: Add dtb for the Radxa Rock 2 Square board
ARM: dts: rockchip: support highspeed sd-cards on rk3066a boards
ARM: dts: rockchip: support highspeed sd-cards for rk3188-radxarock
ARM: dts: rockchip: Add the hdmi-ddc pinctrl settings for rk3288
ARM: dts: rockchip: Remove specific cts pullup from veyron
ARM: dts: rockchip: pull up cts lines on rk3288
ARM: dts: rockchip: add veyron-jaq board
ARM: dts: rockchip: Add support for SD/MMC on MarsBoard-RK3066
dt-bindings: add power-domain header for RK3288 SoCs
Explicitly use the SoC specific compatible strings in kirkwood.dtsi and
dove.dtsi, so that the crypto devices have access to the TDMA feature
when attached to the new CESA driver.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The new bindings split the crypto and sram node in two separate devices.
Modify the existing crypto nodes to match the new representation.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Define the crypto SRAM ranges so that the resources referenced by the
sa-sram node can be properly extracted from the DT.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Add crypto related nodes in armada-38x.dtsi.
[gregory.clement@free-electrons.com: Fix typo for compatible string
armada38x instead of armada375]
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The SCP firmware on Juno provides access to SoC sensors via the
SCPI. Add the sensor nodes to the device tree to enable this support.
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
This patch adds the CPU clocks so that the CPU DVFS can be enabled.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
This patch adds CPU topology on Juno. It will be useful for ther other
IP blocks depending on this topology.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
This patch adds support for the MHU mailbox peripheral used on Juno by
application processors to communicate with remote SCP handling most of
the CPU/system power management. It also adds the SRAM reserving the
shared memory and SCPI message protocol using that shared memory.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Jon Medhurst (Tixy) <tixy@linaro.org>
Define the Porter board dependent part of the VIN0 device node.
Add the device node for Analog Devices ADV7180 video decoder to I2C2 bus.
Add the necessary subnodes to interconnect VIN0 and ADV7180 devices.
This patch is analogous to the commit 8d62f4f753 ("ARM: shmobile:
henninger: add VIN0/ADV7180 DT support") as there are no differences
between the boards in this respect.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Define the Porter board dependent part of the I2C2 device node.
This patch is analogous to the commit 29a647c396 ("ARM: shmobile:
henninger: add I2C2 DT support") as there are no differences between
the boards in this respect.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
We can add more domains node in the future.
This patch add the needed clocks into power-controller.
As the discuess about all the device clocks being listed in
the power-domains itself.
There are several reasons as follows:
Firstly, the clocks need be turned off to save power when
the system enter the suspend state. So we need to enumerate
the clocks in the dts. In order to power domain can turn on and off.
Secondly, the reset-circuit should reset be synchronous on RK3288,
then sync revoked. So we need to enable clocks of all devices.
In other words, we have to enable the clocks before you operate them
if all the device clocks are included in someone domians.
Thirdly, as the chip designs for PM hardhare. we need turn on the noc
clocks, if we are operating the "pd_vio" domain to enter the idle status.
The device's clock be included in domains that needed turn on if do that.
The clocks in the dts are needed to enable before you want to happy work.
At the moment, This patch is very good work for PM hardware.
Also, we can add these clocks in the future if we have some hidden clocks.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Michael Turquette <mturquette@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
[add necessary power-domain properties to keep drm subsys working]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the iodomains node and reference the correct regulator for each
domain. This also includes adding the currently unused dvp regulators.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Fix some incorrect references to mmc regulators.
vccio_wl for example is the io-voltage supply not the core supply
of the wifi module itself, which is vbat_wl instead.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the iodomains node and reference the correct regulator for each
domain. This also includes adding the currently unused dvp regulators
and fixing up two regulators to follow the naming in the schematics.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The popmetal board was not included in the list of Rockchip boards,
so was only built when explicitly called with make rk3288-popmetal.dtb
but not in a generic make dtbs, so add the missing entry.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The Radxa Rock 2 Square board is a combination of the Radxa Rock 2 SoM
with the Square baseboard. Add a dtsi for the SoM which can be included
into the dts for the various baseboards (e.g. full and square) and a dts
for the square board.
Currently supported are serial console, wired networking, hdmi output,
eMMC and SD storage and USB.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add cap-sd-highspeed and cap-mmc-highspeed for rk3066a-bqcurie2
and rk3066a-rayeager boards to make sd cards run faster.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add cap-sd-highspeed and cap-mmc-highspeed for rk3188-radxarock
board to make sd cards running faster.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The pins for i2c5 can either be configured as "I2C5" which means that
they're controlled by the normal RK3288 I2C controller or as "EDP / HDMI
I2C". It's unclear why EDP is referenced here since apparently setting
the mux to this position enables I2C communication using the dw_hdmi
block with a patch like <https://patchwork.kernel.org/patch/7098101/>.
There appear to be some reasons why using the builtin I2C controller in
dw_hdmi is better than using the normal RK3288 I2C controller, so boards
based on rk3288 might eventually want to use this pinmux if it's known
to work.
Once driver support in dw_hdmi lands, boards would use this by selecting
this pinctrl for the HDMI block and then _not_ specifying a ddc-i2c-bus
and _not_ setting the status to "okay" for i2c5 (which uses the same
pins).
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
With the previous patch ("rk3288: pull up cts lines") this is redundant,
I sent that patch for the same reason this existed here, so the lines don't
wiggle randomly when disconnected.
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The flow control lines from a user accessible UART are optional,
the user might not have anything connected to those pins.
In order to prevent random interrupts happening and noise affecting
the cts pin should be pulled up.
Note that the default state for that pin on the rk3288 is pulled up,
so this patch merely restores them.
This is similar to what we're already doing with the RX pin,
so it should be safe. At worst it might be a slightly higher power usage
(through ~50 kohms) when the cts is low.
Suggested-by: Neil Hendin <nhendin@chromium.org>
Signed-off-by: Alexandru M Stan <amstan@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
a.k.a. Haier Chromebook 11, and others
Signed-off-by: Brian Norris <briannorris@chromium.org>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This enables SDMMC0 on the board and gives a basic support for SD cards.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
* Add missing CPG/MSTP Clock Domain for sound on r8a779[01] SoCs
* Tidy up SCI resource region on r8a779[018] SoCs
* Add pinmux for iic0 on Lager board
* Use CCF for audio clock on Lager and Koelsch boards
* Use serial0 and 1 as serial ports on Marzen board
* Use adxl345-specific compatible property for KZM9G board
* Document compat string for Silk board
* Enable GPIO, I2C, PCI, QSPI, USB PHY and HS, and VIN support on r8a7794/Silk
* Add initial support for r8a7791/porter
* Add common file for AA121TD01 panel
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Merge tag 'renesas-dt-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Merge "Renesas ARM Based SoC DT Updates for v4.4" from Simon Horman:
* Add missing CPG/MSTP Clock Domain for sound on r8a779[01] SoCs
* Tidy up SCI resource region on r8a779[018] SoCs
* Add pinmux for iic0 on Lager board
* Use CCF for audio clock on Lager and Koelsch boards
* Use serial0 and 1 as serial ports on Marzen board
* Use adxl345-specific compatible property for KZM9G board
* Document compat string for Silk board
* Enable GPIO, I2C, PCI, QSPI, USB PHY and HS, and VIN support on r8a7794/Silk
* Add initial support for r8a7791/porter
* Add common file for AA121TD01 panel
* tag 'renesas-dt-for-v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (28 commits)
ARM: shmobile: porter: add Ether DT support
ARM: shmobile: fix SILK board name
ARM: shmobile: r8a7794: add HS-USB DT support
ARM: shmobile: dts: Add common file for AA121TD01 panel
ARM: shmobile: r8a7794: link PCI USB devices to USB PHY
ARM: shmobile: silk: enable USB PHY
ARM: shmobile: r8a7794: add USB PHY DT support
ARM: shmobile: porter: initial device tree
ARM: shmobile: add Porter board DT bindings
ARM: shmobile: silk: enable internal PCI
ARM: shmobile: r8a7794: add internal PCI bridge nodes
ARM: shmobile: r8a7790: lager: add pinmux for iic0
ARM: shmobile: r8a7778: tidyup SSI resource region
ARM: shmobile: r8a7791: tidyup SSI resource region
ARM: shmobile: r8a7790: tidyup SSI resource region
ARM: shmobile: lager: use CCF for audio clock
ARM: shmobile: koelsch: use CCF for audio clock
ARM: shmobile: silk: add VIN0/ADV7180 DT support
ARM: shmobile: r8a7794: add VIN DT support
ARM: shmobile: silk: add I2C1 DT support
...
Enable SATA0 device for the Porter board.
This patch is analogous to the commit 5a62ec5700 ("ARM: shmobile:
henninger: enable SATA0") as there are no differences between the boards
in this respect.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
The board DTS are using numeric values instead of the defined GPIO
constanst to express polarity, use them to make the DTS more clear.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The board DTS are using numeric values instead of the defined GPIO
constanst to express polarity, use them to make the DTS more clear.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The board DTS are using numeric values instead of the defined GPIO
constanst to express polarity, use them to make the DTS more clear.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The board DTS are using numeric values instead of the defined GPIO
constanst to express polarity, use them to make the DTS more clear.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The board DTS are using numeric values instead of the defined GPIO
constanst to express polarity, use them to make the DTS more clear.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
The Peach boards use the EC to store the vboot context information,
so add the corresponding properties on the EC node to indicate so.
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Emilio Lopez <emilio.lopez@collabora.co.uk>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
1. Enable DMA on Exynos4 serial ports. This old patch uncovered
a number of other issues in dmaengine and samsung serial driver.
All of known issues are resolved so finally enable the DMA for UART.
2. Fix incorrect location of display-timings node (FIMD->DP node)
on Arndale, SMDK5250 and SMDK5240 boards.
3. Minor cleanups.
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Merge tag 'samsung-dt-4.4-2' of http://github.com/krzk/linux into v4.4-next/dt-samsung
Device Tree improvements for Exynos based boards (updated pull request):
1. Enable DMA on Exynos4 serial ports. This old patch uncovered
a number of other issues in dmaengine and samsung serial driver.
All of known issues are resolved so finally enable the DMA for UART.
2. Fix incorrect location of display-timings node (FIMD->DP node)
on Arndale, SMDK5250 and SMDK5240 boards.
3. Minor cleanups.
"dcdc1-supply" and "dcdc5-supply" have been dropped, as they are
internally connected and should not be represented in the device
tree.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Reduced Serial Bus controller is used to talk to the onboard PMIC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Reduced Serial Bus controller is used to talk to the onboard PMIC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This patch adds a device node for the Reduced Serial Bus (RSB)
controller and the defacto pinmux setting to the A23/A33 dtsi.
Since there is only one possible pinmux setting for RSB, just
set it in the dtsi.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Define the Porter board dependent part of the SDHI0/2 device nodes along
with the necessary voltage regulators (note that the Vcc regulators are
dummy -- they are required but don't actually exist on the board). Also,
GPIOs have to be used for the CD and WP signals due to the SDHI driver
constraints...
This patch is analogous to the commit 1299df03d7 ("ARM: shmobile:
henninger: add SDHI0/2 DT support") as there are no differences between
those boards in this respect.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
With future SoCs of keystone2 family, the generic compatible match
may not be sufficient to handle SoC specific handling. So introduce
matches based on SoC compatiblity.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
This patch adds all UART nodes for the Hi6220 SoC. Recently a board[1] has
been developed to standardize UART access across all the 96boards consumer
edition boards. To use this hardware on HiKey we must configure and enable
UART3. However, to ensure backward compatibility we must keep UART0 enabled
as well.
I have removed the hard coded clock index values in favor of using the ones
already defined in include/dt-bindings/clock/hi6220-clock.h.
Since UART0 needs to be soldered, it has been suggested to use the UART3 as
the default console.
This patch was boot tested on top of next-20150930, with both UART
configurations.
[1] http://www.seeedstudio.com/depot/96Boards-UART-p-2525.html?ref=newInBazaar
Signed-off-by: Tyler Baker <tyler.baker@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add base arm64 dts for Statrix 10
- Peripheral updates for Arria10(USB,I2C,UART)
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Merge tag 'socfpga_dts_for_v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into next/dt
Merge "SoCFPGA DTS updates for v4.4" from Dinh Nguyen:
- Add base arm64 dts for Statrix 10
- Peripheral updates for Arria10(USB,I2C,UART)
* tag 'socfpga_dts_for_v4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
arm64: dts: Add base stratix 10 dtsi
ARM: socfpga: dts: enable USB and I2C on Arria10 SoCDK
ARM: socfpga: dts: add clock fields for I2C, UART and USB on Arria10
- some DT fixes: dma declaration, led labels
- disable some nodes: PMIC on sama5d3 Xplained, unused i2c1 on at91sam9n12ek
- add some others that were missing: touchscreen, cryto nodes, LCD panels or
image capture properties on various boards
- as the new pinmux for sama5d2 was accepted, we can now add the definitions
and the actual muxing for sama5d2 Xplained board
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Merge tag 'at91-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/dt
Merge "First batch of DT changes for 4.4:" from Nicolas Ferre:
- some DT fixes: dma declaration, led labels
- disable some nodes: PMIC on sama5d3 Xplained, unused i2c1 on at91sam9n12ek
- add some others that were missing: touchscreen, cryto nodes, LCD panels or
image capture properties on various boards
- as the new pinmux for sama5d2 was accepted, we can now add the definitions
and the actual muxing for sama5d2 Xplained board
* tag 'at91-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91/dt: sama5d2 Xplained: add device pin muxing
ARM: at91/dt: add sama5d2 pinmux
ARM: at91/dt: ov2640: add hsync/vsync-active property
ARM: at91/dt: sama5d4 xplained: enable the led D8
ARM: at91/dt: sama5d4ek: Add support of QT1070 and Maxtouch
ARM: at91/dt: sama5d4: enable crypto nodes
ARM: at91/dt: sama5d4: add pioD pin mux mask and enable pioD
ARM: at91/dt: sama5d3: update iio config for touchscreen
ARM: at91/dt: sama5d3 xplained: disable pmic
ARM: at91/dt: at91sam9x5: enable iio touchscreen for 9x5ek
ARM: at91/dt: at91sam9n12ek: disable i2c1
ARM: at91/dt: at91sam9n12ek: fix the led labels name
ARM: at91/dt: corrections to i2c1 declaration to sama5d4
Add the base DTS for Altera's SoCFPGA Stratix 10 platform.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
---
v4: Add a non-zero ranges property for /soc node
v3: change #address-cells and #size-cells to <2>
change the GIC address to 0xfffc1000
update the GIC virtual CPU reg length to 0x2000
v2: use interrupt-affinity for pmu node
On the Arria10 Devkit, the I2C bus has a serial EEPROM and an RTC
hanging off it. Also, enable the USB node.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Add the required clock fields for all the I2C nodes. Also add missing clock
fields for UART0 and USB1.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
The regulator-compatible property from the regulator DT binding was
deprecated and the correct approach is to use the node's name.
This patch has no functional changes but by not using a deprecated
property, new DTS based on this one will not carry the same issue.
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
This patch moves the display-timings node from fimd to dp to reflect the
device tree bindings change.
Signed-off-by: Sean Paul <seanpaul@chromium.org>
[tomeu.vizoso@collabora.com: Rebased]
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Define the Porter board dependent part of the Ether device node.
Enable DHCP and NFS root for the kernel booting.
This patch is analogous to the commit 26b0d2cf73 ("ARM: shmobile:
henninger: add Ether DT support") as there are no differences between
those boards in this respect.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This patch adds a PWM node in the Berlin BG2CD device tree, using the
newly added Berlin PWM driver.
Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Murali Karicheri