Commit Graph

29 Commits

Author SHA1 Message Date
Ramesh Shanmugasundaram 2d77583198 pinctrl: sh-pfc: r8a7795: Add DRIF support
This patch adds DRIF[0-3] pinmux support for r8a7795 SoC.

Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-06-23 11:01:21 +02:00
Kuninori Morimoto d07640f576 pinctrl: sh-pfc: r8a7795: Use PINMUX_SINGLE() for I2C
Now we have PINMUX_SINGLE(). Let's use it instead of PINMUX_IPSR_NOGP()

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-06-23 11:01:11 +02:00
Wolfram Sang e9eace3220 pinctrl: sh-pfc: r8a7795: add support for voltage switching
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-06-10 09:00:22 +02:00
Laurent Pinchart 92e6d9a2cc pinctrl: sh-pfc: r8a7795: Add drive strength support
Define the drive strength registers for the R8A7795. As the PFC driver
for the SoC only defines GPIO pins at the moment, limit drive strength
support to those pins. Pins without GPIO capabilities will be supported
later.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-03-29 09:23:01 +02:00
Ramesh Shanmugasundaram 4412bb5db6 pinctrl: sh-pfc: r8a7795: Add CAN FD support
This patch adds CANFD[0-1] pinmux support to r8a7795 SoC.

Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-26 13:59:41 +01:00
Ramesh Shanmugasundaram a4d9791fca pinctrl: sh-pfc: r8a7795: Add CAN support
This patch adds CAN[0-1] pinmux support to r8a7795 SoC.

Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-26 13:59:41 +01:00
Takeshi Kihara 4ca88cf661 pinctrl: sh-pfc: r8a7795: Add PWM support
This patch adds PWM[0-6] pinmux support to r8a7795 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[uli: adapted to mainline PFC driver]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-18 09:30:57 +01:00
Magnus Damm bb46f6f3f3 pinctrl: sh-pfc: r8a7795: Add support for INTC-EX IRQ pins
Most pins on the r8a7795 SoC can be configured in GPIO mode for
interrupt and GPIO functionality, while a couple of them can also
be routed to the INTC-EX hardware block (formerly known as IRQC).

On r8a7795 the INTC-EX hardware handles pins IRQ0 -> IRQ5 and
this patch adds support for them to the PFC driver as "intc_ex_irqN".

Tested on r8a7795 Salvator-X with an external loop back adapter on
EXIO_D that connects pin 9 (IRQ2/GP2_02) and pin 26 (ExA22/GP2_06).

Signed-off-by: Magnus Damm <damm+renesas@opensource.se>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-18 09:30:57 +01:00
Takeshi Kihara 76250a6c89 pinctrl: sh-pfc: r8a7795: Add USB2.0 host support
This patch adds USB[0-2] (USB2.0 host) pinmux support to r8a7795 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2016-02-08 16:50:31 +01:00
Geert Uytterhoeven a5d2dade55 pinctrl: sh-pfc: r8a7795: Remove bits SEL_VSP_1 and SEL_VSP_0
Cfr. Manual Errata for Rev 0.50 of the R-Car Gen3 datasheet.

This has no user-visible impact, as the definitions were not really
used.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-08 16:50:09 +01:00
Geert Uytterhoeven 00edf542a9 pinctrl: sh-pfc: r8a7795: Rename SSI_{WS,SCK}0129 to SSI_{WS,SCK}01239
Cfr. Manual Errata for Rev 0.50 of the R-Car Gen3 datasheet.

This has no user-visible impact, as the string used for configuration
("ssi01239_ctrl") was already correct.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2016-02-08 16:50:09 +01:00
Geert Uytterhoeven e01678e35f pinctrl: sh-pfc: Rename PINMUX_IPSR_DATA() to PINMUX_IPSR_GPSR()
This macro describes a pinmux configuration that needs configuration in
both a Peripheral Function Select Register (IPSR) and in a
GPIO/Peripheral Function Select Register 1 (GPSR). Reflect that in the
macro name for clarity.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2016-02-08 16:50:08 +01:00
Takeshi Kihara 34dc4e16af pinctrl: sh-pfc: r8a7795: Add SATA support
This patch adds SATA0 pinmux support to r8a7795 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[uli: adjusted for new PFC driver]
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-16 11:23:37 +01:00
Takeshi Kihara 20cacae155 pinctrl: sh-pfc: r8a7795: Add SDHI support
Add SDHI[0-3] pinmux support to r8a7795 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-16 11:23:37 +01:00
Geert Uytterhoeven f27200f9dc pinctrl: sh-pfc: r8a7795: Add SCIF_CLK support
Add pins, groups, and a function for SCIF_CLK, which is the external
clock source for the Baud Rate Generator for External Clock (BRG) on
(H)SCIF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-12-08 14:18:45 +01:00
Geert Uytterhoeven e7419b81ff pinctrl: sh-pfc: r8a7795: Add MSIOF pins, groups, and functions
Extracted from a big patch by Takeshi Kihara.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[geert: Correct MSIOF3 TXD_A/RXD_A pins]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08 14:18:35 +01:00
Geert Uytterhoeven 8d4df57378 pinctrl: sh-pfc: r8a7795: Add pinmux data for single-function pins
Pins that (1) can be configured as either GPIO or a single peripheral
function, and (2) that don't need configuration in an IPSRx register,
should still be listed in the pinmux_data[] array.

Else selecting the peripheral function fails with e.g.:

    sh-pfc e6060000.pfc: cannot locate data/mark enum_id for mark 1281

(mark 1281 is MSIOF0_SCK_MARK).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-12-08 14:18:29 +01:00
Kuninori Morimoto 2d24fe675a pinctrl: sh-pfc: Share/reuse same PORT_GP_x() macros
Many SoC needs each PORT_GP_x() macros, but we can share/reuse
same one.

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-11-30 13:41:35 +01:00
Geert Uytterhoeven a56069c46c pinctrl: sh-pfc: r8a7795: Add HSCIF pins, groups, and functions
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-30 13:41:34 +01:00
Geert Uytterhoeven fd1aa743b0 pinctrl: sh-pfc: r8a7795: Rename SEL_SCIF to SEL_SATA
Cfr. Manual Errata for Rev 0.50 of the R-Car Gen3 datasheet.

This has no user-visible impact.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-11-30 13:41:34 +01:00
Geert Uytterhoeven b8856085c3 pinctrl: sh-pfc: r8a7795: Make PORT_GP_x() macros consistent
On r8a7795, PORT_GP_x() is a macro for defining GPIOs 0..x.
In all other sh-pfc code, PORT_GP_x() is a macro for defining GPIOs
0..(x-1).

Make the r8a7795 macro definitions consistent with the rest of the
sh-pfc codebase.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-11-30 13:41:33 +01:00
Geert Uytterhoeven 69af775a18 pinctrl: sh-pfc: Stop including <linux/platform_data/gpio-rcar.h>
This header file will be removed soon.

Copy the helper macro RCAR_GP_PIN(), which is used by the pinctrl
drivers only, to sh_pfc.h, and drop the #include.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-20 16:03:40 +02:00
Geert Uytterhoeven b8b47d678a pinctrl: sh-pfc: Rename .gpio_data[] to .pinmux_data[]
The sh_pfc_soc_info.gpio_data[] array contains not only GPIO data, but
also various other pinmux-related data (functions and marks).
Every single driver already calls its local array pinmux_data[].
Hence rename the sh_pfc_soc_info member to "pinmux_data".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2015-10-20 16:03:30 +02:00
Takeshi Kihara 819fd4bfcc pinctrl: sh-pfc: r8a7795: add EtherAVB support
This patch adds EthernetAVB

Based on a much lager patch by Takeshi Kihara which was
originally posted by Kuninori Morimoto.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[horms: extracted from a larger patch;
        corrected swapped {MATCH,CAPTURE_A} pins]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02 09:54:41 +02:00
Kuninori Morimoto 9b132ba3e3 pinctrl: sh-pfc: r8a7795: add Audio SSI pin support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02 09:54:41 +02:00
Kuninori Morimoto c33a7fe399 pinctrl: sh-pfc: r8a7795: add Audio clock pin support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02 09:54:40 +02:00
Kuninori Morimoto 2544ef7230 pinctrl: sh-pfc: r8a7795: add I2C pin support
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02 09:54:40 +02:00
Geert Uytterhoeven ff8459a506 pinctrl: sh-pfc: r8a7795: add SCIFx support
This patch adds SCIF0/1/2/3/4/5

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[Morimoto-san: Updated]
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2015-10-02 09:54:39 +02:00
Takeshi Kihara 0b0ffc96db pinctrl: sh-pfc: Initial R8A7795 PFC support
Add PFC base support for the R8A7795 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[Morimoto-san: updated]
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2015-10-02 09:54:39 +02:00