mirror of https://gitee.com/openkylin/linux.git
67 Commits
| Author | SHA1 | Message | Date |
|---|---|---|---|
John Garry
|
332f632ec3 |
HISI LPC: Stop using MFD APIs
The MFD APIs should only be used by drivers in drivers/mfd. It is not worth splitting the driver to have separate parts in drivers/bus and drivers/mfd, so just drop MFD API usage. As a solution, we will use the platform device APIs directly to achieve the same as we had when using MFD APIs. Signed-off-by: John Garry <john.garry@huawei.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Wei Xu <xuwei5@hisilicon.com> |
|
|
John Garry
|
4b313ca7b6 |
HISI LPC: Add Kconfig MFD_CORE dependency
For ACPI support of the HiSilicon LPC driver we depend on MFD_CORE config. Currently the HiSi LPC Kconfig entry does not define this dependency, so add it. The reason for depending on MFD_CORE in the driver is that we model the LPC host as an MFD, in that a platform device will be created for each device on the bus. We do this as we need to modify the resources of these derived platform devices, something which we should not do to the original devices created in the ACPI scan. Details in |
|
|
Linus Torvalds
|
3c0d551e02 |
pci-v4.17-changes
-----BEGIN PGP SIGNATURE----- iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAlrHeY8UHGJoZWxnYWFz QGdvb2dsZS5jb20ACgkQWYigwDrT+vxhLRAAndV/0NDyWZU0eZNM6twri2SEFnF7 E4ar+YthxDxxJG4TLJbIA12jc5NgHZy4WuttDa6Jb99KreBXIHJFlNi/V/tme6zf +yXUuxWae7wJzBiaay57VqLGSc80gt/LTgjLa1siwQqjTbO3wSXR6JJXNaE9FtQ4 /jL61t8bD1Peb5cWTpt9p0hrnKI0/pHwASdReyFS4F/HDKdvpof7BxE/OU3HSxxA XKC2v6RjY4S93vkzvApDXQ+vhKquVRK7/ojyTXQUO/GIzcARprO7H4k62N4ar0x/ qbXLkR8IMkwA8ecsNmcL92ftb/cXoHfd+wdK8WpijqzF4kW4SdteVWbIhUzI0gbr 0gjDYIzjplvH3pZGv/qvx+8sFtAP95OdPjuAAW2qJ9TCVfmiS8naNFCvcxg87RhD gjyQD3If1X7F8wy309lhq7VNyRexTHgIMgTXHyFvuZMzn/Qe1huL2XCwDcEAg/OX AvU2iuSE5tWAh7gIUMF/aWi3uoeJUyyoru5ZR//gqdFfx9YxpSimO1UDXnpPi8SR Iz/jzHJc0aWGYdQ9l6HiSbJF3P/QQcWYs9igt0A7BRGB05SPdWCh7sSO70FJa8ME f4WID5/qEiaH26kiSRX4cUqpc8Amk8bT0DXw2OT57qy3JM0ZdV5ENQX11pSpr9hv uLEf0DU7AEmdvzQ= =T++R -----END PGP SIGNATURE----- Merge tag 'pci-v4.17-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: - move pci_uevent_ers() out of pci.h (Michael Ellerman) - skip ASPM common clock warning if BIOS already configured it (Sinan Kaya) - fix ASPM Coverity warning about threshold_ns (Gustavo A. R. Silva) - remove last user of pci_get_bus_and_slot() and the function itself (Sinan Kaya) - add decoding for 16 GT/s link speed (Jay Fang) - add interfaces to get max link speed and width (Tal Gilboa) - add pcie_bandwidth_capable() to compute max supported link bandwidth (Tal Gilboa) - add pcie_bandwidth_available() to compute bandwidth available to device (Tal Gilboa) - add pcie_print_link_status() to log link speed and whether it's limited (Tal Gilboa) - use PCI core interfaces to report when device performance may be limited by its slot instead of doing it in each driver (Tal Gilboa) - fix possible cpqphp NULL pointer dereference (Shawn Lin) - rescan more of the hierarchy on ACPI hotplug to fix Thunderbolt/xHCI hotplug (Mika Westerberg) - add support for PCI I/O port space that's neither directly accessible via CPU in/out instructions nor directly mapped into CPU physical memory space. This is fairly intrusive and includes minor changes to interfaces used for I/O space on most platforms (Zhichang Yuan, John Garry) - add support for HiSilicon Hip06/Hip07 LPC I/O space (Zhichang Yuan, John Garry) - use PCI_EXP_DEVCTL2_COMP_TIMEOUT in rapidio/tsi721 (Bjorn Helgaas) - remove possible NULL pointer dereference in of_pci_bus_find_domain_nr() (Shawn Lin) - report quirk timings with dev_info (Bjorn Helgaas) - report quirks that take longer than 10ms (Bjorn Helgaas) - add and use Altera Vendor ID (Johannes Thumshirn) - tidy Makefiles and comments (Bjorn Helgaas) - don't set up INTx if MSI or MSI-X is enabled to align cris, frv, ia64, and mn10300 with x86 (Bjorn Helgaas) - move pcieport_if.h to drivers/pci/pcie/ to encapsulate it (Frederick Lawler) - merge pcieport_if.h into portdrv.h (Bjorn Helgaas) - move workaround for BIOS PME issue from portdrv to PCI core (Bjorn Helgaas) - completely disable portdrv with "pcie_ports=compat" (Bjorn Helgaas) - remove portdrv link order dependency (Bjorn Helgaas) - remove support for unused VC portdrv service (Bjorn Helgaas) - simplify portdrv feature permission checking (Bjorn Helgaas) - remove "pcie_hp=nomsi" parameter (use "pci=nomsi" instead) (Bjorn Helgaas) - remove unnecessary "pcie_ports=auto" parameter (Bjorn Helgaas) - use cached AER capability offset (Frederick Lawler) - don't enable DPC if BIOS hasn't granted AER control (Mika Westerberg) - rename pcie-dpc.c to dpc.c (Bjorn Helgaas) - use generic pci_mmap_resource_range() instead of powerpc and xtensa arch-specific versions (David Woodhouse) - support arbitrary PCI host bridge offsets on sparc (Yinghai Lu) - remove System and Video ROM reservations on sparc (Bjorn Helgaas) - probe for device reset support during enumeration instead of runtime (Bjorn Helgaas) - add ACS quirk for Ampere (née APM) root ports (Feng Kan) - add function 1 DMA alias quirk for Marvell 88SE9220 (Thomas Vincent-Cross) - protect device restore with device lock (Sinan Kaya) - handle failure of FLR gracefully (Sinan Kaya) - handle CRS (config retry status) after device resets (Sinan Kaya) - skip various config reads for SR-IOV VFs as an optimization (KarimAllah Ahmed) - consolidate VPD code in vpd.c (Bjorn Helgaas) - add Tegra dependency on PCI_MSI_IRQ_DOMAIN (Arnd Bergmann) - add DT support for R-Car r8a7743 (Biju Das) - fix a PCI_EJECT vs PCI_BUS_RELATIONS race condition in Hyper-V host bridge driver that causes a general protection fault (Dexuan Cui) - fix Hyper-V host bridge hang in MSI setup on 1-vCPU VMs with SR-IOV (Dexuan Cui) - fix Hyper-V host bridge hang when ejecting a VF before setting up MSI (Dexuan Cui) - make several structures static (Fengguang Wu) - increase number of MSI IRQs supported by Synopsys DesignWare bridges from 32 to 256 (Gustavo Pimentel) - implemented multiplexed IRQ domain API and remove obsolete MSI IRQ API from DesignWare drivers (Gustavo Pimentel) - add Tegra power management support (Manikanta Maddireddy) - add Tegra loadable module support (Manikanta Maddireddy) - handle 64-bit BARs correctly in endpoint support (Niklas Cassel) - support optional regulator for HiSilicon STB (Shawn Guo) - use regulator bulk API for Qualcomm apq8064 (Srinivas Kandagatla) - support power supplies for Qualcomm msm8996 (Srinivas Kandagatla) * tag 'pci-v4.17-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (123 commits) MAINTAINERS: Add John Garry as maintainer for HiSilicon LPC driver HISI LPC: Add ACPI support ACPI / scan: Do not enumerate Indirect IO host children ACPI / scan: Rename acpi_is_serial_bus_slave() for more general use HISI LPC: Support the LPC host on Hip06/Hip07 with DT bindings of: Add missing I/O range exception for indirect-IO devices PCI: Apply the new generic I/O management on PCI IO hosts PCI: Add fwnode handler as input param of pci_register_io_range() PCI: Remove __weak tag from pci_register_io_range() MAINTAINERS: Add missing /drivers/pci/cadence directory entry fm10k: Report PCIe link properties with pcie_print_link_status() net/mlx5e: Use pcie_bandwidth_available() to compute bandwidth net/mlx5: Report PCIe link properties with pcie_print_link_status() net/mlx4_core: Report PCIe link properties with pcie_print_link_status() PCI: Add pcie_print_link_status() to log link speed and whether it's limited PCI: Add pcie_bandwidth_available() to compute bandwidth available to device misc: pci_endpoint_test: Handle 64-bit BARs properly PCI: designware-ep: Make dw_pcie_ep_reset_bar() handle 64-bit BARs properly PCI: endpoint: Make sure that BAR_5 does not have 64-bit flag set when clearing PCI: endpoint: Make epc->ops->clear_bar()/pci_epc_clear_bar() take struct *epf_bar ... |
|
|
Linus Torvalds
|
38c23685b2 |
ARM: SoC driver updates for 4.17
The main addition this time around is the new ARM "SCMI" framework,
which is the latest in a series of standards coming from ARM to do power
management in a platform independent way. This has been through many
review cycles, and it relies on a rather interesting way of using the
mailbox subsystem, but in the end I agreed that Sudeep's version was
the best we could do after all.
Other changes include:
- the ARM CCN driver is moved out of drivers/bus into drivers/perf,
which makes more sense. Similarly, the performance monitoring
portion of the CCI driver are moved the same way and cleaned up
a little more.
- a series of updates to the SCPI framework
- support for the Mediatek mt7623a SoC in drivers/soc
- support for additional NVIDIA Tegra hardware in drivers/soc
- a new reset driver for Socionext Uniphier
- lesser bug fixes in drivers/soc, drivers/tee, drivers/memory, and
drivers/firmware and drivers/reset across platforms
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJaxiNzAAoJEGCrR//JCVInYhYP/2kPhc5t/kszA1bcklcbO9dY
eX37Ra/RR4yQ5yeQZVIZ4UkUovxk9PmG2tM4K5oJaTDsz5pPEgavVOOr3sbfj6vb
4O9auTeysEQlHcbVdNFum0YS2gUY2YD7D12DTRorotLxCqod184ccWXq0XGfIWaY
l3YRrcL/lPlqmyS3z/GNx9oNygOMUzEfXfIQYICyzHuYiLBUGnkKC1vIb+Hx1TDq
Cxk++AUqH13Mss24O2A2QQh+oBHj2BybDLLqwcC5PSpsUbFrVCfzG54l43mig32T
NOxV0Qnml2wAtU4H0QcgtSgwRimHD0YOiX8ssquvDDiqTqM5G+llSTGkEbYe+AUW
4GIZYoBOwGkfEXS+tyymHe9yfc5h1OLYAeFU1jRm723c7phanuu67rPn35YC8UMK
zSql10JpkAGNzMikrxxb6wnis951w2UFlzhgZQ6ItA/nRq3l+oEQA0Qiljv965nz
DVLsD5+gdhK6GBctkzlsD5HFn6GjM8JilnsOVPHD765nKnVBSxKiXRLV228XVug2
rChF1FhQqLnM54jCMqHZX5fS9SbSgtYswHqIXpVw6GmJkqq/Ly10yGR0vuWD+uyn
BV7q5AKpGrwm6wZkMM2uZ1VdUtWzn856AbkqrvX/QhmJcX4McuqaLUrC8bSOj1ty
KeVil0akq3nU+xHl5Ojs
=Pmsx
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"The main addition this time around is the new ARM "SCMI" framework,
which is the latest in a series of standards coming from ARM to do
power management in a platform independent way.
This has been through many review cycles, and it relies on a rather
interesting way of using the mailbox subsystem, but in the end I
agreed that Sudeep's version was the best we could do after all.
Other changes include:
- the ARM CCN driver is moved out of drivers/bus into drivers/perf,
which makes more sense. Similarly, the performance monitoring
portion of the CCI driver are moved the same way and cleaned up a
little more.
- a series of updates to the SCPI framework
- support for the Mediatek mt7623a SoC in drivers/soc
- support for additional NVIDIA Tegra hardware in drivers/soc
- a new reset driver for Socionext Uniphier
- lesser bug fixes in drivers/soc, drivers/tee, drivers/memory, and
drivers/firmware and drivers/reset across platforms"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (87 commits)
reset: uniphier: add ethernet reset control support for PXs3
reset: stm32mp1: Enable stm32mp1 reset driver
dt-bindings: reset: add STM32MP1 resets
reset: uniphier: add Pro4/Pro5/PXs2 audio systems reset control
reset: imx7: add 'depends on HAS_IOMEM' to fix unmet dependency
reset: modify the way reset lookup works for board files
reset: add support for non-DT systems
clk: scmi: use devm_of_clk_add_hw_provider() API and drop scmi_clocks_remove
firmware: arm_scmi: prevent accessing rate_discrete uninitialized
hwmon: (scmi) return -EINVAL when sensor information is unavailable
amlogic: meson-gx-socinfo: Update soc ids
soc/tegra: pmc: Use the new reset APIs to manage reset controllers
soc: mediatek: update power domain data of MT2712
dt-bindings: soc: update MT2712 power dt-bindings
cpufreq: scmi: add thermal dependency
soc: mediatek: fix the mistaken pointer accessed when subdomains are added
soc: mediatek: add SCPSYS power domain driver for MediaTek MT7623A SoC
soc: mediatek: avoid hardcoded value with bus_prot_mask
dt-bindings: soc: add header files required for MT7623A SCPSYS dt-binding
dt-bindings: soc: add SCPSYS binding for MT7623 and MT7623A SoC
...
|
|
|
Zhichang Yuan
|
adf38bb0b5 |
HISI LPC: Support the LPC host on Hip06/Hip07 with DT bindings
The low-pin-count (LPC) interface of Hip06/Hip07 accesses I/O port space of peripherals. Implement the LPC host controller driver which performs the I/O operations on the underlying hardware. We don't want to touch existing drivers such as ipmi-bt, so this driver applies the indirect-IO introduced in the previous patch after registering an indirect-IO node to the indirect-IO devices list which will be searched by the I/O accessors to retrieve the host-local I/O port. The driver config is set as a bool instead of a tristate. The reason here is that, by the very nature of the driver providing a logical PIO range, it does not make sense to have this driver as a loadable module. Another more specific reason is that the Huawei D03 board which includes Hip06 SoC requires the LPC bus for UART console, so should be built in. Tested-by: dann frazier <dann.frazier@canonical.com> Signed-off-by: Zou Rongrong <zourongrong@huawei.com> Signed-off-by: Zhichang Yuan <yuanzhichang@hisilicon.com> Signed-off-by: John Garry <john.garry@huawei.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Rob Herring <robh@kernel.org> # dts part |
|
|
Robin Murphy
|
3de6be7a3d |
drivers/bus: Split Arm CCI driver
The arm-cci driver is really two entirely separate drivers; one for MCPM port control and the other for the performance monitors. Since they are already relatively self-contained, let's take the plunge and move the PMU parts out to drivers/perf where they belong these days. For non-MCPM systems this leaves a small dependency on the remaining "bus" stub for initial probing and discovery, but we end up with something that still fits the general pattern of its fellow system PMU drivers to ease future maintenance. Moving code to a new file also offers a perfect excuse to modernise the license/copyright headers and clean up some funky linewraps on the way. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Suzuki Poulose <suzuki.poulose@arm.com> Acked-by: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
|
|
Robin Murphy
|
1888d3ddc3 |
drivers/bus: Move Arm CCN PMU driver
The arm-ccn driver is purely a perf driver for the CCN PMU, not a bus driver in the sense of the other residents of drivers/bus/, so let's move it to the appropriate place for SoC PMU drivers. Not to mention moving the documentation accordingly as well. Acked-by: Pawel Moll <pawel.moll@arm.com> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
|
|
Bogdan Purcareata
|
6bd067c48e |
staging: fsl-mc: Move core bus out of staging
Move the source files out of staging into their final locations: -mc.h include file in drivers/staging/fsl-mc/include go to include/linux/fsl -source files in drivers/staging/fsl-mc/bus go to drivers/bus/fsl-mc -overview.rst, providing an overview of DPAA2, goes to Documentation/networking/dpaa2/overview.rst Update or delete other remaining staging files -- Makefile, Kconfig, TODO. Update dpaa2_eth and dpio staging drivers. Add integration bits for the documentation build system. Signed-off-by: Stuart Yoder <stuyoder@gmail.com> [rebased, add dpaa2_eth and dpio #include updates] Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> [rebased, split irqchip to separate patch] Signed-off-by: Bogdan Purcareata <bogdan.purcareata@nxp.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
|
|
Paul Gortmaker
|
a248efb3d6 |
bus: simple-pm-bus: convert bool SIMPLE_PM_BUS to tristate
The Kconfig currently controlling compilation of this code is:
config SIMPLE_PM_BUS
bool "Simple Power-Managed Bus Driver"
...meaning that it currently is not being built as a module by anyone.
In removing the orphaned modular support in a previous patch set,
Geert indicated he'd rather see this code converted to tristate.
I normally don't do that because it extends functionality that I
can't easily run time test or even know if the use case makes sense,
but since in this case the author has nominated it as such, we do
the conversion here.
Note that doesn't change the lack of run time testing ; this change
is only tested for sucessful compile and modpost.
[geert: Ethernet is probed successfully on sh73a0/kzm9g after
insmodding simple-pm-bus.ko]
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
|
|
Linus Torvalds
|
cf9b0772f2 |
ARM: SoC driver updates for v4.15
This branch contains platform-related driver updates for ARM and ARM64,
these are the areas that bring the changes:
New drivers:
- Driver support for Renesas R-Car V3M (R8A77970)
- Power management support for Amlogic GX
- A new driver for the Tegra BPMP thermal sensor
- A new bus driver for Technologic Systems NBUS
Changes for subsystems that prefer to merge through arm-soc:
- The usual updates for reset controller drivers from Philipp Zabel,
with five added drivers for SoCs in the arc, meson, socfpa, uniphier
and mediatek families.
- Updates to the ARM SCPI and PSCI frameworks, from Sudeep Holla,
Heiner Kallweit and Lorenzo Pieralisi.
Changes specific to some ARM-based SoC
- The Freescale/NXP DPAA QBMan drivers from PowerPC can now work
on ARM as well.
- Several changes for power management on Broadcom SoCs
- Various improvements on Qualcomm, Broadcom, Amlogic, Atmel, Mediatek
- Minor Cleanups for Samsung, TI OMAP SoCs
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJaDggbAAoJEGCrR//JCVInIeQQAN1MDyO1UaWiFYnbkVOgzFcj
dqbFOc41DBE/90JoBWE8kR/rjyF83OqztiaYpx9viu2qMMBZVcOwxhCUthWK59c/
IujYdw4zGevLscF+jdrLbXgk97nfaWebsHyTAF307WAdZVJxiVGGzQEcgm71d6Zp
CXjLiUii4winHUMK9FLRY2st0HKAevXhuvZJVV432+sTg3p7fGVilYeGOL5G62WO
zQfCisqzC5q677kGGyUlPRGlHWMPkllsTTnfXcmV/FUiGyVa3lUWY5sEu+wCl96O
U1ffPENeNj/A/4fa1dbErtbiNnC2z/+jf+Dg7Cn8w/dPk4Suf0ppjP8RqIGyxmDl
Wm/UxbwDClxaeF4GSaYh2yKgGRJMH5N87bJnZRINE5ccGiol8Ww/34bFG0xNnfyh
jSAFAc318AFG62WD4lvqWc7LSpzOYxp/MNqIFXKN692St/MJLkx8/q0nTwY1qPY0
3SELz9II3hz+3MfDRqtRi7hZpkgHgQ+UG7S5+Xhmqrl309GOEldCjPVJhhXxWoxK
ZPtZOuyYvGhIC+YAnHaN6lUjADIdNJZHwbuXFImx85oKHVofoxHbcni5vk8Uu7z1
sQNYOtdDGaPG/2u9RJdJlPg/jIgLKxxt/Xm9TYVawpZ5hFANhBTtIq5ExCRAil68
j9sMOrpZ1DzCQyR7zN2v
=qDhq
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"This branch contains platform-related driver updates for ARM and
ARM64, these are the areas that bring the changes:
New drivers:
- driver support for Renesas R-Car V3M (R8A77970)
- power management support for Amlogic GX
- a new driver for the Tegra BPMP thermal sensor
- a new bus driver for Technologic Systems NBUS
Changes for subsystems that prefer to merge through arm-soc:
- the usual updates for reset controller drivers from Philipp Zabel,
with five added drivers for SoCs in the arc, meson, socfpa,
uniphier and mediatek families
- updates to the ARM SCPI and PSCI frameworks, from Sudeep Holla,
Heiner Kallweit and Lorenzo Pieralisi
Changes specific to some ARM-based SoC
- the Freescale/NXP DPAA QBMan drivers from PowerPC can now work on
ARM as well
- several changes for power management on Broadcom SoCs
- various improvements on Qualcomm, Broadcom, Amlogic, Atmel,
Mediatek
- minor Cleanups for Samsung, TI OMAP SoCs"
[ NOTE! This doesn't work without the previous ARM SoC device-tree pull,
because the R8A77970 driver is missing a header file that came from
that pull.
The fact that this got merged afterwards only fixes it at this point,
and bisection of that driver will fail if/when you walk into the
history of that driver. - Linus ]
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (96 commits)
soc: amlogic: meson-gx-pwrc-vpu: fix power-off when powered by bootloader
bus: add driver for the Technologic Systems NBUS
memory: omap-gpmc: Remove deprecated gpmc_update_nand_reg()
soc: qcom: remove unused label
soc: amlogic: gx pm domain: add PM and OF dependencies
drivers/firmware: psci_checker: Add missing destroy_timer_on_stack()
dt-bindings: power: add amlogic meson power domain bindings
soc: amlogic: add Meson GX VPU Domains driver
soc: qcom: Remote filesystem memory driver
dt-binding: soc: qcom: Add binding for rmtfs memory
of: reserved_mem: Accessor for acquiring reserved_mem
of/platform: Generalize /reserved-memory handling
soc: mediatek: pwrap: fix fatal compiler error
soc: mediatek: pwrap: fix compiler errors
arm64: mediatek: cleanup message for platform selection
soc: Allow test-building of MediaTek drivers
soc: mediatek: place Kconfig for all SoC drivers under menu
soc: mediatek: pwrap: add support for MT7622 SoC
soc: mediatek: pwrap: add common way for setup CS timing extenstion
soc: mediatek: pwrap: add MediaTek MT6380 as one slave of pwrap
..
|
|
|
Linus Torvalds
|
8c60969856 |
ARM: SoC platform updates for 4.15
Most of the commits are for defconfig changes, to enable newly added
drivers or features that people have started using. For the changed
lines lines, we have mostly cleanups, the affected platforms are
OMAP, Versatile, EP93xx, Samsung, Broadcom, i.MX, and Actions.
The largest single change is the introduction of the TI "sysc" bus
driver, with the intention of cleaning up more legacy code.
Two new SoC platforms get added this time:
- Allwinner R40 is a modernized version of the A20 chip, now
with a Quad-Core ARM Cortex-A7. According to the manufacturer,
it is intended for "Smart Hardware"
- Broadcom Hurricane 2 (Aka Strataconnect BCM5334X) is a family
of chips meant for managed gigabit ethernet switches, based
around a Cortex-A9 CPU.
Finally, we gain SMP support for two platforms: Renesas R-Car E2
and Amlogic Meson8/8b, which were previously added but only supported
uniprocessor operation.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJaDgf/AAoJEGCrR//JCVIntcMQAKI2q0Dr2giWtKSoH9GDh5co
137MamTj1YExIcmtbDVO22jV4WSKhIduo+rRBYmQ/uvrkUe9tf7I172JeAIzMzGf
HGYJ6fxpaEMUAbUlNcjuXJc7jQXNKLBK2X9CMuwXX3X3HddxKkL38D1d/Mxv5RGu
G1pEe0j734Qio9LpACnb0xnluwyUBJOYNwo7Agj5RWzOrXZ+TdwkiIW0JdQiG7Z5
wabzDa7OW1maB+hVYMAM3wHcqO7DKEvGvjYLRoT12cnOLXq7BNbXqXFufuMUNmNE
ABhWA1h9SYrXT3n5pQLwoonvvTsI7KXCefrZ0wuxbjrdD4yGW1gmgpRee9RfoggD
A6/62wpmSS61X5QWC6BLEa5v/o5NKewndyWhnjLllgJX8sRUbnPQa/xKv7ngdlN5
7YL5HWoNpMQv7fEweSc6j5l/F3yRBndn9TpeKiqCiUiNDrIGlZYhYKIcr9rGESFk
pu2KgK+e9+1k7F4s7LotsA65Q5bZIMveyyVtx0XHXz1G4O8NksoQCLJ3wcqQ2pzI
WpyOO5R1CNltPhKGC7EP3OZcIMlCtCnsNcedb/AGHgPS+ert2UxBnlSeSMBQlLZY
4fDwEAlA1qx9PuG9N3xrK/gAFiFLafK2sNxtVc7NSmXkkdm3xgJ95Y9sa72Y2qNO
rU2LL8SM7cOwhXHrlEFB
=jlJ2
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann:
"Most of the commits are for defconfig changes, to enable newly added
drivers or features that people have started using. For the changed
lines lines, we have mostly cleanups, the affected platforms are OMAP,
Versatile, EP93xx, Samsung, Broadcom, i.MX, and Actions.
The largest single change is the introduction of the TI "sysc" bus
driver, with the intention of cleaning up more legacy code.
Two new SoC platforms get added this time:
- Allwinner R40 is a modernized version of the A20 chip, now with a
Quad-Core ARM Cortex-A7. According to the manufacturer, it is
intended for "Smart Hardware"
- Broadcom Hurricane 2 (Aka Strataconnect BCM5334X) is a family of
chips meant for managed gigabit ethernet switches, based around a
Cortex-A9 CPU.
Finally, we gain SMP support for two platforms: Renesas R-Car E2 and
Amlogic Meson8/8b, which were previously added but only supported
uniprocessor operation"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (118 commits)
ARM: multi_v7_defconfig: Select RPMSG_VIRTIO as module
ARM: multi_v7_defconfig: enable CONFIG_GPIO_UNIPHIER
arm64: defconfig: enable CONFIG_GPIO_UNIPHIER
ARM: meson: enable MESON_IRQ_GPIO in Kconfig for meson8b
ARM: meson: Add SMP bringup code for Meson8 and Meson8b
ARM: smp_scu: allow the platform code to read the SCU CPU status
ARM: smp_scu: add a helper for powering on a specific CPU
dt-bindings: Amlogic: Add Meson8 and Meson8b SMP related documentation
ARM: OMAP3: Delete an unnecessary variable initialisation in omap3xxx_hwmod_init()
ARM: OMAP3: Use common error handling code in omap3xxx_hwmod_init()
ARM: defconfig: select the right SX150X driver
arm64: defconfig: Enable QCOM_IOMMU
arm64: Add ThunderX drivers to defconfig
arm64: defconfig: Enable Tegra PCI controller
cpufreq: imx6q: Move speed grading check to cpufreq driver
arm64: defconfig: re-enable Qualcomm DB410c USB
ARM: configs: stm32: Add MDMA support in STM32 defconfig
ARM: imx: Enable cpuidle for i.MX6DL starting at 1.1
bus: ti-sysc: Fix unbalanced pm_runtime_enable by adding remove
bus: ti-sysc: mark PM functions as __maybe_unused
...
|
|
|
Sebastien Bourdelin
|
5b143d2a6e |
bus: add driver for the Technologic Systems NBUS
This driver implements a GPIOs bit-banged bus, called the NBUS by Technologic Systems. It is used to communicate with the peripherals in the FPGA on the TS-4600 SoM. Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
|
|
Greg Kroah-Hartman
|
b24413180f |
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which makes it harder for compliance tools to determine the correct license. By default all files without license information are under the default license of the kernel, which is GPL version 2. Update the files which contain no license information with the 'GPL-2.0' SPDX license identifier. The SPDX identifier is a legally binding shorthand, which can be used instead of the full boiler plate text. This patch is based on work done by Thomas Gleixner and Kate Stewart and Philippe Ombredanne. How this work was done: Patches were generated and checked against linux-4.14-rc6 for a subset of the use cases: - file had no licensing information it it. - file was a */uapi/* one with no licensing information in it, - file was a */uapi/* one with existing licensing information, Further patches will be generated in subsequent months to fix up cases where non-standard license headers were used, and references to license had to be inferred by heuristics based on keywords. The analysis to determine which SPDX License Identifier to be applied to a file was done in a spreadsheet of side by side results from of the output of two independent scanners (ScanCode & Windriver) producing SPDX tag:value files created by Philippe Ombredanne. Philippe prepared the base worksheet, and did an initial spot review of a few 1000 files. The 4.13 kernel was the starting point of the analysis with 60,537 files assessed. Kate Stewart did a file by file comparison of the scanner results in the spreadsheet to determine which SPDX license identifier(s) to be applied to the file. She confirmed any determination that was not immediately clear with lawyers working with the Linux Foundation. Criteria used to select files for SPDX license identifier tagging was: - Files considered eligible had to be source code files. - Make and config files were included as candidates if they contained >5 lines of source - File already had some variant of a license header in it (even if <5 lines). All documentation files were explicitly excluded. The following heuristics were used to determine which SPDX license identifiers to apply. - when both scanners couldn't find any license traces, file was considered to have no license information in it, and the top level COPYING file license applied. For non */uapi/* files that summary was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 11139 and resulted in the first patch in this series. If that file was a */uapi/* path one, it was "GPL-2.0 WITH Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was: SPDX license identifier # files ---------------------------------------------------|------- GPL-2.0 WITH Linux-syscall-note 930 and resulted in the second patch in this series. - if a file had some form of licensing information in it, and was one of the */uapi/* ones, it was denoted with the Linux-syscall-note if any GPL family license was found in the file or had no licensing in it (per prior point). Results summary: SPDX license identifier # files ---------------------------------------------------|------ GPL-2.0 WITH Linux-syscall-note 270 GPL-2.0+ WITH Linux-syscall-note 169 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21 ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17 LGPL-2.1+ WITH Linux-syscall-note 15 GPL-1.0+ WITH Linux-syscall-note 14 ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5 LGPL-2.0+ WITH Linux-syscall-note 4 LGPL-2.1 WITH Linux-syscall-note 3 ((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3 ((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1 and that resulted in the third patch in this series. - when the two scanners agreed on the detected license(s), that became the concluded license(s). - when there was disagreement between the two scanners (one detected a license but the other didn't, or they both detected different licenses) a manual inspection of the file occurred. - In most cases a manual inspection of the information in the file resulted in a clear resolution of the license that should apply (and which scanner probably needed to revisit its heuristics). - When it was not immediately clear, the license identifier was confirmed with lawyers working with the Linux Foundation. - If there was any question as to the appropriate license identifier, the file was flagged for further research and to be revisited later in time. In total, over 70 hours of logged manual review was done on the spreadsheet to determine the SPDX license identifiers to apply to the source files by Kate, Philippe, Thomas and, in some cases, confirmation by lawyers working with the Linux Foundation. Kate also obtained a third independent scan of the 4.13 code base from FOSSology, and compared selected files where the other two scanners disagreed against that SPDX file, to see if there was new insights. The Windriver scanner is based on an older version of FOSSology in part, so they are related. Thomas did random spot checks in about 500 files from the spreadsheets for the uapi headers and agreed with SPDX license identifier in the files he inspected. For the non-uapi files Thomas did random spot checks in about 15000 files. In initial set of patches against 4.14-rc6, 3 files were found to have copy/paste license identifier errors, and have been fixed to reflect the correct identifier. Additionally Philippe spent 10 hours this week doing a detailed manual inspection and review of the 12,461 patched files from the initial patch version early this week with: - a full scancode scan run, collecting the matched texts, detected license ids and scores - reviewing anything where there was a license detected (about 500+ files) to ensure that the applied SPDX license was correct - reviewing anything where there was no detection but the patch license was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied SPDX license was correct This produced a worksheet with 20 files needing minor correction. This worksheet was then exported into 3 different .csv files for the different types of files to be modified. These .csv files were then reviewed by Greg. Thomas wrote a script to parse the csv files and add the proper SPDX tag to the file, in the format that the file expected. This script was further refined by Greg based on the output to detect more types of files automatically and to distinguish between header and source .c files (which need different comment types.) Finally Greg ran the script using the .csv files to generate the patches. Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
|
|
Tony Lindgren
|
0eecc636e5 |
bus: ti-sysc: Add minimal TI sysc interconnect target driver
We can handle the sysc interconnect target module in a generic way for many TI SoCs. Initially let's just enable runtime PM with autosuspend, and probe the children. This can already be used for idling interconnect target modules that don't have any device driver available for the child devices. For now, the "ti,hwmods" custom binding is still required. That will be eventually deprecated in later patches. And more features will be added, such as parsing for sysc capabilities so we can continue removing the legacy platform data. Cc: Benoît Cousson <bcousson@baylibre.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Nishanth Menon <nm@ti.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Sakari Ailus <sakari.ailus@iki.fi> Cc: Tero Kristo <t-kristo@ti.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: linux-kernel@vger.kernel.org Signed-off-by: Tony Lindgren <tony@atomide.com> |
|
|
Jagan Teki
|
dc1a37b2b9 |
bus: sunxi-rsb: Enable by default for ARM64
Allwinner's A64 SoC uses the "Reduced Serial Bus" to communicate with its companion PMIC. Since arm64 does not have separate defconfigs for each platform or processor family, enable this driver by default for ARM64 as well. Note that the Kconfig symbol already depends on ARCH_SUNXI. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> [wens@csie.org: Refined commit message] Signed-off-by: Chen-Yu Tsai <wens@csie.org> |
|
|
Linus Torvalds
|
af3c8d9850 |
main drm pull for v4.13
-----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJZYseIAAoJEAx081l5xIa+85kP/0zKzKKVzZXSXG2TAGb5jNfk Ex+TELG8tWk9KBxA7lEE5c0WEsnP79cNoXZLQu8wlUzO8+kwQK5Bz0zgNUkpSuo1 RthwdsxBQX1++UxB+HoSG+dOa7hkKVqlgQR3z9qyhsBXzetkJV0DoYcpMV0A1EWd 6Jzt+AvCShVkcW+21LqHPlc5EIVewrDMoA3oU6aYCLhyAOUTVvvQB2ML8YApH7TM JrSrzCFHTrQEBbGUrZQhzR0sZzZzk9byntb/I/mdVbHeCyIHiL8sC4PfWSOyyazm GkPnA8G3aFAY9haBRz9jG/VBr1yVb0mCBjkWQ1lGfIAOCDDSc+d7PDXdG+i4AewK jZheXlrDIdGgmJLy4W3rdEqJvdf7UQHZOs8594OL19l4+FxCTrol1JSHSMeavCvr 8bUNil9Jb/ONU/wmp+q55U0k4TCTyerUA7gKnuaJAwBvd4n78/PKmQnbrWinDyJc GQXp6zESk9bKt5DXSnVZuVf4POTzpuAsQkkfX1V2y145EHTQYfS3jLENWqEjyZUy QtKCHZvRkJfGaFU4Pr+vBo9Iu1GlA5OiOv08QadldTT4OxUI0T6yaLDobHCQfKPE sc3wCuCM+/dAnqoKDcGC4hAmF8zDdO0kw65P2m7uC6T9Jm1G35CioKbzo+fzUhuL fg5TBpbp2Wwe2oPA5iBm =2S5N -----END PGP SIGNATURE----- Merge tag 'drm-for-v4.13' of git://people.freedesktop.org/~airlied/linux Pull drm updates from Dave Airlie: "This is the main pull request for the drm, I think I've got one later driver pull for mediatek SoC driver, I'm undecided on if it needs to go to you yet. Otherwise summary below: Core drm: - Atomic add driver private objects - Deprecate preclose hook in modern drivers - MST bandwidth tracking - Use kvmalloc in more places - Add mode_valid hook for crtc/encoder/bridge - Reduce sync_file construction time - Documentation updates - New DRM synchronisation object support New drivers: - pl111 - pl111 CLCD display controller Panel: - Innolux P079ZCA panel driver - Add NL12880B20-05, NL192108AC18-02D, P320HVN03 panels - panel-samsung-s6e3ha2: Add s6e3hf2 panel support i915: - SKL+ watermark fixes - G4x/G33 reset improvements - DP AUX backlight improvements - Buffer based GuC/host communication - New getparam for (sub)slice infomation - Cannonlake and Coffeelake initial patches - Execbuf optimisations radeon/amdgpu: - Lots of Vega10 bug fixes - Preliminary raven support - KIQ support for compute rings - MEC queue management rework - DCE6 Audio support - SR-IOV improvements - Better radeon/amdgpu selection support nouveau: - HDMI stereoscopic support - Display code rework for >= GM20x GPUs msm: - GEM rework for fine-grained locking - Per-process pagetable work - HDMI fixes for Snapdragon 820. vc4: - Remove 256MB CMA limit from vc4 - Add out-fence support - Add support for cygnus - Get/set tiling ioctls support - Add T-format tiling support for scanout zte: - add VGA support. etnaviv: - Thermal throttle support for newer GPUs - Restore userspace buffer cache performance - dma-buf sync fix stm: - add stm32f429 display support exynos: - Rework vblank handling - Fixup sw-trigger code sun4i: - V3s display engine support - HDMI support for older SoCs - Preliminary work on dual-pipeline SoCs. rcar-du: - VSP work imx-drm: - Remove counter load enable from PRE - Double read/write reduction flag support tegra: - Documentation for the host1x and drm driver. - Lots of staging ioctl fixes due to grate project work. omapdrm: - dma-buf fence support - TILER rotation fixes" * tag 'drm-for-v4.13' of git://people.freedesktop.org/~airlied/linux: (1270 commits) drm: Remove unused drm_file parameter to drm_syncobj_replace_fence() drm/amd/powerplay: fix bug fail to remove sysfs when rmmod amdgpu. amdgpu: Set cik/si_support to 1 by default if radeon isn't built drm/amdgpu/gfx9: fix driver reload with KIQ drm/amdgpu/gfx8: fix driver reload with KIQ drm/amdgpu: Don't call amd_powerplay_destroy() if we don't have powerplay drm/ttm: Fix use-after-free in ttm_bo_clean_mm drm/amd/amdgpu: move get memory type function from early init to sw init drm/amdgpu/cgs: always set reference clock in mode_info drm/amdgpu: fix vblank_time when displays are off drm/amd/powerplay: power value format change for Vega10 drm/amdgpu/gfx9: support the amdgpu.disable_cu option drm/amd/powerplay: change PPSMC_MSG_GetCurrPkgPwr for Vega10 drm/amdgpu: Make amdgpu_cs_parser_init static (v2) drm/amdgpu/cs: fix a typo in a comment drm/amdgpu: Fix the exported always on CU bitmap drm/amdgpu/gfx9: gfx_v9_0_enable_gfx_static_mg_power_gating() can be static drm/amdgpu/psp: upper_32_bits/lower_32_bits for address setup drm/amd/powerplay/cz: print message if smc message fails drm/amdgpu: fix typo in amdgpu_debugfs_test_ib_init ... |
|
|
Rob Clark
|
51c9fbe694 |
bus: SIMPLE_PM_BUS does not depend on ARCH_RENESAS
In fact, it is needed for PCI to work on msm8996 (and probably other things). No idea why it was depending on renesas but that doesn't make any sense. So drop the dependency. Signed-off-by: Rob Clark <robdclark@gmail.com> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Simon Horman <horms+renesas@verge.net.au> Acked-by: Arnd Bergmann <arnd@arndb.de> |
|
|
Doug Berger
|
8c7aa17ad1 |
bus: brcmstb_gisb: enable driver for ARM64 architecture
The ARM64 architecture can provide meaningful diagnostic output from the GISB arbiter solely from interrupts and notifiers without the need to hook the low level fault handlers. Signed-off-by: Doug Berger <opendmb@gmail.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> |
|
|
Linus Walleij
|
c5d8ccfec0 |
bus: qcom_ebi2: default y if ARCH_QCOM
Since we want this external bus to be available on multi_v7 builds, set to default ARCH_QCOM so we get it selected whenever QCOM is enabled. Suggested-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Andy Gross <andy.gross@linaro.org> |
|
|
Linus Torvalds
|
991688bfc6 |
ARM: SoC driver updates for v4.10
Driver updates for ARM SoCs, including a couple of newly added drivers:
- A new driver for the power management controller on TI Keystone
- Support for the prerelease "SCPI" firmware protocol that ended up
being shipped by Amlogic in their GXBB SoC.
- A soc_device can now be matched using a glob from inside the
kernel, when another driver wants to know the specific chip
it is running on and cannot find out from DT, firmware or hardware.
- Renesas SoCs now support identification through the soc_device
interface, both in user space and kernel.
- Renesas r8a7743 and r8a7745 gain support for their system controller
- A new checking module for the ARM "PSCI" (not to be confused
with "SCPI" mentioned above) firmware interface.
- A new driver for the Tegra GMI memory interface
- Support for the Tegra firmware interfaces with their
power management controllers
As usual, the updates for the reset controller framework are merged
here, as they tend to touch multiple SoCs as well, including a new
driver for the Oxford (now Broadcom) OX820 chip and the Tegra
bpmp interface.
The existing drivers for Atmel, Qualcomm, NVIDIA, TI Davinci, and
Rockchips SoCs see some further updates.
Conflicts:
- ARCH_RENESAS now selects SOC_BUS, but no longer needs GPIOLIB
- drivers/soc/renesas/Makefile: multiple files got added, keep
all in logical sorting
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAWFMaGWCrR//JCVInAQLs5RAA3I1I8/R+pd5jfMaAB8Od3S4g8YSqIDjC
EIOoDPx9GDV70+cGs4ea+L9bfGs3ePGivCtcbftNsLDAueQ2jKMa3ShqxA/MMbJE
rWQi/ARaDFY0nHL8VPWq7XyYwwrah+/gKBr8UhkaKI0vy6DBqxyCknrS2kgF88rv
DVs2wnRvDM7GVUax0JDzuySR7BXJIuUfS78jPMESASbTQktsZTFUyH+osiqHtptD
M5bPC8rxOeZXljt3DOvXSdK9rVnji/A3nznY4r3tlt805eaOA7CzjVSsY27WQel0
63uj+FgE+eM0sECIxpkNbH/HHq2V4QkUoy3fk0xPkzRbllBBpS+UieGamTnPJup8
wf5uiH1IqLLLV9F/504S92fp0pgFPpOGYWZnBDlIbh3aGq4tMjIRqRYMTyCT02hN
+b54v0SuImFiN6p8HMS1ugYQ+1m9TU40b5pZkzkTJbSQOMm6oi3j0A0orXU/TPKd
FVMrlUyfh+yu+vs1hGWLs1+mBjFnxXzSc8yJeaCdX4MvCY5/aVJZ+cwq4Bk+1YU5
9Qhkeo5JV/l9FlrjxomnEq3l/WV/pFmj7JRZsb1BM88m+5LYUf2lv11b5B4FvrTd
yx8SSpe3+ofIijdNbJ8IywF6y0OXF6UnrlouOVdSIp+wPs+pibdU/5gQep16pvqd
WW6sVWn6quA=
=6dP8
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs, including a couple of newly added
drivers:
- A new driver for the power management controller on TI Keystone
- Support for the prerelease "SCPI" firmware protocol that ended up
being shipped by Amlogic in their GXBB SoC.
- A soc_device can now be matched using a glob from inside the
kernel, when another driver wants to know the specific chip it is
running on and cannot find out from DT, firmware or hardware.
- Renesas SoCs now support identification through the soc_device
interface, both in user space and kernel.
- Renesas r8a7743 and r8a7745 gain support for their system
controller
- A new checking module for the ARM "PSCI" (not to be confused with
"SCPI" mentioned above) firmware interface.
- A new driver for the Tegra GMI memory interface
- Support for the Tegra firmware interfaces with their power
management controllers
As usual, the updates for the reset controller framework are merged
here, as they tend to touch multiple SoCs as well, including a new
driver for the Oxford (now Broadcom) OX820 chip and the Tegra bpmp
interface.
The existing drivers for Atmel, Qualcomm, NVIDIA, TI Davinci, and
Rockchips SoCs see some further updates"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (76 commits)
misc: sram: remove useless #ifdef
drivers: psci: Allow PSCI node to be disabled
drivers: psci: PSCI checker module
soc: renesas: Identify SoC and register with the SoC bus
firmware: qcom: scm: Return PTR_ERR when devm_clk_get fails
firmware: qcom: scm: Remove core, iface and bus clocks dependency
dt-bindings: firmware: scm: Add MSM8996 DT bindings
memory: da8xx-ddrctl: drop the call to of_flat_dt_get_machine_name()
bus: da8xx-mstpri: drop the call to of_flat_dt_get_machine_name()
ARM: shmobile: Document DT bindings for Product Register
soc: renesas: rcar-sysc: add R8A7745 support
reset: Add Tegra BPMP reset driver
dt-bindings: firmware: Allow child nodes inside the Tegra BPMP
dt-bindings: Add power domains to Tegra BPMP firmware
firmware: tegra: Add BPMP support
firmware: tegra: Add IVC library
dt-bindings: firmware: Add bindings for Tegra BPMP
mailbox: tegra-hsp: Use after free in tegra_hsp_remove_doorbells()
mailbox: Add Tegra HSP driver
firmware: arm_scpi: add support for pre-v1.0 SCPI compatible
...
|
|
|
Olof Johansson
|
84f1f0c199 |
bus: Add Tegra GMI support
This provides a driver to enable the use of the Generic Memory Interface found on Tegra SoCs that can host various types of high-speed devices. -----BEGIN PGP SIGNATURE----- iQIwBAABCAAaBQJYLyYMExx0cmVkaW5nQG52aWRpYS5jb20ACgkQ3SOs138+s6Eg 8Q//Zz6c5myh362f3h0RAV+L1VlZHzN+G//kIonNVoZEaaIWJgb2VyfxDXCy9ngC +crwgKc0Y1/3uzOmbCllLFcqM7qpyUcT8/g8HzpWqq2w9oQwBfr1MQscEZa9C5zI Ql4LVXIK/RvACzrdgGqlPxu4LMGLrmIwSUbBd2VMImW1MMryT/7HV3DAd2F5d/zt 9S/W74+HvdjYT+zsuz4vo6qOB2eN1mQHjL4WwAgOieF3QRVgLuTzZ8W6lTndG4LW mbAq5DQnfUcf8/eO2nroltaxUq+r2SM/XkgOKI94xFfYUnpZJOzb7kQruv9n6FTK lZXmX/webUMgKXtnqA66O/w0ms3Xg4CCMbZ/LU/E7AjbwN2DGyfc/CQdlIUtUlV5 qA/9w39GJaGcfFjFwcI7PCwrpgkgGZRFSnUhCaiwgUgLyCYqUJs0YvcHZG/bpKh0 FIVburEnhSt5huHzeTwY/OByATPsAYPSwJmQ2K1G+zahuCO5fmAgn9lOV7NzKcni fOTHWhIxELWdYJZHFUfvUE0x4o0QvgamtK/ytFUASdc9JHC8R66dQk6g+mfYOaig VQD4j4Yx2EZhbcHKUmIXAT6NO1qiSoctagvx/S9pyUG/nj7H3UmKEvqSZdD0ir4I togqp/z9bUp2C1NzanHJsD6ik3PYAo1R/VFwMTDBRrvv4VA= =xCcZ -----END PGP SIGNATURE----- Merge tag 'tegra-for-4.10-bus' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers bus: Add Tegra GMI support This provides a driver to enable the use of the Generic Memory Interface found on Tegra SoCs that can host various types of high-speed devices. * tag 'tegra-for-4.10-bus' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: bus: Add support for Tegra Generic Memory Interface dt/bindings: Add bindings for Tegra GMI controller Signed-off-by: Olof Johansson <olof@lixom.net> |
|
|
Mirza Krak
|
40eb477678 |
bus: Add support for Tegra Generic Memory Interface
The Generic Memory Interface bus can be used to connect high-speed devices such as NOR flash, FPGAs, DSPs... Signed-off-by: Mirza Krak <mirza.krak@gmail.com> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Colibri T20/T30 on EvalBoard V3.x and GMI-Memory Board Acked-by: Jon Hunter <jonathanh@nvidia.com> [treding@nvidia.com: symmetry and coding style OCD] Signed-off-by: Thierry Reding <treding@nvidia.com> |
|
|
Bartosz Golaszewski
|
8e7223fc86 |
bus: davinci: add support for da8xx bus master priority control
Create the driver for the da8xx master peripheral priority configuration and implement support for writing to the three Master Priority registers on da850 SoCs. Reviewed-by: Kevin Hilman <khilman@baylibre.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> [nsekhar@ti.com: subject line adjustment] Signed-off-by: Sekhar Nori <nsekhar@ti.com> |
|
|
Linus Walleij
|
5fac7e8405 |
bus: qcom-ebi2: depend on ARCH_QCOM or COMPILE_TEST
This hides the option for people who do not want their Kconfig vision cluttered (i.e. x86) and enables compile testing apart from the supported main arch. Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net> |
|
|
Linus Walleij
|
d6db68b2de |
bus: qcom-ebi2: depend on HAS_IOMEM
After being asked to not depend on ARCH_QCOM* or similar, unsurprisingly compilation fails on UM as it has no I/O memory: drivers/built-in.o: In function `qcom_ebi2_probe': >> drivers/bus/qcom-ebi2.c:333: undefined reference to `devm_ioremap_resource' Fix this by letting the Kconfig atleast depend on HAS_IOMEM. Reported-by: kbuild test robot <fengguang.wu@intel.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Andy Gross <andy.gross@linaro.org> Cc: linux-arm-msm@vger.kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net> |
|
|
Arnd Bergmann
|
ea19b4cd61 |
Qualcomm EBI2 bindings and bus driver.
-----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJX0WdgAAoJEEEQszewGV1zZRoP/2ZyKVmu0fEZmeQQ8dRnsUUX 9puhb82Uim/SGc7RYs6C/b/9Ifpr0SRtJT7JrG5mFZrpVM/JqXbsFgRWxYzlW2vb GU+XQy4zL7x3pQVTlTmkjcKbIsioi8ugnwRKDwwozR2zCdRbr8hpKRPUW+A/QbvO Okh0I8jx9C6zFPCI7qvZKwkKmDbpkLWBJ4qno0qAqUZXvLUgveuVwf9f6kAP+Bid ZFMjsCnUQRSAQVDI9uFtmOKSE0Vnw325HX/i/FqpM2drsyYs16xevzSO2VDST4ZQ RaqxROFycTTgb8eTM6wIZ+Bp33V7zNAFOyLrf4lzElYFGZ2KU5UmsV4Amkn9uauZ 1BFoZbOjBJZZF2GwPCmhfu/6SqWfS2JVbszc8WAziZOjYG16PZn3GwJ38R+9Z3MB HYPmM0aMnotmtegXPM5NJrNrorD7dKQVuNVMmeHYYQ4RET+9Zsu33aUvYRMAux+l nznlVGTWRpx3z0laKL/U0BQuVbhOs1ctX8beDVNbx7HuT+/ghZ0MRPwd7E9sgNtQ nBi3HRpgMa4/qfUd7jBoww1JMn5cgN9daYjcirKin0I+Rquxabx5w0WWDTlNrZcZ CtL19xuQmQ2WOto//9D+x+N1T0qjPAsAC+pYSyvXibTZqEJRjc3Mj22alqvhDwjw K/gsIL4Ni0c5+Yd9U3vm =/gVm -----END PGP SIGNATURE----- Merge tag 'qcom-ebi2-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/drivers Pull "Qualcomm EBI2 bindings and bus driver" from Linus Walleij * tag 'qcom-ebi2-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator: bus: qcom: add EBI2 driver bus: qcom: add EBI2 device tree bindings Acked-by: Andy Gross <andy.gross@linaro.org> |
|
|
Linus Walleij
|
335a127548 |
bus: qcom: add EBI2 driver
This adds a driver for the Qualcomm External Bus Interface EBI2 found in the MSM8660 and APQ8060 SoCs (at least). This was tested with the SMSC9112 ethernet on the APQ8060 Dragonboard sitting on top of the SLOW CS2. Some of my understanding if very vague and based on guesses and extrapolations: the documentation in APQ8060 Qualcomm Application Processor User Guide 80-N7150-14 Rev. A describes select features but does not document the register bit fields. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
|
|
Thierry Reding
|
2d301c0721 |
bus: tegra-aconnect: Make symbol tristate
The driver uses symbols that weren't being exported in earlier versions of the Linux kernel and hence it had to be made bool. The exports have been merged into v4.8-rc1, so the driver can now be built as a module again. Signed-off-by: Thierry Reding <treding@nvidia.com> |
|
|
Jon Hunter
|
46a88534af |
bus: Add support for Tegra ACONNECT
Add a bus driver for the Tegra ACONNECT which is used to interface to various devices within the Audio Processing Engine (APE). The purpose of the bus driver is to register child devices that are accessed via the ACONNECT bus and through the device parent child relationship, ensure that the appropriate power domain and clocks are enabled for the ACONNECT when any of the child devices are active. Hence, the ACONNECT driver simply enables runtime-pm for the ACONNECT device so that when a child device is resumed, it will enable the power-domain and clocks associated with the ACONNECT. Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> |
|
|
Suzuki K Poulose
|
5420f9fd15 |
arm-ccn: Enable building as module
arm-ccn driver uses irq_set_affinity, which is not exported and hence cannot be built as a module, eventhough we have all the bits ready. This patch makes use of the exported helper irq_set_affinity_hint() instead. Also, the __free_irq expects the affinity_hint to be NULL when we free the irq. So set the affinity_hint to NULL at clean up. Now that we can build it as a module, update the Kconfig to reflect the change. Cc: Will Deacon <will.deacon@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Acked-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
|
|
Arnd Bergmann
|
c6ba3f6932 |
This pull request contains Broadcom ARM-based SoCs drivers changes:
- Justin adds a soc_dev driver to properly report to user-space the Broadcom STB SoC family, product and revision - Florian reworks how the brcmstb_gisb driver dependency is done to enable it on Broadcom STB MIPS-based SoCs and remove a select in arch/arm/mach-bcm/Kconfig -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXG8wwAAoJEIfQlpxEBwcEO3IP/1kmk92qtFzqQJu2IgZcBReD tTLcjDigvJWA6fa4fsJ8kmtl3rT+cjSEblWSh9oELjbdzEhfk+n2j9ZkMKXRSQIw R57Db/RwIwuzSzUb9NMG3UWoeZ6ebKE+MIKS0pQlpD/uUDRHGYHrgNVFlAJZ7KTF v3Kqb3lUncxeYmCfRenqIPkLARyh6e2GnTk5j8D4fm7Rfrfbu7rVdCmxvJqMpDbg q6f3cWNUYQzbniieOkbw4xKab5PlAq69JXMVc3gNACRuTn8zzRBtBfe96Vf0KFZF +pboW3jzUf0/tr+pPwAkj5ccIVVqx/+5SUha75YShiVTmfSrn57AoZp4vtkxDg5s yEN/rb+fnyc0B5akCH8ukpABIzk60WOmmp4GY6hkR6Ibknxan5PNNaE2DE6fQa60 xSx4duYdNLlUmsfsEFMugbWVY1F8wlxtzHRs9ReZR+44/tH+zOUJWyGXb/GJEkhP 4L6KtGFVpWlTb77gWj42ZdAzMYTz1M8HtuqDmPXpf5ucVz6zPrzO5PmcAwarktLR fxtqztdjva2BphaboGLyZD+Xr8qeSISBncyogZQI9rI2C13v2Y8W5thw+IFR0VAk uoADTLthFEogidrLpqO8rdSyrPIl3wVdCvFb1XoUGdYa6c1ElWHEhlkhcdUDq6Vd zNuh2l+0UqWmp3jeE4cR =OJuu -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-4.7/drivers' of http://github.com/Broadcom/stblinux into next/drivers Merge "Broadcom ARM-based SoCs drivers changes" from Florian Fainelli: - Justin adds a soc_dev driver to properly report to user-space the Broadcom STB SoC family, product and revision - Florian reworks how the brcmstb_gisb driver dependency is done to enable it on Broadcom STB MIPS-based SoCs and remove a select in arch/arm/mach-bcm/Kconfig * tag 'arm-soc/for-4.7/drivers' of http://github.com/Broadcom/stblinux: bus: brcmstb_gisb: Rework dependencies soc: brcmstb: add SoC driver to brcmstb |
|
|
Florian Fainelli
|
b0ec633c28 |
bus: brcmstb_gisb: Rework dependencies
Do not have the machine Kconfig entry point need to select BRCMSTB_GISB_ARB, instead, just let it be default ARCH_BRCMSTB which is a better way to deal with this. While at it, also make it default BMIPS_GENERIC so the legacy MIPS-based STB platforms can benefit from the same thing. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> |
|
|
Simon Horman
|
41feae79f2 |
bus: simple-pm-bus: Use ARCH_RENESAS
Make use of ARCH_RENESAS in place of ARCH_SHMOBILE. This is part of an ongoing process to migrate from ARCH_SHMOBILE to ARCH_RENESAS the motivation for which being that RENESAS seems to be a more appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs. Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |
|
|
Linus Torvalds
|
2c856e14da |
arm[64] perf updates for 4.6:
- Initial support for ARMv8.1 CPU PMUs - Support for the CPU PMU in Cavium ThunderX - CPU PMU support for systems running 32-bit Linux in secure mode - Support for the system PMU in ARM CCI-550 (Cache Coherent Interconnect) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABCgAGBQJW794rAAoJELescNyEwWM0O5IH/0ejoUjip3n4dFZnSzAbQQZe VxCy3DXW5gS8YaswwX2dFw9K772/BpHlazq8AIJIhaR+b+Zzl5t0iOc12HluDilV pMvi0JTCxwJhsEiKZnP0cVAU9HM6MAgtMOEegkd/YNESKQey30NeDtIcz/pQfTUV 28AF71+w5VPj/1EpHEEhHQsASRIx7eDbKzThzdlb8PnDS0o23QJhL9HjVTNIAlB8 BGxrUBKtBu0eH2Hx33vNjc7UYx1WZQlCk5cAaXevA8mbFXzYaMQI2Cel2nbNMO9i eu5zPkDUCG7dq16PxK6IgM4AsDCtmmDuckLdN6UEQWYxkLbb2qHNRKtj0bKB8Sk= =E4PE -----END PGP SIGNATURE----- Merge tag 'arm64-perf' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm[64] perf updates from Will Deacon: "I have another mixed bag of ARM-related perf patches here. It's about 25% CPU and 75% interconnect, but with drivers/bus/ languishing without an obvious maintainer or tree, Olof and I agreed to keep all of these PMU patches together. I suspect a whole load of code from drivers/bus/arm-* can be moved under drivers/perf/, so that's on the radar for the future. Summary: - Initial support for ARMv8.1 CPU PMUs - Support for the CPU PMU in Cavium ThunderX - CPU PMU support for systems running 32-bit Linux in secure mode - Support for the system PMU in ARM CCI-550 (Cache Coherent Interconnect)" * tag 'arm64-perf' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (26 commits) drivers/perf: arm_pmu: avoid NULL dereference when not using devicetree arm64: perf: Extend ARMV8_EVTYPE_MASK to include PMCR.LC arm-cci: remove unused variable arm-cci: don't return value from void function arm-cci: make private functions static arm-cci: CoreLink CCI-550 PMU driver arm-cci500: Rearrange PMU driver for code sharing with CCI-550 PMU arm-cci: CCI-500: Work around PMU counter writes arm-cci: Provide hook for writing to PMU counters arm-cci: Add helper to enable PMU without synchornising counters arm-cci: Add routines to save/restore all counters arm-cci: Get the status of a counter arm-cci: write_counter: Remove redundant check arm-cci: Delay PMU counter writes to pmu::pmu_enable arm-cci: Refactor CCI PMU enable/disable methods arm-cci: Group writes to counter arm-cci: fix handling cpumask_any_but return value arm-cci: simplify sysfs attr handling drivers/perf: arm_pmu: implement CPU_PM notifier arm64: dts: Add Cavium ThunderX specific PMU ... |
|
|
Suzuki K Poulose
|
d7dd5fd773 |
arm-cci: CoreLink CCI-550 PMU driver
Add ARM CoreLink CCI-550 cache coherent interconnect PMU driver support. The CCI-550 PMU shares all the attributes of CCI-500 PMU, except for an additional master interface (MI-6 - 0xe). CCI-550 requires the same work around as for CCI-500 to write to the PMU counter. Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Punit Agrawal <punit.agrawal@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> |
|
|
Suzuki K Poulose
|
3d2e870137 |
arm-cci500: Rearrange PMU driver for code sharing with CCI-550 PMU
CCI-550 PMU shares most of the CCI-500 PMU attributes including the event format, PMU event codes. The only difference is an additional master interface (MI6 - 0xe). Hence we share the driver code for both, except for a model specific event validate method. This patch renames the common CCI500 symbols to CCI5xx, including the Kconfig symbol. No functional changes to the PMU driver. Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Punit Agrawal <punit.agrawal@arm.com> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> |
|
|
Masahiro Yamada
|
047a555f95 |
bus: uniphier-system-bus: revive tristate prompt
At first, commit |
|
|
Arnd Bergmann
|
326ea45aa8 |
bus: uniphier: allow only built-in driver
Building the newly added uniphier system bus driver as a module causes a link error, so let's only allow it to be built-in for now, to fix allmodconfig: ERROR: "of_default_bus_match_table" [drivers/bus/uniphier-system-bus.ko] undefined! Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
|
|
Masahiro Yamada
|
4b7f48d395 |
bus: uniphier-system-bus: add UniPhier System Bus driver
The UniPhier System Bus is an external bus that connects on-board devices to the UniPhier SoC. Each bank (chip select) is dynamically mapped to the CPU-viewed address base via the bus controller. The bus controller must be configured before any access to the bus. This driver parses the "ranges" property of the System Bus node and initialized the bus controller. After the bus becomes ready, devices below it are populated. Note: Each bank can be mapped anywhere in the supported address space; there is nothing preventing us from assigning bank 0 on 0x42000000, 0x43000000, or anywhere as long as such region is not used by others. So, the "ranges" is just one possible software configuration, which does not seem to fit in device tree because device tree is a hardware description language. However, of_translate_address() requires "ranges" in every bus node between CPUs and device mapped on the CPU address space. In other words, "ranges" properties must be statically defined in device tree. After some discussion, I decided the dynamic address reassignment by the driver is too bothersome. Instead, the device tree should provide a reasonable translation setup that the OS can rely on. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Olof Johansson <olof@lixom.net> |
|
|
Linus Torvalds
|
b44a3d2a85 |
ARM: SoC driver updates for v4.4
As we've enabled multiplatform kernels on ARM, and greatly done away with
the contents under arch/arm/mach-*, there's still need for SoC-related
drivers to go somewhere.
Many of them go in through other driver trees, but we still have
drivers/soc to hold some of the "doesn't fit anywhere" lowlevel code
that might be shared between ARM and ARM64 (or just in general makes
sense to not have under the architecture directory).
This branch contains mostly such code:
- Drivers for qualcomm SoCs for SMEM, SMD and SMD-RPM, used to communicate
with power management blocks on these SoCs for use by clock, regulator and
bus frequency drivers.
- Allwinner Reduced Serial Bus driver, again used to communicate with PMICs.
- Drivers for ARM's SCPI (System Control Processor). Not to be confused with
PSCI (Power State Coordination Interface). SCPI is used to communicate with
the assistant embedded cores doing power management, and we have yet to see
how many of them will implement this for their hardware vs abstracting in
other ways (or not at all like in the past).
- To make confusion between SCPI and PSCI more likely, this release also
includes an update of PSCI to interface version 1.0.
- Rockchip support for power domains.
- A driver to talk to the firmware on Raspberry Pi.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWQC+cAAoJEIwa5zzehBx3jEUP/0GpxfDVanEUkudVLLe7J0RH
CNlRan107Cw6hXRUJo7elEsuCALjccXjc1CAH4+RnNpOAeBKW97n+WU7trTv+wUZ
sQX4SkBPKFBlgwGF2qhsi5q74gms/BrgtCa4kNb9joOYso039tlfIOPzK80DMkOm
TkyIJdUCgFJMjCQLhX6kGT0PDcrbIjb6aA2cF3FAVeaJA7uz8lNe/eHJr3oHxIEY
CvC651yJ2mIHQUU4BJx/AJo+wXg3dRUXNCAtBjwLRPEAzduYZXYm1ZTVIby/1q9r
dR2KDFEuibODXmXrDBzKNJwCu/TLJEwo/1oPaEIVfY91XLKfiWUhgVqa1o1I+d9U
XoGPibCW461qFahjQW87MfInALpCOA7/RbTNjFp+MVyipCYvkaYq7KFiYEldgFDx
z4Qx/J4hYc2TlDWrpNiUCZMfmhwi7y+Ib+tnenYTO1eyMuw0e9mfnVdjk5iU3Pvk
Ye4qPqpYclJruyHbYi164878+1lLaW2NCUgC3rkBO/GWPAzp7d9iLWoZ3PuyD5i5
PEjs668UcRdZYbI4rdrhGHL8Eq9Gnuc4Rthu7HxPOK+DG0XgP8r97PhM8aYGYVDO
+yikBtjWRsA9fPj3rMKA3UsQ61DAeR9LmZ0XPGjWFMCjCG0JlUoIMaA+Uu0i8fr8
95qxBVxbO7rhL39r1rhV
=dm+I
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"As we've enabled multiplatform kernels on ARM, and greatly done away
with the contents under arch/arm/mach-*, there's still need for
SoC-related drivers to go somewhere.
Many of them go in through other driver trees, but we still have
drivers/soc to hold some of the "doesn't fit anywhere" lowlevel code
that might be shared between ARM and ARM64 (or just in general makes
sense to not have under the architecture directory).
This branch contains mostly such code:
- Drivers for qualcomm SoCs for SMEM, SMD and SMD-RPM, used to
communicate with power management blocks on these SoCs for use by
clock, regulator and bus frequency drivers.
- Allwinner Reduced Serial Bus driver, again used to communicate with
PMICs.
- Drivers for ARM's SCPI (System Control Processor). Not to be
confused with PSCI (Power State Coordination Interface). SCPI is
used to communicate with the assistant embedded cores doing power
management, and we have yet to see how many of them will implement
this for their hardware vs abstracting in other ways (or not at all
like in the past).
- To make confusion between SCPI and PSCI more likely, this release
also includes an update of PSCI to interface version 1.0.
- Rockchip support for power domains.
- A driver to talk to the firmware on Raspberry Pi"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (57 commits)
soc: qcom: smd-rpm: Correct size of outgoing message
bus: sunxi-rsb: Add driver for Allwinner Reduced Serial Bus
bus: sunxi-rsb: Add Allwinner Reduced Serial Bus (RSB) controller bindings
ARM: bcm2835: add mutual inclusion protection
drivers: psci: make PSCI 1.0 functions initialization version dependent
dt-bindings: Correct paths in Rockchip power domains binding document
soc: rockchip: power-domain: don't try to print the clock name in error case
soc: qcom/smem: add HWSPINLOCK dependency
clk: berlin: add cpuclk
ARM: berlin: dts: add CLKID_CPU for BG2Q
ARM: bcm2835: Add the Raspberry Pi firmware driver
soc: qcom: smem: Move RPM message ram out of smem DT node
soc: qcom: smd-rpm: Correct the active vs sleep state flagging
soc: qcom: smd: delete unneeded of_node_put
firmware: qcom-scm: build for correct architecture level
soc: qcom: smd: Correct SMEM items for upper channels
qcom-scm: add missing prototype for qcom_scm_is_available()
qcom-scm: fix endianess issue in __qcom_scm_is_call_available
soc: qcom: smd: Reject send of too big packets
soc: qcom: smd: Handle big endian CPUs
...
|
|
|
Chen-Yu Tsai
|
d787dcdb9c |
bus: sunxi-rsb: Add driver for Allwinner Reduced Serial Bus
Reduced Serial Bus (RSB) is an Allwinner proprietery interface used to communicate with PMICs and other peripheral ICs. RSB is a two-wire push-pull serial bus that supports 1 master device and up to 15 active slave devices. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Mark Brown <broonie@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net> |
|
|
Suzuki K. Poulose
|
a73b4db2a2 |
arm-cci500: Don't enable PMU driver by default
Disable building CCI-500 PMU driver by default. Reported-by: Russell King <linux@arm.linux.org.uk> Cc: Punit Agrawal <punit.agrawal@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: arm@kernel.org Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> Signed-off-by: Olof Johansson <olof@lixom.net> |
|
|
Suzuki K. Poulose
|
a95791efa7 |
arm-cci: Add CCI-500 PMU support
CCI-500 provides 8 event counters which can count any of the supported events independently. The PMU event id is a 9-bit value made of two parts. bits [8:5] - Source port 0x0-0x6 Slave Ports 0x8-0xD Master Ports 0xf Global Events to CCI 0x7,0xe Reserved bits [0:4] - Event code (specific to each type of port) The generic CCI-500 controlling interface remains the same with CCI-400. However there are some differences in the PMU event counters. - No cycle counter - Upto 8 counters(4 in CCI-400) - Each counter area is 64K(4K in CCI400) - The counter0 starts at offset 0x10000 from the base of CCI Cc: Punit Agrawal <punit.agrawal@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: devicetree@vger.kernel.org Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> Acked-by: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
|
|
Suzuki K. Poulose
|
f4d58938ad |
arm-cci: Sanitise CCI400 PMU driver specific code
Rename CCI400 specific defintions from CCI_xxx to CCI400_xxx. Introduce generic ARM_CCI_PMU to cover common code for handling the CCI PMU. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> Acked-by: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
|
|
Suzuki K. Poulose
|
85bbba709d |
arm-cci: Do not enable CCI-400 PMU by default
Do not enable CCI-400 PMU by default and fix the dependency on PERF_EVENTS than HW_PERF_EVENTS. Reported-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Will Deacon <will.deacon@arm.com> Cc: arm@kernel.org Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
|
|
Linus Torvalds
|
7d2b6ef19c |
ARM: SoC driver updates for v4.1
Driver updates for v4.1. Some of these are for drivers/soc, where we find more
and more SoC-specific drivers these days. Some are for other driver subsystems
where we have received acks from the appropriate maintainers.
The larger parts of this branch are:
- MediaTek support for their PMIC wrapper interface, a high-level interface
for talking to the system PMIC over a dedicated I2C interface.
- Qualcomm SCM driver has been moved to drivers/firmware. It's used for CPU
up/down and needs to be in a shared location for arm/arm64 common code.
- Cleanup of ARM-CCI PMU code.
- Anoter set of cleanusp to the OMAP GPMC code.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVNzKYAAoJEIwa5zzehBx3UJ8P/37OA1Qc5vR/Kyc8WlhPlNFV
MRE7ajM+FMd/Islt4nVNKATK2o3peCTPrqcniDfdPmN2dM1l4LvdeIvkIhKpB09h
ovmYTZLI/AIbbkttWybGO4lVpFeATxX5N91XXBHvbqkMh6N6ppiYWZUYeJs9EhAw
2YKykfDCTjKykS+m4YThXw9SCF/6mkCvaBL2VAuKnoV0ygjQD109Fce/irKaAoyw
L2w4PXOimUk8RshTx3afKCgTotMS0e9JWjKjvDO5M2KAD8DHm7PDRMmRVzA2sSFG
E2BCfh2DTjzJjdfRYsTd1bYnWzvakX1CzLjiFv+Sb0ctanoZdiDtJIDpX+vSXZ+D
W7i0yhEWIrr2qaZOyXR8znw8BhzdVZhmT+O76N47HvzMb5JUkaZBhEUBfUyeDbk+
YhEwz1G+YxT+fg7bBrxa3vLzOJ2pUwVJPITNuPKr6eZJmaBqgx2M7xXs3KyIJX1Y
AV9eUs2uNCyonawO6xXRhlUKREKL1TftqNXfLj7MYg6AaoVqK0qNRfuCdhMFhMdN
88QCl/qpPtIDL6ZnxlOejs30+DCH1QPx6+GhxkUlVlF1j/2ZM0cK2cj3tggDbNvN
uSy/g5pYDp62Az8UCoNXmKdnb4UONigb7k49naZbW/9CGRp1rrmUdzPUAm0tHMBT
HsH7ms+nHAZHrAlNvvtP
=/sWo
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"Driver updates for v4.1. Some of these are for drivers/soc, where we
find more and more SoC-specific drivers these days. Some are for
other driver subsystems where we have received acks from the
appropriate maintainers.
The larger parts of this branch are:
- MediaTek support for their PMIC wrapper interface, a high-level
interface for talking to the system PMIC over a dedicated I2C
interface.
- Qualcomm SCM driver has been moved to drivers/firmware. It's used
for CPU up/down and needs to be in a shared location for arm/arm64
common code.
- cleanup of ARM-CCI PMU code.
- another set of cleanusp to the OMAP GPMC code"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (43 commits)
soc/mediatek: Remove unused variables
clocksource: atmel-st: select MFD_SYSCON
soc: mediatek: Add PMIC wrapper for MT8135 and MT8173 SoCs
arm-cci: Fix CCI PMU event validation
arm-cci: Split the code for PMU vs driver support
arm-cci: Get rid of secure transactions for PMU driver
arm-cci: Abstract the CCI400 PMU specific definitions
arm-cci: Rearrange code for splitting PMU vs driver code
drivers: cci: reject groups spanning multiple HW PMUs
ARM: at91: remove useless include
clocksource: atmel-st: remove mach/hardware dependency
clocksource: atmel-st: use syscon/regmap
ARM: at91: time: move the system timer driver to drivers/clocksource
ARM: at91: properly initialize timer
ARM: at91: at91rm9200: remove deprecated arm_pm_restart
watchdog: at91rm9200: implement restart handler
watchdog: at91rm9200: use the system timer syscon
mfd: syscon: Add atmel system timer registers definition
ARM: at91/dt: declare atmel,at91rm9200-st as a syscon
soc: qcom: gsbi: Add support for ADM CRCI muxing
...
|
|
|
Olof Johansson
|
47f36e4921 |
CCI-400 PMU updates
This series reworks some of the CCI-400 PMU code so that it can be used on both ARM and ARM64-based systems, without the need to boot in secure mode on the latter. This paves the way for CCI-500 support in future. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQEcBAABCgAGBQJVFWAiAAoJELescNyEwWM0pK8IALUinCT+Ec/Oi5WwGJaLgQgw exlDFAcmml0xisxglGL7eHcvNBs/j4wFD37mqDUszrGW3jrM+Ex+/cvUzWIlEyZl LjG99ZF2j51LFxDHMgpRwg1aD/NNQsQjwsuHHdCr+NHB5R2C0M4umsgX6Kt6/PE4 95LOnnjBOx4FkMOG9mZElzldUlqnhWd6drjQ9qZQar9VVVewfbR1LH/xQhjrCL0w nwRzJwYj1LnLFO0hBVUAJSfvYltMF9PxBEx0FkyzN7QcuP1tLQ25NmGEvarHP6iZ XpvTZ7akzButyUQbvz/kf6a0agPNUv1HHEqh7/Zddvgm//+p8nEBORuJ/cC6g1E= =UHCi -----END PGP SIGNATURE----- Merge tag 'arm-perf-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into next/drivers Merge "arm-cci PMU updates for 4.1" from Will Deacon: CCI-400 PMU updates This series reworks some of the CCI-400 PMU code so that it can be used on both ARM and ARM64-based systems, without the need to boot in secure mode on the latter. This paves the way for CCI-500 support in future. * tag 'arm-perf-4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux: arm-cci: Fix CCI PMU event validation arm-cci: Split the code for PMU vs driver support arm-cci: Get rid of secure transactions for PMU driver arm-cci: Abstract the CCI400 PMU specific definitions arm-cci: Rearrange code for splitting PMU vs driver code drivers: cci: reject groups spanning multiple HW PMUs + Linux 4.0-rc4 Signed-off-by: Olof Johansson <olof@lixom.net> |
|
|
James Hogan
|
8286ae0330 |
MIPS: Add CDMM bus support
Add MIPS Common Device Memory Map (CDMM) support in the form of a bus in the standard Linux device model. Each device attached via CDMM is discoverable via an 8-bit type identifier and may contain a number of blocks of memory mapped registers in the CDMM region. IRQs are expected to be handled separately. Due to the per-cpu (per-VPE for MT cores) nature of the CDMM devices, all the driver callbacks take place from workqueues which are run on the right CPU for the device in question, so that the driver doesn't need to be as concerned about which CPU it is running on. Callbacks also exist for when CPUs are taken offline, so that any per-CPU resources used by the driver can be disabled so they don't get forcefully migrated. CDMM devices are created as children of the CPU device they are attached to. Any existing CDMM configuration by the bootloader will be inherited, however platforms wishing to enable CDMM should implement the weak mips_cdmm_phys_base() function (see asm/cdmm.h) so that the bus driver knows where it should put the CDMM region in the physical address space if the bootloader hasn't already enabled it. A mips_cdmm_early_probe() function is also provided to allow early boot or particularly low level code to set up the CDMM region and probe for a specific device type, for example early console or KGDB IO drivers for the EJTAG Fast Debug Channel (FDC) CDMM device. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9599/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
|
|
Suzuki K. Poulose
|
ee8e5d5fbe |
arm-cci: Split the code for PMU vs driver support
This patch separates the PMU driver code from the low level CCI driver code and enables the PMU driver for ARM64. Introduces config options for both. ARM_CCI400_PORT_CTRL - controls the low level driver code for CCI400 ports. ARM_CCI400_PMU - controls the PMU driver code ARM_CCI400_COMMON - Common defintions for CCI400 This patch also changes: ARM_CCI - common code for probing the CCI devices. This can be used for adding support for newer CCI versions(e.g, CCI-500). Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Kukjin Kim <kgene@kernel.org> Cc: Abhilash Kesavan <a.kesavan@samsung.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Nicolas Pitre <nicolas.pitre@linaro.org> Cc: Punit Agrawal <punit.agrawal@arm.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Punit Agrawal <punit.agrawal@arm.com> Signed-off-by: Suzuki K. Poulose <suzuki.poulose@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> |
|
|
Geert Uytterhoeven
|
89d463ea10 |
drivers: bus: Add Simple Power-Managed Bus Driver
Add a driver for transparent busses that don't need a real driver, but where the bus controller is part of a PM domain, or under the control of a functional clock. Typically, the bus controller's PM domain and/or clock must be enabled for child devices connected to the bus (either on-SoC or externally) to function. Hence the sole purpose of this driver is to enable its clock and PM domain (if exist(s)), which are specified in the DT and managed from platform and PM domain code, and to probe for child devices. Due to the child-parent relationship with devices connected to the bus, PM domain and clock state transitions are handled in the correct order. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Tested-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Reviewed-by: Kevin Hilman <khilman@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au> |