- It includes a series which adds DT bindings and PM domain driver for
PCU (Power Control Unit) block found on ZTE ZX2967 family SoC.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABAgAGBQJYjW7hAAoJEFBXWFqHsHzOCN8H/jVJo7Rnx4zwL8sx+2pjuceN
ecTTu2l9U5Nh2Y1uRqDf914rquJteDNYoe0oWz71W7UxpJMl20X3zjfso7SWDqx8
uSEgad6V/qHkgQQnLL9S9WdFQEGhfjVYvnMoVjBQEb1jpwdIm+nr8PIZ+Fqhh8u0
3OLOjXk40PvzKcYwkxqeJQajP0pE6UFUOXQesolcCr+ilTvoqqQ9chPY4Jvsc7Qf
ffC+ueSUymAhIqof2kEfy3PS5NA/ltQjokDpKjvU2+e3uJtM3qwstzt1kPCgX/d7
azOuNNdif4hT2J26qIBG5H/wS/dFEvxnA0P4J/XUwkQ4FPRpa2Er1+F+03n5sPc=
=XwPV
-----END PGP SIGNATURE-----
Merge tag 'zte-pd-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers
ZTE PM domain driver support for 4.11:
- It includes a series which adds DT bindings and PM domain driver for
PCU (Power Control Unit) block found on ZTE ZX2967 family SoC.
* tag 'zte-pd-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
soc: zte: pm_domains: Add support for zx296718
soc: zte: pm_domains: Prepare for supporting ARMv8 zx2967 family
soc: zte: Add header for PM domains specifiers
MAINTAINERS: add zx2967 SoC drivers to ARM ZTE architecture
dt-bindings: zte: add bindings document for zx2967 power domain controller
Signed-off-by: Olof Johansson <olof@lixom.net>
We don't currently have anything else for drivers/soc to
merge, but I'd expect that to change as soon as we can start
moving PM code into drivers with the recently posted SRAM
changes. Anyways, sent as a separate pull request to make
it easy to group the ARM SoC pull requests.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAliHdM8RHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXNOQw//Zgkp0SOv9oiQdYLoymbAfM1KmclPVK9x
VWsmiMwMNslseOgme/6wvc4NGC9SqQixQLJllXuK0RL/AxblKNIM6VQJL66FQOkK
99ZET2fzlF0rFBC8mhx+x4Y9B8yhhLLOvxRas7mY4qWlcUKIsd/AGx2GObkng9JR
LHF+Sh2DqIZGm3vlO1+rE+/V+nQXlGLAIA5QbJ2TxkH7sN/q84Ne+0iiO3A6nr3Q
pRimOYgzcGoLKF6weSygpL+Pf3Qhx7XaPxgS9bwwQ9u1tzcorP6odRGJf/d8ltes
FdhKewfS7xgV3187o/NIuvUwCNbB1tmQhfobsEz67z5rc7Yx3kx0ylKDSVRMqUOM
P8MzlI1BvPT2u5pFpj+7WvfqF0iKwvUZRNL2O4DjXf1wI95G7rEWAeq0AFtf48RT
7BQ/7LH/2Xi1CpPRfEDEepeskE6DMCOKpdmMn6XgOjOVmK+ppoWOMZJlQq8NC+Km
BS0Cei75vcaHanENkBiA06gCz6/IbArhSLnufmkQ/KZBmQsDwsh0ueWf1MHxHU+r
kEgohFFdIQtYtWFZz6jMIUr+MUj0hxNBLqUhLwzxaZdFr6SF9ztGAGBilLgpAH6x
zzoG8d598kx3e4rEwHu20IHcFfSubtBrQZm6g5i4322A/qw4aXxWeBO7Tymsgf21
swUoRsRPiic=
=2tPW
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.11/drivers-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
Just a single wkup_m3_ipc clean-up for v4.11 merge window.
We don't currently have anything else for drivers/soc to
merge, but I'd expect that to change as soon as we can start
moving PM code into drivers with the recently posted SRAM
changes. Anyways, sent as a separate pull request to make
it easy to group the ARM SoC pull requests.
* tag 'omap-for-v4.11/drivers-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
soc: ti: wkup_m3_ipc: Drop wait from wkup_m3_rproc_boot_thread
Signed-off-by: Olof Johansson <olof@lixom.net>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYg+WZAAoJEHJsHOdBp5c/HHAQAJn17I4HDQLWil8bR9VzC+Vm
g1mf1sP6RTzXI33T+lCNwI8MC0pBcc38SeyqXFB2f0tMti2zlTI8nPDfJfps0OZn
9E5DABXvc1/2B6FIumVZJhBUiuQw6++rvbkF1y48Wy8clSDkL19zRhS7zgtkunab
ChdPPUVy18Ihk3SSa19tIx9Dy94kukFgXb/hs0BTkX9TVtw/46vC4KAwLYYy7aIS
kS7DfKNahjEsk+HAduZI+EO5hlhcJfZmLwRQSAtWyFxhbYrHV0FM+dILiKiO9HPk
l+yQneNIHWZMqEju/LV9pMOI2hRZjitAvu2k9Vx/2QQNl3JqGV36YEutDMt1PLad
hDLG7PbXZ/sJnzPa++1kAEwV05sv17Ja0bfxjoyzy6MCsKJcZChyWeQRrRzqiwgS
A7vpmKk6AcDi0WZ31XSbIuij9VbnSR/rP9TL8Domcd9xbtydoVrVpu6FiYmKi68V
2FGr1xtCCHcjRn4vdFx7hfKDmJL/PHJr1ct/Rkp3qUXmmhOfuK+Zfar5emS1W7/K
Xml8m03V4WVH2VP+XjAGurgUuGGW5DcNDjzvL2WykktfFAI9Bb7k8fYHiAXk44P5
N+4Nq11hqbXgQmSFwiPIc1FH9L69XN5S8r19fS6TeDT6bKAVzdz967cMuGXGHiUa
ahJksoj3SnI5lDZirjDz
=n43y
-----END PGP SIGNATURE-----
Merge tag 'keystone_soc_for_4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/drivers
Couple of minor cleanups for Navigator drivers for 4.11
* tag 'keystone_soc_for_4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
soc: ti: knav: cleanup includes and sort header files
soc: ti: knav_dma: fix typos in trace message
Signed-off-by: Olof Johansson <olof@lixom.net>
hiword registers (write-mask in upper 16bit) and domain-definitions
for the rk3328 soc.
Secondly a "driver" that attaches to the already existing grf nodes
and is able to set static defaults for settings that cannot really
be attached to any specific subsystem.
Most GRF settings can already be set from drivers using them, but there
are some behavioural settings like the mmc/jtag switch that cannot.
As the commit message states this is really meant as a last line
of defence for things that neither belong to a subsystem nor to the
Having this here allows arm64 socs to have this as well and also
moves another bit of code out of the arm32 mach-rockchip.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAliBTccQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgdMAB/42pPY0pKqOWlAfqzTSlIh98vi9jp0nZUu+
6RMlaqewhHq/zbH0qqJdcBrYRZF+EmJpTDGG2nltNi8FLNMyr+y7a0FVyjk/u43L
FnYELcDm7yeCZ0012ZP/4hlhWI9YizojbIKH4p2o8nIj64CS132ZMVVgojyzvVc1
0WLWUf8FBiMqsBpa6Kl117pvKayagk79PM570Ee2kRBxanN8yQaKmXTqG670eKzo
7nar1VGAubAVpCZfbv4opugGfrjYPJFX4gcu3yJvtRRN+hTt6idRP40YoCMZSVds
+okL0XW4G70ioXqZBS59Wq5FJS7frr8HRJbYD8lZg2vF948ZQnbC
=4aXM
-----END PGP SIGNATURE-----
Merge tag 'v4.11-armsoc-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers
Some extensions to the power-domain driver to support domains in
hiword registers (write-mask in upper 16bit) and domain-definitions
for the rk3328 soc.
Secondly a "driver" that attaches to the already existing grf nodes
and is able to set static defaults for settings that cannot really
be attached to any specific subsystem.
Most GRF settings can already be set from drivers using them, but there
are some behavioural settings like the mmc/jtag switch that cannot.
As the commit message states this is really meant as a last line
of defence for things that neither belong to a subsystem nor to the
Having this here allows arm64 socs to have this as well and also
moves another bit of code out of the arm32 mach-rockchip.
* tag 'v4.11-armsoc-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: rockchip: drop rk3288 jtag/mmc switch handling
soc: rockchip: add driver handling grf setup
dt-bindings: add used but undocumented rockchip grf compatible values
soc: rockchip: power-domain: add power domain support for rk3328
dt-bindings: add binding for rk3328 power domains
dt-bindings: power: add RK3328 SoCs header for idle-request
soc: rockchip: power-domain: Support domain control in hiword-registers
Signed-off-by: Olof Johansson <olof@lixom.net>
Declare reset_control_ops as const as they are only stored in the ops
field of a reset_controller_dev structure. This field is of type const
struct reset_control_ops *, so reset_control_ops structures having this
property can be declared as const.
Done using Coccinelle:
@r1 disable optional_qualifier@
identifier i;
position p;
@@
static struct reset_control_ops i@p={...};
@ok1@
identifier r1.i;
position p;
struct reset_controller_dev x;
@@
x.ops=&i@p;
@bad@
position p!={r1.p,ok1.p};
identifier r1.i;
@@
i@p
@depends on !bad disable optional_qualifier@
identifier r1.i;
@@
+const
struct reset_control_ops i;
File size before: drivers/soc/dove/pmu.o
text data bss dec hex filename
2447 112 16 2575 a0f drivers/soc/dove/pmu.o
File size after: drivers/soc/dove/pmu.o
text data bss dec hex filename
2479 80 16 2575 a0f drivers/soc/dove/pmu.o
Signed-off-by: Bhumika Goyal <bhumirks@gmail.com>
Acked-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
The register ARM_L2_OPTION (0x2608 in Exynos4 and Exynos5 PMU) was
defined twice. Both names were used in the Exynos542x code. Simplify
this.
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add a new compatible string for Exynos5433 because it uses the 0xf
value instead of 0x7 for domain on/off registers.
Signed-off-by: Jonghwa Lee <jonghwa3.lee@samsung.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Add compatible for Exynos5433 SoC, so the driver will bind and let other
drivers to use PMU regmap.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Memory subsystem already prints message about failed memory
allocation, there is no need to do it in the driver.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Replace custom code with generic helper to retrieve driver data.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
PMU is something like a SoC wide service, so add a helper function to get
PMU regmap. This will be used by other Exynos device drivers. This way it
can be avoided to model this dependency in device tree (as phandles to PMU
node) for almost every device in the SoC.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Tomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Fix to return a negative error code from the kthread_run() error
handling case instead of 0, as done elsewhere in this function.
Fixes: cdd5de500b ("soc: ti: Add wkup_m3_ipc driver")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This patch introduces the power domain driver of zx296718
which belongs to zte's zx2967 family.
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Reviewed-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The ARMv8 zx2967 family (296718, 296716 etc) uses different value
for controlling the power domain on/off registers, Choose the
value depending on the compatible.
Multiple domains are prepared for the family, this patch prepares
the common functions.
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This patch cleanup the code to remove unnecessary header files and
also sort the header files.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: WingMan Kwok <w-kwok2@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
This patch fixes some typos in the trace message
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
The function wkup_m3_rproc_boot_thread waits for asynchronous
firmware loading to parse the resource table before calling
rproc_boot(). However, as the resource table parsing has been
moved to rproc_boot(), there's no need to wait for the
asynchronous firmware loading completion. So, drop this.
CC: Dave Gerlach <d-gerlach@ti.com>
CC: Bjorn Andersson <bjorn.andersson@linaro.org>
Tested-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Sarangdhar Joshi <spjoshi@codeaurora.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The General Register Files are an area of registers containing a lot
of single-bit settings for numerous components as well full components
like usbphy control. Therefore all used components are accessed
via the syscon provided by the grf nodes or from the sub-devices
created through the simple-mfd created from the grf node.
Some settings are not used by anything but will need to be set up
according to expectations on the kernel side.
Best example is the force_jtag setting, which defaults to on and
results in the soc switching the pin-outputs between jtag and sdmmc
automatically depending on the card-detect status. This conflicts
heavily with how the dw_mmc driver expects to do its work and also
with the clock-controller, which has most likely deactivated the
jtag clock due to it being unused.
So far the handling of this setting was living in the mach-rockchip
code for the arm32-based rk3288 but that of course doesn't work
for arm64 socs and would also look ugly for further arm32 socs.
Also always disabling this setting is quite specific to linux and
its subsystems, other operating systems might prefer other settings,
so that the bootloader cannot really set a sane default for all.
So introduce a top-level driver for the grf that handles these
settings that need to be a certain way but nobody cares about.
Other needed settings might surface in the future and can then
be added here, but only as a last option. Ideally general GRF
settings should be handled in the driver needing them.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
The rk3328 uses the newly introduced support for power-domain control
in hiword-mask registers.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
New Rockchips SoCs may have their power-domain control in registers
using a writemask-based access scheme (upper 16bit being the write
mask). So add a DOMAIN_M type and handle this case accordingly.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Highlights include:
- Support for the kexec_file_load() syscall, which is a prereq for secure and
trusted boot.
- Prevent kernel execution of userspace on P9 Radix (similar to SMEP/PXN).
- Sort the exception tables at build time, to save time at boot, and store
them as relative offsets to save space in the kernel image & memory.
- Allow building the kernel with thin archives, which should allow us to build
an allyesconfig once some other fixes land.
- Build fixes to allow us to correctly rebuild when changing the kernel endian
from big to little or vice versa.
- Plumbing so that we can avoid doing a full mm TLB flush on P9 Radix.
- Initial stack protector support (-fstack-protector).
- Support for dumping the radix (aka. Linux) and hash page tables via debugfs.
- Fix an oops in cxl coredump generation when cxl_get_fd() is used.
- Freescale updates from Scott: "Highlights include 8xx hugepage support,
qbman fixes/cleanup, device tree updates, and some misc cleanup."
- Many and varied fixes and minor enhancements as always.
Thanks to:
Alexey Kardashevskiy, Andrew Donnellan, Aneesh Kumar K.V, Anshuman Khandual,
Anton Blanchard, Balbir Singh, Bartlomiej Zolnierkiewicz, Christophe Jaillet,
Christophe Leroy, Denis Kirjanov, Elimar Riesebieter, Frederic Barrat,
Gautham R. Shenoy, Geliang Tang, Geoff Levand, Jack Miller, Johan Hovold,
Lars-Peter Clausen, Libin, Madhavan Srinivasan, Michael Neuling, Nathan
Fontenot, Naveen N. Rao, Nicholas Piggin, Pan Xinhui, Peter Senna Tschudin,
Rashmica Gupta, Rui Teng, Russell Currey, Scott Wood, Simon Guo, Suraj
Jitindar Singh, Thiago Jung Bauermann, Tobias Klauser, Vaibhav Jain.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYU4YSAAoJEFHr6jzI4aWAC4gQALtIAqqPon0Cd5b/FVVcMbW7
mMqB2b/0FGEl5GoRTzGUDaQqElilm6AEVfHO86C7DFji/a6olneFfw87iz+mtWuZ
JvrNq68ZiSnoeszdUy4MgtXFLb5sTzNMev4skaHfjI9E5CepWBoR0zH4G+kNVnd5
WSgudv8Cq4Px+MEuTOigt3QYjHzZ3cw/XNOOm9c+oGj+PDW4O9UItVI+S1WLoey4
rAB2nRcLMDPuwfRQC9XsF3zEbkv4h1dEXo/EBRuRpcF+0lLTzFw1lv1WE8OxlUmS
kAXbty3dIytBfSbtJT0c0Ps6sfQ4HFhu6ZV2fjnxNTz2KDkBIN7LBYHmBYiqY9oZ
9zvbUWtfiTu5ocfRtTq7rC/Hcj4Kbr9S9F/FvXR0WyDsKgu4xxAovqC3gcn6YjYK
Rr1tcCI4nUzyhVJVmd+OEhUvc5JbFy9aGage+YeOyejfvvSbXIunaxWlPjoDkvim
Vjl+UKU8gw51XFssqY5ZBi/HNlMFKYedLpMFp/fItnLglhj50V0eFWkpDgdSCYom
vo9ifPLZx8n8m8De3H7TV4E0F4gCHcTeqZdu7tW9AAUVM6iLJcDLm3asGmtNh21t
snOHNOJ5QSIno6ezUUg29T6VBjbPh46fdJJSlIZrEe8OzLZ1haGyttf0tD00PQvY
Z2W/m3gxafnOeGgBqvyv
=xOzf
-----END PGP SIGNATURE-----
Merge tag 'powerpc-4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc updates from Michael Ellerman:
"Highlights include:
- Support for the kexec_file_load() syscall, which is a prereq for
secure and trusted boot.
- Prevent kernel execution of userspace on P9 Radix (similar to
SMEP/PXN).
- Sort the exception tables at build time, to save time at boot, and
store them as relative offsets to save space in the kernel image &
memory.
- Allow building the kernel with thin archives, which should allow us
to build an allyesconfig once some other fixes land.
- Build fixes to allow us to correctly rebuild when changing the
kernel endian from big to little or vice versa.
- Plumbing so that we can avoid doing a full mm TLB flush on P9
Radix.
- Initial stack protector support (-fstack-protector).
- Support for dumping the radix (aka. Linux) and hash page tables via
debugfs.
- Fix an oops in cxl coredump generation when cxl_get_fd() is used.
- Freescale updates from Scott: "Highlights include 8xx hugepage
support, qbman fixes/cleanup, device tree updates, and some misc
cleanup."
- Many and varied fixes and minor enhancements as always.
Thanks to:
Alexey Kardashevskiy, Andrew Donnellan, Aneesh Kumar K.V, Anshuman
Khandual, Anton Blanchard, Balbir Singh, Bartlomiej Zolnierkiewicz,
Christophe Jaillet, Christophe Leroy, Denis Kirjanov, Elimar
Riesebieter, Frederic Barrat, Gautham R. Shenoy, Geliang Tang, Geoff
Levand, Jack Miller, Johan Hovold, Lars-Peter Clausen, Libin,
Madhavan Srinivasan, Michael Neuling, Nathan Fontenot, Naveen N.
Rao, Nicholas Piggin, Pan Xinhui, Peter Senna Tschudin, Rashmica
Gupta, Rui Teng, Russell Currey, Scott Wood, Simon Guo, Suraj
Jitindar Singh, Thiago Jung Bauermann, Tobias Klauser, Vaibhav Jain"
[ And thanks to Michael, who took time off from a new baby to get this
pull request done. - Linus ]
* tag 'powerpc-4.10-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (174 commits)
powerpc/fsl/dts: add FMan node for t1042d4rdb
powerpc/fsl/dts: add sg_2500_aqr105_phy4 alias on t1024rdb
powerpc/fsl/dts: add QMan and BMan nodes on t1024
powerpc/fsl/dts: add QMan and BMan nodes on t1023
soc/fsl/qman: test: use DEFINE_SPINLOCK()
powerpc/fsl-lbc: use DEFINE_SPINLOCK()
powerpc/8xx: Implement support of hugepages
powerpc: get hugetlbpage handling more generic
powerpc: port 64 bits pgtable_cache to 32 bits
powerpc/boot: Request no dynamic linker for boot wrapper
soc/fsl/bman: Use resource_size instead of computation
soc/fsl/qe: use builtin_platform_driver
powerpc/fsl_pmc: use builtin_platform_driver
powerpc/83xx/suspend: use builtin_platform_driver
powerpc/ftrace: Fix the comments for ftrace_modify_code
powerpc/perf: macros for power9 format encoding
powerpc/perf: power9 raw event format encoding
powerpc/perf: update attribute_group data structure
powerpc/perf: factor out the event format field
powerpc/mm/iommu, vfio/spapr: Put pages on VFIO container shutdown
...
Driver updates for ARM SoCs, including a couple of newly added drivers:
- A new driver for the power management controller on TI Keystone
- Support for the prerelease "SCPI" firmware protocol that ended up
being shipped by Amlogic in their GXBB SoC.
- A soc_device can now be matched using a glob from inside the
kernel, when another driver wants to know the specific chip
it is running on and cannot find out from DT, firmware or hardware.
- Renesas SoCs now support identification through the soc_device
interface, both in user space and kernel.
- Renesas r8a7743 and r8a7745 gain support for their system controller
- A new checking module for the ARM "PSCI" (not to be confused
with "SCPI" mentioned above) firmware interface.
- A new driver for the Tegra GMI memory interface
- Support for the Tegra firmware interfaces with their
power management controllers
As usual, the updates for the reset controller framework are merged
here, as they tend to touch multiple SoCs as well, including a new
driver for the Oxford (now Broadcom) OX820 chip and the Tegra
bpmp interface.
The existing drivers for Atmel, Qualcomm, NVIDIA, TI Davinci, and
Rockchips SoCs see some further updates.
Conflicts:
- ARCH_RENESAS now selects SOC_BUS, but no longer needs GPIOLIB
- drivers/soc/renesas/Makefile: multiple files got added, keep
all in logical sorting
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAWFMaGWCrR//JCVInAQLs5RAA3I1I8/R+pd5jfMaAB8Od3S4g8YSqIDjC
EIOoDPx9GDV70+cGs4ea+L9bfGs3ePGivCtcbftNsLDAueQ2jKMa3ShqxA/MMbJE
rWQi/ARaDFY0nHL8VPWq7XyYwwrah+/gKBr8UhkaKI0vy6DBqxyCknrS2kgF88rv
DVs2wnRvDM7GVUax0JDzuySR7BXJIuUfS78jPMESASbTQktsZTFUyH+osiqHtptD
M5bPC8rxOeZXljt3DOvXSdK9rVnji/A3nznY4r3tlt805eaOA7CzjVSsY27WQel0
63uj+FgE+eM0sECIxpkNbH/HHq2V4QkUoy3fk0xPkzRbllBBpS+UieGamTnPJup8
wf5uiH1IqLLLV9F/504S92fp0pgFPpOGYWZnBDlIbh3aGq4tMjIRqRYMTyCT02hN
+b54v0SuImFiN6p8HMS1ugYQ+1m9TU40b5pZkzkTJbSQOMm6oi3j0A0orXU/TPKd
FVMrlUyfh+yu+vs1hGWLs1+mBjFnxXzSc8yJeaCdX4MvCY5/aVJZ+cwq4Bk+1YU5
9Qhkeo5JV/l9FlrjxomnEq3l/WV/pFmj7JRZsb1BM88m+5LYUf2lv11b5B4FvrTd
yx8SSpe3+ofIijdNbJ8IywF6y0OXF6UnrlouOVdSIp+wPs+pibdU/5gQep16pvqd
WW6sVWn6quA=
=6dP8
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs, including a couple of newly added
drivers:
- A new driver for the power management controller on TI Keystone
- Support for the prerelease "SCPI" firmware protocol that ended up
being shipped by Amlogic in their GXBB SoC.
- A soc_device can now be matched using a glob from inside the
kernel, when another driver wants to know the specific chip it is
running on and cannot find out from DT, firmware or hardware.
- Renesas SoCs now support identification through the soc_device
interface, both in user space and kernel.
- Renesas r8a7743 and r8a7745 gain support for their system
controller
- A new checking module for the ARM "PSCI" (not to be confused with
"SCPI" mentioned above) firmware interface.
- A new driver for the Tegra GMI memory interface
- Support for the Tegra firmware interfaces with their power
management controllers
As usual, the updates for the reset controller framework are merged
here, as they tend to touch multiple SoCs as well, including a new
driver for the Oxford (now Broadcom) OX820 chip and the Tegra bpmp
interface.
The existing drivers for Atmel, Qualcomm, NVIDIA, TI Davinci, and
Rockchips SoCs see some further updates"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (76 commits)
misc: sram: remove useless #ifdef
drivers: psci: Allow PSCI node to be disabled
drivers: psci: PSCI checker module
soc: renesas: Identify SoC and register with the SoC bus
firmware: qcom: scm: Return PTR_ERR when devm_clk_get fails
firmware: qcom: scm: Remove core, iface and bus clocks dependency
dt-bindings: firmware: scm: Add MSM8996 DT bindings
memory: da8xx-ddrctl: drop the call to of_flat_dt_get_machine_name()
bus: da8xx-mstpri: drop the call to of_flat_dt_get_machine_name()
ARM: shmobile: Document DT bindings for Product Register
soc: renesas: rcar-sysc: add R8A7745 support
reset: Add Tegra BPMP reset driver
dt-bindings: firmware: Allow child nodes inside the Tegra BPMP
dt-bindings: Add power domains to Tegra BPMP firmware
firmware: tegra: Add BPMP support
firmware: tegra: Add IVC library
dt-bindings: firmware: Add bindings for Tegra BPMP
mailbox: tegra-hsp: Use after free in tegra_hsp_remove_doorbells()
mailbox: Add Tegra HSP driver
firmware: arm_scpi: add support for pre-v1.0 SCPI compatible
...
As usual, we queue up a few fixes that don't seem urgent enough to go in
through -rc, or that just came a little too late given their size.
The zx fixes make the platform finally boot on real hardware, the
davinci and imx31 get the DT support working better for some of
the machines that are still normally used with classic board files.
One tegra fix is important for new bootloader versions, but the
bug has been around for a while without anyone noticing.
The other changes are mostly cosmetic.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAWFLum2CrR//JCVInAQJTJhAAmLTsJE0O9akmxytLzlMsy+xhIHvXBfkx
mCDr0sVwHFVm2vcH0bPlK4sNrjGYjIV0Qfsh4Br9NzohCxe6s8xFvPA78aYk5AZp
kiHRv8Gap3dYTV2p6P2loeQ3o0zN7kl9/gUPOy6v4La84kUyZi9RRpyhA+HlEuwW
loQQ6LaSVQb8dMo8Lz5GdOk4YfWyy1DSoZ1uNwD/2bqgfIDQ5MPdjwQzHeK259xE
8WfVKtS4RXl54Psj26BfHRrH8VE8cMxfZ3eZwGykiXpOusrjNVbIEPJK8nKHuGHJ
Ui/nAMzvCD23bsVX2JCYAKa/zRWjXqpvrHEzLJsaWq1VqtmWFS7g9wi1DjZmBBoC
eJZI8Sg/7qL8Rkc69XSzyRUdMxdS6JfWQ6HrM/qzouja6MoRdFdbzl1WiPyYaVGd
gBa7Lx6hQJgSWkeu0mvERdDAzjf4weeZyMFOFov0CwzMZ4VTKCR6Rk4lc8I1A/Hz
0QcCmUj7uXC+gA6U+ZBlvDkG+e1u0Me5i+0gCCphd3UaReB5WaEriNubEwEMitci
QI9BGIMzG974UXU9CCIwcnpFvJKSRwuZsQmPpulP1vbfIb8ajZXQ779PW5szE6qI
h9VMtnKlDbOUEzdj6l/sCs2mWrobCr8/44cWOz7R8b31ZhBZxyJRWhIE/YvZFEvF
Dq5OzaCNLxM=
=i2l2
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC non-urgent fixes from Arnd Bergmann:
"As usual, we queue up a few fixes that don't seem urgent enough to go
in through -rc, or that just came a little too late given their size.
The zx fixes make the platform finally boot on real hardware, the
davinci and imx31 get the DT support working better for some of the
machines that are still normally used with classic board files. One
tegra fix is important for new bootloader versions, but the bug has
been around for a while without anyone noticing.
The other changes are mostly cosmetic"
* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (22 commits)
arm64: tegra: Add missing Smaug revision
arm64: tegra: Add VDD_GPU regulator to Jetson TX1
arm64: dts: zte: clean up gic-v3 redistributor properties
arm64: dts: zx: Fix gic GICR property
bus: vexpress-config: fix device reference leak
soc: ti: qmss: fix the case when !SMP
ARM: lpc32xx: drop duplicate header device.h
ARM: ixp4xx: drop duplicate header gpio.h
ARM: socfpga: fix spelling mistake in error message
ARM: dts: imx6q-cm-fx6: fix fec pinctrl
ARM: dts: imx7d-pinfunc: fix UART pinmux defines
ARM: dts: imx6qp: correct LDB clock inputs
ARM: OMAP2+: pm-debug: Use seq_putc() in two functions
ARM: OMAP2+: Remove the omapdss_early_init_of() function
mfd: tps65217: Fix mismatched interrupt number
ARM: zx: Fix error handling
ARM: spear: Fix error handling
ARM: davinci: da850: Fix pwm name matching
ARM: clk: imx31: properly init clocks for machines with DT
clk: imx31: fix rewritten input argument of mx31_clocks_init()
...
framework. The only patch that can even be considered "core" adds another
clk_get() variant. The rest of the changes are in drivers for various SoCs, and
we have a few bits for ARM shmobile architecture code (dts and mach) due to the
dependency we're breaking between shmobile architecture code and its clk
driver. Those shmobile bits have also been pulled into arm-soc tree. Here's the
summary:
Core:
- Support for devm_get_clk_from_child() used with DT bindings that have
subnodes with the 'clocks' property
New Drivers:
- Allwinner A64 (sun50i)
- i.MX imx6ull
- Socionext's UniPhier SoC CPUs
- Mediatek MT2701 SoCs
- Rockchip rk1108 SoCs
- Qualcomm MSM8994/MSM8992 SoCS
- Qualcomm RPM Clocks
- Hisilicon Hi3516CV300 and Hi3798CV200 CRG
- Oxford Semiconductor OX820 and OX810SE SoCs
- Renesas RZ/G1M and RZ/GIE SoCs
- Renesas R-Car RST driver for mode pin states
Updates:
- Four Allwinner SoCs are migrated to the new style clk driver
- Rockchip rk3399,rk3066 PLL optimizations
- i.MX LVDS display glitch fixes and AV PLL precision improvements
- Qualcomm MSM8996 GPU GDSCs, hw controlled GDSCs, and Alpha PLL support
- Explicit demodularization of always builtin drivers
- Freescale Qoriq ls1012a and ls1046a support
- Exynos 5433 parent typo fix and critical clock tagging
- Renesas r8a7743/r8a7745 CPG
- Renesas R-Car M3-W CSI2/VIN/SYS-DMAC/(H)SCIF/I2C/DRIF/gfx support
- stm32f4* LSI, LSE, RTC, and QSPI clocks
- pxa27x and pxa25x cpufreq as clks
- TI omap36xx sprz319 advisory 2.1 workaround
- Broadcom bcm2835 rate change propogation to PLLH_AUX from VEC
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.22 (GNU/Linux)
iQIcBAABCAAGBQJYT1GXAAoJEK0CiJfG5JUlQ1QP/iOaWnE8TBLK/lOKPte2rw8U
1rw2SDQ8gEJBGIVbZZsnOq6Pp1sVKrJ/7S9ybBeSHoOVb5iTCVAB4wG5uqdLLUGs
4cHj4Vtge7xSxPLCh6YzawS0SjbtbYp1KXHBygGB2COIF53zphkmuM74gZ+l3dcz
TMkfbIvwm8ISvNjc7tRpjhzf6+XUTIVRJ6UZPMnir08lTmDqHz7mouY7nUxlbWOy
lOlF725RoBSa4LcBt+nZcNZ7Cu8eajFneeE87YiLdM4aS/VYm1Ajs9KzZYIRM3R6
mznmiSDwCWTOzU4CsPSdcxGXePzyPrkDvRGWED2qHXNwWQ7Asbtm5pxDKEJ+rj8L
LoB60z20d5PP0zJeiSwnr3XOgp95gW6vduAngu094O7FDZV7yY90wENIphQqgHaU
5nVEPYWTK3lrxAShadpHvnyZI5A621QbNYzAoCAM/jf5xa3JW+AbkERmO/RyEsTO
s6gAKX9H4WiQsEHrmBpJ+VsVVmlT5fhCtqskohaEqFg9CaVaxXvTPzN2fO9KtbDC
M6JPycE9qgu08TWTyJr9xGDGBh0mKP+7ffxpj1x1gVT59HmCLAGTMEvMuHAfKCfW
vz6qPjWW4KnqwAY0JvDZy1y37YQMytA5PVidV/XsEM7WLnmbutTCEbmwIx8eUNGv
NaEpc4l2hvKLwCo4w0J+
=RXZr
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"This is a fairly quiet release. We don't have any patches to the core
framework. The only patch that can even be considered "core" adds
another clk_get() variant. The rest of the changes are in drivers for
various SoCs, and we have a few bits for ARM shmobile architecture
code (dts and mach) due to the dependency we're breaking between
shmobile architecture code and its clk driver. Those shmobile bits
have also been pulled into arm-soc tree. Here's the summary:
Core:
- Support for devm_get_clk_from_child() used with DT bindings that
have subnodes with the 'clocks' property
New Drivers:
- Allwinner A64 (sun50i)
- i.MX imx6ull
- Socionext's UniPhier SoC CPUs
- Mediatek MT2701 SoCs
- Rockchip rk1108 SoCs
- Qualcomm MSM8994/MSM8992 SoCS
- Qualcomm RPM Clocks
- Hisilicon Hi3516CV300 and Hi3798CV200 CRG
- Oxford Semiconductor OX820 and OX810SE SoCs
- Renesas RZ/G1M and RZ/GIE SoCs
- Renesas R-Car RST driver for mode pin states
Updates:
- Four Allwinner SoCs are migrated to the new style clk driver
- Rockchip rk3399,rk3066 PLL optimizations
- i.MX LVDS display glitch fixes and AV PLL precision improvements
- Qualcomm MSM8996 GPU GDSCs, hw controlled GDSCs, and Alpha PLL
support
- Explicit demodularization of always builtin drivers
- Freescale Qoriq ls1012a and ls1046a support
- Exynos 5433 parent typo fix and critical clock tagging
- Renesas r8a7743/r8a7745 CPG
- Renesas R-Car M3-W CSI2/VIN/SYS-DMAC/(H)SCIF/I2C/DRIF/gfx support
- stm32f4* LSI, LSE, RTC, and QSPI clocks
- pxa27x and pxa25x cpufreq as clks
- TI omap36xx sprz319 advisory 2.1 workaround
- Broadcom bcm2835 rate change propogation to PLLH_AUX from VEC"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (150 commits)
clk: bcm: Fix 'maybe-uninitialized' warning in bcm2835_clock_choose_div_and_prate()
clk: add devm_get_clk_from_child() API
clk: st: clk-flexgen: Unmap region obtained by of_iomap
clk: keystone: pll: Unmap region obtained by of_iomap
clk:mmp:clk-of-mmp2: Free memory and Unmap region obtained by kzalloc and of_iomap
clk:mmp:clk-of-pxa910: Free memory and Unmap region obtained by kzmalloc and of_iomap
clk: mmp: clk-of-pxa1928: Free memory obtained by kzalloc
clk: cdce925: Fix limit check
clk: bcm: Make COMMON_CLK_IPROC into a library
clk: qoriq: added ls1012a clock configuration
clk: ti: dra7: fix "failed to lookup clock node gmac_gmii_ref_clk_div" boot message
clk: bcm: Allow rate change propagation to PLLH_AUX on VEC clock
clk: bcm: Support rate change propagation on bcm2835 clocks
clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk
clk: ti: omap36xx: Work around sprz319 advisory 2.1
clk: clk-wm831x: fix a logic error
clk: uniphier: add cpufreq data for LD11, LD20 SoCs
clk: uniphier: add CPU-gear change (cpufreq) support
clk: qcom: Put venus core0/1 gdscs to hw control mode
clk: qcom: gdsc: Add support for gdscs with HW control
...
mmc host drivers, some existing drivers being extended to support new IP
versions and lots of other updates.
MMC core:
- Delete eMMC packed command support
- Introduce mmc_abort_tuning() to enable eMMC tuning to fail gracefully
- Introduce mmc_can_retune() to see if a host can be retuned
- Re-work and improve the sequence when sending a CMD6 for mmc
- Enable CDM13 polling when switching to HS and HS DDR mode for mmc
- Relax checking for CMD6 errors after switch to HS200
- Re-factoring the code dealing with the mmc block queue
- Recognize whether the eMMC card supports CMDQ
- Fix 4K native sector check
- Don't power off the card when starting the host
- Increase MMC_IOC_MAX_BYTES to support bigger firmware binaries
- Improve error handling and drop meaningless BUG_ONs()
- Lots of clean-ups and changes to improve the quality of the code
MMC host:
- sdhci: Fix tuning sequence and clean-up the related code
- sdhci: Add support to via DT override broken SDHCI cap register bits
- sdhci-cadence: Add new driver for Cadence SD4HC SDHCI variant
- sdhci-msm: Update clock management
- sdhci-msm: Add support for eMMC HS400 mode
- sdhci-msm: Deploy runtime/system PM support
- sdhci-iproc: Extend driver support to newer IP versions
- sdhci-pci: Add support for Intel GLK
- sdhci-pci: Add support for Intel NI byt sdio
- sdhci-acpi: Add support for 80860F14 UID 2 SDIO bus
- sdhci: Lots of various small improvements and clean-ups
- tmio: Add support for tuning
- sh_mobile_sdhi: Add support for tuning
- sh_mobile_sdhi: Extend driver to support SDHI IP on R7S72100 SoC
- sh_mobile_sdhi: remove support for sh7372
- davinci: Use mmc_of_parse() to enable generic mmc DT bindings
- meson: Add new driver to support GX platforms
- dw_mmc: Deploy generic runtime/system PM support
- dw_mmc: Lots of various small improvements
As a part of the mmc changes this time, I have also pulled in an immutable
branch/tag (soc-device-match-tag1) hosted by Geert Uytterhoeven, to share the
implementation of the new soc_device_match() interface. This is needed by the
below mmc related changes:
- mmc: sdhci-of-esdhc: Get correct IP version for T4240-R1.0-R2.0
- soc: fsl: add GUTS driver for QorIQ platforms
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYTrzGAAoJEP4mhCVzWIwp7QsP/A4n3Vs0zkMW9RzYj+jo6JjN
7fjLvyLcWXsW6RkZjeKUtuuZgLswdiw94zJJld5fZj5+Gm4sZjFcCr2oPquaUTY8
7MxSHqU95b7wl2tkwrT8Zo9J3i3recgBFqJPc1lv9AC812/TYoyQn/im8XQSL69Q
S5RgmhLdsoJRrMEbvXP9kht1f3vbZgr5RFTHkcWg1d9nnZ033DBP91QrJUMltyc1
7xGSnfod2uY81VudU/I5z1vhqJ4E/uorsjzdJusp/T9yJ2B/1pqxKoYTXXm64ff+
juW7QdQRA3jg4n8B3Pf//cwp0vHE9GZsD5Pgu+qSQwwycqxYKpKx88rmuI0eXCmB
4+FGnfma6c1rgb3X1z4YGelrzcRRzugc959BFqQNfZdk5VY2JbsOWRQ3CUVwj/Lx
uqL+h91m/ex2WpHe55mtGtLT0v6hcCuYh8PFoCSGCWXOkam/aNdh856RVh1ZfLCh
H6eHooGZmk+qKKuYTK0dWxAcuqqjD9MjyoUtFh1AXwrlgXZQp6el5x1pRBWj2XRD
fGBUTHdJSQPGBsO1ucm0f3S3CIekR4hbUJc/KSXMOtHeysrYR97BRA6AUXW9s15V
uwPUspiiSGxJWFyF6JaYzRaossanQmewNy7EAGUl/5n4agJcMTBINdEpc+BeMqkU
Tr2iw8zwOWClMQ0S6BDb
=wGE2
-----END PGP SIGNATURE-----
Merge tag 'mmc-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC updates from Ulf Hansson:
"It's been an busy period for mmc. Quite some changes in the mmc core,
two new mmc host drivers, some existing drivers being extended to
support new IP versions and lots of other updates.
MMC core:
- Delete eMMC packed command support
- Introduce mmc_abort_tuning() to enable eMMC tuning to fail
gracefully
- Introduce mmc_can_retune() to see if a host can be retuned
- Re-work and improve the sequence when sending a CMD6 for mmc
- Enable CDM13 polling when switching to HS and HS DDR mode for mmc
- Relax checking for CMD6 errors after switch to HS200
- Re-factoring the code dealing with the mmc block queue
- Recognize whether the eMMC card supports CMDQ
- Fix 4K native sector check
- Don't power off the card when starting the host
- Increase MMC_IOC_MAX_BYTES to support bigger firmware binaries
- Improve error handling and drop meaningless BUG_ONs()
- Lots of clean-ups and changes to improve the quality of the code
MMC host:
- sdhci: Fix tuning sequence and clean-up the related code
- sdhci: Add support to via DT override broken SDHCI cap register
bits
- sdhci-cadence: Add new driver for Cadence SD4HC SDHCI variant
- sdhci-msm: Update clock management
- sdhci-msm: Add support for eMMC HS400 mode
- sdhci-msm: Deploy runtime/system PM support
- sdhci-iproc: Extend driver support to newer IP versions
- sdhci-pci: Add support for Intel GLK
- sdhci-pci: Add support for Intel NI byt sdio
- sdhci-acpi: Add support for 80860F14 UID 2 SDIO bus
- sdhci: Lots of various small improvements and clean-ups
- tmio: Add support for tuning
- sh_mobile_sdhi: Add support for tuning
- sh_mobile_sdhi: Extend driver to support SDHI IP on R7S72100 SoC
- sh_mobile_sdhi: remove support for sh7372
- davinci: Use mmc_of_parse() to enable generic mmc DT bindings
- meson: Add new driver to support GX platforms
- dw_mmc: Deploy generic runtime/system PM support
- dw_mmc: Lots of various small improvements
As a part of the mmc changes this time, I have also pulled in an
immutable branch/tag (soc-device-match-tag1) hosted by Geert
Uytterhoeven, to share the implementation of the new
soc_device_match() interface. This is needed by these mmc related
changes:
- mmc: sdhci-of-esdhc: Get correct IP version for T4240-R1.0-R2.0
- soc: fsl: add GUTS driver for QorIQ platforms"
* tag 'mmc-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (136 commits)
mmc: sdhci-cadence: add Cadence SD4HC support
mmc: sdhci: export sdhci_execute_tuning()
mmc: sdhci: Tidy tuning loop
mmc: sdhci: Simplify tuning block size logic
mmc: sdhci: Factor out tuning helper functions
mmc: sdhci: Use mmc_abort_tuning()
mmc: mmc: Introduce mmc_abort_tuning()
mmc: sdhci: Always allow tuning to fall back to fixed sampling
mmc: sdhci: Fix tuning reset after exhausting the maximum number of loops
mmc: sdhci: Fix recovery from tuning timeout
Revert "mmc: sdhci: Reset cmd and data circuits after tuning failure"
mmc: mmc: Relax checking for switch errors after HS200 switch
mmc: sdhci-acpi: support 80860F14 UID 2 SDIO bus
mmc: sdhci-of-at91: remove bogus MMC_SDHCI_IO_ACCESSORS select
mmc: sdhci-pci: Use ACPI to get max frequency for Intel NI byt sdio
mmc: sdhci-pci: Add PCI ID for Intel NI byt sdio
mmc: sdhci-s3c: add spin_unlock_irq() before calling clk_round_rate
mmc: dw_mmc: display the clock message only one time when card is polling
mmc: dw_mmc: add the debug message for polling and non-removable
mmc: dw_mmc: check the "present" variable before checking flags
...
Use resource_size function on resource object
instead of explicit computation.
Generated by: scripts/coccinelle/api/resource_size.cocci
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Scott Wood <oss@buserror.net>
Use builtin_platform_driver() helper to simplify the code.
Signed-off-by: Geliang Tang <geliangtang@gmail.com>
Signed-off-by: Scott Wood <oss@buserror.net>
Install the callbacks via the state machine.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: Scott Wood <oss@buserror.net>
Cc: Claudiu Manoil <claudiu.manoil@nxp.com>
Cc: rt@linutronix.de
Cc: Roy Pledge <roy.pledge@nxp.com>
Link: http://lkml.kernel.org/r/20161126231350.10321-21-bigeasy@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Install the callbacks via the state machine.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: Scott Wood <oss@buserror.net>
Cc: Claudiu Manoil <claudiu.manoil@nxp.com>
Cc: rt@linutronix.de
Cc: Roy Pledge <roy.pledge@nxp.com>
Link: http://lkml.kernel.org/r/20161126231350.10321-20-bigeasy@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
The irq_set_affinity_hint() will always fail when !SMP and
Networking will fail on Keystone 2 devices in this case.
Hence, fix by ignoring IRQ affinity settings when !SMP.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Identify SoC and register with the SoC bus
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYNeyaAAoJENfPZGlqN0++1WsQAJ6Yq6mB9+TlmKQSDmspMd1X
cuswMJowQZSFWjiXT/3v6lUNBG7wJmXbJOWIu/V9HIAx3HXS860DRtEC0+CosZ1g
yP/+i8g5qHtYNtOG06RaP62gJql+nMizfvtTVNlFBz5/r6Pt6Cw2VKZm/J5eIenv
zjWwkCOH2JAcAfVu1JfqXNoNwkrPp/tbTXmodQsqm7WYNiwfk2gXNqKhROirWR0s
n2oHVhEts1Q82i116p1mx3m7CYvned5jqph06KyHWutbxNbGGi9ikIOmS0B6ayyw
TSU1lAsF2xIff1JDJpGkZoIZAt0NKAfSYzumz1s98Yj+8cXMVZ/IL/C4orkqV8fk
20K3ZYyBD3fDl38OtqGDOCTX7uOLumPCmoCLdKwmEYX2ig4PbK5pNbwQNMTFH4iE
iqGXaicbs94izsDg0hUMALfAI4oG7TwTEDGnmLfXbOx58FJPtw+VcxArt0QiaLaf
TdrNfVyl+wMu1cvOxqI3ftmzhlzpdoLoFNrZxPORAurEGN45SzDZylnLvfxByQy4
WixQPdS/pHofdKmvIVXIdVzxnO0xRmxAp1tZ8nYw4rkseSGvLnK9Z4d43kzvoTsr
IW+rJBBgLIcyor6HWrSgjWK9T15FEDBbrk5U1d06IViBdYwi1c6U8y80LCaAB+8j
y3IwB4GFFkiTUU6j3H75
=DnnT
-----END PGP SIGNATURE-----
Merge tag 'renesas-soc-match-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Merge "Renesas ARM Based SoC Match Updates for v4.10" from Simon Horman:
* Identify SoC and register with the SoC bus
* tag 'renesas-soc-match-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: Identify SoC and register with the SoC bus
ARM: shmobile: Document DT bindings for Product Register
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Add support for the r8a7745 SoC to rcar-sysc
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJYNfAfAAoJENfPZGlqN0++t14P/RukycPu2VgJ+F3G+OJoD2WS
ltEYrhhZxIL9cjyLmiA7Mj7Ig9dMtzmiBC0W3HY5zvZN2OiOrzmNykfFdu9UN8rX
iMZ6lDrq7o+Qsm1Q4Ab2miatqOqM7JPSacJPixLZFpvs6T79CCRMYaEeIB8AYD3O
ij/tRDtxdvfY97iy5la9XvtA/63EmP6DZ2SxfqPXd6W0GaBg+QKBOLlcCR0yDrKh
NosHdbiAbMapBSPbsnbhKLebpnPw159iu7VA73JbsrsFZ9IDRkwoA+wcgEEWnF8C
b9S31TAglhL04AysUowlHjhEOU2hWPcF8rm3lisDghoUC6Rb/3gCPII+KnU6d5Z4
QNCbY6IlWqya9wR3kavHmJHOowGt/LqrmLCnJSoTTbKgo6xPxN3kis6oRo2sY9w1
KUJWgt9vfQ/H6ik2epkMg7sQbkBcsONUDUgVhFyaAqTKEgeIz5OggfNsYkQYYT37
qlQkLgKweKYJmmr/ilCeVdmkdhPegII8aiYWdwb8N2cUY4I0nyUwnE+v9cdPRhxr
LpONUZV+GtCz8O/Y2XtjxwhYoYUtHbUzSax+aw4qtBBmdyKcaQ1VIyn27gfofmht
Q3itzk/eGp0GgnsadknYK9eOvWWjPf07/jvYgSVfL6rWGR+4/vcEht/kU+O9dnpP
HMZ6/PrbmYoxWkY49sH7
=pOb+
-----END PGP SIGNATURE-----
Merge tag 'renesas-r8a7745-sysc-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Pull "Renesas ARM Based SoC r8a7745 SYSC Driver Updates for v4.10" from Simon Horman:
* Add support for the r8a7745 SoC to rcar-sysc
* tag 'renesas-r8a7745-sysc-for-v4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: rcar-sysc: add R8A7745 support
ARM: shmobile: r8a7745: add power domain index macros
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
We get the following warning with the driver is compiled in:
WARNING: modpost: Found 1 section mismatch(es).
To see full details build your kernel with:
'make CONFIG_DEBUG_SECTION_MISMATCH=y'
With CONFIG_DEBUG_SECTION_MISMATCH enabled, the details are reported:
WARNING: vmlinux.o(.text+0x55d014): Section mismatch in reference from the
function fsl_guts_probe() to the function
.init.text:of_flat_dt_get_machine_name()
The function fsl_guts_probe() references
the function __init of_flat_dt_get_machine_name().
This is often because fsl_guts_probe lacks a __init
annotation or the annotation of of_flat_dt_get_machine_name is wrong.
This patch fixes the issue by using the normal DT/OF API rather than
the of_flat_* one.
Cc: Scott Wood <oss@buserror.net>
Cc: Yangbo Lu <yangbo.lu@nxp.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The global utilities block controls power management, I/O device
enabling, power-onreset(POR) configuration monitoring, alternate
function selection for multiplexed signals,and clock control.
This patch adds a driver to manage and access global utilities block.
Initially only reading SVR and registering soc device are supported.
Other guts accesses, such as reading RCW, should eventually be moved
into this driver as well.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
The hardware descriptors have big endian (BE) format.
Provide proper endianness handling for the remaining
descriptor fields, to ensure they are correctly
accessed by non-BE CPUs too.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
Identify the SoC type and revision, and register this information with
the SoC bus, so it is available under /sys/devices/soc0/, and can be
checked where needed using soc_device_match().
Identification is done using the Product Register or Common Chip Code
Register, as declared in DT (PRR only for now), or using a hardcoded
fallback if missing.
Example:
Detected Renesas R-Car Gen2 r8a7791 ES1.0
...
# cat /sys/devices/soc0/{machine,family,soc_id,revision}
Koelsch
R-Car Gen2
r8a7791
ES1.0
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add support for RZ/G1E (R8A7745) SoC power areas to the R-Car SYSC driver.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
There are multiple occurences of both contextB and context_b
in different h/w descriptors, referring to the same descriptor
field known as "Context B". Stick with the "context_b" naming,
for obvious reasons including consistency (see also context_a).
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
Preventively mask every access to the 'fqid' h/w field,
since it is defined as a 24-bit field, for every h/w
descriptor. Add generic accessors for this field to
ensure correct access.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
1. qm_mcc_querywq layout not used for now, so drop it;
2. queryfq, queryfq_np and alterfq are used only for accesses to
the 'fqid' field, so replace these with a generic 'fq' layout.
As a consequence, 'querycgr' turns into 'cgr' following the
same reasoning above and for consistent naming.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
Replace dummy platform device hack with a reference to a portal's
platform device, in order to dma map the test frame for this
small unit test. The 2 qman symbols need to be exported because
this self test is a kernel module.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
The qman portals are platform devices themselves, so they should
handle dma mappings. Creating a dummy platform device in order to
support dma mapping operations is not justified (and not portable).
Instead, do the mapping against the first portal that has been
initialised.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
This function must only return the truth value of whether
two frame descriptors are different or not.
It does NOT have to compute some obscure difference between
fd fields and return it as an int, making sparse complain
about type conversions in the process.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
Use the proper accessor to get the FD address.
Accessing the internal field "addr_lo" directly is not portable
and error prone.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
In case init_pcfg() returns with error the CI region
must be unmapped too.
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
qman_query_fq*() may return other error codes apart from
-ERANGE, in which cases the error handling done by the
resource cleanup callers would be wrong. The patch
fixes the handling of those cases, and cleans up related
code inside the resource cleanup & release handlers (i.e.
replace hardcoded fqid value with corresponding define).
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
Use arch portable of_property_read_u32() instead, which takes
care of endianness conversions.
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
Trivial fix to spelling mistake "uncommited" to "uncommitted" in
critical error messages.
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Scott Wood <oss@buserror.net>
This contains mostly cleanup and new feature work on the power
management controller as well as the addition of a Kconfig symbol for
the new Tegra186 (Parker) SoC generation.
-----BEGIN PGP SIGNATURE-----
iQIwBAABCAAaBQJYLyZwExx0cmVkaW5nQG52aWRpYS5jb20ACgkQ3SOs138+s6E5
chAAo2l3z3hPBGEFC75kQC2W3W25wlpCbj0B0K07z5fCdPvqntBxr25Ath2/o7hb
Frz6B/GpaRguePlVEKRxWWJ5PkhLVBkBtdpYyx0dUFMvW6KjU6BLMmjhrNynUjtx
SJ/DYawNhPSGBQBUUKSnRO1hNX/l/ZYKURQZrz5SN5ZiudWUoN93/ltqU8/QcH4M
7/qDCJRCB7JH8D0+CuYu7rQ+evz77YwMMSYZ/zJvcCioaSC3eUdSPzMrVaaLkA9X
W+Q03VhJoztO9KJ0aQJWnQmdS4M0nagolD/jvHWnXSqdvT/X4VFgrnY/xLQDXCvK
/yAmf07V0vISYebOKdmcL7/2Cu6EDdvTWUITaapkXvuDs6fjLqH02DeTmTacaNBI
H7KSYP4kIz0i5lkLdunHIgmbDSXCgeJ2l+c6zUZ6/D8G31UnrUEuesdNRmTttqBw
3QRSVjFq1bsVAo5rF4tNHhl/4SEOMbttkOfodDMTV8s5Pbk7WYP3TFqNdKavBOeQ
xx3EUsZIDuIxerxem93z47hUrUp0chwP1NM0S4nJpWClK0f4RZm4VJbSW2/9iwTt
g2v02vcmSou38uKuKdXtv6gzc8+Lgab0FnfyQouMaNmVLpIPkDJxJQvTlF+BeMPY
MdPll5afxHCdD90a8OFlUmxNUE5mq0ZlPuqnNfLgt46Zpdw=
=yvrl
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
soc: tegra: Core SoC changes for v4.10-rc1
This contains mostly cleanup and new feature work on the power
management controller as well as the addition of a Kconfig symbol for
the new Tegra186 (Parker) SoC generation.
* tag 'tegra-for-4.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Use consistent naming for PM domains
soc/tegra: pmc: Remove genpd when adding provider fails
soc/tegra: pmc: Check return code for pm_genpd_init()
soc/tegra: pmc: Clean-up I/O rail error messages
soc/tegra: pmc: Simplify IO rail bit handling
soc/tegra: pmc: Guard against uninitialised PMC clock
soc/tegra: pmc: Add I/O pad voltage support
soc/tegra: pmc: Use consistent ordering of bit definitions
soc/tegra: pmc: Correct type of variable for tegra_pmc_readl()
soc/tegra: pmc: Use BIT macro for register field definition
Signed-off-by: Olof Johansson <olof@lixom.net>
This contains the device tree bindings and a driver for the Tegra HSP, a
hardware block that provides hardware synchronization primitives and is
the foundation for inter-processor communication between CPU and BPMP.
-----BEGIN PGP SIGNATURE-----
iQIwBAABCAAaBQJYLyMbExx0cmVkaW5nQG52aWRpYS5jb20ACgkQ3SOs138+s6El
gw/9FfJG4Ze7thnBHHVhDDuZaVF6U9gIKkEHfTKkUlU8fkOtF+xnTBCK3LRkHEsk
X0zyQlKKa/lzUGB52Fsi9jpVjt1WXvyuVOgCaQ+Zg9GXCmfXxOrNquAIH9sLhHSk
SpBsVHDsCk5UT4pINJrmdpGN2nSdQ4PvsRZM8wRkRs39C7+nf6wSHMrjURCt/DLT
Cub94gLcFiLddmO+c1OUShUjnOcy7yBIWn/EycxrKOqMDxzY9JK2Q0n8Cc3f1UVN
P5WYgjvLss5pGWZOBvPwefMVXru7BFBh1jOceabueD3DjNEP8nWb2/WQbXMUDVzq
QQ/q/4MIEmQMc8B8Z0brEmpIMn870Y3IPDaUmG4F6soW9yRL1gyA9PiF4YlcTe53
b0l0Y4/aehgHqCz1c9FulZW+qBe746fND/CNzTER7QfUe5CNotAtRUWG99v/8gGF
gtVmwTVnC5jn4ytUbLHEM4JtghKUuoIHqAWhY7KdwTDOm70TLmdHmOTVKN0+Ej3V
IgFCo+WIzleoHyK8GiUifOZSnLIJuctDznIUMnw2OmBlslvcdE90XbSQ00hlYC3N
Z9N2X6747OhGZF6viHWdWOtFfH+LpRj4S0LIaoRkvU5GRUi0fOjuTIXfBhlPe+11
wZ/AZAav1CHfaJk66H7Vq2rmRxdwe56t9fzy/xJM7ja+9m0=
=Gojp
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.10-mailbox' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
mailbox: Add Tegra HSP driver
This contains the device tree bindings and a driver for the Tegra HSP, a
hardware block that provides hardware synchronization primitives and is
the foundation for inter-processor communication between CPU and BPMP.
* tag 'tegra-for-4.10-mailbox' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
mailbox: tegra-hsp: Use after free in tegra_hsp_remove_doorbells()
mailbox: Add Tegra HSP driver
dt-bindings: mailbox: Add Tegra HSP binding
soc/tegra: Add Tegra186 support
Signed-off-by: Olof Johansson <olof@lixom.net>
- add support for mt2701 to mtk-scpsys
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJYJdPAAAoJELQ5Ylss8dNDy0YQAKySkifiVd356OcpHn15go+m
EuIYk0vFNISv9qIErkqwUeL52sz9d7JbLXlqxTk2kEhz3Ku1I82OOtvSJMITHfK2
imYunxU8hxZpGlL+qSPNsPz4T3JIz82h5Iq8EoYRroKjzuMycAYVjfJW62y9dr+k
CZNtjJ+W6Qk98od9LFOAXLa+7zikvE6CLm9qlSSkJBLP8pREzenptOZW1KE2aYOc
W0MsRxAx28QholYQ4rT2jx6KG/KYRFO8lgQ4tzM5M1VqvRyKPe9FpGuszLI1Mb9q
+zoC1yu2vC9kR/1QG/iYOy8+YUSytTsIp/YUinVA8Y3SLnKS4pQzLEejUVN+ca6N
jFFEseJGMn3p8HksNRzlFob/4wtYualxeimKWJxOTClZ8jHam+GlJnAG1Up+NgS1
dOp309cVWTsDujOwRcM7fH07lzLwE1Pq4DyWXd2ZKXOvUohBNwjuSBYniUPmptrO
oBjwFKEpA3FpuQXJzbSyUuajIKgg1i0pmwNatkrdm7tO8YZEwdmqh9S9yEKUF0V8
bmAnzjJ+Sd46p4PYZW78thM2GI8EYw6z5M7SjEl9mBHS44xiZFogljtbmlMw3Nvp
3gpvFBp2gg64l46N50FtE/PmHhQjx+vo6/HtATQJJsZO8JFaCBR9IyJEyt69U+OI
xqToVd0DT0DI/sbJK6Zy
=Fe1n
-----END PGP SIGNATURE-----
Merge tag 'v4.9-next-soc' of https://github.com/mbgg/linux-mediatek into next/drivers
- prepare mtk-scpsys to for multi soc support
- add support for mt2701 to mtk-scpsys
* tag 'v4.9-next-soc' of https://github.com/mbgg/linux-mediatek:
soc: mediatek: Add MT2701 scpsys driver
soc: mediatek: Refine scpsys to support multiple platform
Signed-off-by: Olof Johansson <olof@lixom.net>
by firmware on the rk3399, avoiding infite loops when powering on/off a
domain and actually returning an error if power-domain addition fails.
The last part requires usage of the (new in 4.9-rc1) pm_genpd_remove
functionality as well.
-----BEGIN PGP SIGNATURE-----
iQEtBAABCAAXBQJYJzDfEBxoZWlrb0BzbnRlY2guZGUACgkQ86Z5yZzRHYES6Af/
TbUZtN/EWzlvhxMHVlr1ZATeIY9RSMMJWYHWl6Hl6geQSUcoM3vMTQ3ltdPpkgVT
87UUBJgoeHBsRLE/hBPHgWbPSCuZ0CvJnTtIgvq/vUBKaehJAqdoFrNlKXp821WS
12leHafT4afDCAhklpwihsfqO4AuLieFOunQ+5EHqenYGLZ+wtyNDKp0s1w0OkhH
5rRJV3KFl7yrl+2FN4e/2NVrQ+za7RJxUHMsaH9hxdpzYpHcoa8jhrXYHpHmeNIT
u/2bTOaEJZlhspyFv20a5lA+k7PIENPdth6KEsBUCt25Kd/XqRWItZzeA0iK2K3f
l92W43RugjKauZJ9op3GBg==
=4ARq
-----END PGP SIGNATURE-----
Merge tag 'v4.10-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers
Changes to the power-domain driver including counter presets now being set
by firmware on the rk3399, avoiding infite loops when powering on/off a
domain and actually returning an error if power-domain addition fails.
The last part requires usage of the (new in 4.9-rc1) pm_genpd_remove
functionality as well.
* tag 'v4.10-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
soc: rockchip: power-domain: Handle errors from of_genpd_add_provider_onecell
soc: rockchip: power-domain: use pm_genpd_remove in error cleanup
soc: rockchip: power-domain: avoid infinite loop
soc: rockchip: power-domain: Don't (incorrectly) set rk3399 up/down counts
Signed-off-by: Olof Johansson <olof@lixom.net>
The various error messages refer to the PM domains as "power domain",
"genpd" and "PM domain". That's confusing, so convert all error messages
to use the most prominent: "PM domain".
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Commit 3fe577107c ("PM / Domains: Add support for removing PM
domains") add support for removing PM domains. Update the Tegra PMC
driver to remove PM domains if we fail to add a provider for the PM
domain.
Please note that the code under 'power_on_cleanup' label does not
really belong in the clean-up error path for tegra_powergate_add().
To keep the error path simple, remove this label and move the
associated code to where it needs to be invoked.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Commit 7eb231c337 ("PM / Domains: Convert pm_genpd_init() to return
an error code") updated pm_genpd_init() to return an error code. Update
the Tegra PMC driver to check the return value from pm_genpd_init() and
handle any errors returned.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
[treding@nvidia.com: use pr_err() instead of dev_err()]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Use pr_err() instead of dev_err() when the pmc->dev field has not been
initialized yet and add a few missing error messages as well as remove
duplicate ones.
Based on work by Jon Hunter <jonathanh@nvidia.com>.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The function tegra_io_rail_prepare() converts the IO rail ID into a
bit position that is used to check the status and control the IO rail
in the PMC registers. However, rather than converting to a bit position
it is more useful to convert to a bit-mask because this is what is
actually used. By doing so the BIT() marco only needs to be used once
and we can use the IO_DPD_REQ_CODE_MASK when checking for erroneous rail
IDs.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
[treding@nvidia.com: rebase and rename bit -> mask]
Signed-off-by: Thierry Reding <treding@nvidia.com>
It is possible for the public functions, tegra_io_rail_power_on/off()
to be called before the PMC device has been probed. If this happens
then the pmc->clk member will not be initialised and the call to
clk_get_rate() in tegra_io_rail_prepare() will return zero and lead
to a divide-by-zero exception. The function clk_get_rate() will return
zero if a NULl clk pointer is passed. Therefore, rather that checking
if pmc->clk is initialised, fix this by checking the return value for
clk_get_rate() to make sure it is not zero.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
I/O pins on Tegra SoCs are grouped into so-called I/O pads. Each such
pad can be used to control the common voltage signal level and power
state of the pins in the given pad.
I/O pads can be powered down even if the system is active, which can
save power from that I/O interface. For SoC generations prior to
Tegra124 the I/O pad voltage is automatically detected and hence the
system software doesn't need to configure it. However, starting with
Tegra210 the detection logic has been removed, so explicit control of
the I/O pad voltage by system software is required.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Bit definitions are sorted in decreasing order by offset. Apply the same
ordering to all definitions.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The function tegra_pmc_readl() returns the u32 type data and hence
change the data type of variable where this data is stored to u32
type.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Use BIT macro for register field definition and make constant as U
when using in shift operator like (3 << 30) to (3U << 30)
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Tegra186 features a combination of Denver and Cortex-A57 CPU cores
and a GPU based on the Pascal architecture. It contains an ADSP with a
Cortex-A9 CPU used for audio processing, hardware video encoders and
decoders with multi-format support, ISP for image capture processing
and BPMP for power management.
Signed-off-by: Joseph Lo <josephl@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
It was a bit surprising that the device was reported to have probed just
fine, but the provider hadn't been registered.
So handle any errors when registering the provider and fail the probe
accordingly.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The newly introduced pm_genpd_remove reverts the initialization done
by pm_genpd_init and is necessary in the error path of the rockchip
power-domain driver.
Without it the driver will in the error case cleanup the devm-allocated
structures including the elements referenced in the gpd_list thus making
deactivation of unused domains (and probably later genpd accesses as
well) fail by accessing invalid pointers.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add a driver for the Renesas R-Car Gen1 RESET/WDT and R-Car Gen2/Gen3
and RZ/G RST module.
For now this driver just provides an API to obtain the state of the mode
pins, as latched at reset time. As this is typically called from the
probe function of a clock driver, which can run much earlier than any
initcall, calling rcar_rst_read_mode_pins() just forces an early
initialization of the driver.
Despite the current simple and almost identical handling for all
supported SoCs, the driver matches against SoC-specific compatible
values, as the features provided by the hardware module differ a lot
across the various SoC families and members.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
In some cases, we have met the infinite loop in
rockchip_pmu_set_idle_request() or rockchip_do_pmu_set_power_domain().
As the crosbug.com/p/57351 reported, the boot hangs right after this
[1.629163] bootconsole [uart8250] disabled
[1.639286] [drm:drm_core_init] Initialized drm 1.1.0 20060810
[1.645926] [drm:drm_get_platform_dev] Initialized vgem 1.0.0 20120112..
[1.654558] iommu: Adding device ff8f0000.vop to group 0
[1.660569] iommu: Adding device ff900000.vop to group 1
<hang>
This patch adds the error message and timeout to avoid infinite loop if
it fails to get the ack.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add scpsys driver for MT2701.
mtk-scpsys now supports MT8173 (arm64) and MT2701 (arm). So it should
be enabled on both arm64 and arm platforms.
Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Refine scpsys driver common code to support multiple SoC / platform.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add support for RZ/G1M (R8A7743) SoC power areas to the R-Car SYSC driver.
Based on the original (and large) patch by Dmitry Shifrin
<dmitry.shifrin@cogentembedded.com>.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On rk3288 it was important that powerdown and powerup counts for the
CPU/GPU in the kernel because:
* The power on default was crazy long.
* We couldn't rely on the firmware to set this up because really this
wasn't the firmware's job--the kernel was the only one that really
cared about bringing up / down CPUs and the GPU and doing suspend /
resume (which involves bringing up / down CPUs).
On newer ARM systems (like rk3399) ARM Trusted Firmware is in charge of
bringing up and down the CPUs and it really should be in charge of
setting all these counts right. After all ATF is in charge of suspend /
resume and CPU up / down. Let's get out of the way and let ATF do its
job.
A few other motivations for doing this:
* Depending on another configuration (PMU_24M_EN_CFG) these counts can
be either in 24M or 32k cycles. Thus, though ATF isn't really so
involved in bringing up the GPU, ATF should probably manage the counts
for everything so it can also manage the 24M / 32k choice.
* It turns out that (right now) 24M mode is broken on rk3399 and not
being used. That means that the count the kernel was programming
in (24) was not 1 us (which it seems was intended) but was actually
.75 ms
* On rk3399 there are actually 2 separate registers for setting CPU
up/down time plus 1 register for GPU up/down time. The curent kernel
code actually was putting the register for the "little" cores in the
"CPU" slot and the register for the "big" cores in the "GPU" slot. It
was never initting the GPU counts.
Note: this change assumes that ATF will actually set these values at
boot, as I'm proposing in <http://crosreview.com/372381>.
Signed-off-by: Douglas Anderson <dianders@chromium.org>
[ATF change has landed]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Driver updates for ARM SoCs, including a couple of newly added drivers:
- The Qualcomm external bus interface 2 (EBI2), used in some of their
mobile phone chips for connecting flash memory, LCD displays or
other peripherals
- Secure monitor firmware for Amlogic SoCs, and an NVMEM driver for the
EFUSE based on that firmware interface.
- Perf support for the AppliedMicro X-Gene performance monitor unit
- Reset driver for STMicroelectronics STM32
- Reset driver for SocioNext UniPhier SoCs
Aside from these, there are minor updates to SoC-specific bus,
clocksource, firmware, pinctrl, reset, rtc and pmic drivers.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAV/gaimCrR//JCVInAQJaOQ/6A++YfLVmdF4wxgcu/0ti28lA7SkQIGJV
UAsfCmqMEutbeDvnloVGmTV2K2NS7mzxdxsJGbVB7Oe/zdOFN+T9sf9hAlId01QA
oVkoagpofoxlyKoKJ/l+heuEEZMa0Ekk3XXRTGv/Ovymo7252o4tEdGu9c+gyaMJ
KqgixcrQRzxuWDgPpHUPUez2vY1iRMvvdcb0EmfiHcIgPOEJc6MIxulsqEIrkoMz
WYeGFIeqRJxnrur3QD8WnD+aZD6bV01wkFTkWXGWg4H87QfEESgVBu5A7TL+5sL8
1SlX/b7S5/ZJbrOiOS2IUyvbK7NiA/Q+NunHW2rMVnUWuEvJ9HAQB1kVSQH5LIYO
6OBokjcijm6m/j6O6fdDfvNd6PLsIEUqfWVws7O+uofMMqKPxqak4VBTRdFM+aeF
ZtK7mEbzteCX0bnC+XblZrseAlkIehYnP80CLDbtDTerTWP4gsjxGVt3U6MO0NzB
K0ACWZOclzrcFscNKrmP6uPCpfZriiPV/XMCEHcylA/X2iYsVmpqKzdLuNs5aeUr
uPzQbNWu9ygg/bDRXMYY2E3Kzjsc0eIOKEOPyhLaZdSo4e1FQxud6L2V2Vj0RLB/
iMA7/CyQZqn6Yzgs0VMZm/bnh+hIdHioGFl5K5j6Fcw9VZRkNmnEQJzX4VU5efGO
g1+5av0vFXg=
=GvTq
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs, including a couple of newly added
drivers:
- The Qualcomm external bus interface 2 (EBI2), used in some of their
mobile phone chips for connecting flash memory, LCD displays or
other peripherals
- Secure monitor firmware for Amlogic SoCs, and an NVMEM driver for
the EFUSE based on that firmware interface.
- Perf support for the AppliedMicro X-Gene performance monitor unit
- Reset driver for STMicroelectronics STM32
- Reset driver for SocioNext UniPhier SoCs
Aside from these, there are minor updates to SoC-specific bus,
clocksource, firmware, pinctrl, reset, rtc and pmic drivers"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits)
bus: qcom-ebi2: depend on HAS_IOMEM
pinctrl: mvebu: orion5x: Generalise mv88f5181l support for 88f5181
clk: mvebu: Add clk support for the orion5x SoC mv88f5181
dt-bindings: EXYNOS: Add Exynos5433 PMU compatible
clocksource: exynos_mct: Add the support for ARM64
perf: xgene: Add APM X-Gene SoC Performance Monitoring Unit driver
Documentation: Add documentation for APM X-Gene SoC PMU DTS binding
MAINTAINERS: Add entry for APM X-Gene SoC PMU driver
bus: qcom: add EBI2 driver
bus: qcom: add EBI2 device tree bindings
rtc: rtc-pm8xxx: Add support for pm8018 rtc
nvmem: amlogic: Add Amlogic Meson EFUSE driver
firmware: Amlogic: Add secure monitor driver
soc: qcom: smd: Reset rx tail rather than tx
memory: atmel-sdramc: fix a possible NULL dereference
reset: hi6220: allow to compile test driver on other architectures
reset: zynq: add driver Kconfig option
reset: sunxi: add driver Kconfig option
reset: stm32: add driver Kconfig option
reset: socfpga: add driver Kconfig option
...
Enable the drivers on the powerpc arch.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
Add self tests for the DPAA 1.x Queue Manager driver. The tests
ensure that the driver can properly enqueue and dequeue to/from
frame queues using the QMan portal infrastructure.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
Add a self test for the DPAA 1.x Buffer Manager driver. This
test ensures that the driver can properly acquire and release
buffers using the BMan portal infrastructure.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
This driver enables the Freescale DPAA 1.x Queue Manager block.
QMan is a hardware accelerator that manages frame queues. It allows
CPUs and other accelerators connected to the SoC datapath to enqueue
and dequeue ethernet frames, thus providing the infrastructure for
data exchange among CPUs and datapath accelerators.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
This driver enables the Freescale DPAA 1.x Buffer Manager block.
BMan is a hardware accelerator that manages buffer pools. It allows
CPUs and other accelerators connected to the SoC datapath to acquire
and release buffers during data processing.
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
of_mm_gpiochip_add_data() calls mm_gc->save_regs() before
setting the data. Therefore ->save_regs() cannot use
gpiochip_get_data()
An Oops is encountered without this fix.
fixes: 1e714e54b5 ("powerpc: qe_lib-gpio: use gpiochip data pointer")
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Cc: <stable@vger.kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Scott Wood <oss@buserror.net>
Commit 0e6e01ff69 ("CPM/QE: use genalloc to manage CPM/QE muram")
has changed the way muram is managed.
genalloc uses kmalloc(), hence requires the SLAB to be up and running.
On powerpc 8xx, cpm_reset() is called early during startup.
cpm_reset() then calls cpm_muram_init() before SLAB is available,
hence the following Oops.
cpm_reset() cannot be called during initcalls because the CPM is
needed for console.
This patch removes the call to cpm_muram_init() from cpm_reset().
cpm_muram_init() will be called from a new function called cpm_init()
which is declared as subsys_initcall, unless cpm_muram_alloc() is
called earlier for the serial console in which case cpm_muram_init()
will be called from there.
The reason for calling it from two places is that some drivers
(e.g. i2c-cpm) need some of the initialisations done by
cpm_muram_init() but don't call cpm_muram_alloc(). The console
driver calls cpm_muram_alloc() but some platforms might not use
the CPM serial ports for console.
[ 0.000000] Unable to handle kernel paging request for data at address 0x00000008
[ 0.000000] Faulting instruction address: 0xc01acce0
[ 0.000000] Oops: Kernel access of bad area, sig: 11 [#1]
[ 0.000000] PREEMPT CMPC885
[ 0.000000] CPU: 0 PID: 0 Comm: swapper Not tainted 4.4.14-g0886ed8 #5
[ 0.000000] task: c05183e0 ti: c0536000 task.ti: c0536000
[ 0.000000] NIP: c01acce0 LR: c0011068 CTR: 00000000
[ 0.000000] REGS: c0537e50 TRAP: 0300 Not tainted (4.4.14-s3k-dev-g0886ed8-svn)
[ 0.000000] MSR: 00001032 <ME,IR,DR,RI> CR: 28044428 XER: 00000000
[ 0.000000] DAR: 00000008 DSISR: c0000000
GPR00: c0011068 c0537f00 c05183e0 00000000 00009000 ffffffff 00000bc0 ffffffff
GPR08: ff003000 ff00b000 ff003bbf 00000000 22044422 100d43a8 00000000 07ff94e8
GPR16: 00000000 07bb5d70 00000000 07ff81f4 07ff81f4 07ff81f4 00000000 00000000
GPR24: 07ffb3a0 07fe7628 c0550000 c7ffa190 c0540000 ff003bbf 00000000 00000001
[ 0.000000] NIP [c01acce0] gen_pool_add_virt+0x14/0xdc
[ 0.000000] LR [c0011068] cpm_muram_init+0xd4/0x18c
[ 0.000000] Call Trace:
[ 0.000000] [c0537f00] [00000200] 0x200 (unreliable)
[ 0.000000] [c0537f20] [c0011068] cpm_muram_init+0xd4/0x18c
[ 0.000000] [c0537f70] [c0494684] cpm_reset+0xb4/0xc8
[ 0.000000] [c0537f90] [c0494c64] cmpc885_setup_arch+0x10/0x30
[ 0.000000] [c0537fa0] [c0493cd4] setup_arch+0x130/0x168
[ 0.000000] [c0537fb0] [c04906bc] start_kernel+0x88/0x380
[ 0.000000] [c0537ff0] [c0002224] start_here+0x38/0x98
[ 0.000000] Instruction dump:
[ 0.000000] 91430010 91430014 80010014 83e1000c 7c0803a6 38210010 4e800020 7c0802a6
[ 0.000000] 9421ffe0 bf61000c 90010024 7c7e1b78 <80630008> 7c9c2378 7cc31c30 3863001f
[ 0.000000] ---[ end trace dc8fa200cb88537f ]---
fixes: 0e6e01ff69 ("CPM/QE: use genalloc to manage CPM/QE muram")
Cc: stable@vger.linux.org
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
[scottwood: Removed some string changes unrelated to bugfix]
Signed-off-by: Scott Wood <oss@buserror.net>
Use of_property_read_bool to check for the existence of a property.
The semantic patch that makes this change is as follows:
(http://coccinelle.lip6.fr/)
// <smpl>
@@
expression e1,e2;
statement S2,S1;
@@
- if (of_get_property(e1,e2,NULL))
+ if (of_property_read_bool(e1,e2))
S1 else S2
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Scott Wood <oss@buserror.net>
modify get_qe_base function with of_address_to_resource
instead of of_get_property and of_translate_address.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
Use the function resource_size instead of explicit computation.
Problem found using Coccinelle.
Signed-off-by: Vaishali Thakkar <vaishali.thakkar@oracle.com>
Signed-off-by: Scott Wood <oss@buserror.net>
reduces the failure rate on the data transfer between pmic and
pmic wrapper.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJX1stkAAoJELQ5Ylss8dND49UP/jP+fQvV7jEVXc+FQHTclOLo
y+pjhtxLvE2nCN0rKdc1UPPH+Vr6ZpLqHaNe/1UQ4xmhZNmowwHpkjsFi2Xf9q0b
T10cObpY58U3LSFo9w2aSguMQyDWQG0TWdOg5ppKKZ4xOUXrGJQvLp0AiE1U3YQ9
g9rHKy77+G0vQaUHxAyrwQoewgiB0qzoZp65lEaOdP9A2WbF6sPrgopKcGPz1lhD
bTaB8wlvhGUmiegBuKyenTSLrTlNpmQI05gBUQ1irfTaksmLm+cn8Rmf1NHAWqdf
nikrgeW+uRFA38GE+FccBxNRgj58jhQEKXm9da2nanWTSXugXGOC+CvGTewy92Di
VwXPlN546/vPYKjUvf4zgqhrSsTnGHKvY2B33lq+6QN5rcD8yrHBezk3xRBjjf7E
96I+ipVnkrOIJd9l6vMGAGG4eSEHxNDevbNhpVzNLTNIr9e9wSe/WlKUXrFbCE5A
TUzo+LmmnGWdZEyK+/EUPpMC7xMXfpZqNyhwU1kIE2U6n6Z/kLcJPmN2N8g5TH3a
Fe4PGzntjiFgMIH6t2ryUcfxhEG9dH/WmzZAMB6h0I7kMYPE6dImsfzp2/E6GZPI
FC9xp8oTtvMe1PuMKi5JVGovcrtmqrKyY8TS/I5HetcNpv4gEQZY5vB4x437Egy8
ZpV36tQeffLcpEYcaM2D
=qdYG
-----END PGP SIGNATURE-----
Merge tag 'v4.8-next-soc' of https://github.com/mbgg/linux-mediatek into next/drivers
Pull "ARM: mediatek: soc updates for v4.9" from Matthias Brugger:
extent the waiting time of the pmic wrapper to 10 ms which
reduces the failure rate on the data transfer between pmic and
pmic wrapper.
* tag 'v4.8-next-soc' of https://github.com/mbgg/linux-mediatek:
soc: mediatek: PMIC wrap: Extend the waiting time to 10ms.
This contains a single patch to fix an issue with setting the deep power
down mode of I/O rails.
-----BEGIN PGP SIGNATURE-----
iQIwBAABCAAaBQJX0tDXExx0cmVkaW5nQG52aWRpYS5jb20ACgkQ3SOs138+s6E2
Fw/+PM0dk1O9b4jlb1m8aRfBaYFUhTpVZizedZW2xSX1n/Y9SJoqkMcASxKEeqAm
kECoCCeJkuKWozeEffJ79ewiLvmqjWg+LLEsKrIklKZJKlzcsSV3ooUkTdOtDZUr
l4YMWRneJ2md6rK3/jcZj9S3SdLyn3R6Pwh6DzJge/4+yyhjQ+axVJiUNOU/D345
yLZr4ErzixHg/a968CfnoLu9+3Tetlc41+VqoUQWurLqNXKu2ehi/t63Oceii/uy
DhjKYOxtwXQlB46E9vJ5qWhc6gYc32Kwg7BAjCKte00T24r0obOivSz6n1dV9a5k
wQcQP6zZGEMFFcgJI0+ytBrIE3V24go7RIotTathbvKBCNLkgyVlkrT7uhoP7kH4
z4cgoo489/HYGd1BLF7FkmobSH8mAFvjYv43LjmObi/5w1r+MDqDQQqHTkrJ5GT0
WMzb51AZY7Xohu+nP5o9k2+RBUXjamJCT0sfjKK1rVCid0Z0ddWRuV9uuKs6evJT
47EFQxQzDzMuWkcZX/FcO3WrT4+7k1mXn6Cj0HNaITBIwYNWKa38HRNJJD8mxyS7
fTev9l+ymP2kW07F1zH+eO6tzGir+48a0iWLDAPN2KZBuDazbHezomoifNURCfat
TCQtV7260e0+ZZJ3+S1O75vTk3femXmzkHTAETbVrcySgQM=
=IFfY
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.9-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Pull "soc/tegra: Changes for v4.9-rc1" from Thierry Reding:
This contains a single patch to fix an issue with setting the deep power
down mode of I/O rails.
* tag 'tegra-for-4.9-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Fix incorrect DPD request
Update the EXYNOS PM domain code to use the of_genpd_add_subdomain()
and remove any calls to of_genpd_get_from_provider().
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
The local end of each SMD channel is responsible for updating the tx
head and the rx tail, as such we should not touch the tx tail during a
reset.
Reported-by: Jeremy McNicoll <jmcnicol@redhat.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
By representing each edge as its own device the channels are no longer
tied to being parented by the same smd device and as such an edge can
live as children of e.g. remoteproc instances.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The code exectued by the interrupt handler depends on the values parsed
after requesting the irq, just to be save we should therefor move the
request_irq() call to be done after parsing the properties.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Multi-channel clients split between several drivers need a way to close
individual channels, as these drivers might be removed individually.
With this in place the responsibility of closing additionally opened
channels to the client as well only concerning smd about the primary
channel.
With this approach we will only trigger removal of SMD devices based on
the state of the primary channel, however we get in sync with how rpmsg
works.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
If we fail to get the hwspinlock due to probe defer, we shouldn't
print an error message. Just be silent in this case.
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Read data fails sometimes because of a timeout that PMIC cannot transfer data
to PMIC wrap on time, extend the waiting time to 10ms to reduce the failed
rate.
Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Register gpd_dev_ops.active_wakeup function to support keep power
during suspend state. And add flag to each power domain to
decide whether keep power during suspend or not.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reading the DPD_REQ & DPD2_REQ registers returns the previous requests.
If we sets the current request bit with the returned value, then other
pads will be turned on or off unexpectedly.
Signed-off-by: Vince Hsu <vinceh@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Driver updates for ARM SoCs.
A slew of changes this release cycle. The reset driver tree, that we merge
through arm-soc for historical reasons, is also sizable this time around.
Among the changes:
- clps711x: Treewide changes to compatible strings, merged here for simplicity.
- Qualcomm: SCM firmware driver cleanups, move to platform driver
- ux500: Major cleanups, removal of old mach-specific infrastructure.
- Atmel external bus memory driver
- Move of brcmstb platform to the rest of bcm
- PMC driver updates for tegra, various fixes and improvements
- Samsung platform driver updates to support 64-bit Exynos platforms
- Reset controller cleanups moving to devm_reset_controller_register() APIs
- Reset controller driver for Amlogic Meson
- Reset controller driver for Hisilicon hi6220
- ARM SCPI power domain support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXnm1XAAoJEIwa5zzehBx35lcP/ApuQarIXeZCQZtjlUBV9McW
o3o7FhKFHePmEPeoYCvVeK5D8NykTkQv3WpnCknoxPJzxGJF7jbPWQJcVnXfKOXD
kTcyIK15WL2HHtSE3lYyLfyUPz8AbJyRt0l0cxgcg6jvo+uzlWooNz1y78rLIYzg
UwRssj7OiHv4dsyYRHZIsjnB8gMWw8rYMk154gP2xy6MnNXXzzOVVnOiVqxSZBm+
EgIIcROMOqkkHuFlClMYKluIgrmgz1Ypjf+FuAg7dqXZd+TGRrmGXeI7SkGThfLu
nyvY3N18NViNu7xOUkI9zg7+ifyYM8Si9ylalSICSJdIAxZfiwFqFaLJvVWKU1rY
rBOBjKckQI0/X9WYusFNFHcijhIFV8/FgGAnVRRMPdvlCss7Zp03C9mR4AEhmKMX
rLG49x81hU1C+LftC59ml3iB8dhZrrRkbxNHjLFHVGWNrKMrmJKa8JhXGRAoNM+u
LRauiuJZatqvLfISNvpfcoW2EashVoU3f+uC8ymT3QCyME3wZm0t7T4tllxhMfBl
sOgJqNkTKDmPLofwm/dASiLML7ZF1WePScrFyOACnj9K4mUD+OaCnowtWoQPu0eI
aNmT84oosJ2S9F/iUDPtFHXdzQ+1QPPfSiQ9FXMoauciVq/2F+pqq68yYgqoxFOG
vmkmG2YM4Wyq43u0BONR
=O8+y
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"Driver updates for ARM SoCs.
A slew of changes this release cycle. The reset driver tree, that we
merge through arm-soc for historical reasons, is also sizable this
time around.
Among the changes:
- clps711x: Treewide changes to compatible strings, merged here for simplicity.
- Qualcomm: SCM firmware driver cleanups, move to platform driver
- ux500: Major cleanups, removal of old mach-specific infrastructure.
- Atmel external bus memory driver
- Move of brcmstb platform to the rest of bcm
- PMC driver updates for tegra, various fixes and improvements
- Samsung platform driver updates to support 64-bit Exynos platforms
- Reset controller cleanups moving to devm_reset_controller_register() APIs
- Reset controller driver for Amlogic Meson
- Reset controller driver for Hisilicon hi6220
- ARM SCPI power domain support"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (100 commits)
ARM: ux500: consolidate base platform files
ARM: ux500: move soc_id driver to drivers/soc
ARM: ux500: call ux500_setup_id later
ARM: ux500: consolidate soc_device code in id.c
ARM: ux500: remove cpu_is_u* helpers
ARM: ux500: use CLK_OF_DECLARE()
ARM: ux500: move l2x0 init to .init_irq
mfd: db8500 stop passing around platform data
ASoC: ab8500-codec: remove platform data based probe
ARM: ux500: move ab8500_regulator_plat_data into driver
ARM: ux500: remove unused regulator data
soc: raspberrypi-power: add CONFIG_OF dependency
firmware: scpi: add CONFIG_OF dependency
video: clps711x-fb: Changing the compatibility string to match with the smallest supported chip
input: clps711x-keypad: Changing the compatibility string to match with the smallest supported chip
pwm: clps711x: Changing the compatibility string to match with the smallest supported chip
serial: clps711x: Changing the compatibility string to match with the smallest supported chip
irqchip: clps711x: Changing the compatibility string to match with the smallest supported chip
clocksource: clps711x: Changing the compatibility string to match with the smallest supported chip
clk: clps711x: Changing the compatibility string to match with the smallest supported chip
...
1. Fix size of allocation for Exynos SROM registers (too much was allocated).
2. Constify fix.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXg8EAAAoJEME3ZuaGi4PXH2kP/im4hf/QbZ6+CCjAJilbg9kn
QcvWdSQorhSPXo8WlbV1cM7RIEsZSs/GIEILEmK+CdGaFcFzzGugB96BceQR0Pkw
HQY8QbVn2YduvePYa5LXafKNEsZKRwrRknhJw0WYDbrXGaDXfWURpZVNedz7w3CS
DJDzVEw7JSYjhpeWOqg7fY9T5mZwInZhBhSJZ9FHTk3URioEX7dY+jBzLlQqfzdZ
KFEhYFY3lOHcSw6ye0Lr+PJra+F5m5kplac4WlhxAsm0v5Kr9MuT1f9tPVDpWxDX
jYIJfpD86RFwiJD39HxfJYHmfZ5sdTGVsWKRVP/3xjoTiUhxC1Takyeu3Uc0Mb45
IjgAZA0QPJoilKBAusRHq8rsc0aZkCcfu7RWQHtsXpUxaHXnUcT0s/498t74Lerg
WiSXl7HdkOkKckxHbLuB4h/FTWVZfGSHp5XM6cH/bJjwgXvzl7xol/B4bwQE6h8k
irn5SyDAAeOIvuiLgi59k9iTZpPbXwfVwWrTGSCUNavOOV5yggZqJTEsO0iqBbwc
m7B8L+tuu/DLqADHeZ+FRMfhqiWNJEZ9RMn8DaL0I+hhTesKBh8DPKCUoN1mrhb8
AkaHSB6Xdm0Uu9AlDUAPgbaTCAEr2ur8dQS7QQLHv3jnJ53B0W2ylDRFy5L2Gp96
5k51J/uD3dGZpJjbpdOt
=7gEy
-----END PGP SIGNATURE-----
Merge tag 'samsung-drivers-4.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers
Merge "Samsung drivers/soc update for v4.8, part 3" into next/drivers:
1. Fix size of allocation for Exynos SROM registers (too much was allocated).
2. Constify fix.
* tag 'samsung-drivers-4.8-3' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
soc: samsung: pmu: Constify arrays with PMU data
memory: samsung: exynos-srom: Fix wrong count of registers
of machine-local files and boardfile-type data for regulators
and ASoC.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXhLdvAAoJEEEQszewGV1znkoQAMJy4s/VnTrhL5PdMdYu/Zr6
rLr1EyQDJZTErmGnmRnlKoLfsxTs6of4Yka2nKJJJO13FMy4eHyHHi7Wbc+WHfbO
oYEOQSK2y44niXBhSCm0P34CrMRSJuoh0LbnFyZfCcVgwYbyyklkwok4crIxkq3b
bQg+/lA8pal2tM7Y7hC/f2u54Qi6jqPrEfzZc01PnbfS64Joiup8se5+CHTHwSeT
v3nQy8TlQFJR9Suq0D8BxPZnBIHkTIJJkzQOc8Rzg7YNqq2WsXn3JZRaK0yYn/Vg
E1BOjCypVSxSIkx46hUjCv+9xoWRfIvbJZXwYk1VYzw2vUvn9WAMJEhwWDdReJ//
PpehqKG7yn2VYCBt0WF67CZC3AIYRPyfIbG3q4pKfn80/apAHkjJXO7QupHZdWsT
QGxe/vGHjhXW+m8ptoePuIynBf4GJhN8TYbzoR9jptAgkl9/CgQmD0FQjMmrJHFo
REeTvvddPsA5wQdbFRnmlRm9CPUaU6dGx9UwEIHs79pjR7IzWGf+wRxdJg3x28Z/
Y6SVQkCcUoT1AX67XpEP2QgUo+wzUM5IObcjur+io8nLKQ1h9WfmBKZCZ3UIp8Uf
incRtLP6UvLWcbLCHGy0pGlZ/4OFFyDDW7I9t1prHBCuIOmh18pWuzkJsXZUoRXQ
FiVEOb7mF7lCTrgh65aR
=VLJl
-----END PGP SIGNATURE-----
Merge tag 'ux500-cleanup-bundle' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/drivers
Merge "Ux500 cleanups from Arnd" from Linus Walleij:
This is a set of cleanups for the Ux500 that reduce the number
of machine-local files and boardfile-type data for regulators
and ASoC.
* tag 'ux500-cleanup-bundle' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: consolidate base platform files
ARM: ux500: move soc_id driver to drivers/soc
ARM: ux500: call ux500_setup_id later
ARM: ux500: consolidate soc_device code in id.c
ARM: ux500: remove cpu_is_u* helpers
ARM: ux500: use CLK_OF_DECLARE()
ARM: ux500: move l2x0 init to .init_irq
mfd: db8500 stop passing around platform data
ASoC: ab8500-codec: remove platform data based probe
ARM: ux500: move ab8500_regulator_plat_data into driver
ARM: ux500: remove unused regulator data
As the ux500 id code is basically a standalone driver, we can move it
out of the arch code into drivers/soc/ux500.
This is a user-visible change, as it moves all the devices in sysfs
from /sys/devices/soc0/ to /sys/devices/ and leaves the soc0 node as a
separate device.
Originally the idea was to put all on-chip devices under the soc node,
and ux500 was the first platform to have this device, but later platforms
almost all didn't follow that pattern, so this makes the platform do
the same thing as everyone else.
Since the platform is really obsolete now, I am optimistic that nothing
will break after moving the devices around.
As the SoC driver no longer has access to the private header files,
I'm changing the code to instead look up the address of the backupram
from devicetree, which is a good idea anyway.
Finally, having a separate Kconfig symbol means the driver is now
optional and could even be a loadable module rather than always being
built-in if we allowed that for soc_device.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[Fixup mising Makefile, fixup BB_UID_BASE to fc0]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
We get a harmless warning if the RASPBERRYPI_POWER driver is enabled without
CONFIG_OF during compile testing:
warning: RASPBERRYPI_POWER selects PM_GENERIC_DOMAINS_OF which has unmet direct dependencies (PM_GENERIC_DOMAINS && OF)
There is no need to select PM_GENERIC_DOMAINS_OF if OF is set, so we can
replace the 'select' with a dependency.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Eric Anholt <eric@anholt.net>
Contains fixes and cleanups to the PMC driver, as well as some fixes for
the generic PM domain support and some prep work to support PCIe on 64-
bit ARM.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJXdn7eAAoJEN0jrNd/PrOhDc4P/2U04qs7hhaI94NmrWBDto2O
OKHezveursISPEFZ+FebMF5mSNwdBG0RitKm813TwoYDEKk6Dc7GV4nQHwHPVYqW
7xK2VrqU3GpEXXSgGu6dupwx/W6ID/L6gkghg01yVVwuvuNOrCDqWTv5EM++9Ydg
5SPBP2Nvc3CQr/Q71WU8uQueTmtQoQanZC8an/CBzRO2nA8HDBDaXfQ+dgkP/U8l
QfM9TJbFgbg9s+gwboL9UwnFmDtNNRDFPEYU8Ij9q+VDW4LEodErrVVO2NSwVhG4
A8KlkUO6N/pHRTjWnERHXUS/kCUM7BRoOum+KjMUdz3SO6iSuZFaKUein7R2fld4
iV+ichP+DpnkdSpPtgTcFYUeGM1QWfBij+9owloCE4k1pr08hS8eYWxReZ9rsVGN
43ZBZg/ia41RhojfNDtAK0ntXhak7t5DIiDpi9OO7pvCtU6aYxZxzFu+C9UiCcZ3
zPHDxHkCVEjbSdrbd6AhkOIbQ9BKk9pab0iya+B3JSJTFensxYkLhAbYkmDgXiPA
8+pySykkmogBJjsiKBbANlz+5c0etMnjTpd9jBzBuagKahfpZndHtCL8VlA2Blhh
d7KORcCf1PCEoqALoj0NXhi7IxF9KrbonpQcFspWV4zFSdhBkj5O8wkR10J5q4zG
4iJt7/bmYoWO/dbRTjbr
=eFoM
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
soc/tegra: Changes for v4.8-rc1
Contains fixes and cleanups to the PMC driver, as well as some fixes for
the generic PM domain support and some prep work to support PCIe on 64-
bit ARM.
* tag 'tegra-for-4.8-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: Stub out PCIe IRQ workaround on 64-bit ARM
soc/tegra: pmc: Enable XUSB partitions on boot
soc/tegra: pmc: Initialise power partitions early
soc/tegra: pmc: Add specific error messages
soc/tegra: pmc: Use whitespace more consistently
soc/tegra: pmc: Don't probe PMC if early initialisation fails
soc/tegra: pmc: Add missing of_node_put()
soc/tegra: pmc: Ensure mutex is always initialised
soc/tegra: pmc: Don't populate SoC data until register space is mapped
soc/tegra: pmc: Fix early initialisation of PMC
soc/tegra: pmc: Ensure powergate is available when powering on
soc/tegra: pmc: Initialise resets associated with a power partition
soc/tegra: pmc: Use register definitions instead of magic values
Signed-off-by: Olof Johansson <olof@lixom.net>
* Prepare for handling SYSC interrupt configuration purely
from DT in the rcar-sysc driver for new SoCs, while preserving
backward compatibility with old DTBs for R-Car H1, H2, and M2-W
* Add R8A7792 support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXdRvUAAoJENfPZGlqN0++qocQAJ6MApU5z9Bn+bLCCLOUeL+F
5qtRZIQoO/VQ+7sbRR7pBTTLbKs13Zeizq9CxvhGVtq/YUqzP25/RJ8mE25j1Hq1
+X3QVVOIqCnRQVDlGSq6Og7IMOvCVsNgqxWdmAwtkuiRkD75Qsb6lkmLH8MyNkRj
6UcC7UUJ5P/Pes9Qgh7ZqfWHD+A7JkUbYlN8THQkuSOJyA5Vf/jAry6riQSkJiuy
854xJ/f1FRAQas/Usqr3i+6gpZtRw66n5DA+JFubXJLxvrqnZUDdjV2d1tS8phC6
/AIGxx8n967lPg7j9DO6YxEViF3sxFrvQNds8qYoxzH6+z7FtApBJW9EDLkb58+H
nvP93DnYz1PzIjcKq0CDreqVnPDtBFK4kfDzkMxLIfbfQVgtSQlo0rpjHQzUA24u
6zk0Nhl2DM7pe9BYxQNGwWK9f9QIKxiKx9y8Qqkghylq27V34tG+dBgRj0Klv6G+
QHJNg2ShGZ/esup14eOh4YOw4ks6oNPeda0Rbl4ox3Ec970/42uIR495rsM40Avb
G17hpvsCd4oVq5xhmr8CKSDzNleewRYGxbzs5Yp1VpWxAjkKOO2AlCxaWSYtYpQe
gO1sT/YDWx4m0wiEa1/W0z3tO+U3w3wKaKOtxOZyjOj6dq99MJxPwMRoHYUGyMKW
gGN/bJjsoxBJO/Kl0om+
=/p9r
-----END PGP SIGNATURE-----
Merge tag 'renesas-rcar-sysc2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Second Round of Renesas ARM Based SoC R-Car SYSC Updates for v4.8
* Prepare for handling SYSC interrupt configuration purely
from DT in the rcar-sysc driver for new SoCs, while preserving
backward compatibility with old DTBs for R-Car H1, H2, and M2-W
* Add R8A7792 support
* tag 'renesas-rcar-sysc2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
soc: renesas: rcar-sysc: Improve SYSC interrupt config in legacy wrapper
soc: renesas: rcar-sysc: Move SYSC interrupt config to rcar-sysc driver
soc: renesas: rcar-sysc: Make rcar_sysc_init() init the PM domains
soc: renesas: rcar-sysc: Fix uninitialized error code in rcar_sysc_pd_init()
soc: renesas: rcar-sysc: add R8A7792 support
Signed-off-by: Olof Johansson <olof@lixom.net>
* Rework of SCM driver
* Add file patterns for Qualcomm Maintainers entry
* Add worker for wcnss_ctrl signaling
* Fixes for smp2p
* Update smem_state properties to match documentation
* Add SCM Peripheral Authentication service
* Expose SCM PAS command 10 as a reset controller
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXcaVxAAoJEFKiBbHx2RXVoxwQAMPI+3iN8M60JJ0SJvhP/VQA
AlPUcuaS2j50K16srmLif4aG8JYReRI4SNdy0J1kaRRi9OAEHiyQ5yVVlDA+FTTT
RErBxVzRUYyeCzrBpP1CL4khT+691QVx0dMcdlhnNRUttP3Cd42FM0J4GExWuDJO
UuOVn1UV0PmgSNfmYzyk87LXOA1di7ZGht02Vnjnh+kcoVjUy4Ty/yLHzxGPYcaF
RIj6lgYREtU7TN63MNkbYyx2FF+8WS9l5Q6U9E4Z/3nwRzhzhtPimWGtz1EHmxfy
a8YXmkQYM3RvPa8Cigiyg5ubkLlPC7w2rkNExKUyC/Y/jbvE4l/XJNleCEiGZmMT
f48F+7iAGgOwITL0+Lqj4VbKlUihwW28+OjcS/M5fTpDR6k0dmU0zHMhJKR9pYVU
Cr7ucYcPvzF2M6d4Frre9tZski4DZkpke81xjf6HQ00gI2CaDV/lieXtFjikL/Cl
ktdwQAo2+ydJ+7Ps5Qas2A+d66REe90vx2RCZWFRs9Nxe/CfSSz01LM6EeyONBKf
XfQvbKc6V/ZVHkWkA/EILlfRFCho6KwpEAHpZpFt1NiplJXfUcDcQyy/CuIKLR4H
c/UfKeGZCK+VyezbMWAKDb7ig3KywHD8yRieQpCyysVB/97oulJ/bHEs1KT5Bl5I
uDjnR7KqyXJEOGANr5S2
=WprH
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers
Qualcomm ARM Based Driver Updates for v4.8
* Rework of SCM driver
* Add file patterns for Qualcomm Maintainers entry
* Add worker for wcnss_ctrl signaling
* Fixes for smp2p
* Update smem_state properties to match documentation
* Add SCM Peripheral Authentication service
* Expose SCM PAS command 10 as a reset controller
* tag 'qcom-drivers-for-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
firmware: qcom: scm: Expose PAS command 10 as reset-controller
firmware: qcom: scm: Peripheral Authentication Service
soc: qcom: Update properties for smem state referencing
soc: qcom: smp2p: Drop io-accessors
soc: qcom: smp2p: Correct addressing of outgoing value
soc: qcom: wcnss_ctrl: Make wcnss_ctrl parent the other components
firmware: qcom: scm: Add support for ARM64 SoCs
firmware: qcom: scm: Convert to streaming DMA APIS
firmware: qcom: scm: Generalize shared error map
firmware: qcom: scm: Use atomic SCM for cold boot
firmware: qcom: scm: Convert SCM to platform driver
MAINTAINERS: Add file patterns for qcom device tree bindings
Signed-off-by: Olof Johansson <olof@lixom.net>
The Tegra XHCI driver does not currently manage the Tegra XUSB power
partitions and so it these partitions have not been enabled by the
bootloader then the system will crash when probing the XHCI device.
While proper support for managing the power partitions is being
developed to the XHCI driver for Tegra, for now power on all the XUSB
partitions for USB host and super-speed on boot if the XHCI driver is
enabled.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
If CONFIG_PM_GENERIC_DOMAINS is not enabled, then power partitions
associated with a device will not be enabled automatically by the PM
core when the device is in use. To avoid situations where a device in
a power partition is to be used but the partition is not enabled,
initialise the power partitions for Tegra early in the boot process and
if CONFIG_PM_GENERIC_DOMAINS is not enabled, then power on all
partitions defined in the device-tree blob.
Note that if CONFIG_PM_GENERIC_DOMAINS is not enabled, after the
partitions are turned on, the clocks and resets used as part of the
sequence for turning on the partition are released again as they are no
longer needed by the PMC driver. Another benefit of this is that this
avoids any issues of sharing resets between the PMC driver and other
device drivers that may wish to independently control a particular
reset.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
When initialising a powergate, only a single error message is shown if
the initialisation fails. Add more error messages to give specific
details of what failed if the initialisation failed and remove the
generic failure message.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Commit 0259f522e0 ('soc/tegra: pmc: Restore base address on probe
failure') fixes an issue where the PMC base address pointer is not
restored on probe failure. However, this fix creates another problem
where if early initialisation of the PMC driver fails and an initial
mapping for the PMC address space is not created, then when the PMC
device is probed, the PMC base address pointer will not be valid and
this will cause a crash when tegra_pmc_init() is called and attempts
to access a register.
Although the PMC address space is mapped a 2nd time during the probe
and so this could be fixed by populating the base address pointer
earlier during the probe, this adds more complexity to the code.
Moreover, the PMC probe also assumes the the soc data pointer is also
initialised when the device is probed and if not will also lead to a
crash when calling tegra_pmc_init_tsense_reset(). Given that if the
early initialisation does fail then something bad has happen, it seems
acceptable to allow the PMC device probe to fail as well. Therefore, if
the PMC base address pointer or soc data pointer are not valid when
probing the PMC device, WARN and return an error.
Fixes: 0259f522e0 ('soc/tegra: pmc: Restore base address on probe failure')
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add missing of_node_put() in PMC early initialisation function to avoid
leaking the device nodes.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
[treding@nvidia.com: squash in a couple more of_node_put() calls]
Signed-off-by: Thierry Reding <treding@nvidia.com>
The mutex used by the PMC driver may not be initialised if early
initialisation of the driver fails. If this does happen, then it could
be possible for callers of the public PMC functions to still attempt to
acquire the mutex. Fix this by initialising the mutex as soon as
possible to ensure it will always be initialised.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The public functions exported by the PMC driver use the presence of the
SoC data pointer to determine if the PMC device is configured and the
registers can be accessed. However, the SoC data is populated before the
PMC register space is mapped and this opens a window where the SoC data
pointer is valid but the register space has not yet been mapped which
could lead to a crash. Furthermore, if the mapping of the PMC register
space fails, then the SoC data pointer is not cleared and so would
expose a larger window where a crash could occur.
Fix this by initialising the SoC data pointer after the PMC register
space has been mapped.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
During early initialisation, the available power partitions for a given
device is configured as well as the polarity of the PMC interrupt. Both
of which should only be configured if there is a valid device node for
the PMC device. This is because the soc data used for configuring the
power partitions is only available if a device node for the PMC is found
and the code to configure the interrupt polarity uses the device node
pointer directly.
Some early device-tree images may not have this device node and so fix
this by ensuring the device node pointer is valid when configuring these
items.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The function tegra_power_sequence_power_up() is a public function used
to power on a partition. When this function is called, we do not check
to see if the partition being powered up is valid/available. Fix this
by checking to see that the partition is valid/available.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
When registering the Tegra power partitions with the generic PM domain
framework, the current state of the each partition is checked and used
as the default state for the partition. However, the state of each reset
associated with the partition is not initialised and so it is possible
that the state of the resets are not in the expected state. For example,
if a partition is on, then the resets should be de-asserted and if the
partition is off, the resets should be asserted.
There have been cases where the bootloader has powered on a partition
and only de-asserted some of the resets to some of the devices in the
partition. This can cause accesses to these devices to hang the system
when the kernel boots and attempts to probe these devices.
Ideally, the driver for the device should ensure the reset has been
de-asserted when probing, but the resets cannot be shared between the
PMC driver (that needs to de-assert/assert the reset when turning the
partition on or off) and another driver because we cannot ensure the
reset is in the correct state.
To ensure the resets are in the correct state, when using the generic
PM domain framework, put each reset associated with the partition in
the correct state (based upon the partition's current state) when
obtaining the resets for a partition.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Align SYSC interrupt configuration in the legacy wrapper with the DT
version:
- Mask SYSC interrupt sources before enabling them (doesn't matter
much as they're disabled at the GIC level anyway),
- Make sure not to clear reserved SYSCIMR bits that were set before.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On R-Car H1 and Gen2, the SYSC interrupt registers are always configured
using hardcoded values in platform code. For R-Car Gen2, values are
provided for H2 and M2-W only, other SoCs are not yet supported, and
never will be.
Move this configuration from SoC-specific platform code to the
rcar_sysc_init() wrapper, so it can be skipped if the SYSC is configured
from DT. This would be the case not only for H1, H2, and M2-W using a
modern DTS, but also for other R-Car Gen2 SoCs not supported by the
platform code, relying purely on DT.
There is no longer a need to return the mapped register block, hence
make the function return void.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Let rcar_sysc_init() trigger initialization of the SYSC PM domains from
DT if called before the early_initcall.
On failure, it falls back to mapping the passed register block, as
before.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On success, rcar_sysc_pd_init() returns an uninitialized error code.
Use the return value of of_genpd_add_provider_onecell() to fix this.
This went unnoticed, as early_initcall() doesn't care about the return
value.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Update the property names to match device tree bindings, the correct
values should be qcom,smem-states and qcom,smem-state-names.
Also update the #qcom,smem-state-cells for consistency, before we merge
any users of these properties.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
SMEM is now mapped write-combine and we can use memcpy to access the
name of the entires.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The valid_entries index should not be incremented until after we have
acquired the pointer to the value, or we will read and write data one
item off.
Fixes: 50e9964141 ("soc: qcom: smp2p: Qualcomm Shared Memory Point to Point")
Cc: stable@vger.kernel.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
We need the signal from wcnss_ctrl indicating that the firmware is up
and running before we can communicate with the other components of the
chip. So make these other components children of the wcnss_ctrl device,
so they can be probed in order.
The process seems to take between 1/2-5 seconds, so this is done in a
worker, instead of holding up the probe.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
- Florian moves drivers/soc/brcmstb to drivers/soc/bcm/brcmstb to be consistent with
how other SoCs are doing it
- Chris provides a reset driver which is common to the BCM21664 and BCM23550 SoCs
- Ben fixes a warning by providing the appropriate include file
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXY1WaAAoJEIfQlpxEBwcErVMQAK9dNwq7Zul5NPc+QXe/0vUy
hLzjF2qm8CEqxU+YF3B1OSI4DHFEdJi3kgDq0RwaVoNC11nFdD5CQIKiB2a0O4jL
HYlRSir2BoeuSdt/IUry8tdUJOy1LhK/OM0yu/E4OJq/yHgimM/D2+kh6ToSS23s
X2rocyat7CUAqtiEXroYmWgu+UbUI9Dst+WtXJ4bL6iJe5asZPeTFdxNuMmO0RBF
XcGY7nmOD420jhYJvZkZUibo/tz/i57Ar2i0SFpTgQGQ1DHbmyhEFCbOm6QuZ3J0
l5deISy0buXfTTc15n9zhoqZxtGiM3ExqEhrTdvaSjBkZrZUUhjKo+ED5yGJ7Yqy
2cRP1dua4ixEbOJoAU+IuoqDj42zOxpOLhwNi7e8ROTqXfxHxAVizPJ6dKZKP1vz
6KqqJtEoD+U9mrylAQ55+D68e1kNy7r8TN4qJBhrNSO3G2bWogYzUKHFMdSPyNFY
/g0qhAwBrvPHw1ieezS74uMCIF525QfylpcX4MP0s48fAN32SQPdFb5mZuxzqvVH
V0Z/VShkndLkoslChEZ5intuvMDUMyP1tdwvthuvoJQOVh59Fede+7TG+wsxzOGP
FbWGhtWzxVzKLOvwBZhLMv5VwPH7rFSSTuc3tT2xMtpoMy/lhRabH/nqQKdm9CET
uzRJ8hDFy3oWx3L95nA/
=gNzd
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.8/drivers' of http://github.com/Broadcom/stblinux into next/drivers
This pull request contains drivers related changes for Broadcom SoCs:
- Florian moves drivers/soc/brcmstb to drivers/soc/bcm/brcmstb to be consistent with
how other SoCs are doing it
- Chris provides a reset driver which is common to the BCM21664 and BCM23550 SoCs
- Ben fixes a warning by providing the appropriate include file
* tag 'arm-soc/for-4.8/drivers' of http://github.com/Broadcom/stblinux:
soc: brcmstb: fix warning from missing include
power: Introduce Broadcom kona reset driver
soc: Move brcmstb to bcm/brcmstb
Signed-off-by: Olof Johansson <olof@lixom.net>
Add support for R-Car V2H (R8A7792) SoC power areas to the SYSC driver.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Use register definitions for the main SoC reset operation instead of
hard-coding magic values. Note that the PMC_RST_STATUS register isn't
actually accessed, but since it is mentioned in a comment the
definitions are added for completeness.
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
QE has module to support TDM, some other protocols
supported by QE are based on TDM.
add a qe-tdm lib, this lib provides functions to the protocols
using TDM to configurate QE-TDM.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add tdm clock configuration in both qe clock system and ucc
fast controller.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Rx_sync and tx_sync are used by QE-TDM mode,
add them to struct ucc_fast_info.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
The brcmstb_biuctrl_init() is defined in the soc specific header
file, but wasn't included in the driver file. Fix the following
warning by including <linux/soc/brcmstb/brcmstb.h> in the driver:
drivers/soc/brcmstb/biuctrl.c:101:13: warning: symbol 'brcmstb_biuctrl_init' was not declared. Should it be static?
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Unify the different Broadcom SoCs directory and have everybody live
under drivers/soc/bcm/*.
Acked-by: Scott Branden <scott.branden@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Introduce a platform selectable symbol EXYNOS_PM_DOMAINS which can be
also toggled on by COMPILE_TEST for some build coverage.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
The ARMv8 Exynos family (Exynos5433 and Exynos7420) uses different value
(0xf instead of 0x7) for controlling the power domain on/off registers
(both for control and for status).
Choose the value depending on the compatible. This prepares the driver
for supporting ARMv8 SoCs.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
Exynos PM domains driver does not have mach-specific dependencies so it
can be safely moved out of arm/mach-exynos to drivers/soc. This in
future will allow re-using it on ARM64 boards.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
On ARM64, the mtk-pmic-wrap driver causes a harmless warning:
mtk-pmic-wrap.c:1062:16: warning: large integer implicitly truncated to unsigned type [-Woverflow]
mtk-pmic-wrap.c:1074:16: warning: large integer implicitly truncated to unsigned type [-Woverflow]
mtk-pmic-wrap.c:1086:16: warning: large integer implicitly truncated to unsigned type [-Woverflow]
.int_en_all = ~(BIT(31) | BIT(1)),
The problem is that the result of the BIT() macro is an 'unsigned long',
so taking the bitwise NOT operation of that results in an integer
with the upper 32 bits all set and that cannot be assigned to a
'u32' variable without loss of information.
This is harmless because we were never interested in the upper bits
here anyway, so we can shut up the warning by adding a simple cast
to 'u32'.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Driver updates for ARM SoCs, these contain various things that touch
the drivers/ directory but got merged through arm-soc for practical
reasons. For the most part, this is now related to power management
controllers, which have not yet been abstracted into a separate
subsystem, and typically require some code in drivers/soc or arch/arm
to control the power domains.
Another large chunk here is a rework of the NVIDIA Tegra USB3.0
support, which was surprisingly tricky and took a long time to
get done.
Finally, reset controller handling as always gets merged through here
as well.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVzuXkGCrR//JCVInAQKb5BAAv2HuJ/tDjC8nNfYi0/aIt4uaRfRWE84t
+nIpdKl/pB9AQo+HdG9WNihHs2GN44PdQRrDZ1enQX8nvTzc+dUl0AI1GZmUDpF/
zCV2UJ39HMZcEPwf8lZk9X/JP4VOkJDM5pDgNZnnqdvkq0oqtKzmh0Kt6m2g6fIS
LR3FVtCRxJDeT+pT+EpoN4jpW0cb3mjTWbn/a8Ar3BH07KBA3U22MVJhHArLjS30
/aXP+AkgdvlgmBher5z44N6Qd/KOLn78rnE4LCRC4FwSCqA+qqPJQNGNblV5MHjE
s5CYTqlihqLiGapqJ4zGBhmqj0XU/3kFVboGqYlTGjzMkOFgjddTpMdfkBUoG5oJ
UubJ51zzSLXTcMwILGNXVls4YjJRKwNH7jeSjuMqpWrAYP4qBcMn/HQ1GqUjkNv+
yWkheHiLDYgYkIDOBDuFUtJ7OXiVumGGxIE+r2K/sXeNI7gFcDxFExMIo11vPAWP
WJ8ydTchyb/RUQbzhjEXhoIeCZwXQfe9s11qsyFQDCZLleWYQGs3gFKdEI1E7+BE
oe018BSP+uaVXdaV18Ne4smwzydLAU9/ieUoO45PAUSN2reV4lWhFTlNiiiMd3Id
IWoYwpxqP2VW9zJvLz6QGF/P+3cZ00m/1lecJCKHHPBmbUijCHWJmgLT73AdSXmR
YIJ2UM5QMiY=
=x+iD
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs, these contain various things that touch
the drivers/ directory but got merged through arm-soc for practical
reasons.
For the most part, this is now related to power management
controllers, which have not yet been abstracted into a separate
subsystem, and typically require some code in drivers/soc or arch/arm
to control the power domains.
Another large chunk here is a rework of the NVIDIA Tegra USB3.0
support, which was surprisingly tricky and took a long time to get
done.
Finally, reset controller handling as always gets merged through here
as well"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (97 commits)
arm-ccn: Enable building as module
soc/tegra: pmc: Add generic PM domain support
usb: xhci: tegra: Add Tegra210 support
usb: xhci: Add NVIDIA Tegra XUSB controller driver
dt-bindings: usb: xhci-tegra: Add Tegra210 XUSB controller support
dt-bindings: usb: Add NVIDIA Tegra XUSB controller binding
PCI: tegra: Support per-lane PHYs
dt-bindings: pci: tegra: Update for per-lane PHYs
phy: tegra: Add Tegra210 support
phy: Add Tegra XUSB pad controller support
dt-bindings: phy: tegra-xusb-padctl: Add Tegra210 support
dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding
phy: core: Allow children node to be overridden
clk: tegra: Add interface to enable hardware control of SATA/XUSB PLLs
drivers: firmware: psci: make two helper functions inline
soc: renesas: rcar-sysc: Add support for R-Car H3 power areas
soc: renesas: rcar-sysc: Add support for R-Car E2 power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-N power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-W power areas
soc: renesas: rcar-sysc: Add support for R-Car H2 power areas
...
These are all the updates to device tree files for 32-bit platforms,
which as usual makes up the bulk of the ARM SoC changes: 462 non-merge
changesets, 450 files changed, 23340 insertions, 5216 deletions.
The three platforms that are added with the "soc" branch are here as well,
and we add some related machine files:
- For Aspeed AST2400/AST2500, we get the evaluation platform and
the Tyan Palmetto POWER8 mainboard that uses the AST2400 BMC
- For Oxnas 810SE, the Western Digital "My Book World Edition"
is added as the only platform at the moment.
- For ARM MPS2, the AN385 (Cortex-M3) and AN399 (Cortex-M7)
are supported
On the ARM Realview development platform, we now support all machines
with device tree, previously only the board files were supported, which
in turn will likely be removed soon.
Qualcomm IPQ4019 is the second generation ARM based "Internet Processor",
following the IPQ806x that is used in many high-end WiFi routers. This one
integrates two ath10k wifi radios that were previously on separate chips.
Other boards that got added for existing chips are:
- On Ti OMAP family:
- Amazon Kindle Fire, first generation, tablet and ebook reader
- OnRISC Baltos iR 2110 and 3220 embedded industrial PCs
- TI AM5728 IDK, TI AM3359 ICE-V2, and TI DRA722 Rev C EVM
development systems
- On Samsung EXYNOS platform:
- Samsung ARTIK5 evaluation board, see
https://www.artik.io/modules/overview/artik-5/
- On NXP i.MX platforms:
- Ka-Ro electronics TX6S-8034, TX6S-8035, TX6U-8033, TX6U-81xx,
TX6Q-1036, TX6Q-1110/-1130, TXUL-0010 and TXUL-0011 industrial
SoM modules
- Embest MarS Board i.MX6Dual DIY platform
- Boundary Devices i.MX6 Quad Plus Nitrogen6_MAX and
SoloX Nitrogen6sx embedded boards
- Technexion Pico i.MX6UL compute module
- ZII VF610 Development Board
- On Marvell embedded (mvebu, orion, kirkwood) platforms:
- Linksys Viper (E4200v2 / EA4500) WiFi router
- Buffalo Kurobox Pro NAS
- On Qualcomm Snapdragon:
- Arrow DragonBoard 600c (96boards) with APQ8064 Snapdragon 600
- On Rockchips platform:
- mqmaker MiQi single-board computer
- On Altera SoCFPGA:
- samtec VIN|ING 1000 vehicle communication interface
- On Allwinner Sunxi platforms:
- Dserve DSRV9703C tablet
- Difrnce DIT4350 tablet
- Colorfly E708 Q1 tablet
- Polaroid MID2809PXE04 tablet
- Olimex A20 OLinuXino LIME2 single board computer
- Xunlong Orange Pi 2, Orange Pi One, and Orange Pi PC
single board computers
Across many platforms, bug fixes went in to address warnings that
dtc now emits with 'make dtbs W=1'. Further changes for device enablement
went into Ti OMAP, bcm283x (Raspberry Pi), bcm47xx (wifi router),
Ti Davinci, Samsung EXYNOS, Marvell mvebu/kirkwood/orion, NXP i.MX/Vybrid
NXP LPC18xx, NXP LPC32xx, Renesas shmobile/r-mobile/r-car, Rockchips
rk3xxx, ST Ux500, ST STi, Atmel AT91/SAMA5, Altera SoCFPGA, Allwinner
Sunxi, Sigma Designs Tango, NVIDIA Tegra, Socionext Uniphier and ARM
Versatile Express.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVzuXhGCrR//JCVInAQJXjhAA1bV0fbREflRQrlXdMb4rNesygH8ikaja
gOYHE1yO+tSitHZ5g4w2yAFIEK7DzFdO5rz53BEINZfLCj4LO4495/z9ipqZQEjC
rw5IL89jAn8x4wF791SHjLpmmNRbHN2vjLcsX3ShJIHckip/jIbiU2aFJuohA0TU
jxpPAZzhaKsu/rDaVzHMS/im4LbZQ2qI3DxUUn6Kt8c468i4Ns22sowqSjh2xO/X
YiwHD0eAvDrySfMGiNT82wMMTfMF2KfXZGB885isMP4hK8OIDrOnI5nM9rxyRFfu
N14o0+tN1S2JzBHnqOOpib6JxYyCVr+QTjsKGAyR5X1mGINIhX8f1gy0EvFFxXKT
rIATc5VTeo4gc1quij8RVtDEp/4iJ8GspH4WGMh1F8tjTe+WUxeSMkxdf6/QY1+Q
vZKT0KKihoJQu1xI62NjnaRbfbhwx2BSWehwgXVd72lD19dG5LPw+Nj6/8+Bgouc
YxJahgkB9MMtHoNp8huMg33Gr9a07/yVxc4CztXtf7N9phd0nEXov2iM1aBgazLU
8IVd3Z9lZA+4iGVcj3oBJ6K1IkiCmg2qoNyF6tcInR5vPjKLECuxyuZw8VKuUuHD
k/s/rymSGRlDN5i4F0h0r4MvQ9gkYfwk8xiL3ofmwYHwo103Q7b7Cw55XRk88EoB
appd5QA+pko=
=Nx46
-----END PGP SIGNATURE-----
Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM DT updates from Arnd Bergmann:
"These are all the updates to device tree files for 32-bit platforms,
which as usual makes up the bulk of the ARM SoC changes: 462 non-merge
changesets, 450 files changed, 23340 insertions, 5216 deletions.
The three platforms that are added with the "soc" branch are here as
well, and we add some related machine files:
- For Aspeed AST2400/AST2500, we get the evaluation platform and the
Tyan Palmetto POWER8 mainboard that uses the AST2400 BMC
- For Oxnas 810SE, the Western Digital "My Book World Edition" is
added as the only platform at the moment.
- For ARM MPS2, the AN385 (Cortex-M3) and AN399 (Cortex-M7) are
supported
On the ARM Realview development platform, we now support all machines
with device tree, previously only the board files were supported,
which in turn will likely be removed soon.
Qualcomm IPQ4019 is the second generation ARM based "Internet
Processor", following the IPQ806x that is used in many high-end WiFi
routers. This one integrates two ath10k wifi radios that were
previously on separate chips.
Other boards that got added for existing chips are:
Ti OMAP family:
- Amazon Kindle Fire, first generation, tablet and ebook reader
- OnRISC Baltos iR 2110 and 3220 embedded industrial PCs
- TI AM5728 IDK, TI AM3359 ICE-V2, and TI DRA722 Rev C EVM
development systems
Samsung EXYNOS platform:
- Samsung ARTIK5 evaluation board, see
https://www.artik.io/modules/overview/artik-5/
NXP i.MX platforms:
- Ka-Ro electronics TX6S-8034, TX6S-8035, TX6U-8033, TX6U-81xx,
TX6Q-1036, TX6Q-1110/-1130, TXUL-0010 and TXUL-0011 industrial
SoM modules
- Embest MarS Board i.MX6Dual DIY platform
- Boundary Devices i.MX6 Quad Plus Nitrogen6_MAX and SoloX
Nitrogen6sx embedded boards
- Technexion Pico i.MX6UL compute module
- ZII VF610 Development Board
Marvell embedded (mvebu, orion, kirkwood) platforms:
- Linksys Viper (E4200v2 / EA4500) WiFi router
- Buffalo Kurobox Pro NAS
Qualcomm Snapdragon:
- Arrow DragonBoard 600c (96boards) with APQ8064 Snapdragon 600
Rockchips platform:
- mqmaker MiQi single-board computer
Altera SoCFPGA:
- samtec VIN|ING 1000 vehicle communication interface
Allwinner Sunxi platforms:
- Dserve DSRV9703C tablet
- Difrnce DIT4350 tablet
- Colorfly E708 Q1 tablet
- Polaroid MID2809PXE04 tablet
- Olimex A20 OLinuXino LIME2 single board computer
- Xunlong Orange Pi 2, Orange Pi One, and Orange Pi PC single board
computers
Across many platforms, bug fixes went in to address warnings that dtc
now emits with 'make dtbs W=1'. Further changes for device enablement
went into Ti OMAP, bcm283x (Raspberry Pi), bcm47xx (wifi router), Ti
Davinci, Samsung EXYNOS, Marvell mvebu/kirkwood/orion, NXP i.MX/Vybrid
NXP LPC18xx, NXP LPC32xx, Renesas shmobile/r-mobile/r-car, Rockchips
rk3xxx, ST Ux500, ST STi, Atmel AT91/SAMA5, Altera SoCFPGA, Allwinner
Sunxi, Sigma Designs Tango, NVIDIA Tegra, Socionext Uniphier and ARM
Versatile Express"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (458 commits)
ARM: dts: tango4: Import watchdog node
ARM: dts: tango4: Update cpus node for cpufreq
ARM: dts: tango4: Update DT to match clk driver
ARM: dts: tango4: Initial thermal support
arm/dst: Add Aspeed ast2500 device tree
arm/dts: Add Aspeed ast2400 device tree
ARM: sun7i: dt: Add pll3 and pll7 clocks
ARM: dts: sunxi: Add a olinuxino-lime2-emmc
ARM: dts: at91: sama5d4: add trng node
ARM: dts: at91: sama5d3: add trng node
ARM: dts: at91: sama5d2: add trng node
ARM: dts: at91: at91sam9g45 family: reduce the trng register map size
ARM: sun4i: dt: Add pll3 and pll7 clocks
ARM: sun5i: chip: Enable the TV Encoder
ARM: sun5i: r8: Add display blocks to the DTSI
ARM: sun5i: a13: Add display and TCON clocks
ARM: dts: ux500: configure the accelerometers open drain
ARM: mx5: dts: Enable USB OTG on M53EVK
ARM: dts: imx6ul-14x14-evk: Add audio support
ARM: dts: imx6qdl: Remove unneeded unit-addresses
...
Traditionally we've had two separate branches for cleanups and non-critical
bug fixes, but both of these got smaller with each release and the differences
are rather unclear now, so it seems more appropriate to have a combined
branch.
The most notably change is for OMAP, which gets a small rework to simplify
handling of the AUXDATA mechanism used on machines that are not completely
DT based yet, along with other work that is used as preparation for dropping
the legacy board files.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVzuXUWCrR//JCVInAQKLTw/7BjSDJGRMsioOJ33Bg3LP92rJHPrVttWc
vG8ULnc2QgcFTofDqgyPza2p2XuV868I7jEw4d/qDXOkeIw3ddLKjdCMzHq5r1CO
G9W+ZlIw54na/Lh/CMVdMN1M3+64K4Fmp1IiBG66OhhFY8Zg3xterSEBk8V1+00K
LNdiq6aJ1yROyHQtYbe+CtqTi/pJ9AmkBoRk4MnfgIMQyywESLlYDRkc3VXWEFXv
3MBszgujEIE1R+XozC2VMDPrirdwjJv71x/tlE0nveOcAIam57B/6e5yLnVCQHpu
UCK8x39cj/PwWlwoBExKXNMwbTKCy03AhXjkxDmJ3bD+7FK1sEtFzcyBiwOjiZQq
CBttcwqGbtrGIsLbrbpEh9hAWbWNaparbChWW7RBC1sBIG11zd0HVYjzsKppmXsZ
3LUl4KbkGw+grKa+AnsM+e9vGu+J+2vIh9sDVvs0dbXCZp5ILgExbnurxMwbg/J1
QVycR8cjS2vs+79tTfakgVCSADvpdNbMcnYLz9GM5IS9j8bOlOhv1OhKtMFOue6y
zCIZyffDJqhU0M3xk78JQSx3Rt4FacDjYJdlqN27AQ125QT2kYmfGR2x/en52ARS
9QwauVp+5WcaoySdWi4TCpOMHV7FP40zhJ3G7TXZARaBccN0kCTfdF/QstLhAa0L
u+TVN4A1cBw=
=au7y
-----END PGP SIGNATURE-----
Merge tag 'armsoc-cleanups-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanups and fixes from Arnd Bergmann:
"Traditionally we've had two separate branches for cleanups and
non-critical bug fixes, but both of these got smaller with each
release and the differences are rather unclear now, so it seems more
appropriate to have a combined branch.
The most notable change is for OMAP, which gets a small rework to
simplify handling of the AUXDATA mechanism used on machines that are
not completely DT based yet, along with other work that is used as
preparation for dropping the legacy board files"
* tag 'armsoc-cleanups-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: dts: exynos: Add interrupt line to MAX8997 PMIC on exynos4210-trats
ARM: dts: exynos: Fix regulator name to avoid forbidden character on exynos4210-trats
ARM: dts: exynos: Add MFC memory banks for Peach boards
ARM: OMAP2+: n900 needs MMC slot names for legacy user space
ARM: OMAP2+: Add more functions to pwm pdata for ir-rx51
ARM: debug: remove extraneous DEBUG_HI3716_UART option
ARM: OMAP2+: Simplify auxdata by using the generic match
of/platform: Allow secondary compatible match in of_dev_lookup
ARM: davinci: use IRQCHIP_DECLARE for cp_intc
ARM: davinci: remove unused DA8XX_NUM_UARTS
ARM: davinci: simplify call to of populate
ARM: DaVinci USB: removed deprecated properties from MUSB config
ARM: rockchip: Fix use of plain integer as NULL pointer
ARM: realview: hide unused 'pmu_device' object
soc: versatile: dynamically detect RealView HBI numbers
Core infrastructural changes:
- Support for natively single-ended GPIO driver stages. This
means that if the hardware has registers to configure open
drain or open source configuration, we use that rather than
(as we did before) try to emulate it by switching the line
to an input to get high impedance. This is also documented
throughly in Documentation/gpio/driver.txt for those of you
who did not understand one word of what I just wrote.
- Start to do away with the unnecessarily complex and
unitelligible ARCH_REQUIRE_GPIOLIB and
ARCH_WANT_OPTIONAL_GPIOLIB, another evolutional artifact from
the time when the GPIO subsystem was unmaintained. Archs can
now just select GPIOLIB and be done with it, cleanups to
arches will trickle in for the next kernel. Some minor archs
ACKed the changes immediately so these are included in this
pull request.
- Advancing the use of the data pointer inside the GPIO device
for storing driver data by switching the PowerPC, Super-H
Unicore and a few other subarches or subsystem drivers in
ALSA SoC, Input, serial, SSB, staging etc to use it.
- The initialization now reads the input/output state of the
GPIO lines, so that each GPIO descriptor knows - if this
callback is implemented - whether the line is input or
output. This also reflects nicely in userspace "lsgpio".
- It is now possible to name GPIO producer names, line names,
from the device tree. (Platform data has been supported for
a while.) I bet we will get a similar mechanism for ACPI
one of those days. This makes is possible to get sensible
producer names for e.g. GPIO rails in "lsgpio" in userspace.
New drivers:
- New driver for the Loongson1.
- The XLP driver now supports Broadcom Vulcan ARM64.
- The IT87 driver now supports IT8620 and IT8628.
- The PCA953X driver now supports Galileo Gen2.
Driver improvements:
- MCP23S08 was switched to use the gpiolib irqchip helpers and
now also suppors level-triggered interrupts.
- 74x164 and RCAR now supports the .set_multiple() callback
- AMDPT was converted to use generic GPIO.
- TC3589x, TPS65218, SX150X, F7188X, MENZ127, VX855, WM831X, WM8994
support the new single ended callback for open drain
and in some cases open source.
- Implement the .get_direction() callback for a few more drivers
like PL061, Xgene.
Cleanups:
- Paul Gortmaker combed through the drivers and de-modularized
those who are not really modules.
- Move the GPIO poweroff DT bindings to the power subdir where
they belong.
- Rename gpio-generic.c to gpio-mmio.c, which is much more to the
point. That's what it is handling, nothing more, nothing less.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXOuJ5AAoJEEEQszewGV1zNXsQAII5wtkP69WRJ3goYBKg1dZN
DkuLqZyVI4hCgRhptzUW10gDLHKKOCVubfetTJHSpyG/dWDJXPCyH6FHF+pW6lMX
y+em8kAvWctKpaosy4EM7O55/IohW0/fNCTOfzfrUNivjydFuA2XwPUiPqC7111O
DeKlC/t+W1JEvZTiKMi83pKq+9wqhiHmD0qxRHhV57S+MT8e7mdlSKOp7uUkKPkg
LPlerXosnmeFjL2emuSnKl/tq8pOyruU6uaIGG/uwpbo2W86Dok9GY2GWkQ4pANT
pDtprc4aJ/Clf6Q0CoKwQbmAozqTDeJo+Und9tRs2KuZRly2bWOcyVE0lyK+Y4s0
544LcKw2q6cB9ARZ6JExEVRJejPISGKMqo9TaHkyNSIJoiiatKYvNS4WVeFtTgbI
W+1WfM1svPymNRqVPO1PMLV+3m9dalDH2WjtaFF21uCAQ/G0AuPEHjEDbbx0HIpb
qrvWmYzZ97Rm/LdYROFRO53nEdCp2jh6c3n4/2kGYM8H0suvGxXZsB1g4i+Dm+B+
qKVTS282azlDuH9ohXeXizeb6atK6s8TC3Rmew97SmXDO00cUQzEQO/ZquRLHY9r
n83afQ4OL2Z9yruAxAk7pCshVSyheOsHuFPuZ7bwPW31VMdoWNRkhnaTUXMjGfYg
3y39IHrCKWNMCCVM1iNl
=z4d6
-----END PGP SIGNATURE-----
Merge tag 'gpio-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO updates from Linus Walleij:
"This is the bulk of GPIO changes for kernel cycle v4.7:
Core infrastructural changes:
- Support for natively single-ended GPIO driver stages.
This means that if the hardware has registers to configure open
drain or open source configuration, we use that rather than (as we
did before) try to emulate it by switching the line to an input to
get high impedance.
This is also documented throughly in Documentation/gpio/driver.txt
for those of you who did not understand one word of what I just
wrote.
- Start to do away with the unnecessarily complex and unitelligible
ARCH_REQUIRE_GPIOLIB and ARCH_WANT_OPTIONAL_GPIOLIB, another
evolutional artifact from the time when the GPIO subsystem was
unmaintained.
Archs can now just select GPIOLIB and be done with it, cleanups to
arches will trickle in for the next kernel. Some minor archs ACKed
the changes immediately so these are included in this pull request.
- Advancing the use of the data pointer inside the GPIO device for
storing driver data by switching the PowerPC, Super-H Unicore and
a few other subarches or subsystem drivers in ALSA SoC, Input,
serial, SSB, staging etc to use it.
- The initialization now reads the input/output state of the GPIO
lines, so that each GPIO descriptor knows - if this callback is
implemented - whether the line is input or output. This also
reflects nicely in userspace "lsgpio".
- It is now possible to name GPIO producer names, line names, from
the device tree. (Platform data has been supported for a while).
I bet we will get a similar mechanism for ACPI one of those days.
This makes is possible to get sensible producer names for e.g.
GPIO rails in "lsgpio" in userspace.
New drivers:
- New driver for the Loongson1.
- The XLP driver now supports Broadcom Vulcan ARM64.
- The IT87 driver now supports IT8620 and IT8628.
- The PCA953X driver now supports Galileo Gen2.
Driver improvements:
- MCP23S08 was switched to use the gpiolib irqchip helpers and now
also suppors level-triggered interrupts.
- 74x164 and RCAR now supports the .set_multiple() callback
- AMDPT was converted to use generic GPIO.
- TC3589x, TPS65218, SX150X, F7188X, MENZ127, VX855, WM831X, WM8994
support the new single ended callback for open drain and in some
cases open source.
- Implement the .get_direction() callback for a few more drivers like
PL061, Xgene.
Cleanups:
- Paul Gortmaker combed through the drivers and de-modularized those
who are not really modules.
- Move the GPIO poweroff DT bindings to the power subdir where they
belong.
- Rename gpio-generic.c to gpio-mmio.c, which is much more to the
point. That's what it is handling, nothing more, nothing less"
* tag 'gpio-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (126 commits)
MIPS: do away with ARCH_[WANT_OPTIONAL|REQUIRE]_GPIOLIB
gpio: zevio: make it explicitly non-modular
gpio: timberdale: make it explicitly non-modular
gpio: stmpe: make it explicitly non-modular
gpio: sodaville: make it explicitly non-modular
pinctrl: sh-pfc: Let gpio_chip.to_irq() return zero on error
gpio: dwapb: Add ACPI device ID for DWAPB GPIO controller on X-Gene platforms
gpio: dt-bindings: add wd,mbl-gpio bindings
gpio: of: make it possible to name GPIO lines
gpio: make gpiod_to_irq() return negative for NO_IRQ
gpio: xgene: implement .get_direction()
gpio: xgene: Enable ACPI support for X-Gene GFC GPIO driver
gpio: tegra: Implement gpio_get_direction callback
gpio: set up initial state from .get_direction()
gpio: rename gpio-generic.c into gpio-mmio.c
gpio: generic: fix GPIO_GENERIC_PLATFORM is set to module case
gpio: dwapb: add gpio-signaled acpi event support
gpio: dwapb: convert device node to fwnode
gpio: dwapb: remove name from dwapb_port_property
gpio/qoriq: select IRQ_DOMAIN
...
Pull networking updates from David Miller:
"Highlights:
1) Support SPI based w5100 devices, from Akinobu Mita.
2) Partial Segmentation Offload, from Alexander Duyck.
3) Add GMAC4 support to stmmac driver, from Alexandre TORGUE.
4) Allow cls_flower stats offload, from Amir Vadai.
5) Implement bpf blinding, from Daniel Borkmann.
6) Optimize _ASYNC_ bit twiddling on sockets, unless the socket is
actually using FASYNC these atomics are superfluous. From Eric
Dumazet.
7) Run TCP more preemptibly, also from Eric Dumazet.
8) Support LED blinking, EEPROM dumps, and rxvlan offloading in mlx5e
driver, from Gal Pressman.
9) Allow creating ppp devices via rtnetlink, from Guillaume Nault.
10) Improve BPF usage documentation, from Jesper Dangaard Brouer.
11) Support tunneling offloads in qed, from Manish Chopra.
12) aRFS offloading in mlx5e, from Maor Gottlieb.
13) Add RFS and RPS support to SCTP protocol, from Marcelo Ricardo
Leitner.
14) Add MSG_EOR support to TCP, this allows controlling packet
coalescing on application record boundaries for more accurate
socket timestamp sampling. From Martin KaFai Lau.
15) Fix alignment of 64-bit netlink attributes across the board, from
Nicolas Dichtel.
16) Per-vlan stats in bridging, from Nikolay Aleksandrov.
17) Several conversions of drivers to ethtool ksettings, from Philippe
Reynes.
18) Checksum neutral ILA in ipv6, from Tom Herbert.
19) Factorize all of the various marvell dsa drivers into one, from
Vivien Didelot
20) Add VF support to qed driver, from Yuval Mintz"
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1649 commits)
Revert "phy dp83867: Fix compilation with CONFIG_OF_MDIO=m"
Revert "phy dp83867: Make rgmii parameters optional"
r8169: default to 64-bit DMA on recent PCIe chips
phy dp83867: Make rgmii parameters optional
phy dp83867: Fix compilation with CONFIG_OF_MDIO=m
bpf: arm64: remove callee-save registers use for tmp registers
asix: Fix offset calculation in asix_rx_fixup() causing slow transmissions
switchdev: pass pointer to fib_info instead of copy
net_sched: close another race condition in tcf_mirred_release()
tipc: fix nametable publication field in nl compat
drivers: net: Don't print unpopulated net_device name
qed: add support for dcbx.
ravb: Add missing free_irq() calls to ravb_close()
qed: Remove a stray tab
net: ethernet: fec-mpc52xx: use phy_ethtool_{get|set}_link_ksettings
net: ethernet: fec-mpc52xx: use phydev from struct net_device
bpf, doc: fix typo on bpf_asm descriptions
stmmac: hardware TX COE doesn't work when force_thresh_dma_mode is set
net: ethernet: fs-enet: use phy_ethtool_{get|set}_link_ksettings
net: ethernet: fs-enet: use phydev from struct net_device
...
* pm-cpuidle:
cpuidle: Replace ktime_get() with local_clock()
drivers: firmware: psci: use const and __initconst for psci_cpuidle_ops
soc: qcom: spm: Use const and __initconst for qcom_cpuidle_ops
ARM: cpuidle: constify return value of arm_cpuidle_get_ops()
ARM: cpuidle: add const qualifier to cpuidle_ops member in structures
intel_idle: add BXT support
cpuidle: Indicate when a device has been unregistered
* Change SMD callback parameters
* Use writecombine mapping for SMEM
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXFvdZAAoJEFKiBbHx2RXVxPQQAJnEp1+5CDN7ziQ/zJ3juSxb
b7rOr5Z0qMDhh0H9BFdmhGzFctbY0AOqerfh138pXa6KN7maXT/enUE4vvtWUp1B
HCr9xt13waoa8e6umj/D1qU5mMLUX+JraVkIo6Dyd1g6pVmdrbwzP+Z0tW0x7CvW
n5r9eDYts66vGbQ6xzK40rTi22sEN32AY4mezKj40L8o0NvfZCCwb3dfw2RQzLHK
0KnSQ0PKqU1ZWrDc2YuvRsyh5KGv+t8vvnpMVVUi4TRx3qzoGpHpH3fE3evvMGKY
ya6nmFNFPZ+ZlzsGDx10RqLu58NmjS8LXY6O+yCGy9NPuonKpwHgYD2wxut2NR/W
TTtMhvJWKNIwhXR8ZRDaVBWQJBwoLvpNQT1zOIUuUKf+SZ2DbfgVpte7NZvrgEka
aY4nnZMbI0MvpaAHUtllWbC4xqMQJXY+4wrahKQgKF/l5H/0XQ99fHHz86DS9LCO
y+dfmU98dv/1X8qmxNfsULtJwbxi2Xwzt3MMMZb5v138STyMWeqWOLm+KGzgs1hu
Pc/RLQALdJpQEcg74s5xt2yxSqRuzDig7FtRT1a2SX33vi9YohQEgXCDe+IOJC5l
sm1Ppi3oO/yUcocUDFTBz/g6zD4SWywu2gmBcZIh/JVy8Sd053WwlaKs1Nld6ta7
QPx6rga7lgrYW409RS2A
=Jzqj
-----END PGP SIGNATURE-----
Merge tag 'qcom-soc-for-4.7-2' into net-next
This merges the Qualcomm SOC tree with the net-next, solving the
merge conflict in the SMD API between the two.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
- add support for pmic wrapper mt6323
- add support for SoC mt2701
- enable gpt6 arch timer on mt7623
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJXJzFfAAoJELQ5Ylss8dND/vYP/igakCxTIYX0FsqSSgTY0btk
OsFUxnFiAZ8r35P2QTaA8hlhP0Lv2CUA2vNA9DDmZgM6F5tKRhN9MVoQTBrdJs+2
UYY/bIH+aNUBExbURamdSQVJamMioxOrG++FyNed5gMZ9miIgACOyWJOFw7cEm52
w48qUeNdmxkPdh/mTXW1MB+JbyLBxO3vg8RJThx/a3q09DzBtHRgqKVFnpLDcILB
XzUIH+Uj6pdHmft5ySF4Ke0oQWmW1gP3soej/GDJi5GiVE0eq27/RiO+/6Eyv6Qj
l78LaM3IDvuZhR+zILE/C7gIoexLIB9Keq9QH/4FCN1wOLVKtZwts1WvdauqLpRc
cBCnsCQQCdhJAbBrYsMB6pAc0S981jfcjQh6HnZexcpyN4VageKvndPXrVRXy/HS
Ev6NXrkI19UBfH+LGLSGAkQFbKxCTpwoDMi1yCh/vBnYpp4tc8NcX17LbEsUIpAs
3Z0bDW4iBWIwsCmkb+wb3T/MDZ40YZyfUkRJciFyrOvaiCnC1jpdRCq5e3PHWcqs
kkJnSgitjrtxYb1r18GeLV1BYICqRyy62SM5HWfVFjOw6Ia0vdgmkM3mLFZb4sVw
qVBniwSs4OtkfuLBzqfQtscxFojqhjmh0XLl/IzG7hmG78yTP4pIfuz7yFOpqM2Y
MxhVBXYzX/txt0TP5HLQ
=35R/
-----END PGP SIGNATURE-----
Merge tag 'v4.6-next-soc' of https://github.com/mbgg/linux-mediatek into next/drivers
Merge "ARM: mediatek soc updates for v4.7" from Matthias Brugger:
- re-organize pmic wrapper code for easier and cleaner addiont of new SoCs and pmic wrappers
- add support for pmic wrapper mt6323
- add support for SoC mt2701
- enable gpt6 arch timer on mt7623
* tag 'v4.6-next-soc' of https://github.com/mbgg/linux-mediatek:
ARM: mediatek: enable gpt6 on boot up to make arch timer work on mt7623
soc: mediatek: PMIC wrap: add MT2701/7623 support
soc: mediatek: PMIC wrap: add mt6323 slave support
soc: mediatek: PMIC wrap: add a slave specific struct
soc: mediatek: PMIC wrap: remove pwrap_is_mt8135() and pwrap_is_mt8173()
soc: mediatek: PMIC wrap: move wdt_src into the pmic_wrapper_type struct
soc: mediatek: PMIC wrap: SPI_WRITE needs a different bitmask for MT2701/7623
soc: mediatek: PMIC wrap: WRAP_INT_EN needs a different bitmask for MT2701/7623
soc: mediatek: PMIC wrap: split SoC specific init into callback
soc: mediatek: PMIC wrap: add wrapper callbacks for init_reg_clock
soc: mediatek: PMIC wrap: don't duplicate the wrapper data
Implements generic PM domain support on top of the existing Tegra power-
gate API. Drivers are thus allowed to move away from the Tegra-specific
API and towards using generic power domains directly.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJXI3unAAoJEN0jrNd/PrOhdPIP/jOgS5Qf1u8QelFvPbsXouRf
xpBy9sa43oow8f+0RVjTrsWDikjniCYcGDPZbfgmXEN5sWYK2xBIZeaMysGezPXS
/g9VnxU0HZsQ+5AOWHS/vxYLfB9Q6g3w4P7XDDzKmJ9mFaLeyNR4ulGWwLxpeF/1
au38f/dXgjU9I+NwXJWhTEspQrXAshIwp6lsQkjcpLmAMeFBOjB7c92uTYmVXI9F
XtGcpGmIqDwRaieY1lqE0iGUMgox2XG2bKgNuwZ+Eng+ICz2ACuGfyH7hwCeWJpK
HByxL83aA9a+G8KIsPZgJYTCuQA7UVYjWp5A5UqpuhsP7Da4EagX3Bdvcwqy/sgk
rcLNSTuksbJyHT/yQO5cj9lPrdFckSglChZlSRX1J5FhQN2xHw/1CmfDgPmZ1Htt
D+66iLm3lJ+SZlwaZToofU89GYRc+GoZVPQrMBMCwTIBcYf6ACtG7hYIB6JrxHJg
xyiSbDKRYyHBWHoL534G2S8xtnTjMHG1RLD2SoI49Qsa9OTmJz50NainElPi2DX5
266zz87Fa+5WePEp0NjBIJ0Hgq4uoMJFpvkG2pzODb2fwHxzW7E/KB6pAV9/+1EZ
F+sPDHUnzTSLx76h7vs1v4ye9TXrcuKXXnhU7YBm6eWCgeM3GOf6V8u7z6BQDxxT
rAYhbGOeeAiORGdMUo4h
=oeBF
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.7-genpd' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Merge "soc/tegra: Add generic PM domain support" from Thierry Reding:
Implements generic PM domain support on top of the existing Tegra power-
gate API. Drivers are thus allowed to move away from the Tegra-specific
API and towards using generic power domains directly.
* tag 'tegra-for-4.7-genpd' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Add generic PM domain support
dt-bindings: Add power domain info for NVIDIA PMC
settings that get lost and reset on power-domain power cycles.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJXIom/AAoJEPOmecmc0R2BB7cH/RYBFTgvgI5PKJ+JuRyJrDh6
KDVTznZ5g+F99v+0PKtkA9qpToct+4Fo08CeLZPrtLR5vp2icQtbnNgHfV6K+JZu
T1NcNHPhI7yufHIBdlvLQlH/o4uLvSYeYuoJA3LwrkI1OYrxElD46PNZEwbGkLiE
oggmef8WtsUnZIeDIM4YVzmJabw8EbSTX+L1TUxMwlOJpR/tcct0RwFDdrBf5uKn
ionob7GblnJaKg045KhjP9bSpoZrltxwjcPqAZSOF9f2waPBqBPZCiFCNUfMLru6
RzzkCm799/6eFFB7wS87S1/6vnal54BnvfZYXIgnq5yStSHYY2VZX0FDkJhEKro=
=hluQ
-----END PGP SIGNATURE-----
Merge tag 'v4.7-rockchip-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers
Merge "Rockchip driver updates for v4.7 - part2" from Heiko Stübner:
Ability to save and restore the power-domain quality of service
settings that get lost and reset on power-domain power cycles.
* tag 'v4.7-rockchip-drivers-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
soc: rockchip: power-domain: support qos save and restore
dt-bindings: modify document of Rockchip power domains
Adds generic PM domain support to the PMC driver where the PM domains
are populated from device-tree and the PM domain consumer devices are
bound to their relevant PM domains via device-tree as well.
Update the tegra_powergate_sequence_power_up() API so that internally
it calls the same tegra_powergate_xxx functions that are used by the
Tegra generic PM domain code for consistency.
To ensure that the Tegra power domains (a.k.a. powergates) cannot be
controlled via both the legacy tegra_powergate_xxx functions as well
as the generic PM domain framework, add a bit map for available
powergates that can be controlled via the legacy powergate functions.
Move the majority of the tegra_powergate_remove_clamping() function
to a sub-function, so that this can be used by both the legacy and
generic power domain code.
This is based upon work by Thierry Reding <treding@nvidia.com>
and Vince Hsu <vinceh@nvidia.com>.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Introduce a DT-based driver for the R-Car System Controller, as found on
Renesas R-Car H1, R-Car Gen2, and R-Car Gen3 SoCs.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXHryuAAoJENfPZGlqN0++Zq4QAJkrqIK774IUSa58+U4bMG2h
ceRhG+uqr5AGoQJ/pEpFZjgaLe7hmrgKQmF2Uh1uWns633o2t6N2rR6gM36/BTqh
HyyCMKT4vUoU6lyZ7qnB8LOxRj4oRa5J2C82rROWRx9m7TNmyHpA05KZUW2sUMmi
6/g+YF0wT8XbwSjUskxFSwO8TeKNcOSpFi0wWVR1WUh2RhVNbGXhyUSxxGTD3Ojt
X6f1YmrfJmwzI0cY8AZScOr7WCU0HFk8IZRkEbg8t39TVOrEL5o97Ki9QK6WaGf8
uKA7gA1eDhO8DSXX1ycawx8uh4AxRGgYSZFc0Lq7E08k+VTn7D7qDsk4DDz+JnpH
aLy95N4lDuQf9iiKFWEECc2OK3hxAnJb8c4yU2pS7tg1K4JNMT0iUkp2Ha+/RLrd
+FcWYcerXLziBItseM0caDPyv7PXpNLpLnqfgYPAOcP4h5+tT8burH9Ic5zHdFgZ
JAD30KBYH8xB7wRisf4S/MP6sHFD8XQl6WdQK1Vwl1oPitRRdgDIxaFhyDszli3O
/mX5+iMavM/s36MZwAgck2nTNTal1CHqupzkvWzttee3sZXzmK8QuiYLqI8iqz2i
HPxXM90IjzfQNtBZH6ZVdL3xCh8HKkzQdD6wb7I2nP7clMHJlNmQwanXcSw6vcvB
/Jx3o0v31gXfdUx3lgCy
=Lg0X
-----END PGP SIGNATURE-----
Merge tag 'renesas-rcar-sysc2-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
Merge "Second Round of Renesas ARM Based SoC R-Car SYSC Updates for v4.7" from Simon Horman:
Introduce a DT-based driver for the R-Car System Controller, as found on
Renesas R-Car H1, R-Car Gen2, and R-Car Gen3 SoCs.
* tag 'renesas-rcar-sysc2-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (30 commits)
soc: renesas: rcar-sysc: Add support for R-Car H3 power areas
soc: renesas: rcar-sysc: Add support for R-Car E2 power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-N power areas
soc: renesas: rcar-sysc: Add support for R-Car M2-W power areas
soc: renesas: rcar-sysc: Add support for R-Car H2 power areas
soc: renesas: rcar-sysc: Add support for R-Car H1 power areas
soc: renesas: rcar-sysc: Enable Clock Domain for I/O devices
soc: renesas: rcar-sysc: Make rcar_sysc_power_is_off() static
soc: renesas: rcar-sysc: Add DT support for SYSC PM domains
soc: renesas: rcar-sysc: Improve rcar_sysc_power() debug info
soc: renesas: Move pm-rcar to drivers/soc/renesas/rcar-sysc
clk: renesas: cpg-mssr: Export cpg_mssr_{at,de}tach_dev()
clk: renesas: mstp: Provide dummy attach/detach_dev callbacks
clk: renesas: Provide Kconfig symbols for CPG/MSSR and CPG/MSTP support
soc: renesas: Add r8a7795 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7794 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7793 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7791 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7790 SYSC PM Domain Binding Definitions
soc: renesas: Add r8a7779 SYSC PM Domain Binding Definitions
...
R-Car M2-N is identical to R-Car M2-W w.r.t. power domains, so reuse the
definitions from the latter.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
On R-Car H3, some power areas (e.g. A3VP) contain I/O devices, which are
also part of the CPG/MSSR Clock Domain.
On all R-Car SoCs, devices in the "always-on" PM Domain are part of the
Clock Domain served by the CPG/MSSR or CPG/MSTP driver.
Hook up the CPG/MSTP or CPG/MSSR Clock Domain attach/detach callbacks to
enable power management using module clocks. Which callback to hook up
depends on the presence of device nodes compatible with
"renesas,cpg-mstp-clocks". This clears the path for a future migration
from the CPG/MSTP to the CPG/MSSR driver on R-Car H1 and
Gen2.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Do not leak a ioremap()'d cookie around, unmaping it in case of errors
Fixes: cef4bafcea ("soc: brcmstb: add SoC driver to brcmstb")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The newly added code for the SoC bus fails to link if the
bus is not built:
drivers/soc/built-in.o: In function `brcmstb_soc_device_init':
:(.init.text+0x110): undefined reference to `soc_device_register'
This adds a 'select' statement to avoid the error.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: cef4bafcea ("soc: brcmstb: add SoC driver to brcmstb")
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
* Change SMD callback parameters
* Use writecombine mapping for SMEM
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXFvdZAAoJEFKiBbHx2RXVxPQQAJnEp1+5CDN7ziQ/zJ3juSxb
b7rOr5Z0qMDhh0H9BFdmhGzFctbY0AOqerfh138pXa6KN7maXT/enUE4vvtWUp1B
HCr9xt13waoa8e6umj/D1qU5mMLUX+JraVkIo6Dyd1g6pVmdrbwzP+Z0tW0x7CvW
n5r9eDYts66vGbQ6xzK40rTi22sEN32AY4mezKj40L8o0NvfZCCwb3dfw2RQzLHK
0KnSQ0PKqU1ZWrDc2YuvRsyh5KGv+t8vvnpMVVUi4TRx3qzoGpHpH3fE3evvMGKY
ya6nmFNFPZ+ZlzsGDx10RqLu58NmjS8LXY6O+yCGy9NPuonKpwHgYD2wxut2NR/W
TTtMhvJWKNIwhXR8ZRDaVBWQJBwoLvpNQT1zOIUuUKf+SZ2DbfgVpte7NZvrgEka
aY4nnZMbI0MvpaAHUtllWbC4xqMQJXY+4wrahKQgKF/l5H/0XQ99fHHz86DS9LCO
y+dfmU98dv/1X8qmxNfsULtJwbxi2Xwzt3MMMZb5v138STyMWeqWOLm+KGzgs1hu
Pc/RLQALdJpQEcg74s5xt2yxSqRuzDig7FtRT1a2SX33vi9YohQEgXCDe+IOJC5l
sm1Ppi3oO/yUcocUDFTBz/g6zD4SWywu2gmBcZIh/JVy8Sd053WwlaKs1Nld6ta7
QPx6rga7lgrYW409RS2A
=Jzqj
-----END PGP SIGNATURE-----
Merge tag 'qcom-soc-for-4.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers
Merge "Qualcomm ARM Based SoC Updates for v4.7 part 2" from Andy Gross:
* Change SMD callback parameters
* Use writecombine mapping for SMEM
* tag 'qcom-soc-for-4.7-2' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
soc: qcom: smd: Make callback pass channel reference
soc: qcom: smem: Use write-combine remap for SMEM
- Justin adds a soc_dev driver to properly report to user-space the Broadcom
STB SoC family, product and revision
- Florian reworks how the brcmstb_gisb driver dependency is done to enable it
on Broadcom STB MIPS-based SoCs and remove a select in
arch/arm/mach-bcm/Kconfig
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJXG8wwAAoJEIfQlpxEBwcEO3IP/1kmk92qtFzqQJu2IgZcBReD
tTLcjDigvJWA6fa4fsJ8kmtl3rT+cjSEblWSh9oELjbdzEhfk+n2j9ZkMKXRSQIw
R57Db/RwIwuzSzUb9NMG3UWoeZ6ebKE+MIKS0pQlpD/uUDRHGYHrgNVFlAJZ7KTF
v3Kqb3lUncxeYmCfRenqIPkLARyh6e2GnTk5j8D4fm7Rfrfbu7rVdCmxvJqMpDbg
q6f3cWNUYQzbniieOkbw4xKab5PlAq69JXMVc3gNACRuTn8zzRBtBfe96Vf0KFZF
+pboW3jzUf0/tr+pPwAkj5ccIVVqx/+5SUha75YShiVTmfSrn57AoZp4vtkxDg5s
yEN/rb+fnyc0B5akCH8ukpABIzk60WOmmp4GY6hkR6Ibknxan5PNNaE2DE6fQa60
xSx4duYdNLlUmsfsEFMugbWVY1F8wlxtzHRs9ReZR+44/tH+zOUJWyGXb/GJEkhP
4L6KtGFVpWlTb77gWj42ZdAzMYTz1M8HtuqDmPXpf5ucVz6zPrzO5PmcAwarktLR
fxtqztdjva2BphaboGLyZD+Xr8qeSISBncyogZQI9rI2C13v2Y8W5thw+IFR0VAk
uoADTLthFEogidrLpqO8rdSyrPIl3wVdCvFb1XoUGdYa6c1ElWHEhlkhcdUDq6Vd
zNuh2l+0UqWmp3jeE4cR
=OJuu
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.7/drivers' of http://github.com/Broadcom/stblinux into next/drivers
Merge "Broadcom ARM-based SoCs drivers changes" from Florian Fainelli:
- Justin adds a soc_dev driver to properly report to user-space the Broadcom
STB SoC family, product and revision
- Florian reworks how the brcmstb_gisb driver dependency is done to enable it
on Broadcom STB MIPS-based SoCs and remove a select in
arch/arm/mach-bcm/Kconfig
* tag 'arm-soc/for-4.7/drivers' of http://github.com/Broadcom/stblinux:
bus: brcmstb_gisb: Rework dependencies
soc: brcmstb: add SoC driver to brcmstb
This contains a bunch of preparatory patches to the PMC driver which are
a prerequisite to moving the driver to generic power domains.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJXEPuLAAoJEN0jrNd/PrOh44YP/1wUmB6H52eE3U5BIPNaMLZv
XNzp/chmkT59lXgksHOsMK7o40z/nq5+Fc32DW95w9nQmBHcNtRSUXQJzWjfIgdv
m5Kl8A11OBaocO5JMaTIGyDUwOXMTYNdD48dEasS+8LdmB2FwiUyY1BgiKxg7LLO
JX/YZPo3hwVdmDVUutYNutvOhTJmHXt7HVqO5roSZnU2ydTy72BEZU69hWIFStT1
I7YY8w/Xf5IEGBDYM4EjLWeGUKvsSfKMy1MP+YVxeoGsFON3Xnh2BZtxpquV0uov
8cyiYgmr6BBlh7wlgId/mCUDArTXoOkRqr3E6V/G0UIoqYFIdpAyQ49xdNe5yplk
WyXUl7Ui6tkf2V9xUiDJkjXR3jgK53adovNWpMAAjVowO1HQ8rh151H6fqpGu22R
MWBXocMrCp2I1/XJ28X/dVpO8fMehMUTOzaXYtB+Q5F6Gh49NcBcEeNGH6wdb02A
lCHzU00rq5RnUPvcp/irvv88aiV2rjcePJ8RYnAfkDpH7ugMSdiGb9aMUaMwRW1C
p+z2GSswzfsT4Iog6Jtu6yQhkWTthexLW8F17foT5uGx3mNZQ6cyNzxRsRjr59ot
Rc9aahzlbkeMUzHDevihHiNuqIXAgM4Cy0JQFgm8lqxdYenKcxkzBHawdpgP60yf
IQcsQ+Wq0WERU3e5aw7w
=EmlG
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Merge "soc/tegra: Changes for v4.7-rc1" from Thierry Reding:
This contains a bunch of preparatory patches to the PMC driver which are
a prerequisite to moving the driver to generic power domains.
* tag 'tegra-for-4.7-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
dt-bindings: Update NVIDIA PMC for Tegra
soc/tegra: pmc: Wait for powergate state to change
soc/tegra: pmc: Ensure GPU partition can be toggled on/off by PMC
soc/tegra: pmc: Remove additional check for a valid partition
soc/tegra: pmc: Fix verification of valid partitions
soc/tegra: pmc: Fix testing of powergate state
soc/tegra: pmc: Change powergate and rail IDs to be an unsigned type
soc/tegra: pmc: Protect public functions from potential race conditions
soc/tegra: pmc: Restore base address on probe failure
soc/tegra: pmc: Remove non-existing L2 partition for Tegra124
soc/tegra: pmc: Remove non-existing power partitions for Tegra210
soc/tegra: pmc: Remove debugfs entry on probe failure
soc/tegra: pmc: Fix sparse warning for tegra_pmc_init_tsense_reset()
soc/tegra: pmc: Add missing structure members to kernel-doc
As of commit b12ff41658 ("ARM: shmobile: r8a7779: Remove legacy PM
Domain remainings"), rcar_sysc_power_is_off() is no longer used from
SoC-specific code.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Populate the SYSC PM domains from DT, based on the presence of a device
node for the System Controller. The actual power area hiearchy, and
features of specific areas are obtained from tables in the C code.
The SYSCIER and SYSCIMR register values are derived from the power areas
present, which will help to get rid of the hardcoded values in R-Car H1
and R-Car Gen2 platform code later.
Initialization is done from an early_initcall(), to make sure the PM
Domains are initialized before secondary CPU bringup.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Move the pm-rcar driver from arch/arm/mach-shmobile/ to
drivers/soc/renesas/, and its header file to include/linux/soc/renesas/,
so it can be shared between arm32 (R-Car H1 and Gen2) and arm64 (R-Car
Gen3). Rename it to rcar-sysc as it's really a driver for the R-Car
System Controller (SYSC).
Kill the intermediate PM_RCAR config symbol, as it's not user
configurable anymore, and to prepare for SoC-specific make rules.
Add the missing #include <linux/types.h> to rcar-sysc.h, which was
exposed by different include order.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
support qos save and restore when power domain on/off.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add the registers, callbacks and data structures required to make the
wrapper work on MT2701 and MT7623.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Add support for MT6323 slaves. This PMIC can be found on MT2701 and MT7623
EVB. The only function that we need to touch is pwrap_init_cipher().
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This patch adds a new struct pwrap_slv_type that we use to store the slave
specific data. The patch adds 2 new helper functions to access the dew
registers. The slave type is looked up via the wrappers child node.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
With more SoCs being added the list of helper functions like these would
grow. To mitigate this problem we remove the existing helpers and change
the code to test against the pmic type stored inside the pmic specific
datastructure that our context structure points at. There is one usage of
pwrap_is_mt8135() that is ambiguous as the test should not be dependent on
mt8135, but rather on the existence of a bridge. Add a new element to
pmic_wrapper_type to indicate if a bridge is present and use this where
appropriate.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Different SoCs will use different bitmask for the wdt_src. This patch
defines the bitmask in the pmic_wrapper_type struct. This allows us to
support new SoCs with a different bitmask to the one currently used.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Different SoCs will use different bitmask for the SPI_WRITE command. This
patch defines the bitmask in the pmic_wrapper_type struct. This allows us
to support new SoCs with a different bitmask to the one currently used.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
MT2701 and MT7623 use a different bitmask for PWRAP_INT_EN.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This patch moves the SoC specific wrapper init code into separate callback
to avoid pwrap_init() getting too large. This is done by adding a new
element called init_special to pmic_wrapper_type. Each currently supported
SoC gets its own version of the callback and we copy the code that was
previously inside pwrap_init() to these new callbacks. Finally we point the
2 instances of pmic_wrapper_type at the 2 new functions.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Split init_reg_clock up into SoC specific callbacks. The patch also
reorders the code to avoid the need for callback function prototypes.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
As we add support for more devices struct pmic_wrapper_type will grow and
we do not really want to start duplicating all the elements in
struct pmic_wrapper.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The qcom_cpuidle_ops structures is not over-written, so add "const"
qualifier and replace __initdata with __initconst.
Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Andy Gross <andy.gross@linaro.org>
By passing the smd channel reference to the callback, rather than the
smd device, we can open additional smd channels from sub-devices of smd
devices.
Also updates the two smd clients today found in mainline.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Mapping the SMEM region as write combine makes the contiguous writes
in SMD perform better and also allows us to do unaligned read and writes
on ARM64.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Value of soc_dev_attributes:
* family = chip family id
* soc_id = product id
* revision = product revision
Signed-off-by: Justin Chen <justin.chen@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
rk3399 powerdomains and necessary infrastructure changes to
accomodate them - like supporting nested powerdomains here.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJXDJOJAAoJEPOmecmc0R2BUzYH/A8lSeOeH61VnPNuGG+s8KvF
yPL7Plz/rVDj5mz+CQPmqdajxS8qDIBqiXKjno/BpOIdQ+5MRJW47wjWlvhFV3rl
tde+rnfR7doh2cjDU2W7FVtWEz/vPGzboffgCtXGpm6qs2f6Uj+PK/NWfKjTsbog
1VBk117DbGYVdfamfASTykwV9SZjPgjYBEyppWAPAU9d6Jb73aRbdQfkiCQCvrJg
7JGg5hWwbd9TDVrUs3RZ8+PNMZnVEA3vcxNrvvhtivrAA1mSCl+1H1bTFcKEo+1C
7PmEEBZh6jLEQ+5N2Yftsf8FF9hiB7JwSw/jLPBIM9Isv5MOF5BvZoDlDuo8/5A=
=aaLP
-----END PGP SIGNATURE-----
Merge tag 'v4.7-rockchip-drivers-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers
Rockchip soc-specific driver changes containing support for the
rk3399 powerdomains and necessary infrastructure changes to
accomodate them - like supporting nested powerdomains here.
* tag 'v4.7-rockchip-drivers-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
soc: rockchip: power-domain: check the existing of regmap
soc: rockchip: power-domain: Modify power domain driver for rk3399
dt-bindings: add binding for rk3399 power domains
dt-bindings: add power-domain header for RK3399 SoCs
soc: rockchip: power-domain: add support for sub-power domains
soc: rockchip: power-domain: allow domains only handling idle requests
soc: rockchip: power-domain: make idle handling optional
Signed-off-by: Olof Johansson <olof@lixom.net>
This reverts commit cc8ed76938
("soc: mediatek: SCPSYS: Fix double enabling of regulators") [1].
This patch fixes mt8173-evb failing boot issue. With commit [1],
genpd state will not sync to real power domain state. So some
resources such as clocks and regulators may stay in a wrong state.
There is no regulator double enabling issue on mainline kernel, so
we can refert commit [1] safely.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
These two are both ARMv7 SoCs. They need not explicitly select
ARM_L1_CACHE_SHIFT_6 because it is enabled along with CPU_V7.
Refer to commit a092f2b153 ("ARM: 7291/1: cache: assume 64-byte L1
cachelines for ARMv7 CPUs").
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Check return value of syscon_node_to_regmap for
rockchip_pm_domain_probe. If err value is returned, probe
procedure should abort.
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Currently, the function tegra_powergate_set() simply sets the desired
powergate state but does not wait for the state to change. In most cases
we should wait for the state to change before proceeding. Currently,
there is a case for Tegra114 and Tegra124 devices where we do not wait
when starting the secondary CPU as this is not necessary. However, this
is only done at boot time and so waiting here will only have a small
impact on boot time. Therefore, update tegra_powergate_set() to wait
when setting the powergate.
By adding this feature, we can also eliminate the polling loop from
tegra30_boot_secondary().
A function has been added for checking the status of the powergate and
so update the tegra_powergate_is_powered() to use this macro as well.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
For Tegra124 and Tegra210, the GPU partition cannot be toggled on and
off via the APBDEV_PMC_PWRGATE_TOGGLE_0 register. For these devices, the
partition is simply powered up and down via an external regulator.
For these devices, there is a separate register for controlling the
signal clamping of the partition and this is described in the PMC SoC
data by the "has_gpu_clamp" variable. Use this variable to determine if
the GPU partition can be controlled via the APBDEV_PMC_PWRGATE_TOGGLE_0
register and ensure that no one can incorrectly try to toggle the GPU
partition via the APBDEV_PMC_PWRGATE_TOGGLE_0 register.
Furthermore, we cannot use the APBDEV_PMC_PWRGATE_STATUS_0 register to
determine if the GPU partition is powered for Tegra124 and Tegra210.
However, if the GPU partition is powered, then the signal clamp for the
GPU partition should be removed and so use bit 0 of the
APBDEV_PMC_GPU_RG_CNTRL_0 register to determine if the clamp has been
removed (bit[0] = 0) and the GPU partition is powered.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The function tegra_powergate_is_powered() verifies that the partition
being queried is valid and so there is no need to check this before
calling tegra_powergate_is_powered() in powergate_show(). So remove this
extra check.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Tegra power partitions are referenced by numerical IDs which are the
same values programmed into the PMC registers for controlling the
partition. For a given device, the valid partition IDs may not be
contiguous and so simply checking that an ID is not greater than the
maximum ID supported may not mean it is valid. Fix this by checking if
the powergate is defined in the list of powergates for the Tegra SoC.
Add a helper function for checking valid powergates and use where we
need to verify if the powergate ID is valid or not.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
In tegra_powergate_set() the state of the powergates is read and OR'ed
with the bit for the powergate of interest. This unsigned 32-bit value
is then compared with a boolean value to test if the powergate is
already in the desired state. When turning on a powergate, apart from
the powergate that is represented by bit 0, this test will always
return false and so we may attempt to turn on the powergate when it is
already on.
After OR'ing the bit for the powergate, check if the result is not equal
to zero before comparing with the boolean value. Add a helper function
to return the current state of a powergate and use this in both
tegra_powergate_set() and tegra_powergate_is_powered() where we check
the powergate status.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Tegra powergate and rail IDs are always positive values and so change
the type to be unsigned and remove the tests to see if the ID is less
than zero. Update the Tegra DC powergate type to be an unsigned as well.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The PMC base address pointer is initialised during early boot so that
early platform code may used the PMC public functions. During the probe
of the PMC driver the base address pointer is mapped again and the initial
mapping is freed. This exposes a window where a device accessing the PMC
registers via one of the public functions, could race with the updating
of the pointer and lead to a invalid access. Furthermore, the only
protection between multiple devices attempting to access the PMC registers
is when setting the powergate state to on or off. None of the other public
functions that access the PMC registers are protected.
Use the existing mutex to protect paths that may race with regard to
accessing the PMC registers.
Note that functions tegra_io_rail_prepare()/poll() either return a
negative value on failure or zero on success. Therefore, it is not
necessary to check if the return value is less than zero and so only
test that the return value is not zero to test for failure. This
simplifies the error handling with the mutex locking in place.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
During early initialisation, the PMC registers are mapped and the PMC SoC
data is populated in the PMC data structure. This allows other drivers
access the PMC register space, via the public Tegra PMC APIs, prior to
probing the PMC device.
When the PMC device is probed, the PMC registers are mapped again and if
successful the initial mapping is freed. If the probing of the PMC device
fails after the registers are remapped, then the registers will be
unmapped and hence the pointer to the PMC registers will be invalid. This
could lead to a potential crash, because once the PMC SoC data pointer is
populated, the driver assumes that the PMC register mapping is also valid
and a user calling any of the public Tegra PMC APIs could trigger an
exception because these APIs don't check that the mapping is still valid.
Fix this by updating the mapping and freeing the original mapping only if
probing the PMC device is successful.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra124 does not have an L2 power partition and the L2 cache is part of
the cluster 0 non-CPU (CONC) partition. Remove the L2 as a valid
partition for Tegra124. The TRM also shows that there is no L2 partition
for Tegra124.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The power partitions L2, HEG, CELP and C1NC do not exist on Tegra210 but
were incorrectly documented in the TRM. These will be removed from the
TRM and so also remove their definitions.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The debugfs entry for the PMC device will not be removed if the probe of
the device fails to register the restart handler. This leaves behind the
dangling debugfs entry with no driver backing it. Remove the entry to
avoid this.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Sparse reports the following warning for tegra_pmc_init_tsense_reset():
drivers/soc/tegra/pmc.c:741:6: warning: symbol 'tegra_pmc_init_tsense_reset' was not declared. Should it be static?
This function is only used internally by the PMC driver and so fix this
by making it static.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Some members of the tegra_pmc structure are missing from the kernel-doc
comment for this structure. Add the missing members.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
We cannot pile all numbers on this list, just print the three hex
digits representing the board ID so we can handle all the new
RealView boards.
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
With the qcom_smd_open_channel() API we allow SMD devices to open
additional SMD channels, to allow implementation of multi-channel SMD
devices - like Bluetooth.
Channels are opened from the same edge as the calling SMD device is tied
to.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Refactor opening and closing of channels into two separate functions
instead of open coding this in the various places.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Split the two steps of channel discovery and state change handling into
two different workers. This allows for new channels to be found while
we're are probing, which is required as we introduce multi-channel
support.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Introduce a setter for the callback function pointer to clarify the
locking around the operation and to reduce some duplication.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
SPM driver provides cpuidle support on some QC SoC's. The functionality
is non-modular and there is no need for module support. Convert module
platform init to builtin platform driver init. The driver functionality
is not affected by this change.
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This makes the driver use the data pointer added to the gpio_chip
to store a pointer to the state container instead of relying on
container_of().
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This driver is modified to support RK3399 SoC.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
[small indentation fixups]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This patch adds support for making one power domain a sub-domain of
other domain. This is useful for modeling power dependences,
which needs to have more than one power domain enabled to be operational.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
[restructured error handling in subdomain-addition]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
On some Rockchip SoC there exist child-domains only handling their
idle state with the actual power-state handled by a (shared) parent-
domain.
So allow such types of domains. For them, we can determine their
state (on/off) by checking the inverse idle-state instead.
There exist one special case if both idle as well power handling
were set as not present, but as the domain-data is defined in the
code itself, we can expect the reasonable developer to define them
in a correct way, without adding more checks.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Not all new socs need to handle idle states on domain state changes,
so add the possibility to make them optional.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Driver updates for ARM SoCs, these contain various things that touch
the drivers/ directory but got merged through arm-soc for practical
reasons:
- Rockchip rk3368 gains power domain support
- Small updates for the ARM spmi driver
- The Atmel PMC driver saw a larger rework, touching both
arch/arm/mach-at91 and drivers/clk/at91
- All reset controller driver changes alway get merged through
arm-soc, though this time the largest change is the addition
of a MIPS pistachio reset driver
- One bugfix for the NXP (formerly Freescale) i.MX weim bus driver
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVu67OmCrR//JCVInAQJ64hAAqNemdAMloJhh8mk4O74egd/XNE8GLK3v
gGefpZNi0TC8u/GWMhU1aFCElaCmbNlL0IlqaRrU/vydOmQcZYht7Fg3bAm4r3ck
TlKijGTJap4sdHhxSeui+7bhaBToxcklQTdcrKFgOwsype7CAWJCl5otIC/GHO5L
fn4QSjQbqr5kqH1XfuVIphj/fJjDKRRze5D7zn0nExq46OyoYyjc2lm/QkLgeeS2
vDpzOULYXcjf5GfsPknCJGGjenISD7cIAwZukGvJXFh8WrXkEPZZ7B7bBI/8ZeBU
MkdWvOm9fHEWpIPnuTcLeQNlfdzQ0Z0zijgJqnXjwSYXK2Es1UKEoIFvZUyGA9zG
uyLtddFcKbP4QBDUKVMbyYM6x4Cj7LO96dB2pe8iH5rvnoLS32EjJ/4glnbPQFB7
75JKb7eU1pijoy9c3x/G10vINHzbPjyUN3sYTFKMomPFzEF4OVQ3GDclSuD7jjDr
GnqmAqlj29+qGU6iQBBHp9TfLTxwrs/4MKPEZ+tTGvtINnzOpLGA3TUnji7nVFQc
BYy3qaEvg9MfHI3uXhAl2L4CGCVvHfqFs5B7giZfAkbbcTNAHs9PkZ6gMYH+GG3p
tEbTf/dMHmkkqttSz4f7LZS7D56cSfm3cD8kFCRJPLKifmGAk3w1HZ7JoCXdjr1K
22HSKRMxlhU=
=HS4G
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"Driver updates for ARM SoCs, these contain various things that touch
the drivers/ directory but got merged through arm-soc for practical
reasons:
- Rockchip rk3368 gains power domain support
- Small updates for the ARM spmi driver
- The Atmel PMC driver saw a larger rework, touching both
arch/arm/mach-at91 and drivers/clk/at91
- All reset controller driver changes alway get merged through
arm-soc, though this time the largest change is the addition of a
MIPS pistachio reset driver
- One bugfix for the NXP (formerly Freescale) i.MX weim bus driver"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (43 commits)
bus: imx-weim: Take the 'status' property value into account
clk: at91: remove useless includes
clk: at91: pmc: remove useless capacities handling
clk: at91: pmc: drop at91_pmc_base
usb: gadget: atmel: access the PMC using regmap
ARM: at91: remove useless includes and function prototypes
ARM: at91: pm: move idle functions to pm.c
ARM: at91: pm: find and remap the pmc
ARM: at91: pm: simply call at91_pm_init
clk: at91: pmc: move pmc structures to C file
clk: at91: pmc: merge at91_pmc_init in atmel_pmc_probe
clk: at91: remove IRQ handling and use polling
clk: at91: make use of syscon/regmap internally
clk: at91: make use of syscon to share PMC registers in several drivers
hwmon: (scpi) add energy meter support
firmware: arm_scpi: add support for 64-bit sensor values
firmware: arm_scpi: decrease Tx timeout to 20ms
firmware: arm_scpi: fix send_message and sensor_get_value for big-endian
reset: sti: Make reset_control_ops const
reset: zynq: Make reset_control_ops const
...
Newly added support for additional SoCs:
- Axis Artpec-6 SoC family
- Allwinner A83T SoC
- Mediatek MT7623
- NXP i.MX6QP SoC
- ST Microelectronics stm32f469 microcontroller
New features:
- SMP support for Mediatek mt2701
- Big-endian support for NXP i.MX
- DaVinci now uses the new DMA engine dma_slave_map
- OMAP now uses the new DMA engine dma_slave_map
- earlyprintk support for palmchip uart on mach-tango
- delay timer support for orion
Other:
- Exynos PMU driver moved out to drivers/soc/
- Various smaller updates for Renesas, Xilinx, PXA, AT91, OMAP, uniphier
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVu68DGCrR//JCVInAQIHVQ//Wblms+NKj3aKh6m2Sscs/YkSbFaQ4sY2
rNyfxLIYsLXkth1kbdHRFSMyL68Ym+xutErgw/3HQPB2D1YtYJE3VJ/y8AU92SU3
oHyQIty+atB8d8zBbtlkWmat94NIfYf0I8PQETreGb1LMaJqAf0mDEDAyorTLZcZ
UtQ817Ihn7urqwdTJpTO58V41RmY/vflbHI5T6bIjUJn6fF1e/7+VqtMIfq5sjJ6
0EPEQdu8s5AJ7gcGlGi9I5gAtSnWSA/9phAxul9P8/HrMpUWIxreSEAy8FY7W14F
4TON3sQrnw7nyA72U80KGIXhgLy7SbEmHcSqyy4YJK3ycdk6VYk0CBO7nWVYAiD1
knLisOH6jwe0LIj9WXiRR+Y2Q53pXN8SF77pLDahSnvuShnYEjEH5uELHtxe7Vxh
gn+NH1rDkRTgdYgt4RWlVyUoLkddQWzLb1m4QyQlvxtTR25cJJayXdVX2MRrNPF5
c1zRa9HH+b8LJQIMdWfo/NoHhHtftkkGGsqHAAaypZqdpyk0j2HpJYk5ecPR4f5C
/8o/h/5xOI9gEzp/DVYSZ1VAvRqBQGIDfKBXWq6GuoZaF0aN8ISe5IxFn5Yx2F46
fNaxqiNpWmyywl8D+tSWPFK6aE21AXKGi5zIzexZZqy283aDjlUPI+tgF2GKIuKP
3ayYTDeBpLI=
=ynNj
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Arnd Bergmann:
"Newly added support for additional SoCs:
- Axis Artpec-6 SoC family
- Allwinner A83T SoC
- Mediatek MT7623
- NXP i.MX6QP SoC
- ST Microelectronics stm32f469 microcontroller
New features:
- SMP support for Mediatek mt2701
- Big-endian support for NXP i.MX
- DaVinci now uses the new DMA engine dma_slave_map
- OMAP now uses the new DMA engine dma_slave_map
- earlyprintk support for palmchip uart on mach-tango
- delay timer support for orion
Other:
- Exynos PMU driver moved out to drivers/soc/
- Various smaller updates for Renesas, Xilinx, PXA, AT91, OMAP,
uniphier"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (83 commits)
ARM: uniphier: rework SMP code to support new System Bus binding
ARM: uniphier: add missing of_node_put()
ARM: at91: avoid defining CONFIG_* symbols in source code
ARM: DRA7: hwmod: Add data for eDMA tpcc, tptc0, tptc1
ARM: imx: Make reset_control_ops const
ARM: imx: Do L2 errata only if the L2 cache isn't enabled
ARM: imx: select ARM_CPU_SUSPEND only for imx6
dmaengine: pxa_dma: fix the maximum requestor line
ARM: alpine: select the Alpine MSI controller driver
ARM: pxa: add the number of DMA requestor lines
dmaengine: mmp-pdma: add number of requestors
dma: mmp_pdma: Add the #dma-requests DT property documentation
ARM: OMAP2+: Add rtc hwmod configuration for ti81xx
ARM: s3c24xx: Avoid warning for inb/outb
ARM: zynq: Move early printk virtual address to vmalloc area
ARM: DRA7: hwmod: Add custom reset handler for PCIeSS
ARM: SAMSUNG: Remove unused register offset definition
ARM: EXYNOS: Cleanup header files inclusion
drivers: soc: samsung: Enable COMPILE_TEST
MAINTAINERS: Add maintainers entry for drivers/soc/samsung
...
As usual, we queue up a few fixes that don't seem urgent enough to go in
through -rc.
- a number of randconfig warning fixes from Arnd
- various small fixes for OMAP
- one somewhat larger patch to restore the OMAP3 cpuidle
tuning that was lost in a cleanup
- a small regression fix for cns3xxx PCI
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIVAwUAVu67XGCrR//JCVInAQK8mBAAjW3INXnuQ84Zvb5RLJS+1aiEEgnuOEwM
Yvxr+MzSMsXS5V9FMGaUk/bXxfGMFILAQ5j471ZanGZkDZwAiJ2tdwreKlyYMHU3
9PPWtHKYR6BhIRFYovftVpDkbgw3cwdfyIvves7Aa4XyeGNCQjryNQndZci8IZlN
5I4ff3ea8ZKsDQ1jDXmYw6QENCZl9M4yatLnaOcfdgCRro5VRvdavqIofk+ynv2S
McUm5WGr/BKiT92MThWIhIskuMNZiUmm7L3zgOYE2+zUgw6tFvreQvAY+qtxk6qt
0K4SIV04JGevBHl2CENGF1Kctq5z+n/Jcywd9yJBqYxvWMYgnJokczjkxKTyf9X8
8eU9LEtJsrAzJYw6TXvyjK0EphTJTwg1kO/wk4/HFIM2B+AzGgcbotakIDokrR/i
I2rgnCqExQZqdUzhgFHg28a0Bx9y2Giu6wCCkwRZKpKW74d5E6esAsTbvggmXvbN
35G0MSLTeeZDbvN6xLOMZc7qCfyWlO9huxiHPn0Q9eth8RcqfywB4vbNdEli/P4o
NW+up5wTo6Ifc9Jgf8z7LB9b56i/9LMkSBh/OdCKfHEZlHi5/dZ/TR21CngtpcX1
hi91vJLH0axCylBVE599qxJYoWjoR8nHz7kD6G4vqXtiTfVcxozUM5NKSD8AXn+Q
NhYT2BTUh0o=
=YJmM
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC non-urgent fixes from Arnd Bergmann:
"As usual, we queue up a few fixes that don't seem urgent enough to go
in through -rc.
- a number of randconfig warning fixes from Arnd
- various small fixes for OMAP
- one somewhat larger patch to restore the OMAP3 cpuidle tuning that
was lost in a cleanup
- a small regression fix for cns3xxx PCI"
* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (26 commits)
CNS3xxx: Fix PCI cns3xxx_write_config()
MAINTAINERS: unify email addrs for Kevin Hilman
CNS3xxx: remove unused *_VIRT definitions
ARM: OMAP2+: Fix hwmod clock for l4_ls
soc: TI knav_qmss: fix dma_addr_t printing
ARM: prima2: always enable reset controller
ARM: socfpga: hide unused functions
ARM: ux500: fix ureachable iounmap()
ARM: ks8695: fix __initdata annotation
ARM: mvebu: mark mvebu_hwcc_pci_nb as __maybe_unused
ARM: mv78xx0: avoid unused function warning
ARM: orion: only select I2C_BOARDINFO when using I2C
ARM: OMAP2+: Fix out of range register access with syscon_config.max_register
ARM: OMAP3: Add cpuidle parameters table for omap3430
ARM: davinci: make I2C support optional
ARM: davinci: DA8xx+DMx combined kernels need PATCH_PHYS_VIRT
ARM: davinci: avoid unused mityomapl138_pn_info variable
ARM: davinci: limit DT support to DA850
ARM: DRA7: hwmod: Add reset data for PCIe
ARM: DRA7: hwmod: Fix OCP2SCP sysconfig
...
Highlights:
- Restructure Linux PTE on Book3S/64 to Radix format from Paul Mackerras
- Book3s 64 MMU cleanup in preparation for Radix MMU from Aneesh Kumar K.V
- Add POWER9 cputable entry from Michael Neuling
- FPU/Altivec/VSX save/restore optimisations from Cyril Bur
- Add support for new ftrace ABI on ppc64le from Torsten Duwe
Various cleanups & minor fixes from:
- Adam Buchbinder, Andrew Donnellan, Balbir Singh, Christophe Leroy, Cyril
Bur, Luis Henriques, Madhavan Srinivasan, Pan Xinhui, Russell Currey,
Sukadev Bhattiprolu, Suraj Jitindar Singh.
General:
- atomics: Allow architectures to define their own __atomic_op_* helpers from
Boqun Feng
- Implement atomic{, 64}_*_return_* variants and acquire/release/relaxed
variants for (cmp)xchg from Boqun Feng
- Add powernv_defconfig from Jeremy Kerr
- Fix BUG_ON() reporting in real mode from Balbir Singh
- Add xmon command to dump OPAL msglog from Andrew Donnellan
- Add xmon command to dump process/task similar to ps(1) from Douglas Miller
- Clean up memory hotplug failure paths from David Gibson
pci/eeh:
- Redesign SR-IOV on PowerNV to give absolute isolation between VFs from Wei
Yang.
- EEH Support for SRIOV VFs from Wei Yang and Gavin Shan.
- PCI/IOV: Rename and export virtfn_{add, remove} from Wei Yang
- PCI: Add pcibios_bus_add_device() weak function from Wei Yang
- MAINTAINERS: Update EEH details and maintainership from Russell Currey
cxl:
- Support added to the CXL driver for running on both bare-metal and
hypervisor systems, from Christophe Lombard and Frederic Barrat.
- Ignore probes for virtual afu pci devices from Vaibhav Jain
perf:
- Export Power8 generic and cache events to sysfs from Sukadev Bhattiprolu
- hv-24x7: Fix usage with chip events, display change in counter values,
display domain indices in sysfs, eliminate domain suffix in event names,
from Sukadev Bhattiprolu
Freescale:
- Updates from Scott: "Highlights include 8xx optimizations, 32-bit checksum
optimizations, 86xx consolidation, e5500/e6500 cpu hotplug, more fman and
other dt bits, and minor fixes/cleanup."
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJW69OrAAoJEFHr6jzI4aWAe5EQAJw/hE6WBQc6a7Tj70AnXOqR
qk/m5pZjuTwQxfBteIvHR1pE5eXdlvtAjcD254LVkFkAbIn19W/h2k0VX/nlee7P
n/VRHRifjtGmukqHrPYJJ7ua9mNlY7pxh3leGSixBFASnSWqMxNNNziNQtSTcuCs
TjHiw6NkZ/kzeunA4bAfE4yHVUZjmL74oiS9JbLyaVHqoW4fqWLlh26AKo2yYMZI
qPicBBG4HBi3FGvoexnKxlJNdcV4HO7LzDjJmCSfUKYCJi+Pw19T5qmhso0q0qVz
vHg/A8HNeG4Hn83pNVmLeQSAIQRZ3DvTtcLgbjPo+TVwm/hzrRRBWipTeOVbkLW8
2bcOXT4t7LWUq15EAJ1LYgYZGzcLrfRfUeOcuQ1TWd3+PcfY9pE7FmizsxAAfaVe
E9j9mpz4XnIqBtWkFHneTIHkQ5OWptyKuZJEaYH0nut4VsP0k8NarkseafGqBPu7
5eG83gbiQbCVixfOgblV9eocJ29JcwpjPAY4CZSGJimShg909FV7WRgZgJkKWrbK
dBRco8Jcp4VglGfo2qymv7Uj4KwQoypBREOhiKUvrAsVlDxPfx+bcskhjGu9xGDC
xs/+nme0/lKa/wg5K4C3mQ1GAlkMWHI0ojhJjsyODbetup5UbkEu03wjAaTdO9dT
Y6ptGm0rYAJluPNlziFj
=qkAt
-----END PGP SIGNATURE-----
Merge tag 'powerpc-4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc updates from Michael Ellerman:
"This was delayed a day or two by some build-breakage on old toolchains
which we've now fixed.
There's two PCI commits both acked by Bjorn.
There's one commit to mm/hugepage.c which is (co)authored by Kirill.
Highlights:
- Restructure Linux PTE on Book3S/64 to Radix format from Paul
Mackerras
- Book3s 64 MMU cleanup in preparation for Radix MMU from Aneesh
Kumar K.V
- Add POWER9 cputable entry from Michael Neuling
- FPU/Altivec/VSX save/restore optimisations from Cyril Bur
- Add support for new ftrace ABI on ppc64le from Torsten Duwe
Various cleanups & minor fixes from:
- Adam Buchbinder, Andrew Donnellan, Balbir Singh, Christophe Leroy,
Cyril Bur, Luis Henriques, Madhavan Srinivasan, Pan Xinhui, Russell
Currey, Sukadev Bhattiprolu, Suraj Jitindar Singh.
General:
- atomics: Allow architectures to define their own __atomic_op_*
helpers from Boqun Feng
- Implement atomic{, 64}_*_return_* variants and acquire/release/
relaxed variants for (cmp)xchg from Boqun Feng
- Add powernv_defconfig from Jeremy Kerr
- Fix BUG_ON() reporting in real mode from Balbir Singh
- Add xmon command to dump OPAL msglog from Andrew Donnellan
- Add xmon command to dump process/task similar to ps(1) from Douglas
Miller
- Clean up memory hotplug failure paths from David Gibson
pci/eeh:
- Redesign SR-IOV on PowerNV to give absolute isolation between VFs
from Wei Yang.
- EEH Support for SRIOV VFs from Wei Yang and Gavin Shan.
- PCI/IOV: Rename and export virtfn_{add, remove} from Wei Yang
- PCI: Add pcibios_bus_add_device() weak function from Wei Yang
- MAINTAINERS: Update EEH details and maintainership from Russell
Currey
cxl:
- Support added to the CXL driver for running on both bare-metal and
hypervisor systems, from Christophe Lombard and Frederic Barrat.
- Ignore probes for virtual afu pci devices from Vaibhav Jain
perf:
- Export Power8 generic and cache events to sysfs from Sukadev
Bhattiprolu
- hv-24x7: Fix usage with chip events, display change in counter
values, display domain indices in sysfs, eliminate domain suffix in
event names, from Sukadev Bhattiprolu
Freescale:
- Updates from Scott: "Highlights include 8xx optimizations, 32-bit
checksum optimizations, 86xx consolidation, e5500/e6500 cpu
hotplug, more fman and other dt bits, and minor fixes/cleanup"
* tag 'powerpc-4.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (179 commits)
powerpc: Fix unrecoverable SLB miss during restore_math()
powerpc/8xx: Fix do_mtspr_cpu6() build on older compilers
powerpc/rcpm: Fix build break when SMP=n
powerpc/book3e-64: Use hardcoded mttmr opcode
powerpc/fsl/dts: Add "jedec,spi-nor" flash compatible
powerpc/T104xRDB: add tdm riser card node to device tree
powerpc32: PAGE_EXEC required for inittext
powerpc/mpc85xx: Add pcsphy nodes to FManV3 device tree
powerpc/mpc85xx: Add MDIO bus muxing support to the board device tree(s)
powerpc/86xx: Introduce and use common dtsi
powerpc/86xx: Update device tree
powerpc/86xx: Move dts files to fsl directory
powerpc/86xx: Switch to kconfig fragments approach
powerpc/86xx: Update defconfigs
powerpc/86xx: Consolidate common platform code
powerpc32: Remove one insn in mulhdu
powerpc32: small optimisation in flush_icache_range()
powerpc: Simplify test in __dma_sync()
powerpc32: move xxxxx_dcache_range() functions inline
powerpc32: Remove clear_pages() and define clear_page() inline
...
1. Split out Exynos PMU driver implementation from arm/mach-exynos
to the drivers/soc/samsung which will allow re-use of it on ARM64.
2. Use generic DT cpufreq driver on Exynos542x/5800.
3. Minor cleanups.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWz5R8AAoJEME3ZuaGi4PX/dUP/i55BQ3HREph4flgzGZ0mTc2
f9/v5tZ3jkx8uyVCqcHA94faGRPex0q5KfDThQGTf4GpJWvrOSXY7e9ILdz+VNPd
1S1pWluiR+V9TJHRRCz0l7vo81n96EyhHAiCUq0kS9mPbi1aXu0T15kGAWyFa0cK
AF/DAlLrJn7F+0Fspj4Y0YsZLJCt+XxtCxPkGG87aGWPzBBvSgh3PuNHN5sczq3S
l5mQiqulX+Z1KYzN/Qlng2fXmh0llp0qcBdRmQsChhQyYvDCYe3++5efKqyaKXVN
MHAU4sRhgt9CGV6/9J4trJHq/SLqmVQjIoOfZyfvnGIthyIc0hMlT9H5UyWT9cXK
FD5OIWY110XnfUFsViQfEKHeEFjBL6ABSXXITjltDAwc9o2bHKSVtSyq3NLBz4qO
2WzvGSXIhDHtfjBB+wzagrnpOPAwVdVKQ4ZJvuWR7V2aM4Jbrwz9hVCdWKK/iEyU
Oys/SzVzikkvRRolcXsIQphqK6p6tj3H8NY5nDcZZb53x/MxEEk5Pg7oqZNJD5xN
eKsjaSwIgYZ4xaT/mwcLWOc6/XXt7a9SLmQqaYSf4ABWCfZdQtu1an3AzFPUIog+
rJ4IWLJoPkixAPkPZebkyWaIBIktfQjKPWatX+SAm6Y9A9QmC4dgDgoKIYhnTXze
nAUOLxHxx75k9/XQPjFX
=/LNl
-----END PGP SIGNATURE-----
Merge tag 'samsung-soc-4.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc
Samsung Exynos (and older platforms) improvements for v4.6:
1. Split out Exynos PMU driver implementation from arm/mach-exynos
to the drivers/soc/samsung which will allow re-use of it on ARM64.
2. Use generic DT cpufreq driver on Exynos542x/5800.
3. Minor cleanups.
* tag 'samsung-soc-4.6-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: s3c24xx: Avoid warning for inb/outb
ARM: SAMSUNG: Remove unused register offset definition
ARM: EXYNOS: Cleanup header files inclusion
drivers: soc: samsung: Enable COMPILE_TEST
MAINTAINERS: Add maintainers entry for drivers/soc/samsung
drivers: soc: Add support for Exynos PMU driver
ARM: EXYNOS: Split up exynos5420 SoC specific PMU data
ARM: EXYNOS: Split up exynos5250 SoC specific PMU data
ARM: EXYNOS: Split up exynos4 SoC specific PMU data
ARM: EXYNOS: Split up exynos3250 SoC specific PMU data
ARM: EXYNOS: Move pmu specific headers under "linux/soc/samsung"
ARM: EXYNOS: Correct header comment in Kconfig file
ARM: EXYNOS: Use generic cpufreq driver for Exynos5422/5800
ARM: EXYNOS: Use generic cpufreq driver for Exynos5420
ARM: s3c64xx: use "depends on" instead of "if" after prompt
ARM: plat-samsung: use to_platform_device()
ARM: EXYNOS: Code cleanup in map.h
ARM: EXYNOS: Remove unused static mapping of CMU for exynos5
Signed-off-by: Olof Johansson <olof@lixom.net>
cpm_muram_alloc_common is called twice and both the times
spin_lock_irqsave is held.
Using GFP_KERNEL can sleep in spin_lock_irqsave context and cause
deadlock
Signed-off-by: Saurabh Sengar <saurabh.truth@gmail.com>
Signed-off-by: Scott Wood <oss@buserror.net>
as cpm_muram_alloc_common is used only in this file,
making it static
Signed-off-by: Saurabh Sengar <saurabh.truth@gmail.com>
Signed-off-by: Scott Wood <oss@buserror.net>
127 is the theoretical up boundary of QEIC number,
in fact there only be 44 qe_ic_info now.
add check to overflow for qe_ic_info
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Scott Wood <oss@buserror.net>
Some minor fixes for the RSB and SRAM controller drivers
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJW0Ki1AAoJEBx+YmzsjxAgL/oP/2uBsxDoIbaZP77nPtH7S6/1
k7t7J3NGek8r/FeRpo8Gqu4jt5D9RTypJABOknSXg1mXyYuKuReZt/91MiLFUpnz
ILcwQ8pMdNiHXxXh56JqIDv6NPCyheaMxkOcVwPPDRsJIgzUNB5CyH8ewlIVXXiK
wma3L3Yj7h3yrwKe6dLySvbaw1/gwcax8jVh2Tttj2kT+AQYCIIMd5C/g5hz5LDy
zKCi/ejJ+3s9RQCHx0gdxITOKz2Ue50LUlSInpuetrvUFbWzAb3DPSZN+lueCw+Y
3SFQVg48SrGaQSYBtdnzPROE2SFf17I2FN/vH5qfgE9lAfQPM5BGfUGxB75gTldg
ZYsNGg0vK8+Pqy5ouQClxti3WbY3TQpYPlWPD/RId/1IkcKfEg+qQntWprX+2rU/
yHXJZKticB3gx9z/0mRFYSKkiZlA7Z0rmU5+jYbChHwbKtFAmE+NjoKgp2lW7Sgj
y0gdDCdt8pRLfQEl5MifIjWKXmBO0RslZY3MnE08IAOmtrT97EYwrb/36MQzPktL
Rl8BhfZBc+VfFG++cXpQh3ZkNttGqvg9tl5sj/3CuIAAEENVCmaQUbY2jrlBQsIp
MVAvdDTFZ5vbD8923XUH3N6t/E5Tmx8M66KyPPE6Vkv1MLXKLDto6O0GIEeZXje5
Y6RxAKdHpPWJ8DkDIs0g
=5Ffk
-----END PGP SIGNATURE-----
Merge tag 'sunxi-drivers-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/drivers
Merge "Allwinner drivers changes for 4.6" from Maxime Ripard:
Some minor fixes for the RSB and SRAM controller drivers
* tag 'sunxi-drivers-for-4.6' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
drivers: soc: sunxi: Fix mask generation for SRAM mapping
drivers: sunxi-rsb: fix error output type
The knav_qmss driver is currently broken when CONFIG_LPAE is
set, which is a bit surprising because I'd expect that any serious
users of this platforms would have more than 2GB of RAM and require
LPAE.
The compiler clearly warns about an incorrect use of dma_addr_t
in the debug kernel messages:
ti/knav_qmss_queue.c: In function 'knav_queue_setup_region':
ti/knav_qmss_queue.c:1025:117: warning: format '%x' expects argument of type 'unsigned int', but argument 9 has type 'dma_addr_t {aka long long unsigned int}' [-Wformat=]
ti/knav_qmss_queue.c:1025:117: warning: format '%x' expects argument of type 'unsigned int', but argument 10 has type 'dma_addr_t {aka long long unsigned int}' [-Wformat=]
ti/knav_qmss_queue.c: In function 'knav_queue_setup_link_ram':
ti/knav_qmss_queue.c:1175:118: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'dma_addr_t {aka long long unsigned int}' [-Wformat=]
This patch changes all the debugging output to use the correct
%pad format string that works with both 32-bit and 64-bit dma_addr_t.
As the variable naming is somewhat confusing here, I also change
all *_phys names to *_dma when they refer to bus addresses that
are used for DMA rather than a physical memory address as seen from
the CPU. This is particularly important on keystone, because the
two things are not the same there.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Get some build coverage of Exynos PMU driver. It depends on
asm/cputype.h so its compilation is limited to ARM architectures.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com>
This patch moves Exynos PMU driver implementation from "arm/mach-exynos"
to "drivers/soc/samsung". This driver is mainly used for setting misc
bits of register from PMU IP of Exynos SoC which will be required to
configure before Suspend/Resume. Currently all these settings are done
in "arch/arm/mach-exynos/pmu.c" but moving ahead for ARM64 based SoC
support, there is a need of this PMU driver in driver/* folder.
This driver uses existing DT binding information and there should
be no functionality change in the supported platforms.
Signed-off-by: Amit Daniel Kachhap <amitdanielk@gmail.com>
[tested on Peach-Pi (Exynos5880)]
Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
[for testing on Trats2 (Exynos4412) and Odroid XU3 (Exynos5422)]
Tested-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
[k.kozlowski: Rebased, add necessary infrastructure for building and
selecting drivers/soc because original patchset was on top of movement
SROMc to drivers/soc]
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
If we fail to probe the driver, we should not directly break
from the for_each_available_child_of_node since it calls of_node_get
while iterating. This patch add of_node_put to fix the unbalanced
call pair.
Fixes: 7c696693a4 ("soc: rockchip: power-domain: Add power domain driver")
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
With CONFIG_PM enabled do not call genpd->power_on manually as this
will cause the regulators being turned on once in SCPSYS probe and
then again when the genpd core turns on the domains. Instead, call
genpd->power_on only with CONFIG_PM disabled and tell the genpd core
that the domains are disabled when registered.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Tested-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
GENMASK is inclusive on both ends, therefor one has to be
subtracted from the width.
Also fixes the mask for debug output.
Signed-off-by: Jens Kuske <jenskuske@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
SCPSYS can't be built as module. Use builtin_platform_driver instead.
For this probe must not be __init and the data accessed can't be
__initconst. Remove this macros. To make the impact as small as possible,
fold scp_domain_data into scp_domain via a pointer.
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Arnd Bergmann <arnd@arndb.de>
Reported-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Tested-by: Daniel Kurtz <djkurtz@chromium.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Since STAUPD interrupts aren't handled on mt8173, disable watchdog timeout
monitor of STAUPD to avoid WDT_INT triggered by STAUPD.
Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Sometimes PMIC is too busy to send data in time to cause pmic wrap timeout,
because pmic wrap is waiting for FSM_VLDCLR after finishing WACS2_CMD. It
just return error when issue happened, so the state machine will stay on
FSM_VLDCLR state when data send back later by PMIC and timeout again in next
time because pmic wrap waiting for FSM_IDLE state at the beginning of the
read/write function.
Clear the vldclr when timeout if state machine stay on FSM_VLDCLR.
Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Tested-by: Ricky Liang <jcliang@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
As we want gpio_chip .get() calls to be able to return negative
error codes and propagate to drivers, we need to go over all
drivers and make sure their return values are clamped to [0,1].
We do this by using the ret = !!(val) design pattern.
Cc: Anatolij Gustschin <agust@denx.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Michael Ellerman <mpe@ellerman.id.au>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This driver is modified to support RK3368 SoC.
Signed-off-by: zhangqing <zhangqing@rock-chips.com>
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Here's a single-SoC topic branch that we've staged separately. Mainly
because it was hard to sort the branch contents in a way that fit our
existing branches due to some refactorings.
The code has been in -next for quite a while, but we staged it in arm-soc
a bit late, which is why we've kept it separate from the other updates
and are sending it separately here.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWoqsGAAoJEIwa5zzehBx3/F4QAJo4FEU+KTOhUggDV+KPn9ZD
Re1SAKTpKo9elMdDdTZZObHYPf+RXqun50C4pQiSVfyDm9syZaxtWjjZvshwsATq
178fNN+0C/7aenj8Zpq/NrLwBl1N51cSdc1ii3TcN/OA5XDgpmGJTdqMziDiXAkd
Nt847qSEhIvAfOtcZR2drk2wBKGCTA/NpGU3HCryPAlO7RnAbJY4Ywj0bU01Lc9y
bSJYh1SPaa1PdDCBJjtbk6L8iGl39K5oy0e6ehECEviLBVtWIL0zqh101XGbPVtv
vtpVJ40NciiHknCBEiJkYiY9b7BNZYMeuwLarqk7TxyW4Vm5Rl5CFkEot0X/b70J
XSxca6KGLzSgmCYDzJtLgtmyBUDoGqNwiPnNVIjrGIt9uOlWeHGb7TUKjBZaJr7G
nXiKKU17zhb28hEo8JjIGcuFcOGlwlBhoOKhOYePiXX/iA03M8SEZg3XXyYMiaVz
j9PcfOQptc7CyCAyiUQW36cZc1vQlnNxpiZstF0QsJ+Poe1kPlJIVpOarrfFdvh5
wJrS4L5YoIzb5robsNLNJ6XXiRnqvxgO6dEdA3RoI1bMaFsXVRCb03EoxVYqS4RF
o+4h0KYQ8gPmAhA/ii/IDHps51TCCDOolAyWLfmYlqXu76IjOlC1LTYxi8RAGZNL
xExyC0A3YDfONv6mx07R
=LG3u
-----END PGP SIGNATURE-----
Merge tag 'armsoc-tegra' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC support for Tegra platforms from Olof Johansson:
"Here's a single-SoC topic branch that we've staged separately. Mainly
because it was hard to sort the branch contents in a way that fit our
existing branches due to some refactorings.
The code has been in -next for quite a while, but we staged it in
arm-soc a bit late, which is why we've kept it separate from the other
updates and are sending it separately here"
* tag 'armsoc-tegra' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
arm64: tegra: Add NVIDIA Jetson TX1 Developer Kit support
arm64: tegra: Add NVIDIA P2597 I/O board support
arm64: tegra: Add NVIDIA Jetson TX1 support
arm64: tegra: Add NVIDIA P2571 board support
arm64: tegra: Add NVIDIA P2371 board support
arm64: tegra: Add NVIDIA P2595 I/O board support
arm64: tegra: Add NVIDIA P2530 main board support
arm64: tegra: Add Tegra210 support
arm64: tegra: Add NVIDIA Tegra132 Norrin support
arm64: tegra: Add Tegra132 support
ARM: tegra: select USB_ULPI from EHCI rather than platform
ARM: tegra: Ensure entire dcache is flushed on entering LP0/1
amba: Hide TEGRA_AHB symbol
soc/tegra: Add Tegra210 support
soc/tegra: Provide per-SoC Kconfig symbols
A few fixes for fallout that we didn't catch in time in -next, or smaller
warning fixes that have been discovered since.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWolruAAoJEIwa5zzehBx3wIsQAJzOv9kJIw7c+Uh8Wu2CkEmv
IJMiL8n7PvtLq/USOYKKIqf6KeGjedMNM1aFSRuDQ0HqdBB4ysyv4Go6CMUlxSv7
fbr5/AmZlrgBKZwvjh2SzehvvhuaWuDMzo+1lDm2cqQ8u/kmEQPcDRG/eTDDV5nf
Ym/dDCh8PXHTFmuad2a3qznNod5kHNE+agOgjTYZxZvA67Ys8HGoaXlYtJijqv5p
KwcNspT0vn7Tf22XrEsrkR9bgfyNHcdiB+qSJBYWqH00Q0ew6zfLI1FWPUNPLvg6
HgoNIxBIaNdPS9v/EH70uhvIeWGTH0Yz/YiNzm3lp+rIWutdDPnKW0DnxiIACGis
e9b4f24OfPWeveh+KWdVgyRYk/hNvO9umuJNyM6G2PP9fWRldqZXfR0vVKY6Wfzr
WYprBAbY/LvuZBsyser3UNokD2pxaLGCTrkRiH/Y/hQuhfu8HjDmetoKI5Vz8Irn
2/rAWL0yidpblPd6hZAbz0b/Z2SCRU+eRF6Q10ovr9Ug3AY8oEKrlt6emcbDoFie
1geHAJT+HGejR4Hl9rEixZQqJ0o2BtyyETqZpM1hY6eOE7uz/bw59kfjLLCCHcr7
mZx9DUjAH5trkvPVlj/WUXPoryW9Ra66eREXsIwajBQb53ww6gdr/VAYCYFDx/VF
V10Vs46iT8lLoqY/YsT/
=PRjJ
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Olof Johansson:
"A few fixes for fallout that we didn't catch in time in -next, or
smaller warning fixes that have been discovered since"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
soc: qcom/spm: shut up uninitialized variable warning
ARM: realview: fix device tree build
ARM: debug-ll: fix BCM63xx entry for multiplatform
ARM: dts: armadillo800eva Correct extal1 frequency to 24 MHz
gcc warns about the 'found' variable possibly being used uninitialized:
drivers/soc/qcom/spm.c: In function 'spm_dev_probe':
drivers/soc/qcom/spm.c:305:5: error: 'found' may be used uninitialized in this function [-Werror=maybe-uninitialized]
However, the code is correct because we know that there is
always at least one online CPU. This initializes the 'found'
variable to zero before the loop so the compiler knows
it does not have to warn about it.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Merge third patch-bomb from Andrew Morton:
"I'm pretty much done for -rc1 now:
- the rest of MM, basically
- lib/ updates
- checkpatch, epoll, hfs, fatfs, ptrace, coredump, exit
- cpu_mask simplifications
- kexec, rapidio, MAINTAINERS etc, etc.
- more dma-mapping cleanups/simplifications from hch"
* emailed patches from Andrew Morton <akpm@linux-foundation.org>: (109 commits)
MAINTAINERS: add/fix git URLs for various subsystems
mm: memcontrol: add "sock" to cgroup2 memory.stat
mm: memcontrol: basic memory statistics in cgroup2 memory controller
mm: memcontrol: do not uncharge old page in page cache replacement
Documentation: cgroup: add memory.swap.{current,max} description
mm: free swap cache aggressively if memcg swap is full
mm: vmscan: do not scan anon pages if memcg swap limit is hit
swap.h: move memcg related stuff to the end of the file
mm: memcontrol: replace mem_cgroup_lruvec_online with mem_cgroup_online
mm: vmscan: pass memcg to get_scan_count()
mm: memcontrol: charge swap to cgroup2
mm: memcontrol: clean up alloc, online, offline, free functions
mm: memcontrol: flatten struct cg_proto
mm: memcontrol: rein in the CONFIG space madness
net: drop tcp_memcontrol.c
mm: memcontrol: introduce CONFIG_MEMCG_LEGACY_KMEM
mm: memcontrol: allow to disable kmem accounting for cgroup2
mm: memcontrol: account "kmem" consumers in cgroup2 memory controller
mm: memcontrol: move kmem accounting code to CONFIG_MEMCG
mm: memcontrol: separate kmem code from legacy tcp accounting code
...
Driver updates for ARM SoCs. Some for SoC-family code under drivers/soc,
but also some other driver updates that don't belong anywhere else. We also
bring in the drivers/reset code through arm-soc.
Some of the larger updates:
- Qualcomm support for SMEM, SMSM, SMP2P. All used to communicate with other
parts of the chip/board on these platforms, all proprietary protocols that
don't fit into other subsystems and live in drivers/soc for now.
- System bus driver for UniPhier
- Driver for the TI Wakeup M3 IPC device
- Power management for Raspberry PI
+ Again a bunch of other smaller updates and patches.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWnsLfAAoJEIwa5zzehBx3KVcQAJS90XyeheS3LX+SUMsn5qAJ
Q+NLzfYAAHZPafruOTcBATs9xUvuJM4KsdqXIWiA4gJig/ZFpF5dpDbrnhpdJFEK
0ULSfZd9J4B4m7aBo6L8lVBEbd4i++updHpIYnmPx3tkLL0Win/VM8KlMpdOzMQN
DncNFVIRJ80OxepdHgBu6yY7gv3Z8XhRrNukeG8EZTvHw5bJQHfjMOeAQNQWUmWa
HLyO6uqYkca38XMJOhPhqt0mOpwh/X6ByUueIrIMpOksJcRnklrkjDnBuvp9dQ+8
fU1sOjjYzQPiA6Oa3o/2ruBKj2FymLJ0OzONJb3xPiBO5bJbc1LJwK00tuIRC3hv
r9Jqoqwae/AolqYephfao/LvUcoyHBaZ6aSbGQYms0Wy2FCkkkocfY2i7QP6S6Mz
qtOCHxX+yF921AEZ1xTOKgBvBU931WM1MQOe4s1QVllRlLFJhrGqDDwsNlPwRa+6
OkXmPJSEhsHGFaCdA3iOEy+/W2dvMbVOaGa9csNDpPcSJhhpxc5A4CYRlFSwGyM1
oL20g1T3ybDP+EkNcdpavWdQ55toWGmm48PunIZImVSdgNRZZQJw107yA/UzQTNz
kOg27kqtjpM4xcpxmwGlIj4Zoy1M390ACm+n79Awa9agvjOvfV4QE1tLB4tiXyuy
0Pxy8WWL/G5Si8bKWsfc
=khZ5
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"Driver updates for ARM SoCs. Some for SoC-family code under
drivers/soc, but also some other driver updates that don't belong
anywhere else. We also bring in the drivers/reset code through
arm-soc.
Some of the larger updates:
- Qualcomm support for SMEM, SMSM, SMP2P. All used to communicate
with other parts of the chip/board on these platforms, all
proprietary protocols that don't fit into other subsystems and live
in drivers/soc for now.
- System bus driver for UniPhier
- Driver for the TI Wakeup M3 IPC device
- Power management for Raspberry PI
+ Again a bunch of other smaller updates and patches"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits)
bus: uniphier: allow only built-in driver
ARM: bcm2835: clarify RASPBERRYPI_FIRMWARE dependency
MAINTAINERS: Drop Kumar Gala from QCOM
bus: uniphier-system-bus: add UniPhier System Bus driver
ARM: bcm2835: add rpi power domain driver
dt-bindings: add rpi power domain driver bindings
ARM: bcm2835: Define two new packets from the latest firmware.
drivers/soc: make mediatek/mtk-scpsys.c explicitly non-modular
soc: mediatek: SCPSYS: Add regulator support
MAINTAINERS: Change QCOM entries
soc: qcom: smd-rpm: Add existing platform support
memory/tegra: Add number of TLB lines for Tegra124
reset: hi6220: fix modular build
soc: qcom: Introduce WCNSS_CTRL SMD client
ARM: qcom: select ARM_CPU_SUSPEND for power management
MAINTAINERS: Add rules for Qualcomm dts files
soc: qcom: enable smsm/smp2p modular build
serial: msm_serial: Make config tristate
soc: qcom: smp2p: Qualcomm Shared Memory Point to Point
soc: qcom: smsm: Add driver for Qualcomm SMSM
...
This branch is the culmination of 5 years of effort to bring the ARMv6
and ARMv7 platforms together such that they can all be enabled and
boot the same kernel. It has been a tremendous amount of cleanup and
refactoring by a huge number of people, and creation of several new
(and major) subsystems to better abstract out all the platform details
in an appropriate manner.
The bulk of this branch is a large patchset from Arnd that brings several
of the more minor and older platforms we have closer to multiplatform
support. Among these are MMP, S3C64xx, Orion5x, mv78xx0 and realview
Much of this is moving around header files from old mach directories,
but there are also some cleanup patches of debug_ll (lowlevel debug
per-platform options) and other parts.
Linus Walleij also has some patchs to clean up the older ARM Realview
platforms by finally introducing DT support, and Rob Herring has some
for ARM Versatile which is now DT-only. Both of these platforms are
now multiplatform.
Finally, a couple of patches from Russell for Dove PMU, and a fix from
Valentin Rothberg for Exynos ADC, which were rebased on top of the
series to avoid conflicts.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIUAwUAVqAGcmCrR//JCVInAQLDog/4x9F0PHGmZhexGfFOpi2Od63Jjx55izRU
zRXqRjjFjambOrZuOx8lEGDy/qzqKbsDU8D1P4IUugkDr2bLSXv+NTLZL1kNBIdm
YOlJhw/BmzLYqauOHmBzGhtv1FDUk3rqbgTsP5tTWj5LpSkwjmqui3HBZpi+f3Rr
YOn+NeQSARiw+51D0b106a9RFshQXRGgn5m3xFjLWhJqshb2z2Ew5cogX/zdwrrM
ss1BFomxsvgk6S+snN6v7cEX2iXe3r89qNR5jEW5BgNpQGFsAUeXPr9zzH07L/Qq
O7XLw9jt5MX/X5372zVHPb57WoflLbF9cFaaDUZV3eTqt3lC67BTxOtYIdC2i90k
E5GYlsy88CRwT2EO+ok/6UTryph+hVv7JqHfbKfnISrbraMCK36DtDTpBIpZ9uYF
rRB7ncJZUWBcyoe+qvitSl+2KV54iB1ez2RXsketxM98dDZsfB2M2ImFou1F/Pgg
ALvpifPubi/uDe7xNUsSuaT6/3jAomBuNsxnkYJ3NeiH/+duZbOYGkzK/LlcjZyc
UrA0IpLfwIFsBNzwfpZPZ1lkEu8Y1YZZ+Hv9k65q1wMuBDgrFI5zUeYrPZi4pN9T
Yo1xP9FstVLDouJrpGZo12VIIxR1UBeGqfRI/BZ58LEF3PRq/g2OVFsdQia5gZKr
ddiJKSL1Vw==
=z1AW
-----END PGP SIGNATURE-----
Merge tag 'armsoc-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC multiplatform code updates from Arnd Bergmann:
"This branch is the culmination of 5 years of effort to bring the ARMv6
and ARMv7 platforms together such that they can all be enabled and
boot the same kernel. It has been a tremendous amount of cleanup and
refactoring by a huge number of people, and creation of several new
(and major) subsystems to better abstract out all the platform details
in an appropriate manner.
The bulk of this branch is a large patchset from Arnd that brings
several of the more minor and older platforms we have closer to
multiplatform support. Among these are MMP, S3C64xx, Orion5x, mv78xx0
and realview Much of this is moving around header files from old mach
directories, but there are also some cleanup patches of debug_ll
(lowlevel debug per-platform options) and other parts.
Linus Walleij also has some patchs to clean up the older ARM Realview
platforms by finally introducing DT support, and Rob Herring has some
for ARM Versatile which is now DT-only. Both of these platforms are
now multiplatform.
Finally, a couple of patches from Russell for Dove PMU, and a fix from
Valentin Rothberg for Exynos ADC, which were rebased on top of the
series to avoid conflicts"
* tag 'armsoc-multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (75 commits)
ARM: realview: don't select SMP_ON_UP for UP builds
ARM: s3c: simplify s3c_irqwake_{e,}intallow definition
ARM: s3c64xx: fix pm-debug compilation
iio: exynos-adc: fix irqf_oneshot.cocci warnings
ARM: realview: build realview-dt SMP support only when used
ARM: realview: select apropriate targets
ARM: realview: clean up header files
ARM: realview: make all header files local
ARM: no longer make CPU targets visible separately
ARM: integrator: use explicit core module options
ARM: realview: enable multiplatform
ARM: make default platform work for NOMMU
ARM: debug-ll: move DEBUG_LL_UART_EFM32 to correct Kconfig location
ARM: defconfig: use correct debug_ll settings
ARM: versatile: convert to multi-platform
ARM: versatile: merge mach code into a single file
ARM: versatile: switch to DT only booting and remove legacy code
ARM: versatile: add DT based PCI detection
ARM: pxa: mark ezx structures as __maybe_unused
ARM: pxa: mark raumfeld init functions as __maybe_unused
...
Now that we have a generic library function for this, replace the
open-coded instance.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Cc: <zajec5@gmail.com>
Cc: David Howells <dhowells@redhat.com>
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
- Ground work for the new Power9 MMU from Aneesh Kumar K.V
- Optimise FP/VMX/VSX context switching from Anton Blanchard
- Various cleanups from Krzysztof Kozlowski, John Ogness, Rashmica Gupta,
Russell Currey, Gavin Shan, Daniel Axtens, Michael Neuling, Andrew Donnellan
- Allow wrapper to work on non-english system from Laurent Vivier
- Add rN aliases to the pt_regs_offset table from Rashmica Gupta
- Fix module autoload for rackmeter & axonram drivers from Luis de Bethencourt
- Include KVM guest test in all interrupt vectors from Paul Mackerras
- Fix DSCR inheritance over fork() from Anton Blanchard
- Make value-returning atomics & {cmp}xchg* & their atomic_ versions fully ordered from Boqun Feng
- Print MSR TM bits in oops messages from Michael Neuling
- Add TM signal return & invalid stack selftests from Michael Neuling
- Limit EPOW reset event warnings from Vipin K Parashar
- Remove the Cell QPACE code from Rashmica Gupta
- Append linux_banner to exception information in xmon from Rashmica Gupta
- Add selftest to check if VSRs are corrupted from Rashmica Gupta
- Remove broken GregorianDay() from Daniel Axtens
- Import Anton's context_switch2 benchmark into selftests from Michael Ellerman
- Add selftest script to test HMI functionality from Daniel Axtens
- Remove obsolete OPAL v2 support from Stewart Smith
- Make enter_rtas() private from Michael Ellerman
- PPR exception cleanups from Michael Ellerman
- Add page soft dirty tracking from Laurent Dufour
- Add support for Nvlink NPUs from Alistair Popple
- Add support for kexec on 476fpe from Alistair Popple
- Enable kernel CPU dlpar from sysfs from Nathan Fontenot
- Copy only required pieces of the mm_context_t to the paca from Michael Neuling
- Add a kmsg_dumper that flushes OPAL console output on panic from Russell Currey
- Implement save_stack_trace_regs() to enable kprobe stack tracing from Steven Rostedt
- Add HWCAP bits for Power9 from Michael Ellerman
- Fix _PAGE_PTE breaking swapoff from Aneesh Kumar K.V
- Fix _PAGE_SWP_SOFT_DIRTY breaking swapoff from Hugh Dickins
- scripts/recordmcount.pl: support data in text section on powerpc from Ulrich Weigand
- Handle R_PPC64_ENTRY relocations in modules from Ulrich Weigand
- cxl: Fix possible idr warning when contexts are released from Vaibhav Jain
- cxl: use correct operator when writing pcie config space values from Andrew Donnellan
- cxl: Fix DSI misses when the context owning task exits from Vaibhav Jain
- cxl: fix build for GCC 4.6.x from Brian Norris
- cxl: use -Werror only with CONFIG_PPC_WERROR from Brian Norris
- cxl: Enable PCI device ID for future IBM CXL adapter from Uma Krishnan
- Freescale updates from Scott: Highlights include moving QE code out of
arch/powerpc (to be shared with arm), device tree updates, and minor fixes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWmIxeAAoJEFHr6jzI4aWAA+cQAIXAw4WfVWJ2V4ZK+1eKfB57
fdXG71PuXG+WYIWy71ly8keLHdzzD1NQ2OUB64bUVRq202nRgVc15ZYKRJ/FE/sP
SkxaQ2AG/2kI2EflWshOi0Lu9qaZ+LMHJnszIqE/9lnGSB2kUI/cwsSXgziiMKXR
XNci9v14SdDd40YV/6BSZXoxApwyq9cUbZ7rnzFLmz4hrFuKmB/L3LABDF8QcpH7
sGt/YaHGOtqP0UX7h5KQTFLGe1OPvK6NWixSXeZKQ71ED6cho1iKUEOtBA9EZeIN
QM5JdHFWgX8MMRA0OHAgidkSiqO38BXjmjkVYWoIbYz7Zax3ThmrDHB4IpFwWnk3
l7WBykEXY7KEqpZzbh0GFGehZWzVZvLnNgDdvpmpk/GkPzeYKomBj7ZZfm3H1yGD
BTHPwuWCTX+/K75yEVNO8aJO12wBg7DRl4IEwBgqhwU8ga4FvUOCJkm+SCxA1Dnn
qlpS7qPwTXNIEfKMJcxp5X0KiwDY1EoOotd4glTN0jbeY5GEYcxe+7RQ302GrYxP
zcc8EGLn8h6BtQvV3ypNHF5l6QeTW/0ZlO9c236tIuUQ5gQU39SQci7jQKsYjSzv
BB1XdLHkbtIvYDkmbnr1elbeJCDbrWL9rAXRUTRyfuCzaFWTfZmfVNe8c8qwDMLk
TUxMR/38aI7bLcIQjwj9
=R5bX
-----END PGP SIGNATURE-----
Merge tag 'powerpc-4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc updates from Michael Ellerman:
"Core:
- Ground work for the new Power9 MMU from Aneesh Kumar K.V
- Optimise FP/VMX/VSX context switching from Anton Blanchard
Misc:
- Various cleanups from Krzysztof Kozlowski, John Ogness, Rashmica
Gupta, Russell Currey, Gavin Shan, Daniel Axtens, Michael Neuling,
Andrew Donnellan
- Allow wrapper to work on non-english system from Laurent Vivier
- Add rN aliases to the pt_regs_offset table from Rashmica Gupta
- Fix module autoload for rackmeter & axonram drivers from Luis de
Bethencourt
- Include KVM guest test in all interrupt vectors from Paul Mackerras
- Fix DSCR inheritance over fork() from Anton Blanchard
- Make value-returning atomics & {cmp}xchg* & their atomic_ versions
fully ordered from Boqun Feng
- Print MSR TM bits in oops messages from Michael Neuling
- Add TM signal return & invalid stack selftests from Michael Neuling
- Limit EPOW reset event warnings from Vipin K Parashar
- Remove the Cell QPACE code from Rashmica Gupta
- Append linux_banner to exception information in xmon from Rashmica
Gupta
- Add selftest to check if VSRs are corrupted from Rashmica Gupta
- Remove broken GregorianDay() from Daniel Axtens
- Import Anton's context_switch2 benchmark into selftests from
Michael Ellerman
- Add selftest script to test HMI functionality from Daniel Axtens
- Remove obsolete OPAL v2 support from Stewart Smith
- Make enter_rtas() private from Michael Ellerman
- PPR exception cleanups from Michael Ellerman
- Add page soft dirty tracking from Laurent Dufour
- Add support for Nvlink NPUs from Alistair Popple
- Add support for kexec on 476fpe from Alistair Popple
- Enable kernel CPU dlpar from sysfs from Nathan Fontenot
- Copy only required pieces of the mm_context_t to the paca from
Michael Neuling
- Add a kmsg_dumper that flushes OPAL console output on panic from
Russell Currey
- Implement save_stack_trace_regs() to enable kprobe stack tracing
from Steven Rostedt
- Add HWCAP bits for Power9 from Michael Ellerman
- Fix _PAGE_PTE breaking swapoff from Aneesh Kumar K.V
- Fix _PAGE_SWP_SOFT_DIRTY breaking swapoff from Hugh Dickins
- scripts/recordmcount.pl: support data in text section on powerpc
from Ulrich Weigand
- Handle R_PPC64_ENTRY relocations in modules from Ulrich Weigand
cxl:
- cxl: Fix possible idr warning when contexts are released from
Vaibhav Jain
- cxl: use correct operator when writing pcie config space values
from Andrew Donnellan
- cxl: Fix DSI misses when the context owning task exits from Vaibhav
Jain
- cxl: fix build for GCC 4.6.x from Brian Norris
- cxl: use -Werror only with CONFIG_PPC_WERROR from Brian Norris
- cxl: Enable PCI device ID for future IBM CXL adapter from Uma
Krishnan
Freescale:
- Freescale updates from Scott: Highlights include moving QE code out
of arch/powerpc (to be shared with arm), device tree updates, and
minor fixes"
* tag 'powerpc-4.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (149 commits)
powerpc/module: Handle R_PPC64_ENTRY relocations
scripts/recordmcount.pl: support data in text section on powerpc
powerpc/powernv: Fix OPAL_CONSOLE_FLUSH prototype and usages
powerpc/mm: fix _PAGE_SWP_SOFT_DIRTY breaking swapoff
powerpc/mm: Fix _PAGE_PTE breaking swapoff
cxl: Enable PCI device ID for future IBM CXL adapter
cxl: use -Werror only with CONFIG_PPC_WERROR
cxl: fix build for GCC 4.6.x
powerpc: Add HWCAP bits for Power9
powerpc/powernv: Reserve PE#0 on NPU
powerpc/powernv: Change NPU PE# assignment
powerpc/powernv: Fix update of NVLink DMA mask
powerpc/powernv: Remove misleading comment in pci.c
powerpc: Implement save_stack_trace_regs() to enable kprobe stack tracing
powerpc: Fix build break due to paca mm_context_t changes
cxl: Fix DSI misses when the context owning task exits
MAINTAINERS: Update Scott Wood's e-mail address
powerpc/powernv: Fix minor off-by-one error in opal_mce_check_early_recovery()
powerpc: Fix style of self-test config prompts
powerpc/powernv: Only delay opal_rtc_read() retry when necessary
...
Pull trivial tree updates from Jiri Kosina.
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial:
floppy: make local variable non-static
exynos: fixes an incorrect header guard
dt-bindings: fixes some incorrect header guards
cpufreq-dt: correct dead link in documentation
cpufreq: ARM big LITTLE: correct dead link in documentation
treewide: Fix typos in printk
Documentation: filesystem: Fix typo in fs/eventfd.c
fs/super.c: use && instead of & for warn_on condition
Documentation: fix sysfs-ptp
lib: scatterlist: fix Kconfig description
The big thing here is Tegra210 support, which is really only the Kconfig
symbol. Other than that there's a few miscellaneous fixes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJWcqt1AAoJEN0jrNd/PrOhylsQAI8Kg2TNG2e+vhHm6SWG5hW9
jXzKDKl21vLWxP9s1Gmorn59+T8Lo79031sqCAPApYHCBm52M/vv2RYac2SJPvKm
cD58O/dJM73/MZWFpMi8YS6fMsfAnAOa7DLIIEADkN7LzPRWJlWiylA9HxM0zm/1
mc7dGtOmK1fnwgdJvi0Lu1BVBy7QIrQ5dVHblph6Zg+QGkjk7xSnCLikwxTdTQ44
3GFKPWri4t/rMWrtHQzVc3jq5W1qSFeLp43ehev+uxPjGzRDGRTfWntvTbNZ0gs+
qS64dGr6ptv195bOr85pkyTbx41wQ8yEooua/u3OdiSMri1pcXTT0fTFHQ5qhYaQ
awyjLVSKJqMN0VRCrcioYWDnUHs98nWqQz8j/AY1ko5hAe3bf74VelBDAPhtCMVB
sxM1GvcQDoBHNlgFEJpI8IaDLRNv3GmIZejl5vJd6olvWqIveY+XKtI8tEfnkH5E
ibnFtNV26Eb5s/4M20ZbRLPyHFrF33SBo9yGHef9OI7k26aAnQSHfgmVRCvYTqYh
GRAmg50iPNkzX84xPvaITXjNAa3w7MKY411//7eSP810m757Hliv6FlrtoMNnOJZ
7hy+kcuFMRWfYykGfk1sVvfwpeq/dk7iiKvyrArRKtTYQjcjjCT8h1oUyfhSVuqZ
+WohzBaSINH5sTWgaeef
=zr7c
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.5-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into late/tegra
ARM: tegra: Core SoC changes for v4.5-rc1
The big thing here is Tegra210 support, which is really only the Kconfig
symbol. Other than that there's a few miscellaneous fixes.
* tag 'tegra-for-4.5-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: select USB_ULPI from EHCI rather than platform
ARM: tegra: Ensure entire dcache is flushed on entering LP0/1
amba: Hide TEGRA_AHB symbol
soc/tegra: Add Tegra210 support
soc/tegra: Provide per-SoC Kconfig symbols
Signed-off-by: Olof Johansson <olof@lixom.net>
The firmware driver can be a loadable module, but the power domain
can only be built-in, so we get a build error in an allmodconfig
kernel:
:(.text+0x17e59c): undefined reference to `rpi_firmware_property'
:(.text+0x17e51c): undefined reference to `rpi_firmware_get'
:(.text+0x17e244): undefined reference to `rpi_firmware_property'
This changes the dependency to only allow the power domain code
to be enabled when the firmware driver is built-in. Other users
of the firmware driver may still be loadable modules and not
everyone needs the power domains, so we don't change the firmware
code.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
arm-soc next/drivers branch.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABCgAGBQJWgdrrAAoJELXWKTbR/J7oD/gP+wXI5ULjQ9fobUXWQYkHSL8d
RfCEEdZ9nVcwLgxqvrnpzliUtK7tLSy4CK/8pfnkoHOSkBJWNRS1uJkBM1oFB+Qi
caI/0LB99PsfL/LM40Y2Lh3KjGv3yxG8Sk+mkLujKevoMPSIey/YkaHWB1a1e3Is
FECCI4huVcDGr2p4YuGkgvTBYSxTLRfos2NArnEE/nGSPD5kTWMx9tfqYrB4Dxzr
qo5rjPZaU37b82ZDDrMYePAaUAAR9eKalc5Y7Im4Tbh/rfDO4aCLLBKPvpKVI/Pt
RcTj8YuLp7PYXoYhVIzYY//ps0fa8zyxGj2P0H0oR3/BVYmI6XdGo5zBdyRbfrGx
ydeq1kuwvfNgSj7yoH0gbolP5D643LPtJoZ7ZRAs6Vo5+WjpahipZxbD/0YXpiL0
FPWA5h/QhU5V3ArwCoYqI77FvGryoAX7jcZua+GIBqXWY5UY3kMrqXXe/ATqcW/V
svSf0peEB3gZoFUNZDK8z0h7FY3YscCTaRfHUB3KNaPT2Bj2p15hB8wrHu8At8CG
VOH4Dl1UVQJ9O20G9kWQZlBAry5w0pSgTunb03uiJeVG9Tt0RRlhgmf2EjaC10qp
mW5Il8/KL9mgcL3UeyP7CtVUKl3khI6ts/jymnoqU0zW2aT832JY5EIBSm5IwN5x
4EOeVBBoMp6Rx2JGwu+i
=GinK
-----END PGP SIGNATURE-----
Merge tag 'bcm2835-drivers-next-2015-12-28' of http://github.com/anholt/linux into next/drivers
Pull "BCM2835 drivers changes for 4.5" from Eric Anholt:
This pull request includes the bcm2835 changes for 4.5 targeting the
arm-soc next/drivers branch.
* tag 'bcm2835-drivers-next-2015-12-28' of http://github.com/anholt/linux:
ARM: bcm2835: add rpi power domain driver
dt-bindings: add rpi power domain driver bindings
ARM: bcm2835: Define two new packets from the latest firmware.
ls1 has qe and ls1 has arm cpu.
move qe from arch/powerpc to drivers/soc/fsl
to adapt to powerpc and arm
Signed-off-by: Zhao Qiang <qiang.zhao@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
eventually allow am33xx and am437x to support PM with their Cortex-M3
power management processor.
This driver has been waiting to get merged for quite a while but has
had dependencies to the remoteproc that are now out of the way.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWeGRZAAoJEBvUPslcq6VzBTAP+gI8u6J/YqvMU3yoRBXWFCbE
OhYKU0NNEgGqGKoJ0nk+uC7johZN0uEPZnhUeOC/KypBt8xYbMYDJv4t3lXb39e5
kfhy0bdQrNJkVbuEb+dR0zzLlAG8DMu1vChkigip8JLrOccMY1vZvMBItSNSVwY5
nmp7euJkBDIS3vA5QLZH26EmIr2YTMXByckcwP+R2YZ1aAVjeoiH4xNDA5Ef1mdP
/9Lt1So9ZwniSqXnDMkW65OmVbFYd7TvtpMITbFkkCb+HAlRjo7c28QbFT0iYKN0
/omQG+45Jm8Mx5FwFI7OnvafWwGu7TA2gqdF5DlbFoqib/b6HBJdw/itbAKELnuX
hZAAEtnxCc/6TeA1MvqGpuYfSVCax3EowdqGXHbO4y3m4OrL5cC3hTedCPDcFF1+
I0y+TyytKN0d72Tq+soRvr6iCMT1EkuAUSRGQs32OeyKv64gRGwvqwNv1aZ4l39O
GIFEB7RDAA3AdR/Yxm+Wngr228xkNfXv4WaGiQWr2lzbw69fBwbwzhNkJ9yUJbxf
gib0IetARMtGWHeniaYglMeutKHpt4rmF1JDhxARksdGdLE8q2d68SOUNMvotNBi
eMb1fbahhEu/k9LxY1ulr7gVNmZ5V4qradH6DPD5xWhHtcYTk5MJMeKx9P+CZ6RW
CpJk9g6InhmEfnen4XMy
=1/5M
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.5/wakeup-m3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/drivers
TI wakeup M3 IPC device driver for v4.5 merge window. This driver will
eventually allow am33xx and am437x to support PM with their Cortex-M3
power management processor.
This driver has been waiting to get merged for quite a while but has
had dependencies to the remoteproc that are now out of the way.
* tag 'omap-for-v4.5/wakeup-m3' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
soc: ti: Add wkup_m3_ipc driver
Documentation: dt: add bindings for TI Wakeup M3 IPC device
Signed-off-by: Olof Johansson <olof@lixom.net>
Add regulator support for scpsys driver.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABAgAGBQJWdxkqAAoJELQ5Ylss8dND1bMP/0KvyxO3PELRZ5VFVURapOGP
UjwhHw5MGxTwNIDN395DwCtjGq4dX7j5cGDGgXhmg+Me6Hhu4aWjD90hFffl5yov
Y0TQJeV2tQ7zJZ1vKReiFxFT/uUdC8vAya+fGKrIAAPDFWLHLXX6HRUInlHNMNmf
iZ0PPIHxwKmyNmClC8Qea7lwlBPD3qTawJfw0atFUdQbbdR/1Wi0Zu1SfKwDL969
evI6WmrvnCmYNY+kUQresaTXpWD7OmiyC8iIgqrVrd4FrVmYfGRwxP5DIMs4RUsH
28EhuxcSGPMz1H8rY5OEsMhwjWi6c/okzxK7JUjVUGydvaYBRnoWrTSCGKJqKZ3S
ySf2zTn7gQFRelvvdyi9iMZEm9aXpYkQRasY5ktMKlrBVTLfjpolPfhSewhBhY9h
2FN7WuWenLkyfx2/oZFJlrYpbvj0ecLMU7yYccG4/adiIec8VknbOTt2QCHIS8p3
qDLbzfekFOCU+C/jy2GX1CRclQE4L4icog1P5hHZ9j5FBY7LaclFLYF/jEUX6FFJ
7BFDLbzphwRrJGW5orxfOkiRJKth7uer7d1drMjaItDrAKJRkXSI4Cus8RPTx1lf
qxyVL+av9ceLWxMIVVneu+uzjssH8cGzWS7YeJa5fbJm/46v0IlmnptSwd82SHmN
fzwtYg2UYN5VKSC67eRa
=pz5g
-----END PGP SIGNATURE-----
Merge tag 'v4.4-next-soc' of https://github.com/mbgg/linux-mediatek into next/drivers
Change the scpsys to builtin_platform_driver_probe.
Add regulator support for scpsys driver.
* tag 'v4.4-next-soc' of https://github.com/mbgg/linux-mediatek:
drivers/soc: make mediatek/mtk-scpsys.c explicitly non-modular
soc: mediatek: SCPSYS: Add regulator support
Signed-off-by: Olof Johansson <olof@lixom.net>
The suspend() hook in the cpuidle_ops struct is always called on
the cpu entering idle, which means that the cpu parameter passed
to the suspend hook always corresponds to the local cpu, making
it somewhat redundant.
This patch removes the logical cpu parameter from the ARM
cpuidle_ops.suspend hook and updates all the existing kernel
implementations to reflect this change.
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Lina Iyer <lina.iyer@linaro.org>
Tested-by: Lina Iyer <lina.iyer@linaro.org>
Tested-by: Jisheng Zhang <jszhang@marvell.com> [psci]
Cc: Lina Iyer <lina.iyer@linaro.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch adds support for several power domains on Raspberry Pi,
including USB (so it can be enabled even if the bootloader didn't do
it), and graphics.
This patch is the combined work of Eric Anholt (who wrote USB support
inside of the Raspberry Pi firmware driver, and wrote the non-USB
domain support) and Alexander Aring (who separated the original USB
work out from the firmware driver).
Signed-off-by: Alexander Aring <alex.aring@gmail.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
The Kconfig currently controlling compilation of this code is:
drivers/soc/mediatek/Kconfig:config MTK_SCPSYS
drivers/soc/mediatek/Kconfig: bool "MediaTek SCPSYS Support"
...meaning that it currently is not being built as a module by anyone.
Lets remove the couple traces of modularity so that when reading the
driver there is no doubt it is builtin-only.
Since module_platform_driver() uses the same init level priority as
builtin_platform_driver() the init ordering remains unchanged with
this commit.
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Daniel Kurtz <djkurtz@chromium.org>
Cc: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mediatek@lists.infradead.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The power domains are supplied by regulators. Add support for them so
that the regulators are properly turned on before a domain is powered up
and turned off when a domain is powered down.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
- orion5x/mv78xx0 multiplatform conversion
- legacy dove PMU support conversion
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iEYEABECAAYFAlZq1uEACgkQCwYYjhRyO9XZ8ACdHuhMhzgLQ3lR/wUj0Eaj6udh
AuMAn2JdAcBRYkI6B0PkPK5igJugASzQ
=pkme
-----END PGP SIGNATURE-----
Merge tag 'mvebu-soc-4.5-1' of git://git.infradead.org/linux-mvebu into next/multiplatform
Merge "mvebu soc for 4.5 (part 1)" from Gregory CLEMENT:
- orion5x/mv78xx0 multiplatform conversion
- legacy dove PMU support conversion
* tag 'mvebu-soc-4.5-1' of git://git.infradead.org/linux-mvebu:
ARM: dove: convert legacy dove to PMU support
soc: dove: add legacy support to PMU driver
ARM: orion5x: multiplatform support
ARM: orion5x: clean up mach/*.h headers
ARM: mv78xx0: multiplatform support
ARM: mv78xx0: clean up mach/*.h headers
ARM: orion: use SPARSE_IRQ everywhere
ARM: orion: always use MULTI_IRQ_HANDLER
ARM: orion: move watchdog setup to mach-orion5x
Conflicts:
arch/arm/Kconfig
arch/arm/mach-dove/include/mach/entry-macro.S
arch/arm/mach-orion5x/include/mach/entry-macro.S
multiplatform and extended DT support.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWb9LqAAoJEEEQszewGV1z1I4QAIgylTG1hftD5xCtaKsgJv5X
pcp+eVVCeYjeO3AbknrXzBlty0u3/rDOR6n9aUn7ci63qErGi2GeoZ5glo6y3aOU
qKo2/M0LOoP3y6SGxMjaPTTpStjKsaj2XLjHLNrSHAKXsvoFB69vnAlQh2jU+ohX
JEl9wvkugMWicGaiooWQfG7OAf2Gb6AFAKQUfYNVNNXBTD13oQcFRgLwBKDkNlc9
7N6yzPQDNQiauytr7Ji/49fbkiOLFSB5yllhecb37F/b56XprGvsXJTRwsQhPwbj
ig28qu/g7LhfnkZUOTwhWH6WdyFarMlpA8oHHKrZBeGySgvdjXBVYH4IQAfhT2N9
WSh/he+w8T2+oMVj97gLSxKiP4ugUSsBR6daq5X8NESobxFVYzmFIYQxKxOwFif4
JDWvOKaQsRhx42iAq3CIMkh7yQsBC4tJjtyvVwHuGeC2zRlyODbBCnN4OGKDdYpJ
+VY4kr48Yld5IxYm6J6fXOEWTcFw2n/hvEVsik5mmgw1rYivJsCcvcVxv04xZYCl
6d13eCaSh2TfeKYs/Qf2yy3hmps4dWFcd18/xWRyFdnkCs5qGRbtgLiAQtUnQAGm
bpaI/rYeRnnF80af2dhpZT2i0zBL9uuur7FYZDB9xsQDOkqnCYxKvSW1CfNg5Gtc
senI3dczeTC3NtwRp4eC
=Zhx3
-----END PGP SIGNATURE-----
Merge tag 'realview-base-armsoc-1-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/multiplatform
Merge "Realview multiplatform support" from Linus Walleij:
The board and infrastructure changes for RealView
multiplatform and extended DT support.
* tag 'realview-base-armsoc-1-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
ARM: realview: add an DT SMP boot method
ARM: realview: select SP810 and ICST for the DT variant
soc: versatile: add support for the PB11MPCore
clk: versatile-icst: add device tree support
clk: versatile-icst: refactor to allocate regmap separately
clk: versatile-icst: convert to use regmap
ARM: realview: remove private barrier implementation
ARM: no longer force unbuffered DMA for realview
clk/realview: stop using machine headers
ARM: realview: don't map undefined PCI registers
ARM: realview: remove sparsemem hack
Conflicts:
drivers/clk/versatile/Kconfig
The SoC driver needs a minor update to display the correct
sysfs information for the PB11MPCore.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This patch adds support for all current Qualcomm platforms which utilize
RPM over SMD. This includes both MSM8916 and APQ8084.
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
The WCNSS_CTRL SMD client is used for among other things upload nv
firmware to a newly booted WCNSS chip.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
The qcom spm driver uses cpu_resume_arm(), which is not included
in the kernel in all configurations:
drivers/built-in.o: In function `qcom_cpu_spc':
:(.text+0xbc022): undefined reference to `cpu_suspend'
drivers/built-in.o: In function `qcom_cpuidle_init':
:(.init.text+0x610c): undefined reference to `cpu_resume_arm'
This adds a 'select' Kconfig statement to ensure it's always
enabled.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
The newly added smp2p and smsm drivers cannot be loadable modules
but depend on smem, which can be, and that causes a link error:
drivers/built-in.o: In function `qcom_smp2p_intr':
:(.text+0xa6e68): undefined reference to `qcom_smem_get'
drivers/built-in.o: In function `qcom_smp2p_probe':
:(.text+0xa7320): undefined reference to `qcom_smem_alloc'
:(.text+0xa736c): undefined reference to `qcom_smem_get'
drivers/built-in.o: In function `qcom_smsm_probe':
:(.text+0xa7b34): undefined reference to `qcom_smem_get'
This marks all the drivers as 'tristate' to make the Kconfig
dependency resolution work properly.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: dbb04bd7122f ("soc: qcom: smp2p: Qualcomm Shared Memory Point to Point")
Fixes: d7387fc6add4 ("soc: qcom: smsm: Add driver for Qualcomm SMSM")
Signed-off-by: Andy Gross <agross@codeaurora.org>
Introduce the Qualcomm Shard Memory Point to Point driver.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This driver exposed the Qualcomm Shared Memory State Machine bits.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This implements a common API for handling and exposing SMP2P and SMSM
state information.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch fix multiple spelling typos found in
various part of kernel.
Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Add support for legacy non-DT Dove to the PMU driver, so that we can
transition the legacy support over.
[gregory.clement@free-electrons.com: removed pm_genpd_poweroff_unused]
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Introduce a wkup_m3_ipc driver to handle communication between the MPU
and Cortex M3 wkup_m3 present on am335x.
This driver is responsible for actually booting the wkup_m3_rproc and
also handling all IPC which is done using the IPC registers in the control
module, a mailbox, and a separate interrupt back from the wkup_m3. A small
API is exposed for executing specific power commands, which include
configuring for low power mode, request a transition to a low power mode,
and status info on a previous transition.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
If enable Mediatek 8173 SoC, it should also enable power domain
driver. Otherwise access clk subsystem register will fail.
Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
For historic reasons, the tegra platform selects USB_ULPI from architecture
code, but that hasn't really made sense for a long time, as the only
user of that code is the Tegra EHCI driver that has its own Kconfig
symbol.
This removes the 'select' statements from mach-tegra and drivers/soc/tegra
and adds them with the device driver that actually needs them.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Also known as Tegra X1, the Tegra210 has four Cortex-A57 cores paired
with four Cortex-A53 cores in a switched configuration. It features a
GPU using the Maxwell architecture with support for DX11, SM4, OpenGL
4.5, OpenGL ES 3.1 and providing 256 CUDA cores. It supports hardware
accelerated en- and decoding of various video standards including
H.265, H.264 and VP8 at 4K resolutions and up to 60 fps.
Besides the multimedia features it also comes with a variety of I/O
controllers such as GPIO, I2C, SPI, SDHCI, PCIe, SATA and XHCI, to
name only a few.
Add a Kconfig option for Tegra210 to allow SoC-specific support to be
enabled for this new generation.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Move per-SoC generation Kconfig symbols to drivers/soc/tegra/Kconfig to
gather them all in a single place. This directory is a natural location
for these options since it already contains the drivers that are shared
across 32-bit and 64-bit ARM architectures.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Configure linking RAM for both queue managers also in case
when only linking RAM 0 is specified in device tree.
Currently hwqueue driver configures linking RAM(s) to be used
cooperatively by the QMs (shared mode). Therefore if both
queue managers are used then both must be configured with
exactly the same linking RAM info (base address and size)
independent of the number of linking RAM(s) specified in the
device tree.
For proper operation only one linking RAM is required and in most
cases this can be internal one as long as it is able to handle
the number of descriptors used in the system.
Current driver code however skips configuration of second
queue manager if second linking RAM is not specified.
If the configuration for the QM2 is missing there will be
a crash when it tries to push/pop descriptors from its queues.
Signed-off-by: Michal Morawiec <michal.1.morawiec.ext@nokia.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
When firmware image for PDSP firmware is absent in the file system
the kernel boot with ramfs/nfs is stuck for 60 seconds being the
the default timeout. request_firmware_direct() is to take care of
such optional firmware loading and hence replace the call in the
driver with this API.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
As we've enabled multiplatform kernels on ARM, and greatly done away with
the contents under arch/arm/mach-*, there's still need for SoC-related
drivers to go somewhere.
Many of them go in through other driver trees, but we still have
drivers/soc to hold some of the "doesn't fit anywhere" lowlevel code
that might be shared between ARM and ARM64 (or just in general makes
sense to not have under the architecture directory).
This branch contains mostly such code:
- Drivers for qualcomm SoCs for SMEM, SMD and SMD-RPM, used to communicate
with power management blocks on these SoCs for use by clock, regulator and
bus frequency drivers.
- Allwinner Reduced Serial Bus driver, again used to communicate with PMICs.
- Drivers for ARM's SCPI (System Control Processor). Not to be confused with
PSCI (Power State Coordination Interface). SCPI is used to communicate with
the assistant embedded cores doing power management, and we have yet to see
how many of them will implement this for their hardware vs abstracting in
other ways (or not at all like in the past).
- To make confusion between SCPI and PSCI more likely, this release also
includes an update of PSCI to interface version 1.0.
- Rockchip support for power domains.
- A driver to talk to the firmware on Raspberry Pi.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWQC+cAAoJEIwa5zzehBx3jEUP/0GpxfDVanEUkudVLLe7J0RH
CNlRan107Cw6hXRUJo7elEsuCALjccXjc1CAH4+RnNpOAeBKW97n+WU7trTv+wUZ
sQX4SkBPKFBlgwGF2qhsi5q74gms/BrgtCa4kNb9joOYso039tlfIOPzK80DMkOm
TkyIJdUCgFJMjCQLhX6kGT0PDcrbIjb6aA2cF3FAVeaJA7uz8lNe/eHJr3oHxIEY
CvC651yJ2mIHQUU4BJx/AJo+wXg3dRUXNCAtBjwLRPEAzduYZXYm1ZTVIby/1q9r
dR2KDFEuibODXmXrDBzKNJwCu/TLJEwo/1oPaEIVfY91XLKfiWUhgVqa1o1I+d9U
XoGPibCW461qFahjQW87MfInALpCOA7/RbTNjFp+MVyipCYvkaYq7KFiYEldgFDx
z4Qx/J4hYc2TlDWrpNiUCZMfmhwi7y+Ib+tnenYTO1eyMuw0e9mfnVdjk5iU3Pvk
Ye4qPqpYclJruyHbYi164878+1lLaW2NCUgC3rkBO/GWPAzp7d9iLWoZ3PuyD5i5
PEjs668UcRdZYbI4rdrhGHL8Eq9Gnuc4Rthu7HxPOK+DG0XgP8r97PhM8aYGYVDO
+yikBtjWRsA9fPj3rMKA3UsQ61DAeR9LmZ0XPGjWFMCjCG0JlUoIMaA+Uu0i8fr8
95qxBVxbO7rhL39r1rhV
=dm+I
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"As we've enabled multiplatform kernels on ARM, and greatly done away
with the contents under arch/arm/mach-*, there's still need for
SoC-related drivers to go somewhere.
Many of them go in through other driver trees, but we still have
drivers/soc to hold some of the "doesn't fit anywhere" lowlevel code
that might be shared between ARM and ARM64 (or just in general makes
sense to not have under the architecture directory).
This branch contains mostly such code:
- Drivers for qualcomm SoCs for SMEM, SMD and SMD-RPM, used to
communicate with power management blocks on these SoCs for use by
clock, regulator and bus frequency drivers.
- Allwinner Reduced Serial Bus driver, again used to communicate with
PMICs.
- Drivers for ARM's SCPI (System Control Processor). Not to be
confused with PSCI (Power State Coordination Interface). SCPI is
used to communicate with the assistant embedded cores doing power
management, and we have yet to see how many of them will implement
this for their hardware vs abstracting in other ways (or not at all
like in the past).
- To make confusion between SCPI and PSCI more likely, this release
also includes an update of PSCI to interface version 1.0.
- Rockchip support for power domains.
- A driver to talk to the firmware on Raspberry Pi"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (57 commits)
soc: qcom: smd-rpm: Correct size of outgoing message
bus: sunxi-rsb: Add driver for Allwinner Reduced Serial Bus
bus: sunxi-rsb: Add Allwinner Reduced Serial Bus (RSB) controller bindings
ARM: bcm2835: add mutual inclusion protection
drivers: psci: make PSCI 1.0 functions initialization version dependent
dt-bindings: Correct paths in Rockchip power domains binding document
soc: rockchip: power-domain: don't try to print the clock name in error case
soc: qcom/smem: add HWSPINLOCK dependency
clk: berlin: add cpuclk
ARM: berlin: dts: add CLKID_CPU for BG2Q
ARM: bcm2835: Add the Raspberry Pi firmware driver
soc: qcom: smem: Move RPM message ram out of smem DT node
soc: qcom: smd-rpm: Correct the active vs sleep state flagging
soc: qcom: smd: delete unneeded of_node_put
firmware: qcom-scm: build for correct architecture level
soc: qcom: smd: Correct SMEM items for upper channels
qcom-scm: add missing prototype for qcom_scm_is_available()
qcom-scm: fix endianess issue in __qcom_scm_is_call_available
soc: qcom: smd: Reject send of too big packets
soc: qcom: smd: Handle big endian CPUs
...
New and/or improved SoC support for this release:
- Marvell Berlin:
* Enable standard DT-based cpufreq
* Add CPU hotplug support
- Freescale:
* Ethernet init for i.MX7D
* Suspend/resume support for i.MX6UL
- Allwinner:
* Support for R8 chipset (used on NTC's $9 C.H.I.P board)
- Mediatek:
* SMP support for some platforms
- Uniphier:
* L2 support
* Cleaned up SMP support, etc.
+ A handful of other patches around above functionality, and a few other
smaller changes.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWQCmaAAoJEIwa5zzehBx3F/0QAKIYmvmJM3sUanNEEwhRilx+
3xhSgld7e25suLGwrNapTkd8VzVB4b8GnJhNShNk+l5WqfqICHCB4Aru2NmJHY8V
yPj5vBrgJTVMnIiH7CRDPz9IlwAkWM4MmWi4PgFuhrk1T/0wPKPNMc40OWOloTeD
gA5YmbbX1hNOqKoI/z+DK7CEdp1lHrEjeYIbnQ0SldFzkY9NKhrI784gtcz3si6E
19pFQ9LA7EtEv7aRcFOA0sazeooa2wiJ9P9L31Mn5APZBJj5H8HjyKdvOmJ8neQn
+b77Tya11Q70U57uDq69l0rl58fpy650uTwYaLNGWmUdTgOiGMWN05lvIVNrQd/R
gP+VEQDGsTH6kqOCy9gyLCmn9q9I7l0t9lwcu5TP52Xy9vqVq9rb388MkcPcsWk8
cYPvD8RcSaywZUV3YJgbYozBfVuf5rLVus6D54pMXe3N12KGaNBt8kk4co4jBwvh
b//1urA82cdlEAZ/kiqHXjRMq/ht+dxtb6sSVOJ9frxPLuc7g1z4ORC+Z0PTS5WC
zB0hMzPnTwXeqHcYpV4wP/vGtgZGpLevBkK7pKVdqKZykV8BS4FiT4HFp6Rghxs3
dxAz7JjQUle6KOX7YfuHdpLnyZFWQvLYyTn946xGKpw2QH/iWLwECpet2I87QzVs
QkEkGygPhK4QcGccxz9N
=h5xk
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Olof Johansson:
"New and/or improved SoC support for this release:
Marvell Berlin:
- Enable standard DT-based cpufreq
- Add CPU hotplug support
Freescale:
- Ethernet init for i.MX7D
- Suspend/resume support for i.MX6UL
Allwinner:
- Support for R8 chipset (used on NTC's $9 C.H.I.P board)
Mediatek:
- SMP support for some platforms
Uniphier:
- L2 support
- Cleaned up SMP support, etc.
plus a handful of other patches around above functionality, and a few
other smaller changes"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (42 commits)
ARM: uniphier: rework SMP operations to use trampoline code
ARM: uniphier: add outer cache support
Documentation: EXYNOS: Update bootloader interface on exynos542x
ARM: mvebu: add broken-idle option
ARM: orion5x: use mac_pton() helper
ARM: at91: pm: at91_pm_suspend_in_sram() must be 8-byte aligned
ARM: sunxi: Add R8 support
ARM: digicolor: select pinctrl/gpio driver
arm: berlin: add CPU hotplug support
arm: berlin: use non-self-cleared reset register to reset cpu
ARM: mediatek: add smp bringup code
ARM: mediatek: enable gpt6 on boot up to make arch timer working
soc: mediatek: Fix random hang up issue while kernel init
soc: ti: qmss: make acc queue support optional in the driver
soc: ti: add firmware file name as part of the driver
Documentation: dt: soc: Add description for knav qmss driver
ARM: S3C64XX: Use PWM lookup table for mach-smartq
ARM: S3C64XX: Use PWM lookup table for mach-hmt
ARM: S3C64XX: Use PWM lookup table for mach-crag6410
ARM: S3C64XX: Use PWM lookup table for smdk6410
...
A handful of fixes that came in and didn't seem warranted to go in through
the 4.3-rc cycle.
- MAINTAINERS updates for one of the Broadcom platforms and lpc18xx
- A couple of non-critical Davinci bugfixes
- A fix to reset irq affinity for TI platforms (silences a warning at reboot)
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWP7juAAoJEIwa5zzehBx3EVAP/AuoUkuWA/4G+ilDybXmbWls
DDeIosQOXIriAqW9Um1aoHOTtyP2WxznoYk73xiyyR92PJkXUc/9slFU6rB6b9La
3UZzGy6bo7jbjNOt6YI2yKrXWW2zCWhNIjfbcXeDC4+avnlYQjUKlKF/iXp26gG+
rRs23cIBXc2lm5vxdwu/NvqpUUcxMN577RVFdW8nTqNGCZaP/buFYzm1P8dI5N0N
KqXsJF62XbHtb911/URRLtLex3YvRqj25Jpxi2GsjzrPFALvgsW8voOKJSo3G3cH
aXYc8b0n8i+pB1oOLBICIKpNXzcnPbnPs2gNBp63/X5Dw4oVVoaU1onQxyj08TFq
PsQAqg5V0ym38tSnDmBa7p2sv6xoqrvXmOzx43/1JOjGVq991AlBMTJ4C4Vi8SCa
R0+1l/YQcj9N4omDuxhyI3M9UQrDEDyxRWsOENMDh8AZ+/07uUCK5h7mHsSInPyS
fXlORGVcAK1lIEYnOt5k8rarp+KFc+oifpaLFIIbTBhZZaDG/uT52aXkB7kj24oo
4NFpNah8bHYzriXUkHDasZIDCS39T0otYNAXlK9hesYr0Ly0+0yQG8l+CcRbG/Mk
07ZhEYDJvVvSb3uDi9VXLWmbAKqX5BHmBrYXPc0eP3lVPTeNkm5VYimYZeoBz/4e
zr+W2uM8QMxVZmGEm4iH
=iRbU
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC non-urgent fixes from Olof Johansson:
"A handful of fixes that came in and didn't seem warranted to go in
through the 4.3-rc cycle.
- MAINTAINERS updates for one of the Broadcom platforms and lpc18xx
- A couple of non-critical Davinci bugfixes
- A fix to reset irq affinity for TI platforms (silences a warning at
reboot)"
* tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
MAINTAINERS: update lpc18xx entry with more drivers
soc: ti: reset irq affinity before freeing irq
ARM: cns3xxx: pci: avoid potential stack overflow
ARM: davinci: clock: Correct return values for API functions
ARM: davinci: re-use %*ph specifier
MAINTAINERS: add entry for the Broadcom Northstar Plus SoCs
With the removal of VLAIS the size was incorrectly changed to only cover
the headers of the packet, resulting in "empty" requests being sent to
the RPM. Correct this so the entire message is transfered.
Fixes: 50e1b29b44 ("soc: qcom: smd: Remove use of VLAIS")
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This fixes the corner-case where the pmic is initialized by the bootloader, but
not the pmic watchdog.
Add support for active wakeup to the scpsys. This allows to keep the power of
a scpsys domain during suspend state.
With version v4.3 new subsystem clocks are added to the clock dirver. In late
init the kernel turns off all unused clocks. This can provoke a hang if
the kernel tries to access the venc and venc_lt power domain registers.
Add the necessary parent clocks for this power domains to
the scpsys so that no random hang happens.
The bootloader of mt6589, mt8135 and mt1827 does not turn on the arm-arch-timer.
As there is no opensource bootloader in the near future for this architectures
we enable the arch timer at kernel boot. We need the arch timer for SMP boot.
Add support for SMP on mt6589, mt8127 and mt8135.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWI4fcAAoJELQ5Ylss8dNDANYP/1hhCHTT3ssT0eURn+gGJX/e
f5J0dgX9KfJK7Ds0fznD6iMMHgp+EgK7WXI6vsO0VcbvokfS2KowS3NbeRKTnbTS
gmPOWvbFooHVIhzTom3serxyc9AgpnAG7WaRNxVD0CgaufeOlgbFtmOIdxze2cdE
S1ucq3JWJcpiCUaI3S9zRc3kkY9W/wpTEKNY98S4K3blKnWWT0sHSQxSGjoKy3wk
f1qhVjX82FeFizVSf5Ca6iqyXSFiO9gXQWvfVnS2kZE+gO/sh4df8tg8psxVqfqK
//3INxXhqkgkN4O3W+y3nUfSAQ5fElknnhiHaxAsl0PXFGMHROT3xtNR21syVkDh
dge/Eu34KyROPj68UbE2MnqnQbbSl2KbHsapT4ls8LiDWJPisjhhOmWL459eIS5X
+ycQniAxOpTgSIjYJnBwCBesru8OdfGNWRqm+SpGHyrClNtJt66/pK4AWEN2fgX4
eI8CeZ13uiuiQNmROOKRmTzSoG7ZBQMFK4g5Cy1Dl5bkGiJaednv6HnZoWqPZ4PG
isiOdsmiPsGB5GgvTpue996Nfc2kfHx2emr8+kxM8wejRWQJqmwLwTkX9bZ3dpFQ
7RGK46qN34tbJH/bgrck99Zgfg7OxChTQqVL0oTEjCCABK41clDFbguJiCV8SENw
uxtnI++cVFcUwxv7Qz0t
=iuHl
-----END PGP SIGNATURE-----
Merge tag 'v4.3-next-soc' of https://github.com/mbgg/linux-mediatek into next/soc
Do the initial setting of the pmic wrap interrupt before requesting the interrupt.
This fixes the corner-case where the pmic is initialized by the bootloader, but
not the pmic watchdog.
Add support for active wakeup to the scpsys. This allows to keep the power of
a scpsys domain during suspend state.
With version v4.3 new subsystem clocks are added to the clock dirver. In late
init the kernel turns off all unused clocks. This can provoke a hang if
the kernel tries to access the venc and venc_lt power domain registers.
Add the necessary parent clocks for this power domains to
the scpsys so that no random hang happens.
The bootloader of mt6589, mt8135 and mt1827 does not turn on the arm-arch-timer.
As there is no opensource bootloader in the near future for this architectures
we enable the arch timer at kernel boot. We need the arch timer for SMP boot.
Add support for SMP on mt6589, mt8127 and mt8135.
* tag 'v4.3-next-soc' of https://github.com/mbgg/linux-mediatek:
ARM: mediatek: add smp bringup code
ARM: mediatek: enable gpt6 on boot up to make arch timer working
soc: mediatek: Fix random hang up issue while kernel init
soc: mediatek: add scpsys support active_wakeup
soc: mediatek: Move the initial setting of pmic wrap interrupt before requesting irq.
Signed-off-by: Olof Johansson <olof@lixom.net>
Rockchip Kconfig options, fixing a possible null-pointer and a
typo in the dt-bindings.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJWIlknAAoJEPOmecmc0R2BrTkH/3w+1ZZuvtfQmzBkPwJGJ9vJ
zZFZLZqD0NADib8sOhFnJxTfxrhoE/Bfijqk4wPfjdKta2GABfljGbLDanQB8Yr9
Ip+fyflQ6cd925dEuPccHMbumZep+QuSIGYjOGFIuRbbjCdOY5MB+I2Yhvognwus
Xh4FtjS7CL6ruotmyOcMtnpNDCAvc8NSwO7xBqxYRPcgd+DY8+86cD/dUpvmD4Kr
pGtUXkfQpAjBhV9P6RuP63gO42JD1VMb7c6idd+B/tzbJxI08CTDolwqvyujVkHf
KeRvu7g8qKKUwL5ffOImR4tR/T2o1wDLwfxuUJXW+mIVJa72qA+h90aNOhM2iC8=
=Qk94
-----END PGP SIGNATURE-----
Merge tag 'v4.4-rockchip-drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers
Some fixes for the new power-domain driver, including restricting
Rockchip Kconfig options, fixing a possible null-pointer and a
typo in the dt-bindings.
* tag 'v4.4-rockchip-drivers2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
dt-bindings: Correct paths in Rockchip power domains binding document
soc: rockchip: power-domain: don't try to print the clock name in error case
soc: rockchip: Restrict to ARCH_ROCKCHIP
Signed-off-by: Olof Johansson <olof@lixom.net>
When we never got the the clock-reference, i.e. when IS_ERR(clk) is true,
don't try to print the clock name via %pC as this of course produces a
null-pointer-dereference in __clk_get_name().
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Caesar Wang <wxt@rock-chips.com>
This fixes a build error when smem is enabled without hwspinlock:
drivers/built-in.o: In function `qcom_smem_alloc':
rockchip-efuse.c:(.text+0x7a3e4): undefined reference to `__hwspin_lock_timeout'
rockchip-efuse.c:(.text+0x7a568): undefined reference to `__hwspin_unlock'
drivers/built-in.o: In function `qcom_smem_remove':
rockchip-efuse.c:(.text+0x7a5cc): undefined reference to `hwspin_lock_free'
drivers/built-in.o: In function `qcom_smem_probe':
rockchip-efuse.c:(.text+0x7a960): undefined reference to `hwspin_lock_request_specific'
rockchip-efuse.c:(.text+0x7a988): undefined reference to `of_hwspin_lock_get_id'
drivers/built-in.o: In function `qcom_smem_get':
rockchip-efuse.c:(.text+0x7aa24): undefined reference to `__hwspin_lock_timeout'
rockchip-efuse.c:(.text+0x7aafc): undefined reference to `__hwspin_unlock'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* Implement id_table driver matching in SMD
* Avoid NULL pointer exception on remove of SMEM
* Reorder SMEM/SMD configs
* Make qcom_smem_get() return a pointer
* Handle big endian CPUs correctly in SMEM
* Represent SMD channel layout in structures
* Use __iowrite32_copy() in SMD
* Remove use of VLAIs in SMD
* Handle big endian CPUs correctly in SMD/RPM
* Handle big endian CPUs corretly in SMD
* Reject sending SMD packets that are too large
* Fix endianness issue in SCM __qcom_scm_is_call_available
* Add missing prototype for qcom_scm_is_available()
* Correct SMEM items for upper channels
* Use architecture level to build SCM correctly
* Delete unneeded of_node_put in SMD
* Correct active/slep state flagging in SMD/RPM
* Move RPM message ram out of SMEM DT node
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJWHrOuAAoJEFKiBbHx2RXVam0QAIgXhMTuXLNZlJaJ1bFiRqiy
mAmGpCJl7aN9DPCYXjTzOrPHny0707fZ8lvow7KsjA0OU6JUKP2oD7uSJC9eHyRU
Mp6B/D2LKjgURozrFsjmfOLT4M+zMtuxk9GyYiBVFT8jqTsyYnlJKbWZVP2PsbMt
/1HMCuQj7Fe28Qv833P3DMgARRvT0tp32wvpfoVd91GSp2R1BfpDPN6jlaAX5fVz
8AGMHBoeNSVDDA9J1+3+RZMGKB3Isx5gVodKIkopDQiJSY15Dl32nGKG/6muLdCE
VMELu1Lsn0e5rFg6Sh8wrtSa/K3ujw929xknikM7sh3+q7bVSowJk8l8Bi/+YfvA
uL7sjXnhXypXSi45hii+81piScxkRn9o6N7ioj9KIV4Nuciky6YNN8Zr3Ycr2Z2x
heRz2Ln3A73Cmx4vxEq61lKNIx1qArY+171vsXy0PFQ9Qut4f3UuK6fwnPDL+csC
ivPPuhGwKicQ2YsvmPMGxj650H7RYALTwstKBGl58y+nhmXnCBt1Ftz7u/btWwHH
ifk7Q1qPBsxlN1RJzMOSkjJtiaHuiJY132dRROE63P4uWMGUGEWt2iHwwyJL7D0D
qefh+j4+5/EnYExfgh/lTfNt063qV0wklrHrkvD2q/iG4jAECn1mDNBmA6cLelc5
3f/27CR6w/XEUMXY6mQ2
=hprv
-----END PGP SIGNATURE-----
Merge tag 'qcom-soc-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm into next/drivers
Pull "Qualcomm ARM Based SoC Updates for 4.4" from Andy Gross:
* Implement id_table driver matching in SMD
* Avoid NULL pointer exception on remove of SMEM
* Reorder SMEM/SMD configs
* Make qcom_smem_get() return a pointer
* Handle big endian CPUs correctly in SMEM
* Represent SMD channel layout in structures
* Use __iowrite32_copy() in SMD
* Remove use of VLAIs in SMD
* Handle big endian CPUs correctly in SMD/RPM
* Handle big endian CPUs corretly in SMD
* Reject sending SMD packets that are too large
* Fix endianness issue in SCM __qcom_scm_is_call_available
* Add missing prototype for qcom_scm_is_available()
* Correct SMEM items for upper channels
* Use architecture level to build SCM correctly
* Delete unneeded of_node_put in SMD
* Correct active/slep state flagging in SMD/RPM
* Move RPM message ram out of SMEM DT node
* tag 'qcom-soc-for-4.4' of git://codeaurora.org/quic/kernel/agross-msm:
soc: qcom: smem: Move RPM message ram out of smem DT node
soc: qcom: smd-rpm: Correct the active vs sleep state flagging
soc: qcom: smd: delete unneeded of_node_put
firmware: qcom-scm: build for correct architecture level
soc: qcom: smd: Correct SMEM items for upper channels
qcom-scm: add missing prototype for qcom_scm_is_available()
qcom-scm: fix endianess issue in __qcom_scm_is_call_available
soc: qcom: smd: Reject send of too big packets
soc: qcom: smd: Handle big endian CPUs
soc: qcom: smd_rpm: Handle big endian CPUs
soc: qcom: smd: Remove use of VLAIS
soc: qcom: smd: Use __iowrite32_copy() instead of open-coding it
soc: qcom: smd: Represent channel layout in structures
soc: qcom: smem: Handle big endian CPUs
soc: qcom: Make qcom_smem_get() return a pointer
soc: qcom: Reorder SMEM/SMD configs
soc: qcom: smem: Avoid NULL pointer exception on remove
soc: qcom: smd: Implement id_table driver matching
Documentation and support to be able to load the PDSP
firmware necessary for accumulator operation.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJWHW8iAAoJEHJsHOdBp5c/9ywP/3Qpvy+kcnwMvwrnq/jxLlGk
qc+gQTAMMguenYGZmIqnyLVHG9B4UUNZ6e/uiukzCxMP1SWx8KmgKNFSQonJuFVV
wLufo+wYBTH4P8VIM5OJNkJVPqZ8YXwtVJ09LhVxYNh1vF/l6aOEQ/kaEC22f5sD
jycgKdKx3yRn67VrWiuXS1MGXIDkGR3ABCxv6iJHSKyP15HArQ6fAhyrkfP/mNkr
9YXIrX+vmMdsICfXG19R2z/lCuM+JadXz9Rjo9yMQwvUw+3QAHYy8m4JXb9cZFZq
jNZnzWQj5azuxaGnLVS1UNggsEXuxmd0S1PJvdF1N2ISHVYqwCtFuLjQ2r+z4WQm
uzo9DyPTaYtASO6iSq9MQVzKKW0r0a5dPlAJIYTJHR11xi8kOpu04KUkJUR4c1ly
X5I9zJ7ishV1VxFUZaMJtl/nX7B18WiKZyHhtO4MqRLPFA1fjH1psA/s8vRk6l6e
unawCOM5oT8KvuSyijTNq2sQlxgRJJW7S4F1P1iUxsA6nocaPdTV+Oi/aECt8mFQ
Q9gFVgCTEMWBYPuVqVisfU/mmZFPRDiotknMAeM+mUF6D/DkA0NSPvNWH0LP4rrA
kIGRHQWtJMBTdxdBhjKoCsEEk1DR0wOCTUqow77SR/H3wl1FL1EYDB2J15JD7vzM
lVTrZzd1wRXSsHINdnY6
=T5UX
-----END PGP SIGNATURE-----
Merge tag 'keystone-driver-soc_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/soc
Merge "ARM Keystone SOC driver updates for 4.4" from Santosh Shilimkar:
Documentation and support to be able to load the PDSP
firmware necessary for accumulator operation.
* tag 'keystone-driver-soc_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
soc: ti: qmss: make acc queue support optional in the driver
soc: ti: add firmware file name as part of the driver
Documentation: dt: soc: Add description for knav qmss driver
Merge "Broadcom soc changes for v4.4 (try 2)" from Florian Fainelli:
This pull request contains the following Broadcom SoC platform and driver changes:
- Brian Norris create a drivers/soc/brcmstb/ stub as a place holder for SoC-specific
code which is coming next
- Florian Fainelli adds support for configuring the BCM7xxx SoCs Bus Interface Unit
with their specific write-pairing setting, which must be saved and restored during
system-wide suspend/resume, and consequently updates the brcmstb machine code to
initialize the BIU
- Jon Mason adds support for the Northstar Plus SoCs by introducing a custom machine
descriptor matching their compatible string and setting up the PL310 L2 cache and
enabling the relevant ARM errata for their Cortex-A9
* tag 'arm-soc/for-4.4/soc' of http://github.com/Broadcom/stblinux:
ARM: brcmstb: Setup BIU control registers during boot
soc: brcmstb: Add Bus Interface Unit control setup
soc: add stubs for brcmstb SoC's
ARM: NSP: Add basic support for Broadcom Northstar Plus SoC
SMEM is a software construct built on top of a DDR reserved region
and sometimes a device memory region called RPM message ram. Having
the RPM message ram in the smem DT node's reg property leads to the
smem node being located in different places depending on if the
message ram is being used or not. Let's add a qcom specific
property, qcom,rpm-msg-ram, and point to the device memory from
the SMEM node via a phandle. As SMEM is a software construct, it
really needs to reside at the root of the DT regardless of whether
it's using the message ram or not.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
The BIT() was incorrectly inherited from family A and should not be used
on family B where the state is denoted by an enum.
Reported-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Tested-by: Georgi Djakov <georgi.djakov@linaro.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Device node iterators perform an of_node_put on each iteration, so putting
an of_node_put before a continue results in a double put.
A simplified version of the semantic match that finds this problem is as
follows (http://coccinelle.lip6.fr):
// <smpl>
@@
expression root,e;
local idexpression child;
iterator i;
@@
i(..., child, ...) {
... when != of_node_get(child)
* of_node_put(child);
...
* continue;
}
// </smpl>
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Update the SMEM items for the second set of SMD channels, as these where
incorrect.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Attempting to find room for a packet that's bigger than the fifo will
never succeed and the calling process will be sleeping forever in the
loop, waiting for enough room. So fail early instead.
Reported-by: Courtney Cavin <courtney.cavin@sonymobile.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Reviewed-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
The smd structures are always in little endian, but the smd
driver is not capable of being used on big endian CPUs. Annotate
the little endian data members and update the code to do the
proper byte swapping.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
The smd rpm structures are always in little endian, but this
driver is not capable of being used on big endian CPUs. Annotate
the little endian data members and update the code to do the
proper byte swapping.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Usage of VLAIS prevents clang from compiling this file, and it
also opens us to the possibility of allocating a large structure
on the stack to the point that we blow past the limit of the
kernel stack. Remove the VLAIS and allocate a structure on the
heap with kmalloc so that we're safer and more clang friendly.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
We already have a function to do this and it silences some sparse
warnings along the way.
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
The rx and tx channel info are laid out in memory next to each
other, and there are two types of channel info structures, byte
based and word based. We have 4 pointers to these info
structures, when we really only need two to point to the
different types of structures. Encapsulate the byte based and
word based tx/rx structures in a "channel pair" structure that
describes the layout of memory and reduces the number of pointers
in the smd channel structure by two.
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
The contents of smem are always in little endian, but the smem
driver is not capable of being used on big endian CPUs. Annotate
the little endian data members and update the code to do the
proper byte swapping.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Passing a void ** almost always requires a cast at the call site.
Instead of littering the code with casts every time this function
is called, have qcom_smem_get() return a void pointer to the
location of the smem item. This frees the caller from having to
cast the pointer.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
When I make nconfig, having the SMEM option after the SMD option
causes the configurator to get confused when I'm enabling and
disabling these options. Let's move SMEM before SMD so there's a
clear indented dependency chain.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Don't set a pointer to NULL and then dereference it in the next
line.
Cc: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Implement a id_table based driver maching mechanism for drivers that
binds to fixed channels and doesn't need any additional configuration,
e.g. IPCRTR and DIAG.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
In kernel late init, it turns off all unused clocks, which
needs to access subsystem registers such as VENC and VENC_LT.
Accessing MT8173 VENC registers needs two top clocks, mm_sel and
venc_sel. Accessing VENC_LT registers needs mm_sel and venclt_sel.
So we need to keep these clocks on before accessing their registers.
This patch keeps venc_sel / venclt_sel clock on when
VENC / VENC_LT's power is on, to prevent system hang up while
accessing its registeres.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
acc channels are available only if accumulator PDSP is loaded and
running in the SoC. As this requires firmware and user may not have
firmware in the file system, make the accumulator queue support
available in qmss driver optional. To use accumulator queus user needs
to add firmware to the file system and boot up kernel.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Currently firmware file name is included in the DTS. This is not scalable
as user has to change the DTS if they need upgrade to a new firmware.
Instead, add the firmware file name in the driver itself. As long as there
is no API change, new firmware upgrade is easy and require no driver
change. User is expected to copy the firmware image to the file system
and add a sym link to the new firmware for doing an upgrade. Driver add
a array of firmware file names to search for the available firmware blobs.
This scheme also prepare the driver for future changes to API if ever
happens. In such case it is assumed that driver needs to change to
accommodate the new firmware and new firmware file name will get added to
the array.
Also update the DT document to remove the firmware attribute and add
description about firmware in the driver documentation.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Genpd tries from a late_initcall to disable unused PM domains, which makes
it unnecessary to also manage this from any earlier phase when for example
initializing a genpd.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
By definition this directory contains drivers that are specific to the
Rockchip architecture. All Kconfig options should therefore depend on
ARCH_ROCKCHIP to avoid exposing these symbols on other architectures.
For example, this options currently shows up as new when doing an
incremental build on PowerPC.
Signed-off-by: Thierry Reding <treding@nvidia.com>
[add COMPILE_TEST alternative condition]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Broadcom STB SoCs (brcmstb) require an early setup of their Bus
Interface Unit control register, this needs to happen before SMP is
brought up because it affects how the CPU complex will be interfaced to
the memory controller.
Add support code which properly initializes the BIU registers based on
whether "brcm,write-pairing" is present in Device Tree, and take care of
saving and restoring credit register settings during system-wide
suspend/resume operations.
Acked-by: Gregory Fong <gregory.0xf0@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
support for the rk3288 powerdomain layout but can be easily
extended for the socs (including arm64) later on.
A big thanks to Ceasar Wang for pulling through on this
during 18 revisions.
Also included is a fix to the pm-clock handling in the generic
powerdomains to adapt it to the per-user clock handling we now
do, Acked by Rafael Wysocki.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQEcBAABCAAGBQJWFNeQAAoJEPOmecmc0R2BgHQH/RR/YS0IUPaeYhLr3FMVc47o
GrObw1uaNaykGSV8XYIxoxQaP+MwoW7Mw6ipfw+FLmqVGRjz8ljTIcnFrgz7hly1
CHmG6yCMjAeLh2ZMu3ge/VSQ7BdB7U690Coj5JnnfpO+Rufvu8Pp9sV+q4AH0qH2
bEfsoBoHQldTXCA5vlvH9C0CAqLDOBXWimgLRVi5TGCJjEsQINoeqJOWTl+hHnsi
arJs1sKBi71jFygsYXSZKIUnoZ1JUZofattPH8YgLeXNGUncEUYJsTTWYxm78ORt
3/iP0/mnqXnoFEqrY9Whi3IVpW60gnKUdUuAD4KK9vx1feT0bwLtVf/0lpCNXf8=
=txXq
-----END PGP SIGNATURE-----
Merge tag 'v4.4-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers
Merge "Rockchip power-domain drivers for 4.4" from Heiko Stuebner:
Add the power-domain base-driver which currently contains
support for the rk3288 powerdomain layout but can be easily
extended for the socs (including arm64) later on.
A big thanks to Ceasar Wang for pulling through on this
during 18 revisions.
Also included is a fix to the pm-clock handling in the generic
powerdomains to adapt it to the per-user clock handling we now
do, Acked by Rafael Wysocki.
* tag 'v4.4-rockchip-drivers1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
soc: rockchip: power-domain: Add power domain driver
dt-bindings: add document of Rockchip power domains
PM / clk: Do not __clk_get passed in clock-references
dt-bindings: add power-domain header for RK3288 SoCs
This driver is found on RK3288 SoCs.
In order to meet high performance and low power requirements, a power
management unit is designed or saving power when RK3288 in low power
mode.
The RK3288 PMU is dedicated for managing the power of the whole chip.
PMU can work in the Low Power Mode by setting bit[0] of PMU_PWRMODE_CON
register. After setting the register, PMU would enter the Low Power mode.
In the low power mode, pmu will auto power on/off the specified power
domain, send idle req to specified power domain, shut down/up pll and
so on. All of above are configurable by setting corresponding registers.
Signed-off-by: Caesar Wang <wxt@rock-chips.com>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
[replace dsb() with dsb(sy) for arm64 buildability; sy is the default,
so no functional change; adapt to per-user clocks in genpd]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Register gpd_dev_ops.active_wakeup function to support keep power
during suspend state. And add flag to each power domain to
decide whether keep power during suspend or not.
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Eddie Huang <eddie.huang@mediatek.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The watchdog may not be initialized by the bootloader, even if the rest
of the pwrap is. Move the watchdog initialization out of pwrap_init() to
make sure the watchdog is always initialized and not only when the pwrap
is uninitialized.
Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Most interrupt flow handlers do not use the irq argument. Those few
which use it can retrieve the irq number from the irq descriptor.
Remove the argument.
Search and replace was done with coccinelle and some extra helper
scripts around it. Thanks to Julia for her help!
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
The irq argument of most interrupt flow handlers is unused or merily
used instead of a local variable. The handlers which need the irq
argument can retrieve the irq number from the irq descriptor.
Search and update was done with coccinelle and the invaluable help of
Julia Lawall.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Search and replace done with coccinelle
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Julia Lawall <Julia.Lawall@lip6.fr>
Cc: Jiang Liu <jiang.liu@linux.intel.com>
This is a collection of a few late fixes and other misc. stuff that
had dependencies on things being merged from other trees.
The bulk of the changes are for samsung/exynos SoCs for some changes
that needed a few minor reworks so ended up a bit late. The others
are mainly for qcom SoCs: a couple fixes and some DTS updates.
There's one conflict with drivers/cpufreq/exynos-cpufreq.c because
it's now been completely removed, but there were some fixes that hit
mainline in the meantime.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIbBAABAgAGBQJV8fkAAAoJEFk3GJrT+8Zllf8P9jj3+TnvbJS/8bWoQoB7BRUZ
LZPgi2+sBXylrBV60uQdyodiTHQUMZhbL7GvgEVG0z6yyin7nyijqNkulTbQbWmg
WhumLNCNcs8vlZegA/corbwgcVC7FkjOP97HveTe2mgwZ+GaXj9qMRQzBsMqSXEo
4890ZeP1nWBTP42oXOQHkNyKWFBjuERK0dTw2MXj7WE0/Ag8i7ERp76uJQdQ7V5O
BpNRwxp3vSCky8rxbpD/avWdlspv1yZGBQyLeIreVq2YQFojvT36K8wHcf6iWBT/
pzGGV/uZM7MnrGZdqSfVEMDHl7Z2s7Ls+sv5F6Md7ErnVDerHGRjw/6lJDjbeH7u
trucpsuhz5yhTjpZssGHH2NT8pWxxh8M+AaNOiiH8PuYESAbPAmWLpWkn+648bIn
P++Z90DIyfNEqnNSMHkcQYpVt8zc4g75gZfTIIsXLB+DLgzgSK8ergrfyRN/O0zj
oFY35g3wHdgisnGve+BAW30zTZtP19TMT36OltWjIkjuRZC29PS2vkH8eTETdVXx
01f/qcpbB1L1rXfIBjNkjx81j89XPd68JIBfctTF5QBOAGm/Dix6tj2mU/N7TNu5
TrBmD3CXdOQbCPaoK/qWX7/b11IN/XOlGL06hhYwbSdvCVy7rNccApXvfnrDWziK
Ly923FP1OB7h0Kk1cmo=
=85Ck
-----END PGP SIGNATURE-----
Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull late ARM SoC updates from Kevin Hilman:
"This is a collection of a few late fixes and other misc stuff that had
dependencies on things being merged from other trees.
The bulk of the changes are for samsung/exynos SoCs for some changes
that needed a few minor reworks so ended up a bit late. The others
are mainly for qcom SoCs: a couple fixes and some DTS updates"
* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (37 commits)
ARM: multi_v7_defconfig: Enable PBIAS regulator
soc: qcom: smd: Correct fBLOCKREADINTR handling
soc: qcom: smd: Use correct remote processor ID
soc: qcom: smem: Fix errant private access
ARM: dts: qcom: msm8974-sony-xperia-honami: Use stdout-path
ARM: dts: qcom: msm8960-cdp: Use stdout-path
ARM: dts: qcom: msm8660-surf: Use stdout-path
ARM: dts: qcom: ipq8064-ap148: Use stdout-path
ARM: dts: qcom: apq8084-mtp: Use stdout-path
ARM: dts: qcom: apq8084-ifc6540: Use stdout-path
ARM: dts: qcom: apq8074-dragonboard: Use stdout-path
ARM: dts: qcom: apq8064-ifc6410: Use stdout-path
ARM: dts: qcom: apq8064-cm-qs600: Use stdout-path
ARM: dts: qcom: Label serial nodes for aliasing and stdout-path
reset: ath79: Fix missing spin_lock_init
reset: Add (devm_)reset_control_get stub functions
ARM: EXYNOS: switch to using generic cpufreq driver for exynos4x12
cpufreq: exynos: Remove unselectable rule for arm-exynos-cpufreq.o
ARM: dts: add iommu property to JPEG device for exynos4
ARM: dts: enable SPI1 for exynos4412-odroidu3
...
fBLOCKREADINTR is masking the notification from the remote and should
hence be cleared while we're waiting the tx fifo to drain. Also change
the reset state to mask the notification, as send is the only use case
where we're interested in it.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This patch fixes SMEM addressing issues when remote processors need to use
secure SMEM partitions.
Signed-off-by: Andy Gross <agross@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
This patch corrects private partition item access. Instead of falling back to
global for instances where we have an actual host and remote partition existing,
return the results of the private lookup.
Signed-off-by: Andy Gross <agross@codeaurora.org>
Some releases this branch is nearly empty, others we have more stuff. It
tends to gather drivers that need SoC modification or dependencies such
that they have to (also) go in through our tree.
For this release, we have merged in part of the reset controller tree
(with handshake that the parts we have merged in will remain stable),
as well as dependencies on a few clock branches.
In general, new items here are:
- Qualcomm driver for SMM/SMD, which is how they communicate with the
coprocessors on (some) of their platforms
- Memory controller work for ARM's PL172 memory controller
- Reset drivers for various platforms
- PMU power domain support for Marvell platforms
- Tegra support for T132/T210 SoCs: PMC, fuse, memory controller per-SoC support
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJV5Ou9AAoJEIwa5zzehBx3/k4P/jA5CVNiDvIs0GoTR3uGOuec
MYd19oKf76reV1oL5bBSpg9uryJd3fPzK0JC/qU3pYfsCVFp2TWZD7liNpitqHyt
2xL02gzJQgjHzL3QrxTQrOFJDO6P8Vm2k/5pI0KX1beoulHvI+iHejNryXGjSKSx
9vbs1GPXU9IV831YOHSaMmHz727J65bbZE8Up113ctT+WbEIc1g/ihKzUgi/8xXW
RniMxGsX8HynE3VH+UBDMbY6XkOmzZa1Wabgll735MXwIUFG1+TsvHNuGehXUski
ySwqk67en25i0F/Q7oobLSZwCPbA6Ylxk9aOfr0AnAqOEKwgKWS+K7HkEiNMz7yh
nt22b5SVkQ80sTCbNEkdJajOZ8oRalUae19CGxvMfVh77LmQ2sRI9iJrwXcxkt8W
ASs6uDDAUNC5pIWfjeJE50vsDr//Hed/WtsIjenYOtb+RI1kru5iTTgp4oLPBiy5
OeHxOfiL7gPvyZQbuPgMKAGdoGBsa/7wTM7KWJCMP6mPGHpShO8XUUsuljqKHm4w
nBV7eZRMiIuWkjRKw4bjp7R0NVKR5sOfAkZhjCsXB0aqA/NU2zyNbViWcGCh6yj8
3beZ93SdEdrKX6N8pPiAhGTMFA6eev8YeUHO7kM4IhC91ILjHlPpCs1pYk3pwEkO
ABC7GyMY6Olg1pZJweEa
=B6jn
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"Some releases this branch is nearly empty, others we have more stuff.
It tends to gather drivers that need SoC modification or dependencies
such that they have to (also) go in through our tree.
For this release, we have merged in part of the reset controller tree
(with handshake that the parts we have merged in will remain stable),
as well as dependencies on a few clock branches.
In general, new items here are:
- Qualcomm driver for SMM/SMD, which is how they communicate with the
coprocessors on (some) of their platforms
- memory controller work for ARM's PL172 memory controller
- reset drivers for various platforms
- PMU power domain support for Marvell platforms
- Tegra support for T132/T210 SoCs: PMC, fuse, memory controller
per-SoC support"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (49 commits)
ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze()
ARM: tegra: Disable cpuidle if PSCI is available
soc/tegra: pmc: Use existing pclk reference
soc/tegra: pmc: Remove unnecessary return statement
soc: tegra: Remove redundant $(CONFIG_ARCH_TEGRA) in Makefile
memory: tegra: Add Tegra210 support
memory: tegra: Add support for a variable-size client ID bitfield
clk: shmobile: rz: Add CPG/MSTP Clock Domain support
clk: shmobile: rcar-gen2: Add CPG/MSTP Clock Domain support
clk: shmobile: r8a7779: Add CPG/MSTP Clock Domain support
clk: shmobile: r8a7778: Add CPG/MSTP Clock Domain support
clk: shmobile: Add CPG/MSTP Clock Domain support
ARM: dove: create a proper PMU driver for power domains, PMU IRQs and resets
reset: reset-zynq: Adding support for Xilinx Zynq reset controller.
docs: dts: Added documentation for Xilinx Zynq Reset Controller bindings.
MIPS: ath79: Add the reset controller to the AR9132 dtsi
reset: Add a driver for the reset controller on the AR71XX/AR9XXX
devicetree: Add bindings for the ATH79 reset controller
reset: socfpga: Update reset-socfpga to read the altr,modrst-offset property
doc: dt: add documentation for lpc1850-rgu reset driver
...
This contains a bit more of Tegra210 support, which is shaping up pretty
nicely. Other than that there are a couple of cleanup patches here, too.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iQIcBAABCAAGBQJVzfFHAAoJEN0jrNd/PrOhvF0QAK6TZ/mSuK5sWsF2LWY/yCk1
sbS5NpOkP0Js+39CZFfRJXOeAlopyeA8UEAnmobyUIprYQWoK0iE4y0q+Iy6nn72
tZdsZlz87dUM/CYjT+AyPK7aUILB1s3dLjul+Lua5mAhUCwju+HHdHgm6OI5c/GN
4W5T3ysfF7aDy+o8a85YLPaPwhP36yTy6x3cx9lLvmFIKVgwWIn+cuOJOpaziy3W
frh7v26Vjl5Ja8Ml1LZd5TQhWJBzsSAIr81PJnk8nNliKspASw6a+hWvTkd2vMll
4qN9sekg55xeGk9lDJeesOmc2dmE4m1r0kg1aVcnpno/oy1k3VicHXfrI/AoN96w
cwRPHwAny9V5wW9vR5WojyGEuGojr/tbHVPGVMAhv+nw1Vod2A9iO5yNJyOs5a96
G6+YZNWwKJRecvQu+3SbhKKjSJoe66Ac36qTlTYjCiwVdcBceBMiqHl4sEslxLd9
pzrI6xjBlyqBcxdBeunKi6CoSeXRVv8HqO7lKLSBDMeMJQD3utYBhGgR59B0sI6P
sSyzPmPpv91YuXXJ2xhtRkFmBrW3KmN9ot8JgsfmzCxgef3zUa6vxOVrSGIbmWGB
qzB4V0X8GOVoZNejFLx+LGLHXeW6wdOJ3n6vqvZjaFTTeYz9kDm9Y3EUBXxX6hzs
ULBUWV18Nh/YDUIZIaV8
=xo46
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-4.3-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
ARM: tegra: Core SoC changes for v4.3-rc1
This contains a bit more of Tegra210 support, which is shaping up pretty
nicely. Other than that there are a couple of cleanup patches here, too.
* tag 'tegra-for-4.3-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: cpuidle: implement cpuidle_state.enter_freeze()
ARM: tegra: Disable cpuidle if PSCI is available
soc/tegra: pmc: Use existing pclk reference
soc/tegra: pmc: Remove unnecessary return statement
soc: tegra: Remove redundant $(CONFIG_ARCH_TEGRA) in Makefile
soc/tegra: fuse: Add spare bit offset for Tegra210
soc/tegra: fuse: Add spare bit offset for Tegra124
soc/tegra: fuse: Add spare bit offset for Tegra114
soc/tegra: fuse: Rename core_* to soc_*
soc/tegra: fuse: Add Tegra210 support
soc/tegra: fuse: Unify Tegra20 and Tegra30 drivers
soc/tegra: fuse: Restrict legacy code to 32-bit ARM
soc/tegra: pmc: Add Tegra210 support
soc/tegra: pmc: Restrict legacy code to 32-bit ARM
soc/tegra: pmc: Avoid usage of uninitialized variable
soc/tegra: Add Tegra210 support
soc/tegra: Add Tegra132 support
Signed-off-by: Olof Johansson <olof@lixom.net>
The driver requests the pclk clock at probe time already and stores its
reference to it in struct tegra_pmc, so there is no need to look it up
everytime it is needed. Use the existing reference instead.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Kbuild descends into drivers/soc/tegra/ only when CONFIG_ARCH_TEGRA
is enabled. (see drivers/soc/Makefile)
$(CONFIG_ARCH_TEGRA) in drivers/soc/tegra/Makefile always evaluates
to 'y'.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The PMU device contains an interrupt controller, power control and
resets. The interrupt controller is a little sub-standard in that
there is no race free way to clear down pending interrupts, so we try
to avoid problems by reducing the window as much as possible, and
clearing as infrequently as possible.
The interrupt support is implemented using an IRQ domain, and the
parent interrupt referenced in the standard DT way.
The power domains and reset support is closely related - there is a
defined sequence for powering down a domain which is tightly coupled
with asserting the reset. Hence, it makes sense to group these two
together, and in order to avoid any locking contention disrupting this
sequence, we avoid the use of syscon or regmap.
This patch adds the core PMU driver: power domains must be defined in
the DT file in order to make use of them. The reset controller can
be referenced in the standard way for reset controllers.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
SCPSYS driver misses the module.h include which makes it fail
when compiling with allmodconf.
This patch fixes this.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Olof Johansson <olof@lixom.net>
Driver for the Resource Power Manager (RPM) found in Qualcomm 8974 based
devices.
The driver exposes resources that child drivers can operate on; to
implementing regulator, clock and bus frequency drivers.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
This adds the Qualcomm Shared Memory Driver (SMD) providing
communication channels to remote processors, ontop of SMEM.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Andy Gross <agross@codeaurora.org>
Enable QCOM_SCM for QCOM power management driver
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
The Shared Memory Manager driver implements an interface for allocating
and accessing items in the memory area shared among all of the
processors in a Qualcomm platform.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Acked-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Andy Gross <agross@codeaurora.org>
The offset of the first spare bit register on Tegra210 is 0x380, but
account for the fixed offset of 0x100 in the fuse accessor.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The offset of the first spare bit register on Tegra124 is 0x300, but
account for the fixed offset of 0x100 in the fuse accessor.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The offset of the first spare bit register on Tegra114 is 0x280, but
account for the fixed offset of 0x100 in the fuse accessor.
Signed-off-by: Thierry Reding <treding@nvidia.com>
There's a mixture of core_* and soc_* prefixes for variables storing
information related to the VDD_CORE rail. Choose one (soc_*) and use it
more consistently.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Unifying the drivers makes it easier to restrict the legacy probing
paths to 32-bit ARM. This in turn will come in handy as support for
new 64-bit ARM SoCs is added.
Signed-off-by: Thierry Reding <treding@nvidia.com>
For backwards-compatibility with old device trees, if no APBMISC node
exists this driver hard-codes the I/O memory region. All 64-bit ARM
device tree files are recent enough that they can be required to have
this node, and therefore the legacy code path is not required.
Based on work done by Paul Walmsley <pwalmsley@nvidia.com>.
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra210 uses a power management controller that is compatible with
earlier SoC generations but adds a couple of power partitions for new
hardware blocks.
Reviewed-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
For backwards-compatibility with old device trees, if no PMC node exists
this driver hard-codes the I/O memory region. All 64-bit ARM device tree
files are recent enough that they can be required to have this node, and
therefore the legacy code path is not required on 64-bit ARM.
Based on work done by Paul Walmsley <pwalmsley@nvidia.com>.
Cc: Paul Walmsley <pwalmsley@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Make sure to only drop the reference to the OF node after it's been
successfully obtained.
Fixes: 3568df3d31 ("soc: tegra: Add thermal reset (thermtrip) support to PMC")
Cc: <stable@vger.kernel.org> # v4.0+
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
platform_driver does not need to set an owner because
platform_driver_register() will set it.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This adds a power domain driver for the Mediatek SCPSYS unit.
The System Control Processor System (SCPSYS) has several power
management related tasks in the system. The tasks include thermal
measurement, dynamic voltage frequency scaling (DVFS), interrupt
filter and lowlevel sleep control. The System Power Manager (SPM)
inside the SCPSYS is for the MTCMOS power domain control.
For now this driver only adds power domain support, the more
advanced features are not yet supported. The driver implements
the generic PM domain device tree bindings, the first user will
most likely be the Mediatek AFE audio driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This adds support for some miscellaneous bits of the infracfg controller.
The mtk_infracfg_set/clear_bus_protection functions are necessary for
the scpsys power domain driver to handle the bus protection bits which
are contained in the infacfg register space.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This is a collection of a few late fixes and other misc. stuff that
had dependencies on things being merged from other trees.
Other than the fixes, the primary feature being added is the
conversion of some OMAP drivers to the new generic wakeirq interface.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVlXl/AAoJEFk3GJrT+8ZlDccQAJ5vxvImNvJmoqeCv+6Tkshm
UOGtoTBWKu+1wVgvYvYWXbNL06NKtS1c/CP8CZE0V6XdLQ+EHd4RWsHyRLHi4xwS
6qqtwVfqYwFLli++87NKqzizl01a0eImPiHl5Rwo9oFy0u81+lsivwWbCBk+Dh0n
HtkmuKzWnKSYL3rgnApq1USL4dhbc6SbNYo0pwvZXNDTK57FrQN/2Z2Pl1FZS9RQ
BQgnqDSdhvF5PD/fWJ5KHs2k2WDtjMMN2TgVMtMjMg2x5kSMAN6fBwi49wYgcwUz
ndHtuHosX4BkPgDHvzIv7jRCYHeRaHOYxbPG+tzYXci4gXUUEn3i8jte91Hb3+ri
tDcgAnod+R1SoBmSRdj/nqM7Y8Qw7Pnjo2tuKYfb1NFaX5KtjrjaaDx/09G7PD+U
fw400HKPi4r2h11n96Y5MZUbLv9XgB9BAePmIdNLuQZabFc1DcsUOG9JbRsMArRT
5g6Sk+Lar9FGH32fLk5sGEAroFs52YmGmLviHKiAsbBSOV751SN2AcA8NDXBuKI1
L+hC41NslENztHTgLsmEt6YY4H/4+jW66du5GYc4ZkPd1scO2+esXDzPZ864vxo+
rIIMnRNQHb2hGiNvImyzEt2NgelSk/xKQR5Dl6MNiKCmiyw2XHlR5UTkRRBZXDd+
5T1KnOvKE2THuxWyWARH
=bhUU
-----END PGP SIGNATURE-----
Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late fixes and dependencies from Kevin Hilman:
"This is a collection of a few late fixes and other misc stuff that had
dependencies on things being merged from other trees.
Other than the fixes, the primary feature being added is the
conversion of some OMAP drivers to the new generic wakeirq interface"
* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: multi_v7_defconfig: Enable BRCMNAND driver
ARM: BCM: Do not select CONFIG_MTD_NAND_BRCMNAND
ARM: at91/dt: update udc compatible strings
ARM: at91/dt: trivial: fix USB udc compatible string
arm64: dts: Add APM X-Gene standby GPIO controller DTS entries
soc: qcom: spm: Fix idle on THUMB2 kernels
ARM: dove: fix legacy dove IRQ numbers
ARM: mvebu: fix suspend to RAM on big-endian configurations
ARM: mvebu: adjust Armada XP DT spi muxing after pinctrl function rename
serial: 8250_omap: Move wake-up interrupt to generic wakeirq
serial: omap: Switch wake-up interrupt to generic wakeirq
mmc: omap_hsmmc: Change wake-up interrupt to use generic wakeirq
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVkO9lAAoJEOvOhAQsB9HWRV4P/jYrQm/S14ZfbwzqwV2w5xh+
E1SHk+kjcLyIvG6JXknp8mlNFGFhsIZNhTq8wvYBmFHlkop9jlMqT3IwaV7y9baV
NmxltPHVIgFhnPMBF6+nvMJVFe0oBXh3adwc02h/LcXauEPK98Na/BtAfX5nxmoy
DO/9R+R3SxqShSHvQqM6JNu3M/xAxU7RRSMsthF3nZJfZEm5i7Sl9w6Zcmu67gEn
KbAPmthHSzDvJZGPt6xQiR2OPvhdA2Ddxjey0/cLyl/IVd2DdUTUUHDY0lUpPd3A
Ba6C6OaWoHbCoAVzGvXEJLP1CfuF5upTmo53FZ2+1fERzX7Co4E2xInq6qkpWK5+
cLcqCZaxHXvmvmidrfTaJQ52dLseGAH5KsiDoR8m5RcsCMrK367V6ja5/A2UG+xW
FVJzU7/1LRHzw17si/AcrD0Q3hFR0n6klEGS3E964fsyOuCYlSc77IspxZ7nF4QW
cFKKweyAUdrmrlduS7rKxX4z/ne4ljbR1M82YxFVPWqg/n2cqQ4e9RQFeK8ogBe6
ASXu6pmz03X5xoD7xPQEsVzjDDGPzGFdD/601j9cRJ0+TR9udECP776gXt+5Ml0L
jWlhVGbt7BN64UFZ/kInGo1h6cS+JjlrBfNq6eZVQP78bZ5UWdyiupGzcLcixefN
bnkl2MHHY/d6yk2Rs7zh
=WLBw
-----END PGP SIGNATURE-----
Merge tag 'module-builtin_driver-v4.1-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux
Pull module_platform_driver replacement from Paul Gortmaker:
"Replace module_platform_driver with builtin_platform driver in non
modules.
We see an increasing number of non-modular drivers using
modular_driver() type register functions. There are several downsides
to letting this continue unchecked:
- The code can appear modular to a reader of the code, and they won't
know if the code really is modular without checking the Makefile
and Kconfig to see if compilation is governed by a bool or
tristate.
- Coders of drivers may be tempted to code up an __exit function that
is never used, just in order to satisfy the required three args of
the modular registration function.
- Non-modular code ends up including the <module.h> which increases
CPP overhead that they don't need.
- It hinders us from performing better separation of the module init
code and the generic init code.
So here we introduce similar macros for builtin drivers. Then we
convert builtin drivers (controlled by a bool Kconfig) by making the
following type of mapping:
module_platform_driver() ---> builtin_platform_driver()
module_platform_driver_probe() ---> builtin_platform_driver_probe().
The set of drivers that are converted here are just the ones that
showed up as relying on an implicit include of <module.h> during a
pending header cleanup. So we convert them here vs adding an include
of <module.h> to non-modular code to avoid compile fails. Additonal
conversions can be done asynchronously at any time.
Once again, an unused module_exit function that is removed here
appears in the diffstat as an outlier wrt all the other changes"
* tag 'module-builtin_driver-v4.1-rc8' of git://git.kernel.org/pub/scm/linux/kernel/git/paulg/linux:
drivers/clk: convert sunxi/clk-mod0.c to use builtin_platform_driver
drivers/power: Convert non-modular syscon-reboot to use builtin_platform_driver
drivers/soc: Convert non-modular soc-realview to use builtin_platform_driver
drivers/soc: Convert non-modular tegra/pmc to use builtin_platform_driver
drivers/cpufreq: Convert non-modular s5pv210-cpufreq.c to use builtin_platform_driver
drivers/cpuidle: Convert non-modular drivers to use builtin_platform_driver
drivers/platform: Convert non-modular pdev_bus to use builtin_platform_driver
platform_device: better support builtin boilerplate avoidance
The ifc6410 firmware always enters the kernel in ARM state from
deep idle. Use the cpu_resume_arm() wrapper instead of
cpu_resume() to property switch into the THUMB2 state when we
wake up from idle.
This fixes a problem reported by Kevin Hilman on next-20150601
where the ifc6410 fails to boot a THUMB2 kernel because the
platform's firmware always enters the kernel in ARM mode from
deep idle states.
Reported-by: Kevin Hilman <khilman@linaro.org>
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Lina Iyer <lina.iyer@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Some of these are for drivers/soc, where we're now putting
SoC-specific drivers these days. Some are for other driver subsystems
where we have received acks from the appropriate maintainers.
Some highlights:
- simple-mfd: document DT bindings and misc updates
- migrate mach-berlin to simple-mfd for clock, pinctrl and reset
- memory: support for Tegra132 SoC
- memory: introduce tegra EMC driver for scaling memory frequency
- misc. updates for ARM CCI and CCN busses
Conflicts:
arch/arm64/boot/dts/arm/juno-motherboard.dtsi
Trivial add/add conflict with our dt branch.
Resolution: take both sides.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVi4RRAAoJEFk3GJrT+8ZljIcQAIsqxM/o0drd90xTJ6ex9h0B
RmqVLTDgesHmBacJ+SBsa9/ybFIM1uErByftc1dmKankEQVXW3wcH7keQnoStPT2
zTEjadHgZ/ARYjV/oG5oohjfDZpO1kECVHL8O8RmcWxgzRB3az1IW2eD+dzrga/Y
R7K6D8rDHMADIUmv0e0DzvQEbSUYdCx3rBND1qZznwZDP3NoivLkOG5MTraccLbQ
ouCRoZtyNYD5Lxk+BHLBepnxAa0Ggc6IjEmiUv8fF2OYdu0OruMliT4rcAtOSmzg
2Y7pP85h8u0CxbJDkOyc+2BELyKo7Hv97XtDNNbRYABTMXdskRIadXt4Sh4mwFtM
nvlhB4ovbIX7noECJToEkSAgmStLSUwA3R6+DVdLbeQY4uSuXuTRhiWHMyQB6va9
CdjJDk2RE0dZ77c5ZoUnUDtBe4cULU/n4agpYkKMf/HcpnqMUwZzP4KZbbPMBpgL
0CVTt3YrEcjoU7g0SFHhOGPSgl4yIXKU2eHEscokyFYLrS5zRWepmUEmlSoaWn+W
p7pJE65TvOGf2xbaWI+UBeK/3ZG7XAP8qUfhsi7NS4bV6oFCk/foqsWAuru0H7OW
2Gk8fuF0qLgE1eFWQp8BHZ4IUeytoWbnGhhHXh8zH39SKAVncOiAGDNfuEP9CyXJ
fZFfruYrnz2emOwj2v9m
=02Gm
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Kevin Hilman:
"Some of these are for drivers/soc, where we're now putting
SoC-specific drivers these days. Some are for other driver subsystems
where we have received acks from the appropriate maintainers.
Some highlights:
- simple-mfd: document DT bindings and misc updates
- migrate mach-berlin to simple-mfd for clock, pinctrl and reset
- memory: support for Tegra132 SoC
- memory: introduce tegra EMC driver for scaling memory frequency
- misc. updates for ARM CCI and CCN busses"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (48 commits)
drivers: soc: sunxi: Introduce SoC driver to map SRAMs
arm-cci: Add aliases for PMU events
arm-cci: Add CCI-500 PMU support
arm-cci: Sanitise CCI400 PMU driver specific code
arm-cci: Abstract handling for CCI events
arm-cci: Abstract out the PMU counter details
arm-cci: Cleanup PMU driver code
arm-cci: Do not enable CCI-400 PMU by default
firmware: qcom: scm: Add HDCP Support
ARM: berlin: add an ADC node for the BG2Q
ARM: berlin: remove useless chip and system ctrl compatibles
clk: berlin: drop direct of_iomap of nodes reg property
ARM: berlin: move BG2Q clock node
ARM: berlin: move BG2CD clock node
ARM: berlin: move BG2 clock node
clk: berlin: prepare simple-mfd conversion
pinctrl: berlin: drop SoC stub provided regmap
ARM: berlin: move pinctrl to simple-mfd nodes
pinctrl: berlin: prepare to use regmap provided by syscon
reset: berlin: drop arch_initcall initialization
...
Our SoC branch usually contains expanded support for new SoCs and
other core platform code. Some highlights from this round:
- sunxi: SMP support for A23 SoC
- socpga: big-endian support
- pxa: conversion to common clock framework
- bcm: SMP support for BCM63138
- imx: support new I.MX7D SoC
- zte: basic support for ZX296702 SoC
Conflicts:
arch/arm/mach-socfpga/core.h
Trivial remove/remove conflict with our cleanup branch.
Resolution: remove both sides
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVi4RMAAoJEFk3GJrT+8Zl6/kP/1Rv9O++1Kxua6R54Og6AF1J
0miFr2fnUrUWUYg/NVbseRH5bBe6N6ir3SQMfde8W2/QibEjOoEwSwrle+mC/eiq
CE0x0gtyRvXMrMU/FWkOvbmmw9uv5oz1z3IHZV6AiecNuSMLUBPfamryikQ8C+d1
O/QZtX543tJQJDOBihO5cuhoVVM37UX0unNmqGsyswlyqTPF8FxcIJAYVNtnxjmj
AFaOB0nDJKLKFTiX2Ype2wOxxJX1lrLatNo4W4T+YaaK+i1uCOhgTdSN+n49K7YA
KNDFEgZFQqT8VMJyG+eJVeYF+cI7yWQ7lBzIftPUjPk/7+dIHBjWPz2QdjVz3U38
kxncf4S9xGAF5G2rcKe4mFrfT3Y8QLWQpA/jFs06yLwW1O3Hlfq3DzMdGNcF7hth
17LOP8namn9+NepZEp/vAlFzRRypxWWtbkPNBIItkImC6zn0IiGjBy50DE1io27W
hmQcnMb7d+0wWl2Y8OmR2lZSB97JiRZkRYMCVHVt+0zGJzp4prLvl9wbjh1VXkPv
ERCDJ9nCmZsl7ZVmIXMI7KNXYuPNp7R/QAzCvuSUueswF0qxTAQ0VSSBwRMqvQsQ
UUNC6p63VnjUeMUdn2EBsUQZ0Uqw3t2U5TtvooHNt9FkiGsSpwjWrvVD+LItaPoJ
GPeeJrJaYQsDvTrO8wjU
=ZtPK
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform support updates from Kevin Hilman:
"Our SoC branch usually contains expanded support for new SoCs and
other core platform code. Some highlights from this round:
- sunxi: SMP support for A23 SoC
- socpga: big-endian support
- pxa: conversion to common clock framework
- bcm: SMP support for BCM63138
- imx: support new I.MX7D SoC
- zte: basic support for ZX296702 SoC"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (134 commits)
ARM: zx: Add basic defconfig support for ZX296702
ARM: dts: zx: add an initial zx296702 dts and doc
clk: zx: add clock support to zx296702
dt-bindings: Add #defines for ZTE ZX296702 clocks
ARM: socfpga: fix build error due to secondary_startup
MAINTAINERS: ARM64: EXYNOS: Extend entry for ARM64 DTS
ARM: ep93xx: simone: support for SPI-based MMC/SD cards
MAINTAINERS: update Shawn's email to use kernel.org one
ARM: socfpga: support suspend to ram
ARM: socfpga: add CPU_METHOD_OF_DECLARE for Arria 10
ARM: socfpga: use CPU_METHOD_OF_DECLARE for socfpga_cyclone5
ARM: EXYNOS: register power domain driver from core_initcall
ARM: EXYNOS: use PS_HOLD based poweroff for all supported SoCs
ARM: SAMSUNG: Constify platform_device_id
ARM: EXYNOS: Constify irq_domain_ops
ARM: EXYNOS: add coupled cpuidle support for Exynos3250
ARM: EXYNOS: add exynos_get_boot_addr() helper
ARM: EXYNOS: add exynos_set_boot_addr() helper
ARM: EXYNOS: make exynos_core_restart() less verbose
ARM: EXYNOS: fix exynos_boot_secondary() return value on timeout
...
Some of these are for drivers/soc, where we're now putting
SoC-specific drivers these days. Some are for other driver subsystems
where we have received acks from the appropriate maintainers.
Some highlights:
- simple-mfd: document DT bindings and misc updates
- migrate mach-berlin to simple-mfd for clock, pinctrl and reset
- memory: support for Tegra132 SoC
- memory: introduce tegra EMC driver for scaling memory frequency
- misc. updates for ARM CCI and CCN busses
Conflicts:
arch/arm64/boot/dts/arm/juno-motherboard.dtsi
Trivial add/add conflict with our dt branch.
Resolution: take both sides.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVi4RRAAoJEFk3GJrT+8ZljIcQAIsqxM/o0drd90xTJ6ex9h0B
RmqVLTDgesHmBacJ+SBsa9/ybFIM1uErByftc1dmKankEQVXW3wcH7keQnoStPT2
zTEjadHgZ/ARYjV/oG5oohjfDZpO1kECVHL8O8RmcWxgzRB3az1IW2eD+dzrga/Y
R7K6D8rDHMADIUmv0e0DzvQEbSUYdCx3rBND1qZznwZDP3NoivLkOG5MTraccLbQ
ouCRoZtyNYD5Lxk+BHLBepnxAa0Ggc6IjEmiUv8fF2OYdu0OruMliT4rcAtOSmzg
2Y7pP85h8u0CxbJDkOyc+2BELyKo7Hv97XtDNNbRYABTMXdskRIadXt4Sh4mwFtM
nvlhB4ovbIX7noECJToEkSAgmStLSUwA3R6+DVdLbeQY4uSuXuTRhiWHMyQB6va9
CdjJDk2RE0dZ77c5ZoUnUDtBe4cULU/n4agpYkKMf/HcpnqMUwZzP4KZbbPMBpgL
0CVTt3YrEcjoU7g0SFHhOGPSgl4yIXKU2eHEscokyFYLrS5zRWepmUEmlSoaWn+W
p7pJE65TvOGf2xbaWI+UBeK/3ZG7XAP8qUfhsi7NS4bV6oFCk/foqsWAuru0H7OW
2Gk8fuF0qLgE1eFWQp8BHZ4IUeytoWbnGhhHXh8zH39SKAVncOiAGDNfuEP9CyXJ
fZFfruYrnz2emOwj2v9m
=02Gm
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' into test-merge
ARM: SoC: driver updates for v4.2
Some of these are for drivers/soc, where we're now putting
SoC-specific drivers these days. Some are for other driver subsystems
where we have received acks from the appropriate maintainers.
Some highlights:
- simple-mfd: document DT bindings and misc updates
- migrate mach-berlin to simple-mfd for clock, pinctrl and reset
- memory: support for Tegra132 SoC
- memory: introduce tegra EMC driver for scaling memory frequency
- misc. updates for ARM CCI and CCN busses
Conflicts:
arch/arm64/boot/dts/arm/juno-motherboard.dtsi
Trivial add/add conflict with our dt branch.
Resolution: take both sides.
# gpg: Signature made Wed Jun 24 21:32:17 2015 PDT using RSA key ID D3FBC665
# gpg: Good signature from "Kevin Hilman <khilman@deeprootsystems.com>"
# gpg: aka "Kevin Hilman <khilman@linaro.org>"
# gpg: aka "Kevin Hilman <khilman@kernel.org>"
# Conflicts:
# arch/arm64/boot/dts/arm/juno-motherboard.dtsi
Our SoC branch usually contains expanded support for new SoCs and
other core platform code. Some highlights from this round:
- sunxi: SMP support for A23 SoC
- socpga: big-endian support
- pxa: conversion to common clock framework
- bcm: SMP support for BCM63138
- imx: support new I.MX7D SoC
- zte: basic support for ZX296702 SoC
Conflicts:
arch/arm/mach-socfpga/core.h
Trivial remove/remove conflict with our cleanup branch.
Resolution: remove both sides
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJVi4RMAAoJEFk3GJrT+8Zl6/kP/1Rv9O++1Kxua6R54Og6AF1J
0miFr2fnUrUWUYg/NVbseRH5bBe6N6ir3SQMfde8W2/QibEjOoEwSwrle+mC/eiq
CE0x0gtyRvXMrMU/FWkOvbmmw9uv5oz1z3IHZV6AiecNuSMLUBPfamryikQ8C+d1
O/QZtX543tJQJDOBihO5cuhoVVM37UX0unNmqGsyswlyqTPF8FxcIJAYVNtnxjmj
AFaOB0nDJKLKFTiX2Ype2wOxxJX1lrLatNo4W4T+YaaK+i1uCOhgTdSN+n49K7YA
KNDFEgZFQqT8VMJyG+eJVeYF+cI7yWQ7lBzIftPUjPk/7+dIHBjWPz2QdjVz3U38
kxncf4S9xGAF5G2rcKe4mFrfT3Y8QLWQpA/jFs06yLwW1O3Hlfq3DzMdGNcF7hth
17LOP8namn9+NepZEp/vAlFzRRypxWWtbkPNBIItkImC6zn0IiGjBy50DE1io27W
hmQcnMb7d+0wWl2Y8OmR2lZSB97JiRZkRYMCVHVt+0zGJzp4prLvl9wbjh1VXkPv
ERCDJ9nCmZsl7ZVmIXMI7KNXYuPNp7R/QAzCvuSUueswF0qxTAQ0VSSBwRMqvQsQ
UUNC6p63VnjUeMUdn2EBsUQZ0Uqw3t2U5TtvooHNt9FkiGsSpwjWrvVD+LItaPoJ
GPeeJrJaYQsDvTrO8wjU
=ZtPK
-----END PGP SIGNATURE-----
Merge tag 'armsoc-soc' into test-merge
ARM: SoC: platform support for v4.2
Our SoC branch usually contains expanded support for new SoCs and
other core platform code. Some highlights from this round:
- sunxi: SMP support for A23 SoC
- socpga: big-endian support
- pxa: conversion to common clock framework
- bcm: SMP support for BCM63138
- imx: support new I.MX7D SoC
- zte: basic support for ZX296702 SoC
Conflicts:
arch/arm/mach-socfpga/core.h
Trivial remove/remove conflict with our cleanup branch.
Resolution: remove both sides
# gpg: Signature made Wed Jun 24 21:32:12 2015 PDT using RSA key ID D3FBC665
# gpg: Good signature from "Kevin Hilman <khilman@deeprootsystems.com>"
# gpg: aka "Kevin Hilman <khilman@linaro.org>"
# gpg: aka "Kevin Hilman <khilman@kernel.org>"
# Conflicts:
# arch/arm/mach-socfpga/core.h
This file depends on Kconfig SOC_REALVIEW which is a bool, so
we use the appropriate registration function, which avoids us
relying on an implicit inclusion of <module.h> which we are
doing currently.
While this currently works, we really don't want to be including
the module.h header in non-modular code, which we'd be forced
to do, pending some upcoming code relocation from init.h into
module.h. So we fix it now by using the non-modular equivalent.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
This file depends on Kconfig ARCH_TEGRA which is a bool, so
we use the appropriate registration function, which avoids us
relying on an implicit inclusion of <module.h> which we are
doing currently.
While this currently works, we really don't want to be including
the module.h header in non-modular code, which we'd be forced
to do, pending some upcoming code relocation from init.h into
module.h. So we fix it now by using the non-modular equivalent.
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Cc: linux-tegra@vger.kernel.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
The Allwinner SoCs have a handful of SRAM that can be either mapped to be
accessible by devices or the CPU.
That mapping is controlled by an SRAM controller, and that mapping might
not be set by the bootloader, for example if the device wasn't used at all,
or if we're using solutions like the U-Boot's Falcon Boot.
We could also imagine changing this at runtime for example to change the
mapping of these SRAMs to use them for suspend/resume or runtime memory
rate change, if that ever happens.
These use cases require some API in the kernel to control that mapping,
exported through a drivers/soc driver.
This driver also implement a debugfs file that shows the SRAM found in the
system, the current mapping and the SRAM that have been claimed by some
drivers in the kernel.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Tested-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The pmic-wrapper calls the reset controller. If CONFIG_RESET_CONTROLLER
is not set, compilation fails with:
drivers/soc/mediatek/mtk-pmic-wrap.c: In function ‘pwrap_probe’:
drivers/soc/mediatek/mtk-pmic-wrap.c:836:2: error: implicit declaration of function ‘devm_reset_control_get’ [-Werror=implicit-function-declaration]
This patch sets the dependency in the Kconfig file.
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
When the PMIC wrapper state machine has read a register it goes into the
"wait for valid clear" (vldclr) state. The state machine stays in this
state until the VLDCLR bit is written to. We should write this bit after
reading a register because the SCPSYS won't let the system go into
suspend as long as the state machine waits for valid clear.
Since now we never leave the state machine in vldclr state we no longer
have to check for this state on pwrap_read/pwrap_write entry and can
remove the corresponding code.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
replace chipselect extension values based on SPI clock with hardcoded SoC
specific values.
The PMIC wrapper has the ability of extending the chipselects by configurable
amounts of time. We configured the values based on the rate of SPI clock, but
this is wrong. The delays should be configured based on the internal PMIC clock
that latches the values from the SPI bus to the internal PMIC registers. By
default this clock is 24MHz. Other clock frequencies are for debugging only
and can be removed from the driver.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
The pmc driver was previously exporting tegra_pmc_restart, which was
assigned to machine_desc.init_machine, taking precedence over the
restart handlers registered through register_restart_handler().
Signed-off-by: David Riley <davidriley@chromium.org>
[tomeu.vizoso@collabora.com: Rebased]
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
[treding@nvidia.com: minor cleanups]
Signed-off-by: Thierry Reding <treding@nvidia.com>
Needed for the EMC and MC drivers to know what timings from the DT to
use.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The return type of the wait_for_completion_timeout() function is not int
but unsigned long. An appropriately named unsigned long is added and the
assignment fixed up.
Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
SPM is a hardware block that controls the peripheral logic surrounding
the application cores (cpu/l$). When the core executes WFI instruction,
the SPM takes over the putting the core in low power state as
configured. The wake up for the SPM is an interrupt at the GIC, which
then completes the rest of low power mode sequence and brings the core
out of low power mode.
The SPM has a set of control registers that configure the SPMs
individually based on the type of the core and the runtime conditions.
SPM is a finite state machine block to which a sequence is provided and
it interprets the bytes and executes them in sequence. Each low power
mode that the core can enter into is provided to the SPM as a sequence.
Configure the SPM to set the core (cpu or L2) into its low power mode,
the index of the first command in the sequence is set in the SPM_CTL
register. When the core executes ARM wfi instruction, it triggers the
SPM state machine to start executing from that index. The SPM state
machine waits until the interrupt occurs and starts executing the rest
of the sequence until it hits the end of the sequence. The end of the
sequence jumps the core out of its low power mode.
Add support for an idle driver to set up the SPM to place the core in
Standby or Standalone power collapse mode when the core is idle.
Based on work by: Mahesh Sivasubramanian <msivasub@codeaurora.org>,
Ai Li <ali@codeaurora.org>, Praveen Chidambaram <pchidamb@codeaurora.org>
Original tree available at -
git://codeaurora.org/quic/la/kernel/msm-3.10.git
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Kevin Hilman <khilman@linaro.org>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Acked-by: Kumar Gala <galak@codeaurora.org>
Acked-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
The PMIC wrapper driver adds a couple of variables that are never used.
Remove them to avoid build warnings.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This adds support for the PMIC wrapper found on MediaTek MT8135 and
MT8173 SoCs. The PMIC wrapper is found on MT6xxx SoCs aswell but these
are currently not supported.
On MediaTek MT8135, MT8173 and other SoCs the PMIC is connected via
SPI. The SPI master interface is not directly visible to the CPU, but
only through the PMIC wrapper inside the SoC. The communication between
the SoC and the PMIC can optionally be encrypted. Also a non standard
Dual IO SPI mode can be used to increase speed. The MT8135 also supports
a special feature named "IP Pairing". With IP Pairing the pins of some
SoC internal peripherals can be on the PMIC. The signals of these pins
are routed over the SPI bus using the pwrap bridge. Because of these
optional non SPI conform features the PMIC driver is not implemented as
a SPI bus master driver.
Signed-off-by: Flora Fu, MediaTek
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This patch adds automatic configuration for the ADM CRCI muxing required to
support DMA operations for GSBI clients. The GSBI mode and instance determine
the correct TCSR ADM CRCI MUX value that must be programmed so that the DMA
works properly.
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
These are changes for drivers that are intimately tied to some SoC
and for some reason could not get merged through the respective
subsystem maintainer tree.
This time around, much of this is for at91, with the bulk of it being syscon
and udc drivers.
Also, there's:
- coupled cpuidle support for Samsung Exynos4210
- Renesas 73A0 common-clk work
- of/platform changes to tear down DMA mappings on device destruction
- a few updates to the TI Keystone knav code
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1
iQIcBAABAgAGBQJU4upSAAoJEIwa5zzehBx3HkUP/Rc4B1yZChNIFNfVq4dbei6w
dT9WdFmxOIj2JLeXEypFBiNf1nSHmsxrZe9/IDACz2fYQOnaZZ6/786utUJP/PtC
2GDJy9cjL2Xh03We3nQp5z6J33XvpEni1t82cOpCl8wLBOQNnkjEks8UvLgi1LHW
CNLcMm8JtDQ2aB/gRTjzetp9liZluESY5+Mig+loE2F/rzbMbNQDcWDDgUPyIQIS
1onL+Bad3BnGFdo/+qnkurGc81pxoKiQJty06VWFftzvIwxXhsNjrqls2+KzstAx
0lLvW1tqaDhXvUBImRM8GgfbldZslsgoFVmgESS9MpPMBNENYrkAiQNvJUnM7kd9
qHDQNq+zRNsz/k4fVvp/YUp7xEiAo4rLcFmp/dBr535jS2LNyiZnB94q+kXsin/m
tiyEMx+RWxEHTEHN9WdKE61Ty1RbzOa5UTLSzOKFAkF+m2nvuQsJvb97n19coAq9
SSsj/wJgesfqrDEegphCDh1fyVxUzlAjjhTAyvPS155WvPzkbxZxuBbSqRuriRKA
2aCfVne2ELimHAr3LEPgPW2kFBcONHckOGe6MvrTX4zPHU8bb9WIeg+iGdQChnr3
nclT9jq+ZnQro5XTgUtPtadq100oEXlJbqpAzhd+cJbvgzSNbcWfcgE6kOWqd9uK
oeWQWFLCdXLmXf9zCwmk
=T7R2
-----END PGP SIGNATURE-----
Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Olof Johansson:
"These are changes for drivers that are intimately tied to some SoC and
for some reason could not get merged through the respective subsystem
maintainer tree.
This time around, much of this is for at91, with the bulk of it being
syscon and udc drivers.
Also, there's:
- coupled cpuidle support for Samsung Exynos4210
- Renesas 73A0 common-clk work
- of/platform changes to tear down DMA mappings on device destruction
- a few updates to the TI Keystone knav code"
* tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (26 commits)
cpuidle: exynos: add coupled cpuidle support for exynos4210
ARM: EXYNOS: apply S5P_CENTRAL_SEQ_OPTION fix only when necessary
soc: ti: knav_qmss_queue: change knav_range_setup_acc_irq to static
soc: ti: knav_qmss_queue: makefile tweak to build as dynamic module
pcmcia: at91_cf: depend on !ARCH_MULTIPLATFORM
soc: ti: knav_qmss_queue: export API calls for use by user driver
of/platform: teardown DMA mappings on device destruction
usb: gadget: at91_udc: Allocate udc instance
usb: gadget: at91_udc: Update DT binding documentation
usb: gadget: at91_udc: Rework for multi-platform kernel support
usb: gadget: at91_udc: Simplify probe and remove functions
usb: gadget: at91_udc: Remove non-DT handling code
usb: gadget: at91_udc: Document DT clocks and clock-names property
usb: gadget: at91_udc: Drop uclk clock
usb: gadget: at91_udc: Fix clock names
mfd: syscon: Add Atmel SMC binding doc
mfd: syscon: Add atmel-smc registers definition
mfd: syscon: Add Atmel Matrix bus DT binding documentation
mfd: syscon: Add atmel-matrix registers definition
clk: shmobile: fix sparse NULL pointer warning
...
knav_range_setup_acc_irq() is used only within the file and should
be defined as static.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Currently configuring qmss and dma as dynamic module creates three .ko
files. knav_qmss_acc.ko and knav_qmss_queue.ko both can't be insmod
because of circular dependency. So combine these two into one module
by changing the makefile.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Currently only few of the API calls are exported. This creates problem
when the knav* modules are built as modules and another user module
such as netcp_core try to use these API calls and they are also built
as module. This patch export these APIs to address the issue.
This is needed to support allmodconfig for ARM
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
This adds a device tree controlled option to enable PMC-based
thermal reset in overheating situations. Thermtrip is supported on
Tegra30, Tegra114 and Tegra124. The thermal reset only works when
the thermal sensors are calibrated, so a soctherm driver is also
required.
The thermtrip event is triggered by the soctherm block, and all
soctherm sensors default to showing a temperature of zero Celsius
before they are initialized. Because of this, it is safe to initialize
thermtrip and soctherm in any order.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra132 uses the same GPU as Tegra124 and therefore requires the same
method to remove clamps. However Tegra132 has a separate chip ID, so in
order to avoid having to extend the list of chip IDs for the special
case, add a feature flag to the SoC data.
Reviewed-by: Paul Walmsley <pwalmsley@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra132 is very similar to Tegra124 from a peripheral point of view and
uses the same fuse controller.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Tegra SoCs with 64-bit ARM support don't currently support deep CPU
low-power states in mainline Linux. When this support is added in the
future, it will probably look rather different from the existing
32-bit ARM support, since the ARM64 maintainers' strong preference is
to use PSCI to implement it.
So, for the time being, prevent the CPU suspend-related code and data
in the Tegra PMC driver from compiling on ARM64.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Paul Walmsley <pwalmsley@nvidia.com>
Cc: Thierry Reding <treding@nvidia.com>
Cc: Allen Martin <amartin@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Alexandre Courbot <gnurou@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Pull drm updates from Dave Airlie:
"Highlights:
- AMD KFD driver merge
This is the AMD HSA interface for exposing a lowlevel interface for
GPGPU use. They have an open source userspace built on top of this
interface, and the code looks as good as it was going to get out of
tree.
- Initial atomic modesetting work
The need for an atomic modesetting interface to allow userspace to
try and send a complete set of modesetting state to the driver has
arisen, and been suffering from neglect this past year. No more,
the start of the common code and changes for msm driver to use it
are in this tree. Ongoing work to get the userspace ioctl finished
and the code clean will probably wait until next kernel.
- DisplayID 1.3 and tiled monitor exposed to userspace.
Tiled monitor property is now exposed for userspace to make use of.
- Rockchip drm driver merged.
- imx gpu driver moved out of staging
Other stuff:
- core:
panel - MIPI DSI + new panels.
expose suggested x/y properties for virtual GPUs
- i915:
Initial Skylake (SKL) support
gen3/4 reset work
start of dri1/ums removal
infoframe tracking
fixes for lots of things.
- nouveau:
tegra k1 voltage support
GM204 modesetting support
GT21x memory reclocking work
- radeon:
CI dpm fixes
GPUVM improvements
Initial DPM fan control
- rcar-du:
HDMI support added
removed some support for old boards
slave encoder driver for Analog Devices adv7511
- exynos:
Exynos4415 SoC support
- msm:
a4xx gpu support
atomic helper conversion
- tegra:
iommu support
universal plane support
ganged-mode DSI support
- sti:
HDMI i2c improvements
- vmwgfx:
some late fixes.
- qxl:
use suggested x/y properties"
* 'drm-next' of git://people.freedesktop.org/~airlied/linux: (969 commits)
drm: sti: fix module compilation issue
drm/i915: save/restore GMBUS freq across suspend/resume on gen4
drm: sti: correctly cleanup CRTC and planes
drm: sti: add HQVDP plane
drm: sti: add cursor plane
drm: sti: enable auxiliary CRTC
drm: sti: fix delay in VTG programming
drm: sti: prepare sti_tvout to support auxiliary crtc
drm: sti: use drm_crtc_vblank_{on/off} instead of drm_vblank_{on/off}
drm: sti: fix hdmi avi infoframe
drm: sti: remove event lock while disabling vblank
drm: sti: simplify gdp code
drm: sti: clear all mixer control
drm: sti: remove gpio for HDMI hot plug detection
drm: sti: allow to change hdmi ddc i2c adapter
drm/doc: Document drm_add_modes_noedid() usage
drm/i915: Remove '& 0xffff' from the mask given to WA_REG()
drm/i915: Invert the mask and val arguments in wa_add() and WA_REG()
drm: Zero out DRM object memory upon cleanup
drm/i915/bdw: Fix the write setting up the WIZ hashing mode
...
Here's the set of driver core patches for 3.19-rc1.
They are dominated by the removal of the .owner field in platform
drivers. They touch a lot of files, but they are "simple" changes, just
removing a line in a structure.
Other than that, a few minor driver core and debugfs changes. There are
some ath9k patches coming in through this tree that have been acked by
the wireless maintainers as they relied on the debugfs changes.
Everything has been in linux-next for a while.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2
iEYEABECAAYFAlSOD20ACgkQMUfUDdst+ylLPACg2QrW1oHhdTMT9WI8jihlHVRM
53kAoLeteByQ3iVwWurwwseRPiWa8+MI
=OVRS
-----END PGP SIGNATURE-----
Merge tag 'driver-core-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core
Pull driver core update from Greg KH:
"Here's the set of driver core patches for 3.19-rc1.
They are dominated by the removal of the .owner field in platform
drivers. They touch a lot of files, but they are "simple" changes,
just removing a line in a structure.
Other than that, a few minor driver core and debugfs changes. There
are some ath9k patches coming in through this tree that have been
acked by the wireless maintainers as they relied on the debugfs
changes.
Everything has been in linux-next for a while"
* tag 'driver-core-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core: (324 commits)
Revert "ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries"
fs: debugfs: add forward declaration for struct device type
firmware class: Deletion of an unnecessary check before the function call "vunmap"
firmware loader: fix hung task warning dump
devcoredump: provide a one-way disable function
device: Add dev_<level>_once variants
ath: ath9k: use debugfs_create_devm_seqfile() helper for seq_file entries
ath: use seq_file api for ath9k debugfs files
debugfs: add helper function to create device related seq_file
drivers/base: cacheinfo: remove noisy error boot message
Revert "core: platform: add warning if driver has no owner"
drivers: base: support cpu cache information interface to userspace via sysfs
drivers: base: add cpu_device_create to support per-cpu devices
topology: replace custom attribute macros with standard DEVICE_ATTR*
cpumask: factor out show_cpumap into separate helper function
driver core: Fix unbalanced device reference in drivers_probe
driver core: fix race with userland in device_add()
sysfs/kernfs: make read requests on pre-alloc files use the buffer.
sysfs/kernfs: allow attributes to request write buffer be pre-allocated.
fs: sysfs: return EGBIG on write if offset is larger than file size
...
These are changes for drivers that are intimately tied to some SoC
and for some reason could not get merged through the respective
subsystem maintainer tree.
The largest single change here this time around is the Tegra
iommu/memory controller driver, which gets updated to the new
iommu DT binding. More drivers like this are likely to follow
for the following merge window, but we should be able to do
those through the iommu maintainer.
Other notable changes are:
* reset controller drivers from the reset maintainer (socfpga, sti, berlin)
* fixes for the keystone navigator driver merged last time
* at91 rtc driver changes related to the at91 cleanups
* ARM perf driver changes from Will Deacon
* updates for the brcmstb_gisb driver
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIVAwUAVIcj4mCrR//JCVInAQIvWg//WD72+2q0RmEvu8r/YN4SDfg5iY7OMzgy
Jyt6rN1IhXBY5GJL5Hil1q2JP/7o8vypekllohmBYWzXO3ZJ2VK6NPIXEMuzaiCz
D9gmb+N6FdR2L2iYPv7B/3uOf55pHjBu525+vLspCTOgcWBrLgCnA9e9Yg462AEf
VP3x+kV0AH25lovEi3mPrc2e46jnl0Mzp3f3PCkPqRSEMn7sxu9ipii+elxvArYp
jYYCB03ZEBFa7T0e4HD38gnVLbC6dTj47AcSCWYP9WhxJ2RmCQKRBEnJre02hgar
NPg8z+OrUACIAkvJHzg3WccmXdi0aqQ2JDsl46Tkl7pA6NdyMLfizT3OiZnMRmgc
34H0ZSxclW+j25aI8OmDpv2ypZev+UAzkbRobcvF+aV/zJeAX88tPgcshfCUVZll
ZIqO7oJB73nCl1XBLv2ZrLV2tcOox6jL/5LQt0WYA5Szg5upo7D1fZl8v5jXX7eJ
C62ychuABs6hsmH5jEy+73kdpHbYft7dZfGZxdgq1AIOkdWoynCze/R7Vj24xoXR
118cTNN9ZTPHmN5yxUvuGoqA3FWOqkJXaTS4W0hRD6OxOGTsTV4FIlRnD+K7feOW
ng1yfIcvKR1Dx7tsySTHQK+bZGNnovA/ENPK6VDuhbwE62Lx7N5hcbsSIKKwRI9C
D1m1fC+AIcQ=
=MwMG
-----END PGP SIGNATURE-----
Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"These are changes for drivers that are intimately tied to some SoC and
for some reason could not get merged through the respective subsystem
maintainer tree.
The largest single change here this time around is the Tegra
iommu/memory controller driver, which gets updated to the new iommu DT
binding. More drivers like this are likely to follow for the
following merge window, but we should be able to do those through the
iommu maintainer.
Other notable changes are:
- reset controller drivers from the reset maintainer (socfpga, sti,
berlin)
- fixes for the keystone navigator driver merged last time
- at91 rtc driver changes related to the at91 cleanups
- ARM perf driver changes from Will Deacon
- updates for the brcmstb_gisb driver"
* tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits)
clocksource: arch_timer: Allow the device tree to specify uninitialized timer registers
clocksource: arch_timer: Fix code to use physical timers when requested
memory: Add NVIDIA Tegra memory controller support
bus: brcmstb_gisb: Add register offset tables for older chips
bus: brcmstb_gisb: Look up register offsets in a table
bus: brcmstb_gisb: Introduce wrapper functions for MMIO accesses
bus: brcmstb_gisb: Make the driver buildable on MIPS
of: Add NVIDIA Tegra memory controller binding
ARM: tegra: Move AHB Kconfig to drivers/amba
amba: Add Kconfig file
clk: tegra: Implement memory-controller clock
serial: samsung: Fix serial config dependencies for exynos7
bus: brcmstb_gisb: resolve section mismatch
ARM: common: edma: edma_pm_resume may be unused
ARM: common: edma: add suspend resume hook
powerpc/iommu: Rename iommu_[un]map_sg functions
rtc: at91sam9: add DT bindings documentation
rtc: at91sam9: use clk API instead of relying on AT91_SLOW_CLOCK
ARM: at91: add clk_lookup entry for RTT devices
rtc: at91sam9: rework the Kconfig description
...
New and updated SoC support, notable changes include:
* bcm: brcmstb SMP support
* bcm: initial iproc/cygnus support
* exynos: Exynos4415 SoC support
* exynos: PMU and suspend support for Exynos5420
* exynos: PMU support for Exynos3250
* exynos: pm related maintenance
* imx: new LS1021A SoC support
* imx: vybrid 610 global timer support
* integrator: convert to using multiplatform configuration
* mediatek: earlyprintk support for mt8127/mt8135
* meson: meson8 soc and l2 cache controller support
* mvebu: Armada 38x CPU hotplug support
* mvebu: drop support for prerelease Armada 375 Z1 stepping
* mvebu: extended suspend support, now works on Armada 370/XP
* omap: hwmod related maintenance
* omap: prcm cleanup
* pxa: initial pxa27x DT handling
* rockchip: SMP support for rk3288
* rockchip: add cpu frequency scaling support
* shmobile: r8a7740 power domain support
* shmobile: various small restart, timer, pci apmu changes
* sunxi: Allwinner A80 (sun9i) earlyprintk support
* ux500: power domain support
Overall, a significant chunk of changes, coming mostly from
the usual suspects: omap, shmobile, samsung and mvebu, all of
which already contain a lot of platform specific code in
arch/arm.
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIVAwUAVIcjyGCrR//JCVInAQJJCRAA1Tm+HZGiAiTvXEAcm/T9tIA08uqtawHt
cqyEAUyrnE8QxE4EhUd2pTw4EunVusqKF5EsDxOzw7b3ukUdLAWZE7bqBOSIJLqn
hrfsQQ8dXLbyC7T/CHPnBVeM+pn9LiIc9qzpZ0YToiMnHBBI4vKFQntBjd31yoRE
hN08I6AmDjQolOzzlqR1fuM0uZaKiHIcytdauTt3Vfqgg7FTHcTy3u1kClHTR1Lp
m/KuDothGpR5OKjSnUQz7EO5V3KJEnaKey8z2xM1a7DLLAvJ6r2+DUaDopv9Dbz1
W/V3H7fi5tLvillVa8xmlmzqWZbPc1xw8MWqvHZSWIMRZqloAHpC1VWKn0ZuH4SW
5Bj4ubSrpYjJxjKYfrxtjmuzru3A2jWBNTSP5A4nsny0C3AUsXkfRmRS0VNdegF8
sUdQ1MF8vEMpQT3QPH88+ccFHeIgqbcayhKqLPf7r8q0kwlym5N7Y2amU2A/O6qz
+324r+yzfSA70VgJZ5EhXxWVDOPB4Lc8EtoWnH6T/kjncIMwzEsbEbyB3X1OaREW
pVn3PNo06VjHLYoiHX+8G99pOFR/JZvaQs6jGCXLs+Orjp5WfP+kafkWqcB5GAKU
Pfd3AQsl6rKAITdu0XsTdPiICNS4CmBiWYPepQsTa3pQaNgB7fwZNQKelNRIdGc+
dF1lnQ7CXLQ=
=lFoH
-----END PGP SIGNATURE-----
Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform changes from Arnd Bergmann:
"New and updated SoC support, notable changes include:
- bcm:
brcmstb SMP support
initial iproc/cygnus support
- exynos:
Exynos4415 SoC support
PMU and suspend support for Exynos5420
PMU support for Exynos3250
pm related maintenance
- imx:
new LS1021A SoC support
vybrid 610 global timer support
- integrator:
convert to using multiplatform configuration
- mediatek:
earlyprintk support for mt8127/mt8135
- meson:
meson8 soc and l2 cache controller support
- mvebu:
Armada 38x CPU hotplug support
drop support for prerelease Armada 375 Z1 stepping
extended suspend support, now works on Armada 370/XP
- omap:
hwmod related maintenance
prcm cleanup
- pxa:
initial pxa27x DT handling
- rockchip:
SMP support for rk3288
add cpu frequency scaling support
- shmobile:
r8a7740 power domain support
various small restart, timer, pci apmu changes
- sunxi:
Allwinner A80 (sun9i) earlyprintk support
- ux500:
power domain support
Overall, a significant chunk of changes, coming mostly from the usual
suspects: omap, shmobile, samsung and mvebu, all of which already
contain a lot of platform specific code in arch/arm"
* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (187 commits)
ARM: mvebu: use the cpufreq-dt platform_data for independent clocks
soc: integrator: Add terminating entry for integrator_cm_match
ARM: mvebu: add SDRAM controller description for Armada XP
ARM: mvebu: adjust mbus controller description on Armada 370/XP
ARM: mvebu: add suspend/resume DT information for Armada XP GP
ARM: mvebu: synchronize secondary CPU clocks on resume
ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume
ARM: mvebu: Armada XP GP specific suspend/resume code
ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume
ARM: mvebu: implement suspend/resume support for Armada XP
clk: mvebu: add suspend/resume for gatable clocks
bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration
bus: mvebu-mbus: suspend/resume support
clocksource: time-armada-370-xp: add suspend/resume support
irqchip: armada-370-xp: Add suspend/resume support
ARM: add lolevel debug support for asm9260
ARM: add mach-asm9260
ARM: EXYNOS: use u8 for val[] in struct exynos_pmu_conf
power: reset: imx-snvs-poweroff: add power off driver for i.mx6
ARM: imx: temporarily remove CONFIG_SOC_FSL from LS1021A
...
The of_device_id table is supposed to be zero-terminated.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Some Tegra drivers might be compiled as kernel modules, and they need the
fuse information for initialization. One example is the GK20A Nouveau
driver. It needs the GPU speedo value to calculate frequency-voltage
table. So export the tegra_sku_info.
Signed-off-by: Vince Hsu <vinceh@nvidia.com>
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This creates a new SoC bus driver for the ARM Integrator
family core modules to register the SoC bus and provide
sysfs info for the core module. We delete the corresponding
code from the Integrator machine and select this driver to
get a clean result.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
list_for_each_entry_safe() is necessary if list objects are deleted from
the list while traversing it.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
The of_device_id table is supposed to be zero-terminated.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Don't call mutex_unlock() in the error patch if the mutex_lock() is not called.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Use list_first_entry_or_null() for first_region() and first_queue_range().
list_first_entry() expects the list is not empty, so first_region() and
first_queue_range() never return NULL.
Thus use list_first_entry_or_null() instead.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
These are changes for drivers that are intimately tied to some SoC
and for some reason could not get merged through the respective
subsystem maintainer tree.
Most of the new code is for the Keystone Navigator driver, which is
new base support that is going to be needed for their hardware
accelerated network driver and other units.
Most of the commits are for moving old code around from at91 and omap
for things that are done in device drivers nowadays.
- at91: move reset, poweroff, memory and clocksource code into drivers
directories
- socfpga: add edac driver (through arm-soc, as requested by Boris)
- omap: move omap-intc code to drivers/irqchip
- sunxi: added an RTC driver for sun6i
- omap: mailbox driver related changes
- keystone: support for the "Navigator" component
- versatile: new reboot, led and soc drivers
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.12 (GNU/Linux)
iQIVAwUAVDWWQGCrR//JCVInAQKX7Q//bDkoseKCZsGaXN7vfQ2YhT3SAc52mROV
YQKdNmtMUrHqDgngATZTx5ogOh1hInnqueFjGGhfMYsHQO1Vj8+odj0r+4jhjuUY
3YfY+qZ+91tq33JlUOhKn+mfVMdxJc8XarGgR6MSWYkqWVYCtLtBluum7hKm2UJ6
/e4hd2zzImX5ATwj/LXWLx5eTf1qAVFGWzNUph1DrW+1V5lOu58X4gKwk1QOCVEh
Pa0GV9oRTkjoswwz9drzjeFtie2yofQ2mygj6QKxg5NsosIF0+B8kJ61Sxwg56Ak
tF+qn1hGtB2cDQkpxK4o2cZgCELhkh5Aqgol/vZUS1DMBSUEGCV9PPp2eOW83r3B
0zsTgsShyVcTh7khdpQmHNRigvcc7e69LaAGC4o/RxaZpCU/LUNCQ+/iqVExSE8A
VNEXr+JNxGxhj3m9KUHuEktdWx1oNvaYR8Rr4RPr6EWR8R6emJ04I7kXInvzhJZL
HOGh75vSuAU83FrsP8fFRLadoHNVDXylAs38BPfGEMngVpjvwJLgQ3+729CwW+Q4
+xQXAKSwKfr8xA8eg6wBSbFcwnEW4QwRqFqQ5XPw7zTZkCZbiLtvn3JpI5bH5A5Q
/d2D+M2vFbB7VbWJBM4etO95eNS/pfhqJhcQh4t0DjXjoW6WqLiHCxhEx8Ogfvop
/4ckyGvtEOI=
=POJD
-----END PGP SIGNATURE-----
Merge tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann:
"These are changes for drivers that are intimately tied to some SoC and
for some reason could not get merged through the respective subsystem
maintainer tree.
Most of the new code is for the Keystone Navigator driver, which is
new base support that is going to be needed for their hardware
accelerated network driver and other units.
Most of the commits are for moving old code around from at91 and omap
for things that are done in device drivers nowadays.
- at91: move reset, poweroff, memory and clocksource code into
drivers directories
- socfpga: add edac driver (through arm-soc, as requested by Boris)
- omap: move omap-intc code to drivers/irqchip
- sunxi: added an RTC driver for sun6i
- omap: mailbox driver related changes
- keystone: support for the "Navigator" component
- versatile: new reboot, led and soc drivers"
* tag 'drivers-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (92 commits)
bus: arm-ccn: Fix spurious warning message
leds: add device tree bindings for register bit LEDs
soc: add driver for the ARM RealView
power: reset: driver for the Versatile syscon reboot
leds: add a driver for syscon-based LEDs
drivers/soc: ti: fix build break with modules
MAINTAINERS: Add Keystone Multicore Navigator drivers entry
soc: ti: add Keystone Navigator DMA support
Documentation: dt: soc: add Keystone Navigator DMA bindings
soc: ti: add Keystone Navigator QMSS driver
Documentation: dt: soc: add Keystone Navigator QMSS bindings
rtc: sunxi: Depend on platforms sun4i/sun7i that actually have the rtc
rtc: sun6i: Add sun6i RTC driver
irqchip: omap-intc: remove unnecessary comments
irqchip: omap-intc: correct maximum number or MIR registers
irqchip: omap-intc: enable TURBO idle mode
irqchip: omap-intc: enable IP protection
irqchip: omap-intc: remove unnecesary of_address_to_resource() call
irqchip: omap-intc: comment style cleanup
irqchip: omap-intc: minor improvement to omap_irq_pending()
...
This adds a SoC driver to be used by the ARM RealView
reference boards. We create the "versatile" directory to hold
the different ARM reference designs as per the pattern of the
clk directory layout. The driver utilze the syscon to get to
the register needed. After this we can use sysfs to get at
some SoC properties on RealView DT variants like this:
> cd /sysbus/soc/devices/soc0
> ls
board family machine power subsystem
build fpga manufacturer soc_id uevent
> cat family
Versatile
> cat fpga
Multi-layer AXI
> cat board
HBI-0147
> cat build
03
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Conflicts:
drivers/soc/Kconfig
drivers/soc/Makefile
The Keystone Navigator DMA driver sets up the dma channels and flows for
the QMSS(Queue Manager SubSystem) who triggers the actual data movements
across clients using destination queues. Every client modules like
NETCP(Network Coprocessor), SRIO(Serial Rapid IO) and CRYPTO
Engines has its own instance of packet dma hardware. QMSS has also
an internal packet DMA module which is used as an infrastructure
DMA with zero copy.
Initially this driver was proposed as DMA engine driver but since the
hardware is not typical DMA engine and hence doesn't comply with typical
DMA engine driver needs, that approach was naked. Link to that
discussion -
https://lkml.org/lkml/2014/3/18/340
As aligned, now we pair the Navigator DMA with its companion Navigator
QMSS subsystem driver.
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Olof Johansson <olof@lixom.net>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Sandeep Nair <sandeep_n@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
The QMSS (Queue Manager Sub System) found on Keystone SOCs is one of
the main hardware sub system which forms the backbone of the Keystone
Multi-core Navigator. QMSS consist of queue managers, packed-data structure
processors(PDSP), linking RAM, descriptor pools and infrastructure
Packet DMA.
The Queue Manager is a hardware module that is responsible for accelerating
management of the packet queues. Packets are queued/de-queued by writing or
reading descriptor address to a particular memory mapped location. The PDSPs
perform QMSS related functions like accumulation, QoS, or event management.
Linking RAM registers are used to link the descriptors which are stored in
descriptor RAM. Descriptor RAM is configurable as internal or external memory.
The QMSS driver manages the PDSP setups, linking RAM regions,
queue pool management (allocation, push, pop and notify) and descriptor
pool management. The specifics on the device tree bindings for
QMSS can be found in:
Documentation/devicetree/bindings/soc/keystone-navigator-qmss.txt
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Olof Johansson <olof@lixom.net>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Sandeep Nair <sandeep_n@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
since commit 31964ffebb ("tty: serial: msm: Remove direct access to GSBI")'
serial hangs if earlyprintk are enabled.
This hang is noticed only when the GSBI driver is probed and all the
earlyprintks before gsbi probe are seen on the console.
The reason why it hangs is because GSBI driver disables hclk in its
probe function without realizing that the serial IP might be in use by
a bootconsole. As gsbi driver disables the clock in probe the
bootconsole locks up.
Turning off hclk's could be dangerous if there are system components
like earlyprintk using the hclk.
This patch fixes the issue by delegating the clock management to
probe and remove functions in gsbi rather than disabling the clock in probe.
More detailed problem description can be found here:
http://www.spinics.net/lists/linux-arm-msm/msg10589.html
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
This commit converts the PMC support code to a platform driver. Because
the boot process needs to call into this driver very early, also set up
a minimal environment via an early initcall.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rather than rely on explicit initialization order called from SoC setup
code, use a plain initcall and rely on initcall ordering to take care of
dependencies.
This driver exposes some functionality (querying the chip ID) needed at
very early stages of the boot process. An early initcall is good enough
provided that some of the dependencies are deferred to later stages. To
make sure any abuses are easily caught, output a warning message if the
chip ID is queried while it can't be read yet.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Subsequent patches will move some of the initialization code from SoC
setup code to regular initcalls. To prevent breakage on other SoCs in
multi-platform builds, these initcalls need to check that they indeed
run on Tegra.
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Tegra fuse header's dummy functions for the case where Tegra20 is
disabled are inconsistent with the correct prototypes, and have some
syntax errors. Fix these. While at it, fix the indentation level of
the dummy function bodies.
Fixes: 783c8f4c84 ("soc/tegra: Add efuse driver for Tegra")
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Tegra20 fuse driver is the only user of tegra_apb_readl_using_dma().
Therefore we can simply the code by incorporating the APB DMA handling into
the driver directly. tegra_apb_writel_using_dma() is dropped because there
are no users.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Implement fuse driver for Tegra20, Tegra30, Tegra114 and Tegra124. This
replaces functionality previously provided in arch/arm/mach-tegra, which
is removed in this patch.
While at it, move the only user of the global tegra_revision variable
over to tegra_sku_info.revision and export tegra_fuse_readl() to allow
drivers to read calibration fuses.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The match tables must be zero-terminated, and Kbuild now helpfully
fails to link the kernel if that isn't the case.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The GSBI (General Serial Bus Interface) driver controls the overarching
configuration of the shared serial bus infrastructure on APQ8064, IPQ8064, and
earlier QCOM processors. The GSBI supports UART, I2C, SPI, and UIM
functionality in various combinations.
Signed-off-by: Andy Gross <agross@codeaurora.org>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Based on earlier thread "https://lkml.org/lkml/2013/10/7/662" and
discussion at Kernel Summit'2013, it was agreed to create
'driver/soc' for drivers which are quite SOC specific.
Further discussion on the subject is in response to
the earlier version of the patch is here:
http://lwn.net/Articles/588942/
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Olof Johansson <olof@lixom.net>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sandeep Nair <sandeep_n@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Kumar Gala <galak@codeaurora.org>
Olof Johansson