3 Commits

Author	SHA1	Message	Date
Michael Hennerich	331693129d	Blackfin arch: Fix Bug - Kernel does not boot if re-program clocks ... On BF561 EBIU_SDGCTL bit 31 controls the SDRAM external data path width, typically set 0 for a 32-bit bus width. On other Blackfin derivatives this bit should be set by default. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>	2009-02-04 16:49:45 +08:00
Sonic Zhang	4934540d9f	Blackfin arch: enable reprogram cclk and sclk for bf518f-ezbrd ... Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>	2009-01-07 23:14:38 +08:00
Michael Hennerich	73feb5c09d	Blackfin arch: fix bugs and unify BFIN_KERNEL_CLOCK option ... - remove duplicated code and headers - add option allowing arbitrary SDRAM/DDR Timing parameters. - mark automatically calculated timings as EXPERIMENTAL - fix comment header block Related to BUGs: - kernel boot up fails with CONFIG_BFIN_KERNEL_CLOCK item on. - kernel does not boot if re-program clocks [ Mike Frysinger <vapier.adi@gmail.com> - fix comment header - mark do_sync static - document the DMA shutdown - simplify SIC_IWR handling - fix ANOMALY_05000265 handling to work as intended ] Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Mike Frysinger <vapier.adi@gmail.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>	2009-01-07 23:14:39 +08:00