Commit Graph

663997 Commits

Author SHA1 Message Date
Leo Liu 09bfb8912d drm/amdgpu: add initial uvd 7.0 support for vega10
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:47 -04:00
Ken Wang 282aae555e drm/amdgpu: add vega10 interrupt handler
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:46 -04:00
Ken Wang b102357147 drm/amdgpu: implement GFX 9.0 support (v2)
Add support for gfx v9.0.

v2: update golden settings from Ken

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:45 -04:00
Ken Wang 2130f89ced drm/amdgpu: add SDMA v4.0 implementation (v2)
v2: fix Makefile

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:45 -04:00
Alex Xie e60f8db5e4 drm/amdgpu: Add GMC 9.0 support (v2)
On SOC-15 parts, the GMC (Graphics Memory Controller) consists
of two hubs: GFX (graphics and compute) and MM (sdma, uvd, vce).

v2: drop sdma from Makefile, fix duplicate return statement.

Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:44 -04:00
Junwei Zhang c1d83da980 drm/amdgpu: add NBIO 6.1 driver
This handles nbio 6.1 specific implementations which
are used by various other IPs.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:44 -04:00
Alex Xie b0fd18b071 drm/amdgpu: handle PTE MTYPE in amdgpu_vm_bo_split_mapping
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:43 -04:00
Alex Xie 15b31c59bc drm/amdgpu: handle PTE EXEC in amdgpu_vm_bo_split_mapping
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:42 -04:00
Alex Deucher a0676f6083 drm/amdgpu: gart fixes for vega10
Flags need to be 0 to be considered invalid.

Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:42 -04:00
Huang Rui eb6611135f drm/amdgpu: add psp firmware header info
Defines the header info for the psp firmware.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:41 -04:00
Huang Rui 2445b22751 drm/amdgpu: rework common ucode handling for vega10
Handle ucode differences in vega10.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:40 -04:00
Marek Olšák 9079ac7666 drm/amdgpu: don't validate TILE_SPLIT on GFX9
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:40 -04:00
Alex Deucher 00ac6f6be1 drm/amdgpu: add tiling flags for GFX9 (v2)
v2: Marek: allow shifts >32 in AMDGPU_TILING_SET/GET

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:39 -04:00
Alex Deucher a8f1f1ce28 drm/amdgpu: Add asic family for vega10
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:38 -04:00
Alex Deucher bce23e00f3 drm/amdgpu: add NGG parameters
NGG (Next Generation Graphics) is a new feature in GFX9.0.  This
adds the relevant parameters.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:38 -04:00
Alex Deucher ca02061c7a drm/amdgpu: add PTE defines for MTYPE
New on SOC-15 asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:37 -04:00
Christian König cef105f7dc drm/amdgpu: add IV trace point
This allows us to grab IVs without spamming the log.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:37 -04:00
Alex Deucher 614dea315f drm/amdgpu: update IH IV ring entry for soc-15
Reflect the new format on soc-15 asics.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:36 -04:00
Alex Deucher be34d3bfe3 drm/amdgpu: use atomfirmware interfaces for scratch reg save/restore
If the board is atomfirmware based.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:35 -04:00
Alex Xie 66e02bc343 drm/amdgpu: Add MTYPE flags to GPU VM IOCTL interface
Signed-off-by: Alex Xie <AlexBin.Xie@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:35 -04:00
Ken Wang 39807b939e drm/amdgpu: add 64bit doorbell assignments
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:34 -04:00
Andrey Grodzovsky d0e95758e3 drm/amdgpu: gb_addr_config struct
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:33 -04:00
Huang Rui e635ee0745 drm/amdgpu: use new flag to handle different firmware loading method
This patch introduces a new flag named "amdgpu_firmware_load_type" to
handle different firmware loading method. Since Vega10, there are
three ways to load firmware. It would be better to use a flag and a
fw_load_type kernel parameter to configure it.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:33 -04:00
ken 70170d146d drm/amdgpu: add clinetid definition for vega10
Signed-off-by: ken <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:32 -04:00
Ken Wang d4196f011c drm/amdgpu: add vega10 chip name
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:32 -04:00
Ken Wang 8e3153ba3f drm/amdgpu: add common soc15 headers
These are used by various IP modules.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:31 -04:00
Alex Deucher 90df1d55a2 drm/amdgpu: add SDMA 4.0 packet header
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:30 -04:00
Alex Deucher 6a38ce8f19 drm/amdgpu: add gfx9 clearstate header
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:30 -04:00
Felix Kuehling 4b219123e9 drm/amd: Add MQD structs for GFX V9
This header defines the gfx v9 MEC structures.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:29 -04:00
Alex Deucher f6c3947893 drm/amdgpu: add the VCE 4.0 register headers
These are the Video Compression Engine registers for vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:28 -04:00
Alex Deucher 7008d577d6 drm/amdgpu: add the UVD 7.0 register headers
These are the Unifed Video Decoder registers for vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:28 -04:00
Alex Deucher 893f25540e drm/amdgpu: add THM 9.0 register headers
These are the THerMal control registers for vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:27 -04:00
Alex Deucher 63d311d9b4 drm/amdgpu: add SMUIO 9.0 register headers
These are the System Managment Unit IO registers for vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:26 -04:00
Alex Deucher 456f97704f drm/amdgpu: add SDMA 4.0 register headers
These are the System DMA register headers for vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:26 -04:00
Alex Deucher 5a8288c0f9 drm/amdgpu: add OSSSYS 4.0 register headers
These are the OS Services register headers for vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:25 -04:00
Alex Deucher 198b746016 drm/amdgpu: add NBIO 6.1 register headers
These are the Bus IO registers for vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:24 -04:00
Alex Deucher 61e04478b2 drm/amdgpu: add NBIF 6.1 register headers
These are the Bus InterFace registers for vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:23 -04:00
Alex Deucher 3ec127a075 drm/amdgpu: add MP 9.0 register headers
MP is the system management controller on vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:23 -04:00
Alex Deucher 68c7d13052 drm/amdgpu: add the MMHUB 1.0 register headers
Add the MultiMedia Hub registers for vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:22 -04:00
Alex Deucher bcfb47cdd7 drm/amdgpu: add the HDP 4.0 register headers
These are the Host Data Path registers for vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:21 -04:00
Alex Deucher 5585476e44 drm/amdgpu: add the GC 9.0 register headers
Add the Graphics Core register headers for vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:21 -04:00
Alex Deucher 4adc5ab813 drm/amdgpu: Add the DCE 12.0 register headers
These are the register headers for the Display
and Composition Engine on vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:20 -04:00
Alex Deucher 7fee1fd93b drm/amdgpu: Add ATHUB 1.0 register headers
ATHUB is part of the memory controller on soc15 asics.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:19 -04:00
Alex Deucher 733acf561e drm/amdgpu: add vega10_enum.h
This adds the register bitfield enums for vega10.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:19 -04:00
Alex Deucher 1fd1cc5640 drm/amdgpu: add soc15ip.h
This header defines the IP layout for soc15 based SoCs.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:18 -04:00
Alex Deucher a5bde2f964 drm/amdgpu: add basic support for atomfirmware.h (v3)
This adds basic support for asics that use atomfirmware.h
to define their vbios tables.

v2: rebase
v3: squash in num scratch reg fix

Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:17 -04:00
Alex Deucher 43bf11bd92 drm/amdgpu: move atom scratch setup into amdgpu_atombios.c
There will be a slightly different version for atomfirmware.

Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:17 -04:00
Alex Deucher 0cdd500560 amdgpu: detect if we are using atomfirmware or atombios for vbios (v2)
Supposedly atomfirmware rom header is 3.3 atombios is 1.1.

v2: rebased on newer kernel

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:16 -04:00
Alex Deucher 1fadf42ed5 drm/amdgpu: add the new atomfirmware interface header
soc15 asics have a new vbios interface.  These headers
define that interface.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:15 -04:00
Nicolai Hähnle f34678187a drm/amdgpu: add optional fence out-parameter to amdgpu_vm_clear_freed
We will add the fence to freed buffer objects in a later commit, to ensure
that the underlying memory can only be re-used after all references in
page tables have been cleared.

Signed-off-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-03-29 23:54:15 -04:00