Commit Graph

16 Commits

Author SHA1 Message Date
Linus Torvalds 914311c9fb Pin control changes for v3.6:
- Various cleanups to the U300 driver
 - Refactor the pin control core to automatically remove
   any GPIO ranges when the drivers are removed, instead of
   having the drivers do this explicitly.
 - Add a function for registering a batch of GPIO ranges.
 - Fix a number of incorrect but non-regressive error checks.
 - Incremental improvements to the COH901, i.MX and Nomadik drivers
 - Add a one-register-per-pin entirely Device Tree-based pin
   control driver from Tony Lindgren.
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Merge tag 'pinctrl-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

Pull pin control changes from Linus Walleij:
 "These are the accumulated pin control patches for v3.6:
   - Various cleanups to the U300 driver
   - Refactor the pin control core to automatically remove any GPIO
     ranges when the drivers are removed, instead of having the drivers
     do this explicitly.
   - Add a function for registering a batch of GPIO ranges.
   - Fix a number of incorrect but non-regressive error checks.
   - Incremental improvements to the COH901, i.MX and Nomadik drivers
   - Add a one-register-per-pin entirely Device Tree-based pin control
     driver from Tony Lindgren."

* tag 'pinctrl-for-v3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: Add one-register-per-pin type device tree based pinctrl driver
  pinctrl/nomadik: add spi2_oc1_2 pin group
  pinctrl/nomadik: kerneldoc fix
  pinctrl/nomadik: use devm_* allocators for gpio probe
  pinctrl/nomadik: add pin group to mco function
  pinctrl/nomadik: add hsit_a_2 pin group
  pinctrl/nomadik: add pin group smcs1 and smps0
  pinctrl/nomadik: fix hsir_a_1_pins pin list
  pinctrl: pinctrl-imx: fix map setting problem if NO_PAD_CTL is set
  pinctrl/coh901: use clk_prepare_[en|dis]able()
  pinctrl/pinctrl-tegra: remove IS_ERR checking of pmx->pctl
  pinctrl/pinctrl-spear: remove IS_ERR checking of pmx->pctl
  pinctrl/u300: drop unused variable
  pinctrl: select the proper symbol
  pinctrl: add pinctrl_add_gpio_ranges function
  pinctrl: remove pinctrl_remove_gpio_range
  pinctrl/pinctrl-core: cleanup pinctrl_register
  pinctrl/u300: delete pointless debug print
  pinctrl/pinctrl-u300: remove devm_kfree at driver unload
2012-07-24 14:05:46 -07:00
Tony Lindgren 8b8b091bf0 pinctrl: Add one-register-per-pin type device tree based pinctrl driver
Add one-register-per-pin type device tree based pinctrl driver.

This driver has been tested on omap2+ series of processors,
where there is either an 8 or 16-bit padconf register for each pin.
Support for other similar pinmux controllers can be added.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-07-14 22:33:08 +02:00
Dong Aisheng 4a5f7eff8b pinctrl: pinctrl-imx6q: add missed mux function for USBOTG_ID
The original pin registers table is derived from u-boot mainline,
but somehow it was found missing some mux functions for USBOTG_ID.
We added it at the bottom by following the exist pin function ids,
then it will not break the exist using of pin function id in dts file.

Reported-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
2012-07-14 22:32:10 +02:00
Linus Torvalds 30b842889e arm-soc: soc specific changes, part 2
This adds support for the spear13xx platform, which has first been under
 review a long time ago and finally been completed after generic spear
 work has gone into the clock, dt and pinctrl branches.
 
 Also a number of updates for the samsung socs are part of this branch.
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Merge tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm-soc: soc specific changes (part 2) from Olof Johansson:
 "This adds support for the spear13xx platform, which has first been
  under review a long time ago and finally been completed after generic
  spear work has gone into the clock, dt and pinctrl branches.

  Also a number of updates for the samsung socs are part of this branch."

Fix up trivial conflicts in drivers/gpio/gpio-samsung.c that look much
worse than they are: the exonys5 init code was refactored in commit
fd454997d6 ("gpio: samsung: refactor gpiolib init for exynos4/5"), and
then commit f10590c983 ("ARM: EXYNOS: add GPC4 bank instance") added a
new gpio chip define and did tiny updates to the init code.

So the conflict diff looks like hell, but it's actually a fairly simple
change.

* tag 'soc2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (34 commits)
  ARM: exynos: fix building with CONFIG_OF disabled
  ARM: EXYNOS: Add AUXDATA for i2c controllers
  ARM: dts: Update device tree source files for EXYNOS5250
  ARM: EXYNOS: Add device tree support for interrupt combiner
  ARM: EXYNOS: Add irq_domain support for interrupt combiner
  ARM: EXYNOS: Remove a new bus_type instance for EXYNOS5
  ARM: EXYNOS: update irqs for EXYNOS5250 SoC
  ARM: EXYNOS: Add pre-divider and fout mux clocks for bpll and mpll
  ARM: EXYNOS: add GPC4 bank instance
  ARM: EXYNOS: Redefine IRQ_MCT_L0,1 definition
  ARM: EXYNOS: Modify the GIC physical address for static io-mapping
  ARM: EXYNOS: Add watchdog timer clock instance
  pinctrl: SPEAr1310: Fix pin numbers for clcd_high_res
  SPEAr: Update MAINTAINERS and Documentation
  SPEAr13xx: Add defconfig
  SPEAr13xx: Add compilation support
  SPEAr13xx: Add dts and dtsi files
  pinctrl: Add SPEAr13xx pinctrl drivers
  pinctrl: SPEAr: Create macro for declaring GPIO PINS
  SPEAr13xx: Add common clock framework support
  ...
2012-05-26 13:05:55 -07:00
Linus Torvalds 813a95e5b4 arm-soc: soc-specific pinctrl changes
With this, five platforms are moving to the relatively new pinctrl
 subsystem for their pin management, replacing the older soc specific
 in-kernel interfaces with common code.
 
 There is quite a bit of net addition of code for each platform being
 added to the pinctrl subsystem. but the payback comes later when adding
 new boards can be done by only providing new device trees instead.
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Merge tag 'pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull arm soc-specific pinctrl changes from Olof Johansson:
 "With this, five platforms are moving to the relatively new pinctrl
  subsystem for their pin management, replacing the older soc specific
  in-kernel interfaces with common code.

  There is quite a bit of net addition of code for each platform being
  added to the pinctrl subsystem.  But the payback comes later when
  adding new boards can be done by only providing new device trees
  instead."

Fix up trivial conflicts in arch/arm/mach-ux500/{Makefile,board-mop500.c}

* tag 'pinctrl' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (61 commits)
  mtd: nand: gpmi: fix compile error caused by pinctrl call
  ARM: PRIMA2: select PINCTRL and PINCTRL_SIRF in Kconfig
  ARM: nomadik: enable PINCTRL_NOMADIK where needed
  ARM: mxs: enable pinctrl support
  video: mxsfb: adopt pinctrl support
  ASoC: mxs-saif: adopt pinctrl support
  i2c: mxs: adopt pinctrl support
  mtd: nand: gpmi: adopt pinctrl support
  mmc: mxs-mmc: adopt pinctrl support
  serial: mxs-auart: adopt pinctrl support
  serial: amba-pl011: adopt pinctrl support
  spi/imx: adopt pinctrl support
  i2c: imx: adopt pinctrl support
  can: flexcan: adopt pinctrl support
  net: fec: adopt pinctrl support
  ARM: ux500: switch MSP to using pinctrl for pins
  ARM: ux500: alter MSP registration to return a device pointer
  ARM: ux500: switch to using pinctrl for uart0
  ARM: ux500: delete custom pin control system
  ARM: ux500: switch over to Nomadik pinctrl driver
  ...
2012-05-22 09:39:42 -07:00
Dong Aisheng 4f6a16bf01 pinctrl: pinctrl-imx: add imx51 pinctrl driver
ChangeLog v1->v2:
* change PIN_FUNC_ID base in binding doc to 0 from 1.

Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-20 21:00:41 +02:00
Dong Aisheng 93fbd3c050 pinctrl: pinctrl-imx: add imx53 pinctrl driver
ChangeLog v1->v2:
* change PIN_FUNC_ID base in binding doc to 0 from 1.

Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-20 21:00:18 +02:00
Viresh Kumar 85ed41a76f pinctrl: Add SPEAr13xx pinctrl drivers
This adds pinctrl driver for SPEAr13xx family. SPEAr13xx family supports two
machines: SPEAr1310 and SPEAr1340.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-14 17:34:07 +02:00
Arnd Bergmann 366695ff70 Merge branches 'depends/pinctrl/devel' and 'depends/rmk/clkdev' into spear/pinctrl
The spear/pinctrl branch has hard dependencies on both the
pinctrl branch and the clkdev branch. We merge those here
to fix it up without having to rebase a branch that has
been pulled into other stable branches already.

Conflicts:
	Documentation/driver-model/devres.txt

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2012-05-12 20:38:42 +02:00
Shawn Guo 17723111e6 pinctrl: add pinctrl-mxs support
Add pinctrl support for Freescale MXS SoCs, i.MX23 and i.MX28.
The driver supports device tree probe only.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-02 01:18:27 +02:00
Dong Aisheng d8fe35727a pinctrl: pinctrl-imx: add imx6q pinctrl driver
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-02 01:14:40 +02:00
Dong Aisheng ae75ff8145 pinctrl: pinctrl-imx: add imx pinctrl core driver
The driver has mux and config support while the gpio is still
not supported.
For select input setting, the driver will handle it internally
and do not need user to take care of it.

The pinctrl-imx core driver will parse the dts file and dynamically
create the pinmux functions and groups.

Each IMX SoC pinctrl driver should register pins with a pin register map
including mux register and config register and select input map to core
for proper operations.

Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-05-02 01:14:40 +02:00
Viresh Kumar 52130b6033 pinctrl: Add SPEAr3xx pinctrl drivers
This adds pinctrl driver for SPEAr3xx family. SPEAr3xx family supports three
families: SPEAr300, SPEAr310 and SPEAr320.

Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
2012-04-22 22:49:25 +02:00
Stephen Warren a3c9454e53 dt: Document Tegra20/30 pinctrl binding
Define a new binding for the Tegra pin controller, which is capable of
defining all aspects of desired pin multiplexing and pin configuration.
This is all based on the new common pinctrl bindings.

Add Tegra30 binding based on Tegra20 binding.

Add some basic stuff that was missing before:
* How many and what reg property entries must be provided.
* An example.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:12 +02:00
Stephen Warren e3f80045e8 dt: Move Tegra20 pin mux binding into new pinctrl directory
This places the file in the new location for all pin controller bindings.

Also, rename the file using the full compatible value for easier
avoidance of conflicts between multiple bindings.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:11 +02:00
Stephen Warren 7a865277fb dt: pinctrl: Document device tree binding
The core pin controller bindings define:
* The fact that pin controllers expose pin configurations as nodes in
  device tree.
* That the bindings for those pin configuration nodes is defined by the
  individual pin controller drivers.
* A standardized set of properties for client devices to define numbered
  or named pin configuration states, each referring to some number of the
  afore-mentioned pin configuration nodes.
* That the bindings for the client devices determines the set of numbered
  or named states that must exist.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Dong Aisheng <dong.aisheng@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-18 13:53:11 +02:00