Commit Graph

6 Commits

Author SHA1 Message Date
Martin Blumenstingl 2cb51a8ddd ARM: dts: meson: add the efuse node
Meson6, Meson8 and Meson8b use a similar IP block which has access to
512 bytes of efuse data.
During SoC manufacturing some calibration settings for the CVBS
connector and the internal temperature sensor are written to this efuse.
On some boards it additionally stores for example the MAC addresses.

The efuse is enabled on Meson8 and Meson8b but kept disabled on Meson6
since we do not have a clock driver there (which is required to read
data from the efuse).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-10-29 09:00:38 -07:00
Neil Armstrong ec9b59162f ARM: dts: meson6: use stable UART bindings
The UART bindings needs specifying a SoC family, use the meson6 family
for the UART nodes like the other nodes.
Switch to the stable UART bindings for meson6 by adding a XTAL node and
using the proper compatible strings.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-08-08 14:49:12 -07:00
Martin Blumenstingl 7a16f06b90 ARM: dts: meson: use C preprocessor friendly include syntax
This replaces the "/include/" syntax with the "#include" syntax in all
Amlogic Meson .dts and .dtsi files. That is required to use preprocessor
defines (like GIC_SPI and IRQ_TYPE_EDGE_RISING) in meson.dtsi (all files
which directly or indirectly include meson.dtsi need to use the
"#include" syntax, otherwise the .dts files cannot be compiled).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-06-16 12:07:09 -07:00
Martin Blumenstingl 200a575b68 ARM: dts: meson: organize devices in their corresponding busses
The Amlogic Meson SoCs have most of the internal peripherals organized
in busses. Use them to make the dts easier to read and to avoid
duplicated register (bus) offset definitions.

The bus information is taken from the vendor kernel:
	#define IO_CBUS_PHY_BASE        0xc1100000  ///2M
	#define IO_AOBUS_PHY_BASE       0xc8100000  ///1M

There are more internal busses (such as the abp bus which seems to
contain audio, HDMI and Mali registers), but since we don't have
drivers for them yet these are not added (yet).

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
[khilman: minor whitespace fix]
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-05-26 11:23:08 -07:00
Beniamino Galvani 550ab390d7 ARM: meson: DTS: enable L2 cache
This enables the L2 cache controller available in Amlogic SoCs.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Carlo Caione <carlo@caione.org>
2014-11-18 16:36:14 +01:00
Carlo Caione 6b112e2414 ARM: meson: dts: add basic Meson/Meson6/Meson6-atv1200 DTSI/DTS
The Meson6 SoC is produced by Amlogic inc. and it is based on 2 Cortex
A9 and an ARM Mali-400 GPU.
This patch adds two basic DTSI for the preliminary support of Meson and
Meson6 SoCs. Another DTS is also added for supporting the atv1200 board,
produced by Geniatech inc.

Signed-off-by: Carlo Caione <carlo@caione.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-09-25 17:34:14 +02:00