Commit Graph

874 Commits

Author SHA1 Message Date
Arnd Bergmann 3262b82d0c Amlogic driver updates for v4.17
- socinfo: add more IDs for newer SoC detection
 - firmware: update init to use module_platform_driver_probe
 - soc: mix. VPU power controller fixes
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAlqwThMACgkQWTcYmtP7
 xmVekA//eggAtImxhKuH54lkypYjB9b/M4U+ZVq1JohKehy+3I3oynKHptuX22/V
 qAcC9om2kksPANdGh6V1l4xxCBQ/bBOzOoGneuM1v6TuTpPCOEqy9MVyKKhkqt9c
 ubN7DNd5N18APTtGDCwnbRv2PseWc0F0D0Bn3QerLuH9vlrQ8QISBZz8FUbOHzi7
 ibHrX+MoWlShSFn5/9htELg9YlN0eqjl2GSLDW2AeifDVZ0RqhHAIrLUxucQxuNI
 tQdWEv9KL86k5nLdvKnqf5PZfWzWp0KZPKk+wA4EoFbgWE89S/v+jvih9l/Pnhl4
 gMDUPQTv9JQKT+o85XCyRnB5+MVovO0i/KWE4qwJQsufQILVNnPdAAEpZzZzdfRf
 VpV2nMtoBFPTwhus4vgp9I0rkxXgTY3TuqOrNkVzyYySp7SW3Ic34380RJ/V2lQ8
 C3DLQErz2x8B8BKtWbNZNKXIlb5KimSgM/MU5lnSBFZvJj7fCkGT9I2HM6FLIgh7
 3OglzmNsdZhOkMI5E8Y3Q2r3UcXM2zLPQgMi9fDjL1z8TiXvO06NcRlLFLA7KI+O
 +NkgBCPuVAEuyfZQsD9HlwmbaMF4GMKY3VVAgn4R/8h/uyzmfI3nwBybmeJTvWST
 TRBkJ0Cw4LqxUPhJe51WpX2J5twn3sbuW32yMybxMsMlCbj5hv0=
 =5/NR
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-drivers' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/drivers

Pull "Amlogic driver updates for v4.17" from Kevin Hilman:

- socinfo: add more IDs for newer SoC detection
- firmware: update init to use module_platform_driver_probe
- soc: mix. VPU power controller fixes

* tag 'amlogic-drivers' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  amlogic: meson-gx-socinfo: Update soc ids
  firmware: meson-sm: rework meson_sm_init to use module_platform_driver_probe
  meson-gx-socinfo: make local function meson_gx_socinfo_init static
  meson-mx-socinfo: Make local function meson_mx_socinfo_init() static
  soc: amlogic: meson-gx-pwrc-vpu: fix error on shutdown when domain is powered off
  soc: amlogic: meson-gx-pwrc-vpu: don't print error message on probe deferral
2018-03-27 15:54:23 +02:00
Arnd Bergmann 03836dd07f scpsy:
- mt2712: update power domains to reflect design changes in the SoC
 - fix initialisation of power subdomains
 - add support for mt7623a SoC
 - use defines for mt2701 bus protection mask
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAlqvjTgXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00Nx+RAAh+SbaVBj6YPtcB5JtcEMNv8/
 a52WvEDXDNSOKakUphsjxNY/n0WOq/IyntFyNQqBlQBDziWubj49ZH6BZ7UBxHXK
 Xi1IXek7tD8iu0BOyMC1fKF5Y0HUvlRW/bHNXvtFMDzaTA5zN2ZrpAiKvBkXMcW2
 kgb2grv+YXphNo+v9YeYupP8pjyHYCqJ8tY7w44qMp3FigSaMMvtAVQRF36JIsk9
 c606gv3laYdS2EMQDTUMV5sEbYK7V4YwC4a32f/vPe/Rur32NrfG8WkM3abU9KQa
 3HxomsjUkdoW9ddE0JXH5xlh+XlYW02PYYmQH+fBsfj94so8vBVonrKnuIgVf98L
 V159Bt6S8g1IO/Cr80ZGwKyai9Lj7keLSwbkZFJ6qryrFqSVqXSfX2IAZkwjoiTY
 UxGoBEjDC06ExHlxv1dJK0xj6aCfqlCvfgfpsrOTVe/BBg8CTQMdFGHW31CsRPuc
 TrtAuAXzV5EI1GW+Wrv71VW+UXB6RzoZ+4R30KqSp5e7PJ0gRgf9ujBCqfVYsPka
 7rd85JfLzTOICNyA+MSFK6q2FAR7pA3FK4bOhcKVen3bZz0bmsfjXcMjPFTF57jZ
 3qm5NkX2xyW/kSd6WGRKyNRhGR5jx5EYjW7eIEmzwLt1S9SdAMv/TAggt+yfKSmg
 uasH0EPCGoVTX1rApSg=
 =BL8y
 -----END PGP SIGNATURE-----

Merge tag 'v4.16-next-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into next/drivers

Pull "ARM: mediatek: updates for soc drivers for v4.16-next" from Matthias Brugger:

scpsy:
- mt2712: update power domains to reflect design changes in the SoC
- fix initialisation of power subdomains
- add support for mt7623a SoC
- use defines for mt2701 bus protection mask

* tag 'v4.16-next-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: update power domain data of MT2712
  dt-bindings: soc: update MT2712 power dt-bindings
  soc: mediatek: fix the mistaken pointer accessed when subdomains are added
  soc: mediatek: add SCPSYS power domain driver for MediaTek MT7623A SoC
  soc: mediatek: avoid hardcoded value with bus_prot_mask
  dt-bindings: soc: add header files required for MT7623A SCPSYS dt-binding
  dt-bindings: soc: add SCPSYS binding for MT7623 and MT7623A SoC
2018-03-27 15:53:04 +02:00
Arnd Bergmann 498b565154 soc/tegra: Changes for v4.17-rc1
This contains more Tegra194 support as well as an implementation for the
 MBIST workaround needed to avoid some memory-related issues on Tegra210.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlqveZMTHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoTM+EACS/YsxSNWQJ8LQkh71Cjf9mdMg5TAb
 Nutd+4d10qWuMxJGm9hmpBS5i48QNRAFmZ6K5F9FZ/mSFpVN9Gni+9YkdkhKRi70
 HWaCQjYM5W+oGmQKZnB+GroG0670jK1esMCd+boDgI2XAQCGS20auQb1n1ZB4f8L
 h4uIwoH+iN4PtxjdF/E0Mhzc7VzDPYRoJJZx5tm8MH8KLKP6aoCQ8ZTsZRg+eD6Q
 IbSjUJrPDq6179cQJmIYwvt4xyppLGCjtmvAD8cCoAFgEM69QMb7HzU5ju32unFl
 zdIxJHJ7b0/1Ttv1JIS+YZiwkDlHUhl0Xf2h5H+8T/XoZZWg0soKxlg5BaoNsphJ
 3jcxRbLX136QiWc8D0HrCFoibfEsD+Ef9K/+u0qTFy0XugNR9dzDrrPL9oOaUCSq
 2duJvyD7Lxqz/iAdJ34T1rWkzmzZa4qAujgWmltgqEg+fhs8GSyTw4yDM0aEesed
 42lGmWfraz7fZ+e1YqBZzxv+lDpULdTR10IIt+aKwTV7tMg/ivZtwfn6kwxVjkIY
 gd1RPrud0T24qLm+h/xxfG69XmFOW2cS1my87vuJeCvhOZmRzDAopfVZHkWMrKlU
 l4tgqFStorWXvzJkzBv3UHrGvwFdTcAP2nMVtAcNtTzIw0S6VNRK3c+1vhaS4vbN
 jWDsDc8rW9E4DQ==
 =MGgs
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-4.17-soc-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

Pull "soc/tegra: Changes for v4.17-rc1" from Thierry Reding:

This contains more Tegra194 support as well as an implementation for the
MBIST workaround needed to avoid some memory-related issues on Tegra210.

* tag 'tegra-for-4.17-soc-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: pmc: Use the new reset APIs to manage reset controllers
  soc/tegra: pmc: Pass PMC to tegra_powergate_power_up()
  soc/tegra: pmc: MBIST work around for Tegra210
  soc/tegra: pmc: Add Tegra194 compatibility string
  soc/tegra: Add Tegra194 SoC configuration option
2018-03-27 15:51:58 +02:00
Arnd Bergmann 59162c9366 Renesas ARM Based SoC Updates for v4.17
01d675f159 ARM: shmobile: rcar-gen2: Add watchdog support
 58adf1ba0d ARM: shmobile: Add watchdog support
 
 * SoC
   - Identify R-Car V3H (r8a77980) and M3N (r8a77965)
 
   - Enable R-Car Gen2 regulator quirk for Stout board with H3 (r8a7790) SoC
 
     Marek Vaust says "Regulator setup is suboptimal on H2 Stout too. The
     Stout newly has two DA9210 regulators, so the quirk is extended to
     handle another DA9210 at i2c address 0x70."
 
   - Add watchdog support
 
     This is the SoC portion of the following solution. It is not yet
     enabled in DT as it is not functional without clock dependencies
     in place.
 
     Fabrizio Castro says "this series has been around for some time as RFC,
     and it has collected useful comments from the community along the way.
     The solution proposed by this patch set works for most R-Car Gen2 and
     RZ/G1 devices, but not all of them. We now know that for some R-Car
     Gen2 early revisions there is no proper software fix. Anyway, no
     product has been built around early revisions, but development boards
     mounting early revisions (basically prototypes) are still out there.
     As a result, this series isn't enabling the internal watchdog on R-Car
     Gen2 boards, developers may enable it in board specific device trees if
     needed.  This series has been tested by me on the iwg20d, iwg22d,
     Lager, Alt, and Koelsch boards.
 
    The problem
    ===========
    To deal with SMP on R-Car Gen2 and RZ/G1, we install a reset vector to
    ICRAM1 and we program the [S]BAR registers so that when we turn ON the
    non-boot CPUs they are redirected to the reset vector installed by Linux
    in ICRAM1, and eventually they continue the execution to RAM, where the
    SMP bring-up code will take care of the rest.  The content of the [S]BAR
    registers survives a watchdog triggered reset, and as such after the
    watchdog fires the boot core will try and execute the SMP bring-up code
    instead of jumping to the bootrom code.
 
    The fix
    =======
    The main strategy for the solution is to let the reset vector decide if
    it needs to jump to shmobile_boot_fn or to the bootrom code.  In a
    watchdog triggered reset scenario, since the [S]BAR registers keep their
    values, the boot CPU will jump into the newly designed reset vector, the
    assembly routine will eventually test WOVF (a bit in register RWTCSRA
    that indicates if the watchdog counter has overflown, the value of this
    bit gets retained in this scenario), and jump to the bootrom code which
    will in turn load up the bootloader, etc.  When bringing up SMP or using
    CPU hotplug, the reset vector will jump to shmobile_boot_fn instead."
 
 * R-Car Rst
   - Add support for R-Car V3H (r8a77980) and V3H (r8a77980)
 
 * R-Car SYSC
   - Mark rcar_sysc_matches[] __initconst
 
    Geert Uytterhoeven says "This frees another 1764 bytes
    (arm32/shmobile_defconfig) or 1000 bytes (arm64/renesas_defconfig) of
    memory after kernel init."
 
   - Fix power area parents
 
     Sergei Shtylyov says "According to the figure 9.2(b) of the R-Car
     Series, 3rd Generation User’s Manual: Hardware Rev. 0.80 the A2IRn and
     A2SCn power areas in R8A77970 have the A3IR area as a parent, thus the
     SYSC driver has those parents wrong.."
 
   - Add support for R-Car V3H (r8a77980) and V3H (r8a77980)
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlqr2U0ACgkQ189kaWo3
 T76GQQ//TglmA64QnoynoYa7VR5VBvMoT4Hfd2LhUQaJ5dlqtnaIeipPIc/k5rlH
 qsw5Jp7OlkNWAwchlIqkto+vfNhuxHItqvZoBnmrI2otEUvbaJ+9A2xAuhmYBxxH
 awKoSTY4A+n8GFcCIOvYMzvRKVFUSIDSWYvYQSJtu6OyXZYI244qwcytgDyuHdRE
 mS1nqdQkAcuxEdTLSwjct0puZTWMR41+NOM0B7qvVLDi2bnONUSS0ktLoEBiYO5D
 Q7fpDOg6OZjIjVPYYb7hPSVw+jo+imyqgYdQ9CJu/r9j6Q7pn22NZ8MKWcTFsfYY
 ZUhcJp1vHhTGMRupkgTi+oWSA7TFw1oxb1ZFCP1C5hL+mfryybVe5pBEwetOHg8A
 DGb6OejvC1/amVArTco7JJ1Ul6Q2IU5UcvuOtmfT7UPNw05O/dIYjjV/BVfBHcGC
 cDgVLq8Y6PGHjU2Jx1botuPdMSVsgZrQzbc8h7p02z9Klr9Drzh9+5oox5oxUlqb
 A+60+OBHizY4g2/TCKvtPMWtEBt1Wjhayx/fF1EwD7/K16Wb2UFKizKbeZPTXHpH
 KlltgVucDvqr/otJFBgS+Kg/7+ITq6hHrB3KCk4bjk+6qSXiZ93p58c4l7+A+JTB
 S9q02YQC+cvy0StMrCpuc2R9n9EK0tmXFvv5hF8Ls938caGl6rI=
 =S1q0
 -----END PGP SIGNATURE-----

Merge tag 'renesas-soc-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Pull "Renesas ARM Based SoC Updates for v4.17" from Simon Horman:

01d675f159 ARM: shmobile: rcar-gen2: Add watchdog support
58adf1ba0d ARM: shmobile: Add watchdog support

* SoC
  - Identify R-Car V3H (r8a77980) and M3N (r8a77965)

  - Enable R-Car Gen2 regulator quirk for Stout board with H3 (r8a7790) SoC

    Marek Vaust says "Regulator setup is suboptimal on H2 Stout too. The
    Stout newly has two DA9210 regulators, so the quirk is extended to
    handle another DA9210 at i2c address 0x70."

  - Add watchdog support

    This is the SoC portion of the following solution. It is not yet
    enabled in DT as it is not functional without clock dependencies
    in place.

    Fabrizio Castro says "this series has been around for some time as RFC,
    and it has collected useful comments from the community along the way.
    The solution proposed by this patch set works for most R-Car Gen2 and
    RZ/G1 devices, but not all of them. We now know that for some R-Car
    Gen2 early revisions there is no proper software fix. Anyway, no
    product has been built around early revisions, but development boards
    mounting early revisions (basically prototypes) are still out there.
    As a result, this series isn't enabling the internal watchdog on R-Car
    Gen2 boards, developers may enable it in board specific device trees if
    needed.  This series has been tested by me on the iwg20d, iwg22d,
    Lager, Alt, and Koelsch boards.

   The problem
   ===========
   To deal with SMP on R-Car Gen2 and RZ/G1, we install a reset vector to
   ICRAM1 and we program the [S]BAR registers so that when we turn ON the
   non-boot CPUs they are redirected to the reset vector installed by Linux
   in ICRAM1, and eventually they continue the execution to RAM, where the
   SMP bring-up code will take care of the rest.  The content of the [S]BAR
   registers survives a watchdog triggered reset, and as such after the
   watchdog fires the boot core will try and execute the SMP bring-up code
   instead of jumping to the bootrom code.

   The fix
   =======
   The main strategy for the solution is to let the reset vector decide if
   it needs to jump to shmobile_boot_fn or to the bootrom code.  In a
   watchdog triggered reset scenario, since the [S]BAR registers keep their
   values, the boot CPU will jump into the newly designed reset vector, the
   assembly routine will eventually test WOVF (a bit in register RWTCSRA
   that indicates if the watchdog counter has overflown, the value of this
   bit gets retained in this scenario), and jump to the bootrom code which
   will in turn load up the bootloader, etc.  When bringing up SMP or using
   CPU hotplug, the reset vector will jump to shmobile_boot_fn instead."

* R-Car Rst
  - Add support for R-Car V3H (r8a77980) and V3H (r8a77980)

* R-Car SYSC
  - Mark rcar_sysc_matches[] __initconst

   Geert Uytterhoeven says "This frees another 1764 bytes
   (arm32/shmobile_defconfig) or 1000 bytes (arm64/renesas_defconfig) of
   memory after kernel init."

  - Fix power area parents

    Sergei Shtylyov says "According to the figure 9.2(b) of the R-Car
    Series, 3rd Generation User’s Manual: Hardware Rev. 0.80 the A2IRn and
    A2SCn power areas in R8A77970 have the A3IR area as a parent, thus the
    SYSC driver has those parents wrong.."

  - Add support for R-Car V3H (r8a77980) and V3H (r8a77980)

* tag 'renesas-soc-for-v4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: rcar-gen2: Add watchdog support
  ARM: shmobile: Add watchdog support
  ARM: shmobile: rcar-gen2: Fix error check in regulator quirk
  soc: renesas: rcar-rst: Add support for R-Car M3-N
  ARM: shmobile: stout: enable R-Car Gen2 regulator quirk
  soc: renesas: rcar-sysc: Add R-Car M3-N support
  soc: renesas: Identify R-Car M3-N
  soc: renesas: rcar-sysc: add R8A77980 support
  dt-bindings: power: add R8A77980 SYSC power domain definitions
  soc: renesas: r8a77970-sysc: fix power area parents
  soc: renesas: rcar-rst: Enable watchdog as reset trigger for Gen2
  soc: renesas: rcar-rst: add R8A77980 support
  soc: renesas: identify R-Car V3H
  soc: renesas: rcar-sysc: Mark rcar_sysc_matches[] __initconst
2018-03-27 15:45:03 +02:00
Arnd Bergmann c073f31a96 Amlogic 64-bit DT updates for v4.17
- AXG: add/enable UART_A, I2C, RMII, system controller, HW RNG
 - accept MAC from u-boot environment
 - misc. fixes
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAlqwTz0ACgkQWTcYmtP7
 xmVt9Q/8CW7750OL2cQjPSCh9ZH3hQykjL2fbW+7Glljm98Oz3lDhFq88OWscSvD
 ciI5ysQxqJHLk65BSDflXdFG05m//rcPYfMbh5Qgvs9j5NFJs6FCYjwaLTDN8t9L
 uoRre6xYkaJO2CSPEWcVrKiEZM9gN6tnH9DR17jxf0ZUQc23atZYMDe5DfEXmEvn
 /D4bcuwVmkK0Md5MmWhNicvlYZsoPdDZXJ0B1luAsLTI38ynUTJYZjMtObVZRVrL
 ucYuhzZ6uxuDXDUXnbvOEW34/qyCVCXcoMYh+8G6SjKa95jXYnSG8iPckOe+dXW4
 Oq5w4WyVUrKSQ1dqNkekdIlvw+587+OivyJ/bkc1GHaUp870gGAs1LtLUX4frAa0
 tGWbJUzRHLLy2RTFl3ExSb17zYRXPQyjIUQE25IgQtNxbzjDoV3/gvx3+g4C/MLp
 hm3KB/mTkl8V0nKqFqsHGzF/BOxvJn2LNuxMiDn5WAOJ8f/Z9GvSo5jZbtXMyWFi
 w1FfhQoSOeqQpn5bBSkqHc8GyFEygUF9FYOrHtKVt/PMo++Slp3iMQTheFLE0euB
 CcIfNP49vgnYHPheVSVhqscZFofm8YMwZw0cgC32n9HlMgeagpj5BUP6/+cMv+in
 p2WyCkZtKLCkHtlQsoGWiZtkVhY/S6te9fomL+sRu9xxQ0iVdw8=
 =i0VK
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-dt64' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt

Pull "Amlogic 64-bit DT updates for v4.17" from Kevin Hilman:

- AXG: add/enable UART_A, I2C, RMII, system controller, HW RNG
- accept MAC from u-boot environment
- misc. fixes

* tag 'amlogic-dt64' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  ARM64: dts: meson-gx: make efuse read-only
  ARM64: dts: meson: bump mali450 clk to 744MHz
  meson-gx-socinfo: Add package id for S905H
  ARM64: dts: meson-gxbb-wetek: add a wetek specific dtsi to cleanup hub and play2
  ARM64: dts: meson: reduce odroid-c2 eMMC maximum rate
  ARM64: dts: amlogic: Convert to new-style SPDX license identifiers
  ARM64: dts: meson-axg: fix pwm_AO_cd compatible
  ARM64: dts: meson-axg: add sec_AO system controller
  ARM64: dts: meson: accept MAC addr from u-boot environment
  ARM64: dts: meson s905x: accept MAC addr from u-boot environment
  ARM64: dts: meson-axg: enable the UART_A controller
  ARM64: dts: meson-axg: complete the pinctrl info for UART_AO_A
  ARM64: dts: meson-axg: uart: Add the pinctrl info description
  ARM64: dts: meson-axg: uart: drop legacy compatible name from EE UART
  ARM64: dts: meson-axg: add RMII pins for ethernet controller
  ARM64: dts: meson-axg: enable I2C Master-1 for the audio speaker
  ARM64: dts: meson-axg: describe pin DT info for I2C controller
  ARM64: dts: meson-axg: add I2C DT info for Meson-AXG SoC
  ARM64: meson-axg: enable hardware rng
2018-03-27 14:21:05 +02:00
David S. Miller 03fe2debbb Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Fun set of conflict resolutions here...

For the mac80211 stuff, these were fortunately just parallel
adds.  Trivially resolved.

In drivers/net/phy/phy.c we had a bug fix in 'net' that moved the
function phy_disable_interrupts() earlier in the file, whilst in
'net-next' the phy_error() call from this function was removed.

In net/ipv4/xfrm4_policy.c, David Ahern's changes to remove the
'rt_table_id' member of rtable collided with a bug fix in 'net' that
added a new struct member "rt_mtu_locked" which needs to be copied
over here.

The mlxsw driver conflict consisted of net-next separating
the span code and definitions into separate files, whilst
a 'net' bug fix made some changes to that moved code.

The mlx5 infiniband conflict resolution was quite non-trivial,
the RDMA tree's merge commit was used as a guide here, and
here are their notes:

====================

    Due to bug fixes found by the syzkaller bot and taken into the for-rc
    branch after development for the 4.17 merge window had already started
    being taken into the for-next branch, there were fairly non-trivial
    merge issues that would need to be resolved between the for-rc branch
    and the for-next branch.  This merge resolves those conflicts and
    provides a unified base upon which ongoing development for 4.17 can
    be based.

    Conflicts:
            drivers/infiniband/hw/mlx5/main.c - Commit 42cea83f95
            (IB/mlx5: Fix cleanup order on unload) added to for-rc and
            commit b5ca15ad7e (IB/mlx5: Add proper representors support)
            add as part of the devel cycle both needed to modify the
            init/de-init functions used by mlx5.  To support the new
            representors, the new functions added by the cleanup patch
            needed to be made non-static, and the init/de-init list
            added by the representors patch needed to be modified to
            match the init/de-init list changes made by the cleanup
            patch.
    Updates:
            drivers/infiniband/hw/mlx5/mlx5_ib.h - Update function
            prototypes added by representors patch to reflect new function
            names as changed by cleanup patch
            drivers/infiniband/hw/mlx5/ib_rep.c - Update init/de-init
            stage list to match new order from cleanup patch
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-23 11:31:58 -04:00
Neil Armstrong f842c41adc amlogic: meson-gx-socinfo: Update soc ids
Updates the Amlogic Meson SoCs IDs for the Armv8 based SoCs.
It includes the new families and packages.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-03-19 16:40:26 -07:00
Vivek Gautam 4c817ccf73 soc/tegra: pmc: Use the new reset APIs to manage reset controllers
Make use of of_reset_control_array_get_exclusive() to manage
an array of reset controllers available with the device.

Cc: Jon Hunter <jonathanh@nvidia.com>
Cc: Thierry Reding <treding@nvidia.com>
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
[p.zabel@pengutronix.de: switch to hidden reset control array]
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-19 09:42:39 +01:00
weiyi.lu@mediatek.com 9f99712661 soc: mediatek: update power domain data of MT2712
1. split MFG power domain into MFG/MFG_SC1/MFG_SC2/MFG_SC3
according to MT2712 ECO design change
2. add subdomain support for MT2712

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2018-03-19 02:29:05 +01:00
Arnd Bergmann 3bea9c5885 i.MX drivers update for 4.17:
- Set GENPD_FLAG_ALWAYS_ON flag for ARM power domain to avoid incorrect
    power state in sysfs pm_genpd_summary output.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJaqhgpAAoJEFBXWFqHsHzO+HQIAK083nPxXb2GigUS5UzAhmrh
 cYjLhjb+G69B3Oor7hr/SZq1Qe1xYjSyyvK7AeemHnLs/+/UEQqirE3MLCSh8UAU
 7oqyTZc2/YhAluqT2nsVoxFMtyXt4d6FVouwGgwVv+x12hk/+fk11z49PE+G/bwo
 4G5y3l7pggjzbFtZNMMZR5h8KngT2s7aOBKCnL89eVyKsdkmcweSdDqKVLn+3XJc
 Nw8+QqpyqQtxrTrXofsq8Vma+jFpZ+lVRHTHsWsk3OTfKd2U+zhIyjj9AvADup+b
 C+UVHdNP8P+jNjWfXjlgwLGogIGDRk1shO/rmQ4BvQglDEt9G5Ig3M/TMWeasPE=
 =fcu2
 -----END PGP SIGNATURE-----

Merge tag 'imx-drivers-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers

Pull "i.MX drivers update for 4.17" from Shawn Guo:

 - Set GENPD_FLAG_ALWAYS_ON flag for ARM power domain to avoid incorrect
   power state in sysfs pm_genpd_summary output.

* tag 'imx-drivers-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: gpc: ARM power domain should be always-on
2018-03-15 16:23:33 +01:00
Madalin Bucur 96f413f476 soc/fsl/qbman: fix issue in qman_delete_cgr_safe()
The wait_for_completion() call in qman_delete_cgr_safe()
was triggering a scheduling while atomic bug, replacing the
kthread with a smp_call_function_single() call to fix it.

Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-14 13:16:23 -04:00
Sean Wang 73ce2ce129 soc: mediatek: fix the mistaken pointer accessed when subdomains are added
Fix the pointer to struct scp_subdomian not being moved forward
when each sub-domain is expected to be iteratively added through
pm_genpd_add_subdomain call.

Cc: stable@vger.kernel.org
Fixes: 53fddb1a66 ("soc: mediatek: reduce code duplication of scpsys_probe across all SoCs")
Reported-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2018-03-11 23:46:50 +01:00
Sean Wang c932ba8c38 soc: mediatek: add SCPSYS power domain driver for MediaTek MT7623A SoC
Add SCPSYS power domain driver for MT7623A SoC. The MT7623A's power
domains are the subset of MT7623 SoC's ones. As MT7623 SoC has full
features whereas MT7623A is being designed just for router applications.
Thus, MT7623A doesn't include those power domains multimedia function
belongs to. In order to avoid certain errors undoubtedly happening at
registering those power domains on MT7623A SoC using the existing MT7623
SCPSYS driver, it's required to define another setup specifically for
MT7623A SoC.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2018-03-11 23:43:07 +01:00
Sean Wang c59c9c85e3 soc: mediatek: avoid hardcoded value with bus_prot_mask
use a meaningful definition for bus_prot_mask instead of just hardcoded
for it.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2018-03-11 23:42:57 +01:00
Bjorn Andersson 90c29ed762 soc: qcom: wcnss_ctrl: Fix increment in NV upload
hdr.len includes both the size of the header and the fragment, so using
this when stepping through the firmware causes us to skip 16 bytes every
chunk of 3072 bytes; causing only the first fragment to actually be
valid data.

Instead use fragment size steps through the firmware blob.

Fixes: ea7a1f275c ("soc: qcom: Introduce WCNSS_CTRL SMD client")
Reported-by: Will Newton <will.newton@gmail.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-03-08 18:40:35 -06:00
Bjorn Andersson fa65f80451 soc: qcom: rmtfs-mem: Add support for assigning memory to remote
On some platform the remote processor's memory map is not statically
configured in TrustZone, so each memory region that is to be accessed by
the remote needs a call into TrustZone to set up the remote's
permissions.

Implement this for the rmtfs memory driver, to give the modem on 8996
access to the shared file system buffers.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-03-08 18:40:24 -06:00
Thierry Reding 507c655a06 soc/tegra: pmc: Pass PMC to tegra_powergate_power_up()
tegra_powergate_sequence_power_up() makes up a struct tegra_powergate
from scratch in order to reuse the same code as used by the generic PM
domain implementation. However, subsequent patches will need to access
the struct tegra_pmc * embedded in the powergate structure, so we need
to make sure we always pass it in.

Tested-by: Hector Martin <marcan@marcan.st>
Tested-by: Andre Heider <a.heider@gmail.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08 17:02:43 +01:00
Peter De Schrijver a263394a09 soc/tegra: pmc: MBIST work around for Tegra210
Apply the memory built-in self test work around when ungating certain
Tegra210 power domains.

Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Hector Martin <marcan@marcan.st>
Tested-by: Andre Heider <a.heider@gmail.com>
Tested-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08 17:02:24 +01:00
Mikko Perttunen 56327f54d9 soc/tegra: pmc: Add Tegra194 compatibility string
The Tegra194 PMC is mostly compatible with Tegra186, including in all
currently supported features. As such, add a new compatibility string
but point to the existing Tegra186 SoC data for now.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08 16:44:01 +01:00
Mikko Perttunen 6f9ed07fde soc/tegra: Add Tegra194 SoC configuration option
Add the configuration option to enable support for the Tegra194 system-
on-chip.

Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-03-08 16:44:01 +01:00
Neil Armstrong 6878231f25 meson-gx-socinfo: Add package id for S905H
The S905H can be found on the Wetek Hub and Play2 boards.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-03-07 17:26:13 -08:00
Arnd Bergmann 49774d86fd Samsung soc drivers changes for v4.17
1. Add SPDX license identifiers.
 2. Populate children syscon nodes in PMU driver to properly model HW in
    DeviceTree.
 -----BEGIN PGP SIGNATURE-----
 
 iQItBAABCAAXBQJansqTEBxrcnprQGtlcm5lbC5vcmcACgkQwTdm5oaLg9f6kQ//
 Wjkcsmj/mqaVaE6QphO0ZMXHXKZKQwY3jRkr8ofQWhAYNKuF9Jq/vLK8G9YDAAs7
 yxK+R7wXXACq2p/a5w7FWdZhQ1F7WZFxF2/cdXjhLH9zEUlkcv05cSQaj7M3pCjQ
 CU3ps6nvdtVIDwAgZT/4lSDQdIzZdkhhOdTK1iVR2PK8fLHNB88gPr+aSXLwkN18
 SLULwONNTSfgNH4BniXqypGdvqo/yWFa3CChw80CBKV0I6ubYfvGhIg0hlVCoA+7
 KibF8CCbHZiblExeDIQWTDNko4e6piNkLyHoQdTvTQ00f4fWxPmIIdzKn0q0JuPP
 BK9VKEO4lX8vXXEH6RYGNnwxYb0C+Jz56ffuyRnSv9XiU2khjWOPx60u4Osx5hMX
 UtMvpj/Ty8WKd7XWJcU/BdXH7j3gz9Q5lX/ZSRh2YEROzE+G2PMzMC7eNW3+NSGx
 3lIuScPHWkYVeg1TCtwwg4Dy/lSKfNTVFbqfzKRUtKvQygLsCTVmUdtRM8BG6mYf
 xybCwZOAUf6a9u5ZeItzINZT03R46vuGjKi6jZYwA3Loe/LDf5CLUeN/+yW2kIDY
 h8WpwSel97h2d6j4fqHVLKK45PFjh37DisRIWN6J4gdPhS7Jd0bIkmxQIoP+bccn
 DPWDJ65N7ubZuoUjuZcC4DuyZHOnJjXUqZbPJy2MzEQ=
 =N7M0
 -----END PGP SIGNATURE-----

Merge tag 'samsung-drivers-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers

Pull "Samsung soc drivers changes for v4.17" from Krzysztof Kozłowski:

1. Add SPDX license identifiers.
2. Populate children syscon nodes in PMU driver to properly model HW in
   DeviceTree.

* tag 'samsung-drivers-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  soc: samsung: pmu: Populate children syscon nodes
  soc: samsung: Add SPDX license identifiers to headers
  memory: samsung: Add SPDX license identifiers
2018-03-07 16:52:19 +01:00
Arnd Bergmann 18b4788bad Add am335x and am437x PM code for v4.17
This series of changes from Dave Gerlach adds the PM related
 code to allow low-power suspend states. The code consists of
 the SoC specific assembly code and a related PM driver.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlqdeI4RHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXPRoxAA3M1qhApgnJBrvCoVbOQbDsL/Jst5geJz
 eQIQMjqzLTJQDd6+0SJVggjRhDYW2mKk+SYbpbzjVfmdJeKAIX3IZj9MUMstbRSD
 g8YCzSpW9C2EuOHlDhDDd4U6pc7/pMmWHH87PMaj05Qfct+hcSpI7OB5RfntX0Os
 mhQ6e3SxlM9EZikiW2BXXjjKmQHYmqkfSZHhjbiGtpEXTa/zq/fVM67NEjdez7/F
 1Uy3Hefv895H0TU+P3TtzLmvcQQn4JrIXNqi4wWM7ATf6MN9d9cPMxZ9mdTweCgd
 B0nSYgwwzXS2bNd7KhtghAXckGqLRL+0CifB0xw+jCExwL+aOQPwKdvbfnF2JVqe
 R8MochWgDBUAVX8hYpYD+IJ6qeoWFfu4ZEwFeMaQ0M2T7I417SSRwtNF2P9YSYOj
 b6dv8Fe54m8QhPJo2OPD/bbzo2wwNuLqJ9bqI3oy9yrMe5EEAzuhtqGBeg1B4WKB
 zWB2TQYLLl4FVJsfxV7wgsO2fk9xzs1cn70JWqdWMQ1kUl7k0NorZhSVlXt5x+oH
 gPfkWO2S7+Il/FKsOAdb+HeCklDyy/xh/B0VFErHvqXOK78j1IpcUh6I9lgg1GFs
 OXioMaGE13p+yOKQHDGqeK42Qjw2F6cPdkCGm67Mte66IqBV0khLpwK8WwzlcEio
 C5jhVOor2u8=
 =hBzh
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v4.17/am-pm-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc

Pull "Add am335x and am437x PM code for v4.17" from Tony Lindgren:

This series of changes from Dave Gerlach adds the PM related
code to allow low-power suspend states. The code consists of
the SoC specific assembly code and a related PM driver.

* tag 'omap-for-v4.17/am-pm-signed' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  soc: ti: Add pm33xx driver for basic suspend support
  ARM: OMAP2+: pm33xx-core: Add platform code needed for PM
  ARM: OMAP2+: Introduce low-level suspend code for AM43XX
  ARM: OMAP2+: Introduce low-level suspend code for AM33XX
2018-03-07 16:21:59 +01:00
Marek Szyprowski edcefb96fb clk: samsung: exynos5250: Move PD-dependent clocks to Exynos5 sub-CMU
Clocks related to DISP1 block require special handling for power domain
turn on/off sequences. Till now this was handled by Exynos power domain
driver, but that approach was limited only to some special cases. This
patch moves handling of those operations to clock controller driver.
This gives more flexibility and allows fine tune values of some
clock-specific registers. This patch moves handling of those mentioned
clocks to Exynos5 sub-CMU driver instantiated from Exynos5250 driver.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2018-03-06 17:39:40 +01:00
Marek Szyprowski ec4016ff6e clk: samsung: exynos5420: Move PD-dependent clocks to Exynos5 sub-CMU
Clocks related to DISP, GSC and MFC blocks require special handling for
power domain turn on/off sequences. Till now this was handled by Exynos
power domain driver, but that approach was limited only to some special
cases. This patch moves handling of those operations to clock controller
driver. This gives more flexibility and allows fine tune values of some
clock-specific registers. This patch moves handling of those mentioned
clocks to Exynos5 sub-CMU driver instantiated from Exynos5420 driver.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2018-03-06 17:39:16 +01:00
Marek Szyprowski af8d30ac64 soc: samsung: pm_domains: Add blacklisting clock handling
Handling of clock reparenting will be move to clock controller driver,
so add possibility to blacklist clock handling on systems, where the
clock controller already does all needed operations. This is needed
to avoid potential deadlock on clock reparenting during power domain
on/off procedure.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2018-03-06 17:33:37 +01:00
David S. Miller 0f3e9c97eb Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
All of the conflicts were cases of overlapping changes.

In net/core/devlink.c, we have to make care that the
resouce size_params have become a struct member rather
than a pointer to such an object.

Signed-off-by: David S. Miller <davem@davemloft.net>
2018-03-06 01:20:46 -05:00
Jeffy Chen b1271993aa soc: rockchip: power-domain: Add a sanity check on pd->num_clks
The of_count_phandle_with_args() can fail and return error(for example,
rk3399 pd_vio doesn't have clocks). That would break the pd probe.

Add a sanity check on pd->num_clks to avoid that.

Fixes: 65084121d59d ("soc: rockchip: power-domain: use clk_bulk APIs")
Reported-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Tested-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-03-05 19:42:29 +01:00
Jeffy Chen d909072d05 soc: rockchip: power-domain: use clk_bulk APIs
Use clk_bulk APIs, and also add error handling for clk enable.

Signed-off-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-03-05 19:42:28 +01:00
Xiao Yao 6e61c891a0 soc: rockchip: disable jtag switching for RK3128 SoCs
Disable IO function switching between sdmmc and jtag
for RK3128 SoCs.

Signed-off-by: Xiao Yao <xiaoyao@rock-chips.com>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-03-05 19:42:23 +01:00
Linus Torvalds 97ace515f0 ARM: SoC fixes for 4.16
This is the first set of bugfixes for ARM SoCs, fixing a couple
 of stability problems, mostly on TI OMAP and Rockchips platforms:
 
 - OMAP2 hwmod clocks must be enabled in the correct order
 
 - OMAP3 Wakeup from resume through PRM IRQ was unreliable
 
 - One regression on OMAP5 caused by a kexec fix
 
 - Rockchip ethernet needs some settings for stable operation on Rock64
 
 - Rockchip based Chrombook Plus needs another clock setting for
   stable display suspend/resume
 
 - Rockchip based phyCORE-RK3288 was able to run at an invalid
   CPU clock frequency
 
 - Rockchip MMC link was sometimes unreliable
 
 - Multiple fixes to avoid crashes in the Broadcom STB DPFE driver
 
 Other minor changes include:
 
 - Devicetree fixes for incorrect hardware description (rockchip,
   omap, Gemini, amlogic)
 
 - Some MAINTAINER file updates to correct email and git addresses
 
 - Some fixes addressing 'make W=1' dtc warnings (broadcom, amlogic,
   cavium, qualcomm, hisilicon, zx)
 
 - Fixes for LTO-compilation (orion, davinci, clps711x)
 
 - One fix for an incorrect Kconfig errata selection
 
 - A memory leak in the OMAP timer driver
 
 - A kernel data leak in OMAP1 debugfs files
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJalzTaAAoJEGCrR//JCVInBeQP/3wBXCnzfCkmSSliZHoNzgYB
 XGkC+JIqw9AnHvn/ckvHMwUv8kQlbi7ImPXz1P8yafy3h2vHIdN2My0XYtRyQkNT
 NoAxIXT+NiQx9sAoLGY8gWTN4Do63q1vw5SLmOEDD2GYzo1jao4s7J0mhFZopBLw
 WkgHf8t4jRmoBDA4GEYcdJZS5shMydFDyb9CiiqNHVA4S4IL87XcPoJDpJmyVDZ4
 vZVeccyhw0Xh0NJLzRIhVDGRN2pj1ayFFVodfRNTseRGf0QRexntiIyIHa2wOi1l
 93IjJ3XgHuYEj0NNNpZiHV5OZxxRbQlTD/ji5L8j71lklVjIedJsJdWFUKiK53oh
 ufQXTRZaVMmh4xcvihABSchg8vEXMqx4cZ/hj/+LIepDJM6GC39uGipg6enORVym
 BuZpol8b1owABN461Bt2RfAVyXqJ7TRkdVy+RaP7RCsddLEcdKdI6HYi3aeDVmHQ
 krvTrLQhRsDL4IHvi6rQDqyJMf5GDP4y7aInf7YzvJlbV2uU+M0ndiSHpGhw6vbG
 brhc/n56U/waMPG8tOv9AB1+afARQOc4Fo9xg96PADA69SXn7Eq2dgf1D/ern8UQ
 6KgNZ1hmmEHzkxsAXjEcStlmhpwk4lh4T0nSDbamsMRvZRNQaqmskMbmYYepIXKC
 71k/Uwf4CQhMxe2aXIOo
 =fcv0
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Arnd Bergmann:
 "This is the first set of bugfixes for ARM SoCs, fixing a couple of
  stability problems, mostly on TI OMAP and Rockchips platforms:

   - OMAP2 hwmod clocks must be enabled in the correct order

   - OMAP3 Wakeup from resume through PRM IRQ was unreliable

   - one regression on OMAP5 caused by a kexec fix

   - Rockchip ethernet needs some settings for stable operation on
     Rock64

   - Rockchip based Chrombook Plus needs another clock setting for
     stable display suspend/resume

   - Rockchip based phyCORE-RK3288 was able to run at an invalid CPU
     clock frequency

   - Rockchip MMC link was sometimes unreliable

   - multiple fixes to avoid crashes in the Broadcom STB DPFE driver

  Other minor changes include:

   - Devicetree fixes for incorrect hardware description (rockchip,
     omap, Gemini, amlogic)

   - some MAINTAINER file updates to correct email and git addresses

   - some fixes addressing 'make W=1' dtc warnings (broadcom, amlogic,
     cavium, qualcomm, hisilicon, zx)

   - fixes for LTO-compilation (orion, davinci, clps711x)

   - one fix for an incorrect Kconfig errata selection

   - a memory leak in the OMAP timer driver

   - a kernel data leak in OMAP1 debugfs files"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (38 commits)
  MAINTAINERS: update entries for ARM/STM32
  ARM: dts: bcm283x: Move arm-pmu out of soc node
  ARM: dts: bcm283x: Fix unit address of local_intc
  ARM: dts: NSP: Fix amount of RAM on BCM958625HR
  ARM: dts: Set D-Link DNS-313 SATA to muxmode 0
  ARM: omap2: set CONFIG_LIRC=y in defconfig
  ARM: dts: imx6dl: Include correct dtsi file for Engicam i.CoreM6 DualLite/Solo RQS
  memory: brcmstb: dpfe: support new way of passing data from the DCPU
  memory: brcmstb: dpfe: fix type declaration of variable "ret"
  memory: brcmstb: dpfe: properly mask vendor error bits
  ARM: BCM: dts: Remove leading 0x and 0s from bindings notation
  ARM: orion: fix orion_ge00_switch_board_info initialization
  ARM: davinci: mark spi_board_info arrays as const
  ARM: clps711x: mark clps711x_compat as const
  arm: zx: dts: Remove leading 0x and 0s from bindings notation
  arm64: dts: Remove leading 0x and 0s from bindings notation
  arm64: dts: cavium: fix PCI bus dtc warnings
  MAINTAINERS: ARM: at91: update my email address
  soc: imx: gpc: de-register power domains only if initialized
  ARM: dts: rockchip: Fix DWMMC clocks
  ...
2018-02-28 16:11:04 -08:00
Dave Gerlach afe761f8d3 soc: ti: Add pm33xx driver for basic suspend support
AM335x and AM437x support various low power modes as documented
in section 8.1.4.3 of the AM335x Technical Reference Manual and
section 6.4.3 of the AM437x Technical Reference Manual.

DeepSleep0 mode offers the lowest power mode with limited
wakeup sources without a system reboot and is mapped as
the suspend state in the kernel. In this state, MPU and
PER domains are turned off with the internal RAM held in
retention to facilitate the resume process. As part of
the boot process, the assembly code is copied over to OCMCRAM
so it can be executed to turn of the EMIF and put DDR into self
refresh.

Both platforms have a Cortex-M3 (WKUP_M3) which assists the MPU
in DeepSleep0 entry and exit. WKUP_M3 takes care
of the clockdomain and powerdomain transitions based on the
intended low power state. MPU needs to load the appropriate
WKUP_M3 binary onto the WKUP_M3 memory space before it can
leverage any of the PM features like DeepSleep. This loading
is handled by the remoteproc driver wkup_m3_rproc.

Communication with the WKUP_M3 is handled by a wkup_m3_ipc
driver that exposes the specific PM functionality to be used
the PM code.

In the current implementation when the suspend process
is initiated, MPU interrupts the WKUP_M3 to let it know about
the intent of entering DeepSleep0 and waits for an ACK. When
the ACK is received MPU continues with its suspend process
to suspend all the drivers and then jumps to assembly in
OCMC RAM. The assembly code puts the external RAM in self-refresh
mode, gates the MPU clock, and then finally executes the WFI
instruction. Execution of the WFI instruction with MPU clock gated
triggers another interrupt to the WKUP_M3 which then continues
with the power down sequence wherein the clockdomain and
powerdomain transition takes place. As part of the sleep sequence,
WKUP_M3 unmasks the interrupt lines for the wakeup sources. WFI
execution on WKUP_M3 causes the hardware to disable the main
oscillator of the SoC and from here system remains in sleep state
until a wake source brings the system into resume path.

When a wakeup event occurs, WKUP_M3 starts the power-up
sequence by switching on the power domains and finally
enabling the clock to MPU. Since the MPU gets powered down
as part of the sleep sequence in the resume path ROM code
starts executing. The ROM code detects a wakeup from sleep
and then jumps to the resume location in OCMC which was
populated in one of the IPC registers as part of the suspend
sequence.

Code is based on work by Vaibhav Bedia.

Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2018-02-27 08:53:46 -08:00
Jacopo Mondi bf79cd635d soc: renesas: rcar-rst: Add support for R-Car M3-N
Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-23 15:55:01 +01:00
Ingo Molnar ed7158bae4 treewide/trivial: Remove ';;$' typo noise
On lkml suggestions were made to split up such trivial typo fixes into per subsystem
patches:

  --- a/arch/x86/boot/compressed/eboot.c
  +++ b/arch/x86/boot/compressed/eboot.c
  @@ -439,7 +439,7 @@ setup_uga32(void **uga_handle, unsigned long size, u32 *width, u32 *height)
          struct efi_uga_draw_protocol *uga = NULL, *first_uga;
          efi_guid_t uga_proto = EFI_UGA_PROTOCOL_GUID;
          unsigned long nr_ugas;
  -       u32 *handles = (u32 *)uga_handle;;
  +       u32 *handles = (u32 *)uga_handle;
          efi_status_t status = EFI_INVALID_PARAMETER;
          int i;

This patch is the result of the following script:

  $ sed -i 's/;;$/;/g' $(git grep -E ';;$'  | grep "\.[ch]:"  | grep -vwE 'for|ia64' | cut -d: -f1 | sort | uniq)

... followed by manual review to make sure it's all good.

Splitting this up is just crazy talk, let's get over with this and just do it.

Reported-by: Pavel Machek <pavel@ucw.cz>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2018-02-22 10:59:33 +01:00
Stefan Agner 7801c545e7 soc: imx: gpc: de-register power domains only if initialized
If power domain information are missing in the device tree, no
power domains get initialized. However, imx_gpc_remove tries to
remove power domains always in the old DT binding case. Only
remove power domains when imx_gpc_probe initialized them in
first place.

Fixes: 721cabf6c6 ("soc: imx: move PGC handling to a new GPC driver")
Signed-off-by: Stefan Agner <stefan@agner.ch>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-22 11:22:12 +08:00
Jacopo Mondi a527709b78 soc: renesas: rcar-sysc: Add R-Car M3-N support
Add support for R-Car M3-N (R8A77965) power areas.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-21 22:51:02 +01:00
Jacopo Mondi bfd8398339 soc: renesas: Identify R-Car M3-N
Add support for indentifying R-Car M3-N (R8A77965) SoC.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-21 17:48:07 +01:00
Sergei Shtylyov 41d6d8bd8a soc: renesas: rcar-sysc: add R8A77980 support
Add support for R-Car V3H (R8A77980) SoC power areas to the R-Car SYSC
driver.

Based on the original (and large) patch by Vladimir Barinov.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-19 20:50:44 +01:00
Sergei Shtylyov 40d5c8e947 soc: renesas: r8a77970-sysc: fix power area parents
According to the figure 9.2(b) of the R-Car Series, 3rd Generation User’s
Manual: Hardware Rev. 0.80 the A2IRn and A2SCn power areas in R8A77970 have
the A3IR area as a parent, thus the SYSC driver has those parents wrong...

Fixes: bab9b2a74f ("soc: renesas: rcar-sysc: add R8A77970 support")
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-19 10:00:50 +01:00
Fabrizio Castro 69e0d1b8db soc: renesas: rcar-rst: Enable watchdog as reset trigger for Gen2
This patch allows for platform specific quirks as some of the SoC need
further customization for the watchdog to work properly, like for R-Car
Gen2 and for RZ/G.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-15 17:19:58 +01:00
Krzysztof Kozlowski 7353c54620 soc: samsung: pmu: Populate children syscon nodes
The syscon poweroff and restart nodes logically belong to the Power
Management Unit so populate possible children.

This also requires providing compatibles for Exynos5410 and Exynos7 so
the PMU device and its children will be instantiated for them as well.
Just like Exynos5433, these chipsets are not yet supported by the PMU
driver.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
2018-02-13 18:47:25 +01:00
weiyongjun (A) 01517dfc81 meson-gx-socinfo: make local function meson_gx_socinfo_init static
Fixes the following sparse warnings:

drivers/soc/amlogic/meson-gx-socinfo.c💯12: warning:
 symbol 'meson_gx_socinfo_init' was not declared. Should it be static?

Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-02-12 14:15:47 -08:00
weiyongjun (A) 82a759c918 meson-mx-socinfo: Make local function meson_mx_socinfo_init() static
Fixes the following sparse warnings:

drivers/soc/amlogic/meson-mx-socinfo.c:107:12: warning:
 symbol 'meson_mx_socinfo_init' was not declared. Should it be static?

Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-02-12 14:15:47 -08:00
Heiner Kallweit 87f88732d2 soc: amlogic: meson-gx-pwrc-vpu: fix error on shutdown when domain is powered off
When operating the system headless headless, the domain is never
powered on, leaving the clocks disabled. The shutdown function then
tries to disable the already disabled clocks, resulting in errors.
Therefore call meson_gx_pwrc_vpu_power_off() only if domain is
powered on.
This patch fixes the described issue on my system (Odorid-C2).

Fixes: 339cd0ea08 "soc: amlogic: meson-gx-pwrc-vpu: fix power-off when powered by bootloader"
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-02-12 14:15:46 -08:00
Heiner Kallweit 3a2ad7bd31 soc: amlogic: meson-gx-pwrc-vpu: don't print error message on probe deferral
The error message may be misleading in case of probe deferral
(happens on my Odroid-C2). Therefore don't print it in this case.

Fixes: 75fcb5ca4b "soc: amlogic: add Meson GX VPU Domains driver"
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2018-02-12 14:15:46 -08:00
Denys Vlasenko 9b2c45d479 net: make getname() functions return length rather than use int* parameter
Changes since v1:
Added changes in these files:
    drivers/infiniband/hw/usnic/usnic_transport.c
    drivers/staging/lustre/lnet/lnet/lib-socket.c
    drivers/target/iscsi/iscsi_target_login.c
    drivers/vhost/net.c
    fs/dlm/lowcomms.c
    fs/ocfs2/cluster/tcp.c
    security/tomoyo/network.c

Before:
All these functions either return a negative error indicator,
or store length of sockaddr into "int *socklen" parameter
and return zero on success.

"int *socklen" parameter is awkward. For example, if caller does not
care, it still needs to provide on-stack storage for the value
it does not need.

None of the many FOO_getname() functions of various protocols
ever used old value of *socklen. They always just overwrite it.

This change drops this parameter, and makes all these functions, on success,
return length of sockaddr. It's always >= 0 and can be differentiated
from an error.

Tests in callers are changed from "if (err)" to "if (err < 0)", where needed.

rpc_sockname() lost "int buflen" parameter, since its only use was
to be passed to kernel_getsockname() as &buflen and subsequently
not used in any way.

Userspace API is not changed.

    text    data     bss      dec     hex filename
30108430 2633624  873672 33615726 200ef6e vmlinux.before.o
30108109 2633612  873672 33615393 200ee21 vmlinux.o

Signed-off-by: Denys Vlasenko <dvlasenk@redhat.com>
CC: David S. Miller <davem@davemloft.net>
CC: linux-kernel@vger.kernel.org
CC: netdev@vger.kernel.org
CC: linux-bluetooth@vger.kernel.org
CC: linux-decnet-user@lists.sourceforge.net
CC: linux-wireless@vger.kernel.org
CC: linux-rdma@vger.kernel.org
CC: linux-sctp@vger.kernel.org
CC: linux-nfs@vger.kernel.org
CC: linux-x25@vger.kernel.org
Signed-off-by: David S. Miller <davem@davemloft.net>
2018-02-12 14:15:04 -05:00
Bjorn Andersson 4dd27f544c soc: qcom: mdt-loader: Return relocation base
In order to implement support for grabbing core dumps in remoteproc it's
necessary to know the relocated base of the image, as the offsets from
the virtual memory base might not be based on the physical address.

Return the adjusted physical base address to the caller.

Acked-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2018-02-12 11:05:38 -08:00
Sergei Shtylyov 7d7b619e16 soc: renesas: rcar-rst: add R8A77980 support
Add support for R-Car V3H (R8A77980) to the R-Car RST driver -- this driver
is needed for the clock driver to work.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12 13:50:37 +01:00
Sergei Shtylyov 8447756d1e soc: renesas: identify R-Car V3H
Add support for identifying the R-Car V3H (R8A77980) SoC.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12 13:50:37 +01:00
Geert Uytterhoeven 707aa45d26 soc: renesas: rcar-sysc: Mark rcar_sysc_matches[] __initconst
rcar_sysc_matches[] is used only by rcar_sysc_pd_init(), which is
__init.  Hence mark rcar_sysc_matches[] __initconst.

This frees another 1764 bytes (arm32/shmobile_defconfig) or 1000 bytes
(arm64/renesas_defconfig) of memory after kernel init.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2018-02-12 13:50:37 +01:00
Shawn Lin e17ee5f08b soc: rockchip: disable jtag switching for RK3228/RK3229 SoCs
Disable IO function switching between sdmmc and jtag
for RK3228 and RK3229 SoCs.

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2018-02-12 09:39:11 +01:00
Anson Huang f40a1e3705 soc: imx: gpc: ARM power domain should be always-on
ARM power domain does NOT support runtime off, always-on
flag should be set to avoid incorrect power state in
pm_genpd_summary:

Before:

root@imx6qpdlsolox:~# cat /sys/kernel/debug/pm_genpd/pm_genpd_summary
domain                          status          slaves
    /device                                             runtime status
----------------------------------------------------------------------
ARM                             off-0

After:

root@imx6qpdlsolox:~# cat /sys/kernel/debug/pm_genpd/pm_genpd_summary
domain                          status          slaves
    /device                                             runtime status
----------------------------------------------------------------------
ARM                             on

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Acked-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2018-02-12 13:07:48 +08:00
Linus Torvalds fe53d1443a ARM: SoC driver updates for 4.16
A number of new drivers get added this time, along with many low-priority
 bugfixes. The most interesting changes by subsystem are:
 
 bus drivers:
   - Updates to the Broadcom bus interface driver to support newer SoC types
   - The TI OMAP sysc driver now supports updated DT bindings
 
 memory controllers:
   - A new driver for Tegra186 gets added
   - A new driver for the ti-emif sram, to allow relocating
     suspend/resume handlers there
 
 SoC specific:
   - A new driver for Qualcomm QMI, the interface to the modem on MSM SoCs
   - A new driver for power domains on the actions S700 SoC
   - A driver for the Xilinx Zynq VCU logicoreIP
 
 reset controllers:
   - A new driver for Amlogic Meson-AGX
   - various bug fixes
 
 tee subsystem:
   - A new user interface got added to enable asynchronous communication
     with the TEE supplicant.
   - A new method of using user space memory for communication with
     the TEE is added
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJac0fQAAoJEGCrR//JCVIntjEQALc6kflEGJc/FPundbx9V3F/
 b+3+EX/uMnBnKsgZprz9ACPhx5eBH9QWja3A1zmIarb5c+q7zbBZDwhzUb8J8Yg8
 xEb0im7Wx/GcKjUYZVKYBxtz9KjkXDzhrq8IAvPg6ShNcIy/8hq7ZO3iOkGsTDcy
 /PyioWKC5g0dhJgtp91X1kgog5tuTaWOg39uUOqyEzwVu1vYVa4w+eeCzjEd6I//
 68R/zDQ52+hWw6WZGoYOsNYzuriOflnJRnNpwuGhMhLNULBJfWnd4hkqGm4E+hFa
 5dzW6vVAdIqjemFqPzCBT2WB4UG871aZX8DJ9HgnfX+g970nlsm1JY8Ck9MJNJum
 aDkqZG41ArUYzDFWu8vJ2SKsue5lEZp6TEO2mLEVYrdOjOgedj0Zxqmq2DYeigxd
 +ccOVgKJ9SsYw9ft1LkQ5BHCgOh3C7y9Kcg7oBnaEI5OTVvtf5PwEkT2cwbvgxYl
 EVKLhlJ0Af+QXOW8E5JbNQETpYw52DMm6UKHiYn/JCGxB/8J0bgJzImDJI4Dtu2h
 zqJITKJeTepqbfA5pmNfKa+20RhmsktdRCw2NN/QynY7EEtGjHAUVnlpZT2mrDco
 0m62b7Erek/776vJN5ECzE5e6XCs2N0MDE6Anp121C5zEmig/SMBrUosMzP7Jnis
 IDVC/QWkb3u85wK20Vc1
 =yz0k
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "A number of new drivers get added this time, along with many
  low-priority bugfixes. The most interesting changes by subsystem are:

  bus drivers:
   - Updates to the Broadcom bus interface driver to support newer SoC
     types
   - The TI OMAP sysc driver now supports updated DT bindings

  memory controllers:
   - A new driver for Tegra186 gets added
   - A new driver for the ti-emif sram, to allow relocating
     suspend/resume handlers there

  SoC specific:
   - A new driver for Qualcomm QMI, the interface to the modem on MSM
     SoCs
   - A new driver for power domains on the actions S700 SoC
   - A driver for the Xilinx Zynq VCU logicoreIP

  reset controllers:
   - A new driver for Amlogic Meson-AGX
   - various bug fixes

  tee subsystem:
   - A new user interface got added to enable asynchronous communication
     with the TEE supplicant.
   - A new method of using user space memory for communication with the
     TEE is added"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (84 commits)
  of: platform: fix OF node refcount leak
  soc: fsl: guts: Add a NULL check for devm_kasprintf()
  bus: ti-sysc: Fix smartreflex sysc mask
  psci: add CPU_IDLE dependency
  soc: xilinx: Fix Kconfig alignment
  soc: xilinx: xlnx_vcu: Use bitwise & rather than logical && on clkoutdiv
  soc: xilinx: xlnx_vcu: Depends on HAS_IOMEM for xlnx_vcu
  soc: bcm: brcmstb: Be multi-platform compatible
  soc: brcmstb: biuctrl: exit without warning on non brcmstb platforms
  Revert "soc: brcmstb: Only register SoC device on STB platforms"
  bus: omap: add MODULE_LICENSE tags
  soc: brcmstb: Only register SoC device on STB platforms
  tee: shm: Potential NULL dereference calling tee_shm_register()
  soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver
  dt-bindings: soc: xilinx: Add DT bindings to xlnx_vcu driver
  soc: xilinx: Create folder structure for soc specific drivers
  of: platform: populate /firmware/ node from of_platform_default_populate_init()
  soc: samsung: Add SPDX license identifiers
  soc: qcom: smp2p: Use common error handling code in qcom_smp2p_probe()
  tee: shm: don't put_page on null shm->pages
  ...
2018-02-01 16:35:31 -08:00
Arnd Bergmann 9db16401d2 arm: Xilinx ZynqMP SoC fixes for v4.16
- Fix Kconfig dependency
 - Fix vcu clkoutdiv calculation
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlpq6dUACgkQykllyylKDCG0tQCeJO5TnYxDMIyIV2tohgzXarKr
 9vQAniw+AZSnraoxrWR5z9Qhhub1WjzN
 =J1i9
 -----END PGP SIGNATURE-----

Merge tag 'zynqmp-soc-fixes-for-4.16' of https://github.com/Xilinx/linux-xlnx into next/drivers

Pull "arm: Xilinx ZynqMP SoC fixes for v4.16" from Michal Simek:

- Fix Kconfig dependency
- Fix vcu clkoutdiv calculation

* tag 'zynqmp-soc-fixes-for-4.16' of https://github.com/Xilinx/linux-xlnx:
  soc: xilinx: Fix Kconfig alignment
  soc: xilinx: xlnx_vcu: Use bitwise & rather than logical && on clkoutdiv
  soc: xilinx: xlnx_vcu: Depends on HAS_IOMEM for xlnx_vcu
2018-01-26 17:33:36 +01:00
Arnd Bergmann d43aeff392 FSL/NXP SoC drivers updates for 4.16
This adds new SoC support and more error path handling to the guts
 driver.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJaZm0uAAoJEIbcUA77rBVUHCIQAMQTD+kO2gUWhMsC2LOsU366
 NKWiDU4xw48umFil56OLCEalIX/nBDZqL7PYpptFBDURIjychjj1J/M/oHra+EDj
 S+/a53gBBNVb7rn9w+H8sfVbGCSK4Wv+S2L9KrIrZEzqFahSld9R5UAf63S4OZLp
 zzrPqmsrXQI4JkHmJF1LAxPDoHIeaNI4HQiFnKuVQWEZYFh80r1x04pAh8A45mrN
 0jZd+853VaCq8HQSUGeLNn6o7SCYZOdSun7wNrgLrc0ilM0JNeMKfm/A8uCB4C6p
 yPJL5M+33k9at2plUNmA/gVw3pHoOt4Huwu+yGYbhyTVct8z2jL96ZrgG1niklG9
 8fN8otbSUyvm2eTY+VHinoFtod2z+s7lXZc8+rGkfhLJDu1A6/6jRA1lwiubUKDf
 mJ1JhBk6kJ7yDqanKsw6SSYA0ptCPpsxVlkNbWgc7TAgwWf/Soy1gfQQWqjuXaz0
 jcFhHUPgeP9gEgxZMjqwwvnrxSG+sCRy3qHdkH3S/x06qbcU4rHCXLS8CeiDAy1M
 pAN741ERND3tPFhfdnbpEe58rkhnvZcbF6nEkviaimQ5y11xlw0TvwX18pKkcwA2
 u79KB6ZxxeIKBqZNR0DXb42uOW8xhCcXdglKYcfEYDUxRyfDHNUPphULbhpFTSp5
 G0AefICjtKRsrxoZUaiK
 =2hOy
 -----END PGP SIGNATURE-----

Merge tag 'soc-fsl-for-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/leo/linux into next/drivers

Pull "FSL/NXP SoC drivers updates for 4.16" from Li Yang:

This adds new SoC support and more error path handling to the guts
driver.

* tag 'soc-fsl-for-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/leo/linux:
  soc: fsl: guts: Add a NULL check for devm_kasprintf()
  soc: fsl: support GUTS driver for ls1012a/ls1046a
2018-01-23 10:17:26 +01:00
Fabio Estevam 14b055f439 soc: fsl: guts: Add a NULL check for devm_kasprintf()
devm_kasprintf() may fail, so we should better add a NULL check
and propagate an error on failure.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2018-01-22 16:59:48 -06:00
Michal Simek 056b54eeae soc: xilinx: Fix Kconfig alignment
Tabs should be used for alignment instead of spaces.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-16 15:50:21 +01:00
Gustavo A. R. Silva 2a7157b137 soc: xilinx: xlnx_vcu: Use bitwise & rather than logical && on clkoutdiv
Currently clkoutdiv is being operated on by a logical && operator rather
than a bitwise & operator. This looks incorrect as these should be bit
flag operations.

Addresses-Coverity-ID: 1463959 ("Logical vs. bitwise operator")
Fixes: cee8113a29 ("soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver")
Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com>
Acked-by: Dhaval Shah <dshah@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-16 15:50:20 +01:00
Dhaval Shah 0501506122 soc: xilinx: xlnx_vcu: Depends on HAS_IOMEM for xlnx_vcu
xlnx_vcu driver uses devm_ioremap_nocache, which is included
only when HAS_IOMEM is enabled.

drivers/soc/xilinx/xlnx_vcu.o: In function `xvcu_probe':
   xlnx_vcu.c:(.text+0x116): undefined reference to `devm_ioremap_nocache'
   xlnx_vcu.c:(.text+0x1ae): undefined reference to `devm_ioremap_nocache'

Signed-off-by: Dhaval Shah <dshah@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-16 08:34:30 +01:00
Thierry Reding c5b40c315a soc: bcm: brcmstb: Be multi-platform compatible
We were making a bunch of wrong assumptions that turned out to blow out
on non-Broadcom STB platforms:

- we would return -ENODEV from brcmstb_soc_device_early_init() if we
  could not find the sun_top_ctrl device node, this is not an error
  in the context of a multi-platform kernel
- we would still try to register the Broadcom STB SoC device, even if we
  are not running on such a platform

While at it, also fix the sun_top_ctrl device_node leaks while we change
the flow of brcmstb_soc_device_init() and
brcmstb_soc_device_early_init().

Fixes: f780429adf ("soc: brcmstb: biuctrl: Move to early_initcall")
Signed-off-by: Thierry Reding <treding@nvidia.com>
[florian: Combine all of Thierry's patch in one go for easier review]
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-01-15 15:47:07 +01:00
Sudeep Holla a78182980a soc: brcmstb: biuctrl: exit without warning on non brcmstb platforms
Currently if this driver is included, we get the following warning
on any platforms irrespective of whether it's brcmstb platform or not.
"
 brcmstb: biuctrl: missing BIU control node
 brcmstb: biuctrl: MCP: Unable to disable write pairing!
"

This patch allows to exit early without any warning messages on non
brcmstb platforms as it's meaningless for them.

Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Gregory Fong <gregory.0xf0@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Fixes: f780429adf ("soc: brcmstb: biuctrl: Move to early_initcall")
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
[florian: Add fixes tag, make initcall non fatal]
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-01-15 15:46:17 +01:00
Olof Johansson c90801664e Revert "soc: brcmstb: Only register SoC device on STB platforms"
This reverts commit 23a0d84799.

Patch has issues that's being addressed by the Florian and he will
follow up with a new patch to address the original issue.

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-01-12 10:30:35 -08:00
Olof Johansson c9f6603662 arm: Xilinx ZynqMP SoC patches for v4.16
- Create drivers/soc/xilinx folder structure
 - Add ZynqMP vcu init driver
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iEYEABECAAYFAlpTal0ACgkQykllyylKDCHz4QCeMUXk6FVc+mBbdK6rndnicw8/
 tCQAoIWIV3jotdh1htzzlSU0oEYmuaSy
 =UkCG
 -----END PGP SIGNATURE-----

Merge tag 'zynqmp-soc-for-4.16' of https://github.com/Xilinx/linux-xlnx into next/drivers

arm: Xilinx ZynqMP SoC patches for v4.16

- Create drivers/soc/xilinx folder structure
- Add ZynqMP vcu init driver

* tag 'zynqmp-soc-for-4.16' of https://github.com/Xilinx/linux-xlnx:
  soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver
  dt-bindings: soc: xilinx: Add DT bindings to xlnx_vcu driver
  soc: xilinx: Create folder structure for soc specific drivers

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-01-12 10:16:17 -08:00
Olof Johansson 2f4621cd58 Samsung soc drivers changes for v4.16
Add SPDX license identifiers.
 -----BEGIN PGP SIGNATURE-----
 
 iQItBAABCAAXBQJaUfZsEBxrcnprQGtlcm5lbC5vcmcACgkQwTdm5oaLg9c5JQ/+
 JpK1yMpEHaITFsm847uLU0M0ECED0uaC1qixswStXr1rrJ4Vwoo5P7oOa5VP7x7O
 NY+aTbiIZl4/RkgqGGnCy7MBmr3e+YnhD/OHgADv5gWMZ6X7ZIfjS4v8epcVb/pb
 HMi/aatCx7PuIM2pLiDF/B1+y0SZB/brq+SdXNscybW/g0ngUg/7aG1sUE5GuLhl
 sMHcWzVFG72nxgAVg53QE3h0OGL/jS5BooN9/zB/Di6XCCqZOVmosXmXPr4U/T7w
 a7xd2BHEZP5ziFG30xlp1FgOFgASy203vM1JFsL1Qwzf1u0flKtm6zEdbaZvw2oe
 9aIAcZTkuCyXa6vQw4pZnh8kio3b5WsY6euraPeLwayKAoUxOR2iFA0VFtyZGZjq
 ANLyb0JTHnXiEL2Z0rFMIYYiy78yb+k1efLyR5BZzjSyy1eQwnjzLnEMOsye55RF
 Ad+8yV0J5LTgY8P69O6B7qqDDikUsooV95WyepUpir5UmXuyp3EZiDy4w3PtCWts
 l6rEgBo6yWUcR6l/GhcKNeKjXJT2Lspfo9XiCdzu7Qbmy6c33L0364UwmcKjbe/C
 dc6vBV1ovD6uuw6YmCuhdI24R2XmtRm6L1dDtv+ocywxXeArR/mdVIOCgM63Au8K
 ZnhxOwL/HZ0lMLpEu60HxHXieDDxA2NLM5oEwrTpcPo=
 =vGk/
 -----END PGP SIGNATURE-----

Merge tag 'samsung-drivers-4.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers

Samsung soc drivers changes for v4.16

Add SPDX license identifiers.

* tag 'samsung-drivers-4.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  soc: samsung: Add SPDX license identifiers

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-01-11 17:36:35 -08:00
Thierry Reding 23a0d84799 soc: brcmstb: Only register SoC device on STB platforms
After moving the SoC device initialization to an early initcall in
commit f780429adf ("soc: brcmstb: biuctrl: Move to early_initcall"),
the Broadcom STB SoC device is registered on all platforms if support
for the device is enabled in the kernel configuration.

This causes an additional SoC device to appear on platforms that already
register a native one. In case of Tegra the STB SoC device is registered
as soc0 (with totally meaningless content in the sysfs attributes) and
causes various scripts and programs to fail because they don't know how
to parse that data.

To fix this, duplicate the check from brcmstb_soc_device_early_init()
that already prevents the code from doing anything nonsensical on non-
STB platforms.

Fixes: f780429adf ("soc: brcmstb: biuctrl: Move to early_initcall")
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2018-01-11 17:01:22 -08:00
Dhaval Shah cee8113a29 soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver
Xilinx ZYNQMP logicoreIP Init driver is based on the new
LogiCoreIP design created. This driver provides the processing system
and programmable logic isolation. Set the frequency based on the clock
information get from the logicoreIP register set.

Signed-off-by: Dhaval Shah <dshah@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-08 13:42:47 +01:00
Michal Simek 5abcdc206f soc: xilinx: Create folder structure for soc specific drivers
Create directory structure with Makefile/Kconfig for adding xilinx soc
specific drivers.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-08 13:42:39 +01:00
Arnd Bergmann ce3dc231da i.MX drivers update for 4.16:
- Update i.MX GPC driver to support PCI power domain of i.MX6SX SoC.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJaTCqGAAoJEFBXWFqHsHzOavcH/1g0k3tN4MaOvf44lSDm5uCZ
 WqCKLN01f8T02YegdcgVVc59wirJB6xKIYD86dQIiVC8gEfMOhvfEuv6qkPRHQOM
 WVYJTIFFisEeypnXEHjD2SwN6/SskSGPMUDpfj0hveb0srLnCQou+5Ty8zpvmAdl
 XEAP9mjK7s6ovfomfuxEY4iWxGRKbDXtwXqtvYTI3tpXwn/c6LXgdrg02xC/KAXp
 sKXbS0NbYjBDHBd8hPcVVwujugw3UZHr/saYYf0rmC7WKr7074WylSWW08aKQ89u
 Elv5fNeoAYrlnwpeoqzLqcgrvhCJcpx0HTVnYjmNIVLYRLAktYu6glR7icAdpb8=
 =kB/f
 -----END PGP SIGNATURE-----

Merge tag 'imx-drivers-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/drivers

Pull "i.MX drivers update for 4.16" from Shawn Guo:
 - Update i.MX GPC driver to support PCI power domain of i.MX6SX SoC.

* tag 'imx-drivers-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: gpc: Add i.MX6SX PCI power domain
2018-01-05 17:55:52 +01:00
Arnd Bergmann 830ebd37c5 Qualcomm ARM Based Driver Updates for v4.16 - Redo
* Fix error handling code in SMP2P probe
 * Update SMP2P to use ACPS as mailbox client
 * Add QMI support
 * Fixups for Qualcomm SCM
 * Fix licensing on rmtfs_mem
 * Correct SMSM child node lookup
 * Populate firmware nodes during platform init
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJaToihAAoJEFKiBbHx2RXVvj8P/1ZfQNQpN0b2mDJFZxGIislM
 JEZPOrdlIi3n9JMCNbp3BHc9kI8YM5XQPW08WfsbRZ+o+2vtGnHs4hF/a4Gw102f
 XHTAVjnT9HmoCrjFMCHF/1qZdFFIzCJgQnb/+cJ3hK2rnoJO2CCHMA8K1KhDlQ69
 NFNwjWhx3lF5KrOm4xdStN+rjITpNZbSiMt6jMSHK1Up/RLz4SK3U2eY1AeqsP1p
 drMZVEg2N90C3C+fvBE80Iaq0Ncu3wg5MLoK3kCBGB/XidVZ+sgNJh4rfnWUfdnq
 JkT9kqiipYmBm2ONc2NiGqzrIwZCj0rx2Z4m7huSZlwRp7w92n9N0SYxUht2Ejpb
 AjenPJyqrRcuR7pF9mOpDPapZER7+11gXSGBVT8hPDPWkQvrjpHRArvTDJ0dckTQ
 iPEfAva7z/Z6Agxjzbus0N/TL3Hl59WkN8+2QZVT+ZBz4+5FVhxS3FQ7b71OCc4q
 11QAbJk8bklpwQCiBFgz922vFa5XdnWq/1aWXFeIrkNhuhfAmM+pB99PrIib+GZM
 ZpU/1l9oynjlmgbuMuQDnoTjEMvtcM4so1Z/qXc56HIhTQfRo8gWIyCw50YGTO33
 oFS1b7O9ilgTGcMpLlC9Vv7WHo0sXHpZ1wG6pLNQ7c1RSsBHHmx4gYYezf08cOeN
 1Axa8G4s3dCx5kFyke5a
 =vdvo
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers

Pull "Qualcomm ARM Based Driver Updates for v4.16 - Redo" from Andy Gross:

* Fix error handling code in SMP2P probe
* Update SMP2P to use ACPS as mailbox client
* Add QMI support
* Fixups for Qualcomm SCM
* Fix licensing on rmtfs_mem
* Correct SMSM child node lookup
* Populate firmware nodes during platform init

* tag 'qcom-drivers-for-4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  of: platform: populate /firmware/ node from of_platform_default_populate_init()
  soc: qcom: smp2p: Use common error handling code in qcom_smp2p_probe()
  soc: qcom: Introduce QMI helpers
  soc: qcom: Introduce QMI encoder/decoder
  firmware: qcom_scm: Add dependent headers to qcom_scm.h
  soc: qcom: smp2p: Access APCS as mailbox client
  soc: qcom: rmtfs_mem: add missing MODULE_DESCRIPTION/AUTHOR/LICENSE
  soc: qcom: smsm: fix child-node lookup
  firmware: qcom_scm: drop redandant of_platform_populate
2018-01-05 12:22:53 +01:00
Olof Johansson 11077e9bf7 SOC: Keystone Soc driver updates for 4.16
- TI EMIF-SRAM driver
  - TI SCI print format fix
  - Navigator strndup lenth fix
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJaRE65AAoJEHJsHOdBp5c/BOQP/1tvzmfQ2nllYiAJBN35e/PO
 0qQE2rrFhPgoSx1e5+6gvuGhdekBvuqE68ejbswSYttfseOOOGpdh7s15M+sieQv
 fkZd7XJQMfBamJv+C5zZYe/qBNtfa8WFvAdSndpDYIaxSMsE5lzqbQPQga0/G2YW
 uYLc/iEFqh5uKVLl/KmVHGZ9sZ8kXZF8gGyLuzkgpqjuaJZZKygEi5agzq6EJhQK
 09BEqQiesUWLxcYLjbao3EPmLmCWzsCyTbpEHBkRYtiRgsn7iccdLjQ8VSWfvb1n
 md3/FprPA7EuLdlYwuHQxsBNsm93WAPzLnubS1UKsenUEcbE36W4bJZgwbYHuaOT
 oHGeoAdTM1VWrjQ3Lty+Nn8hhCexrn72nVAxwnyt54CEdirxdSikrYOjq5jhf50z
 xP5eQp7J/GhX9b6xUHB25PnlxmRx2jIb1MAD5wHlND/Khw0kpph7mRuTUWtmnTOB
 w+qJfPpb+WkYep/8TkplyX86XB0eFghO9wPhOjc4lMmPdpsXlrdca78I+4YI6cv3
 dvIRZwI4knwKQo6bqJ1lizCOaGHFxZLPylSLDplVatZFP6f1FuEHQ9GcxE2ErygP
 A5j+JRIJVedwW1ZJWMe3TPRAOnGrsWzuVUcBCYGURUYhGWrU6VMNGTc4nVducor+
 Ukoyta0/V6rsBZCEBuP9
 =hKyd
 -----END PGP SIGNATURE-----

Merge tag 'keystone_driver_soc_for_4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/drivers

SOC: Keystone Soc driver updates for 4.16

 - TI EMIF-SRAM driver
 - TI SCI print format fix
 - Navigator strndup lenth fix

* tag 'keystone_driver_soc_for_4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  soc: ti: fix max dup length for kstrndup
  firmware: ti_sci: Use %zu for size_t print format
  memory: ti-emif-sram: remove unused variable
  memory: ti-emif-sram: introduce relocatable suspend/resume handlers
  Documentation: dt: Update ti,emif bindings

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-01-04 23:12:57 -08:00
Olof Johansson 3864a53e14 Second Round of Renesas ARM Based SoC Updates for v4.16
* rcar-sysc: Keep wakeup sources active during system suspend
 
   Geert Uytterhoeven says "If an R-Car SYSC slave device is part of the
   CPG/MSTP or CPG/MSSR Clock Domain and to be used as a wakeup source, it
   must be kept active during system suspend.
 
   Currently this is handled in device-specific drivers by explicitly
   increasing the use count of the module clock when the device is
   configured as a wakeup source.  However, the proper way to prevent the
   device from being stopped is to inform this requirement to the genpd
   core, by setting the GENPD_FLAG_ACTIVE_WAKEUP flag.
 
   Note that this will only affect devices configured as wakeup sources."
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlo81TEACgkQ189kaWo3
 T76Lrw/+LccDaaNJppUYzGUSPQ0P6BYgmac8fv5A3qk63CzdemirAqhA3LdXNNEn
 RW1VpVBeLPv1GMYdxvuS0HqvfBPk92hFFJXMyRsjS5PF4pSupHubBM2g34u7qcGg
 7D6MxyZYlPxFPMyb3DIqNDKHbt+PMxeidtoMylNURBPJS3ERLo+RUeAco1SBTW2Q
 hojrDBB7P5CGSNkfJ+VjYExYgZgfCfyzVyozMHmWUuPul3ZdfKfXf/ZhAp2BVAEN
 ZTiccpZpSo6dZyYnMTEQ9Pd4eOlrBl3EfHdZcbeH+VzXou50KvzQ+6cWdHKMsc6w
 bUvKxXy/uEiqq6Bs83AdUAb9UvCKM9bK8jLZXScmPHQUZWt+K2WemlrRPgtekKR1
 VEGmABFwKEtcEzwXzkcG4fe1SxrJdPrBljwFk89KpqSAn4+TElqBAmo/F5V/ALj7
 l2AuqcGMzazuSnGSVk6ha/BXqdP0IKbk6mq/UqO/ORNsOjaajtXcjuKHDowBzPN9
 aHTLMPXRPWSvHGQEuxOggNHm0Cehjwni8t0pku3ndG8TNx2DsaG8L/rUTNUU/J2m
 ynWuFBbzReB0epHBuXJMvWPd9AWX+kL12KouDvFbp0a4b5L1KSTka3oXlC88oXkl
 CMKXS6VQJ8nda9Dev9Za19BnUQrgeHq0anD5Q9wVeWwauh8Uueg=
 =0tvJ
 -----END PGP SIGNATURE-----

Merge tag 'renesas-soc2-for-v4.16' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Second Round of Renesas ARM Based SoC Updates for v4.16

* rcar-sysc: Keep wakeup sources active during system suspend

  Geert Uytterhoeven says "If an R-Car SYSC slave device is part of the
  CPG/MSTP or CPG/MSSR Clock Domain and to be used as a wakeup source, it
  must be kept active during system suspend.

  Currently this is handled in device-specific drivers by explicitly
  increasing the use count of the module clock when the device is
  configured as a wakeup source.  However, the proper way to prevent the
  device from being stopped is to inform this requirement to the genpd
  core, by setting the GENPD_FLAG_ACTIVE_WAKEUP flag.

  Note that this will only affect devices configured as wakeup sources."

* tag 'renesas-soc2-for-v4.16' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  soc: renesas: rcar-sysc: Keep wakeup sources active during system suspend

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-01-04 22:52:06 -08:00
Olof Johansson 710ae35c2e Actions Semi SoC drivers for v4.16
The SPS power domain driver is extended for S700 SoC.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABAgAGBQJaPNqqAAoJEPou0S0+fgE/IVYP/i0VYqTyCSz6yDJJU4N02lvN
 wp4k7QSLKgX2GcNScYEu7hwfooourZGW0xk+A5lk9sBwspYxw+uWcd0kFmlwkBbp
 Dk7f0YjsjnC2ipWMv327RClC6BrgEigydbkDyaH7jAF/FXlgo0VJWkjI+ZcayU6j
 ZchrqyGm20ASlkm6HD6cPY0GPu918cKr6XhOON2xE2lPuXRUVQd9XHkJAXXQFCQ2
 oomavKzTtT0kH/4uEZnKGB0xyx9v8LzDTEVUkfZhXiOnN5Elh0Spmev0JlEnWTtn
 6J9hSnxNcQov4klbg3oRDk9kXpD1yTXtpwy8mNvMGtKq9Y93WMsH2S+GwyElEtDM
 EqxpOaREXnVOeJ04uMwZgXeLyQMn73qw+FFF02QU6VRU+j5gz7MTsif4BWx2gBAw
 CygX6I+zq86VpIl7beVaSVEI49QYUF5ygJB1zT31IN6jZX1D1g5D7GBmzq1sPieE
 uzzI6EH3LgrNJrVXe39PqCwzQIDtQHDYNo3je3sexDvTB6mUpSEMzZuJgpWnA7jS
 TjrjNGwmUpL/FaMPRdBr4VUhgd1uQmYcC5lzAo5wOl40QzABsMObXPcf6uE/Myau
 f+ZbI3HgmivLzOkoQct8bRpjzsXCFoXGW76kkxdmptY7PkeE6orjHwFMEPb6VUES
 FBVr27/EoQc9dIf12c3V
 =u1IY
 -----END PGP SIGNATURE-----

Merge tag 'actions-drivers-for-4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions into next/drivers

Actions Semi SoC drivers for v4.16

The SPS power domain driver is extended for S700 SoC.

* tag 'actions-drivers-for-4.16' of git://git.kernel.org/pub/scm/linux/kernel/git/afaerber/linux-actions:
  soc: actions: sps: Add S700

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-01-04 22:37:59 -08:00
Olof Johansson 7e32c6054e This pull request contains Broadcom ARM/ARM64 based SoCs drivers changes for
4.16, please pull the following:
 
 - Arnd provides an update to the Raspberry Pi firmware interface and uses time64_t to
   print the time to make it more future proof
 
 - Florian provides a set of updates to make the Broadcom STB Bus Interface Unit code
   work on newer ARM64-based chips, as well as perform the correct interface tuning
   for these chips to reach the expected performance
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABCAAGBQJaPE0dAAoJEIfQlpxEBwcEk/oQALjUzNWkipO31Ahx35r7kblW
 4RC39ebaU31fR6yMOlKWQGh/uklHopcDuRQHAGR7IHg2MSr/uQ/xb7rgz4Qa1ZTD
 gRPcT9rI2mNctiWLFoB3EaYmA0J3EOMJI1GMIvHPGc3WZ5Y4FHKICW3qK7mvGndc
 obmiAU4mFyK31SKKm8k+TX6bzPsr1ZEm2tW9kRkWKfGk05DVD+KsKa5Xvn0USlS4
 0jiXo+naHv5KtYXSuSc+Kg0qcCB3K2SFJVAOPgjTMzo498Vcv6mWLQPfGg3vDmCt
 3rEiDhPoJJ6soAuG2OmHQCykTr0uwRZNhOc385JCKf8TP8CjV8aK71lJe0oFQgtg
 nC67z+uVLJ3tXoI1Y0V0DQXCTNLKgsbU19p14S+rDM2MQ41yGzWoVdT9ZhEDEbyj
 sDeC+d9DVQTuXqImqe16M3oZSsCWuMCRz0LG2uDhoTHMNmegU//nY6VhVR7ia0Ia
 BIDCsbNf1KEDEUi1v5nPJSNC2Oyk/mVOPzl8xwMdw3VV4eYggC9aqljmwDWWCxV5
 GNCGbP/0UgKG6iUadqK2HM+0syRWA5E3ypWg8VPtU6g+lZKYqnh6g23F4lJklE1U
 WhKKK52OCRZ0w/ut2TWJmhpmn+CfR7VcVv9IS9zElBbyU/fg27Mkpu/Ty7bBx0my
 kmCDHOGHZyl4jrKhwxGg
 =RHHM
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-4.16/drivers' of http://github.com/Broadcom/stblinux into next/drivers

This pull request contains Broadcom ARM/ARM64 based SoCs drivers changes for
4.16, please pull the following:

- Arnd provides an update to the Raspberry Pi firmware interface and uses time64_t to
  print the time to make it more future proof

- Florian provides a set of updates to make the Broadcom STB Bus Interface Unit code
  work on newer ARM64-based chips, as well as perform the correct interface tuning
  for these chips to reach the expected performance

* tag 'arm-soc/for-4.16/drivers' of http://github.com/Broadcom/stblinux:
  soc: brcmstb: biuctrl: Move to early_initcall
  soc: brcmstb: Split initialization
  soc: brcmstb: biuctrl: Fine tune B53 MCP interface settings
  soc: brcmstb: biuctrl: Wire-up new registers
  soc: brcmstb: biuctrl: Prepare for saving/restoring other registers
  soc: brcmstb: Correct CPU_CREDIT_REG offset for Brahma-B53 CPUs
  soc: brcmstb: Make CPU credit offset more parameterized
  dt-bindings: arm: brcmstb: Correct BIUCTRL node documentation
  dt-bindings: arm: Add entry for Broadcom Brahma-B53
  firmware: raspberrypi: print time using time64_t

Signed-off-by: Olof Johansson <olof@lixom.net>
2018-01-04 22:31:02 -08:00
Linus Walleij 68198dca45 soc: Add SoC driver for Gemini
This adds an SoC driver for the Gemini. Currently there
is only one thing not fitting into any other framework,
and that is the bus arbitration setting.

All Gemini vendor trees seem to be setting this register to
exactly the same arbitration so we just add a small code
snippet to do this at subsys_init() time before any other
drivers kick in.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-01-04 17:01:53 +01:00
Krzysztof Kozlowski 06512c539f soc: samsung: Add SPDX license identifiers
Replace GPL license statements with SPDX GPL-2.0 license identifiers.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2018-01-03 18:45:15 +01:00
Markus Elfring c01fc2275e soc: qcom: smp2p: Use common error handling code in qcom_smp2p_probe()
* Add a jump target so that a specific error message is stored only once
  at the end of this function implementation.

* Replace two calls of the function "dev_err" by goto statements.

* Adjust two condition checks.

This issue was detected by using the Coccinelle software.

Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2018-01-01 00:29:09 -06:00
Fabio Estevam cfabb7921c soc: imx: gpc: Add i.MX6SX PCI power domain
i.MX6SX has a PCI power domain in PGC. Add support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2017-12-26 16:26:46 +08:00
Arnd Bergmann 11c9dff045 - change kconfig entry for armv7 SoCs to be more generic
- add support for mt2701 scpsys driver
   binding documentation
   extend driver to allow the bus protection to overwrite the register
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAlo7nMIXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00MF/Q/9GOX4n+FAPR8OXQcSn8X5L6Ep
 RvUr3np4IFfLBXBReM6nR479+LOE5VLIk/eAad0Avsnbv3TZw38+nXN4vU3skLkr
 byuri9SRaTXAs7/pxDDRredkm1Woo8H4Zo+LiNjTOv1ydlBV7NqJfqIMDyVgOpZN
 1msE3Ug3w5FjnZiRZcCdDreXnk4FYlV4rbJFRQTG1zCENH7GARreyI5xWR59QUzB
 PnGMHLqUE1FU2KyGoNwxNfnBHdYUHohV7DIC9NI6ucXjbmmbON3PCFPeuUn6jvdu
 8qNGGfY6Wv+Vwyg1VKahI/dpI0Vy+n/8AA5lbSb+8Qe6ha+6xSDedN2Y6YNF4J1v
 iuVFzG8GvUChMFuVYw8F0vsoR1r02uoErxzi9Qgav6uUGAMYOitPnjd2FJ21l2n+
 +P46e6yd9Eq5z6ikmAvbF0qhK2XOWCjVzah2Cjv7frlqLsonVYOD52RMgIKndR/x
 WTZCbPQhMR5LutiQMryIrtLsLe1i4AZP4zaeLnupfdijiXwo6dD7/k98CnqUJtQT
 1HWrLQb2gdc8aWhqNsn5sg5Lss3hQWvPq6tgLxk/+HshR1/DoqIE4K8bqvaceI5r
 meFT8R9y1XBwFu167I1uJIQyvQulrLs0B/VKg6unJM8AHpw326PckYEqHo0TOJUF
 XWHFH4MdN1TwpGi9mww=
 =5u17
 -----END PGP SIGNATURE-----

Merge tag 'v4.15-next-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into next/soc

Pull "arm: Updates for soc driver for v4.15-next" from Matthias Brugger:

- change kconfig entry for armv7 SoCs to be more generic
- add support for mt2701 scpsys driver
  binding documentation
  extend driver to allow the bus protection to overwrite the register

* tag 'v4.15-next-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux:
  soc: mediatek: add MT2712 scpsys support
  soc: mediatek: add dependent clock jpgdec/audio for scpsys
  soc: mediatek: extend bus protection API
  dt-bindings: soc: add MT2712 power dt-bindings
  ARM: mediatek: use more generic prompts for SoCs with ARMv7
2017-12-21 18:11:41 +01:00
Arnd Bergmann a3dc838d7a soc/tegra: Changes for v4.16-rc1
Fuse and chip ID support for Tegra186 is added in this set of changes,
 followed by some unification work for the PMC driver in order to avoid
 code duplication between Tegra186 and prior chips.
 
 This also contains a couple of fixes for reading fuses on Tegra20.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlo73FITHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoXFYD/9LdBMkXZdG8ftCyKhIrdmT8HoGCVMc
 Hq1H4oY1DEwkUGf+98dP+E5M9OqH/s7VzCqzb5OSzkroVplvTVe6x40ZGdAVP6AN
 SEsHIJSZ1gssuQdJVqh4mZcz4YdT33qlQ8Y64ur4m7GPwwz8nwWDLcDVufNlPpra
 RrcqG+hDj85D61wP/QKmeUgow3eTLfW1rxV6Vu7mj9LrrKXt92qE6JAlGRmRfxxH
 XmUa9GoXfHxBu2jGJHotL7TGwUTkSEGk7F78b1g8n9s38cohYNTbOjxdw1468nZY
 Y5wwJUNZqY1bJJB6mCEDOqcufsKCZr6yGSvoHZUWC2NeXsOHSzqSZQD6bR9jDygH
 TMaCSlYVOw4Rbj5WJPLvbFj5kyhuDx1ATR9xoVBkleX3npu+KtwzQaK8rRtUP81/
 yXcSxt4BKAfLAMloR1ycw13yMXAzu7jZhZYCOT61GBsQ45AgCMy5XBwV9TBitIdN
 +ScsZ+QZd31Lt6Sq4KEZZHqaKMWqFXezW9GeqmvOE+uVzfA8TLtO8ud5OeP5c6bU
 c5oe4Oy3HmjG8HzQErdjr/eBAlONwEBKFw3o4GVNb0R9x20SysqlP91wKDfgBM9k
 32ZWTF10QXxebY92WneEjLImJeU/U0iHkmNS4tpQC1Egi7tvqkGGh6HnXVt11hk9
 cr4ElWaSu1cuaQ==
 =3l9M
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-4.16-soc-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/soc

Pull "soc/tegra: Changes for v4.16-rc1" from Thierry Reding:

Fuse and chip ID support for Tegra186 is added in this set of changes,
followed by some unification work for the PMC driver in order to avoid
code duplication between Tegra186 and prior chips.

This also contains a couple of fixes for reading fuses on Tegra20.

* tag 'tegra-for-4.16-soc-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: fuse: Explicitly request DMA channel from APB DMA driver
  soc/tegra: fuse: Fix reading registers using DMA on Tegra20
  soc/tegra: pmc: Consolidate Tegra186 support
  soc/tegra: pmc: Parameterize driver
  soc/tegra: fuse: Add Tegra186 chip ID support
  soc/tegra: fuse: Warn if accessing unmapped registers
  soc/tegra: fuse: Move register mapping check
  soc/tegra: fuse: Add Tegra186 support
  dt-bindings: misc: Add Tegra186 MISC registers bindings
2017-12-21 17:57:04 +01:00
Dmitry Osipenko ccf151847b soc/tegra: fuse: Explicitly request DMA channel from APB DMA driver
Currently fuse driver requests DMA channel from an arbitrary DMA device,
it is not a problem since there is only one DMA provider for Tegra20 yet,
but it may become troublesome if another provider will appear.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-21 17:04:12 +01:00
Dmitry Osipenko 55a042b3f6 soc/tegra: fuse: Fix reading registers using DMA on Tegra20
FUSE driver doesn't configure DMA channel properly, because of it DMA
transfer is never issued and tegra20_fuse_read() always return 0x0.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-21 17:03:49 +01:00
Arnd Bergmann 6b0b1a6b07 Renesas ARM Based SoC Updates for v4.16
* Identify R-Car M3-W ES1.1
 
   Geert Uytterhoeven says "The Product Register of R-Car M3-W ES1.1
   incorrectly identifies the SoC revision as ES2.0.  Add a workaround to
   fix this."
 
   It is my understanding that this is likely to be forwards-compatibile.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlonu8cACgkQ189kaWo3
 T76hcw//bUQJZvzI1VMIcfdu1KY47lu8GPGgPMyb2ULfuLcpRXG3AzFCzT5HJjBe
 BBPoCISEhuh4M6bpWyDs0AVkvJUjrTmiy6FPS1mqllh8rp6xx6v5OM9OP3cPyNzS
 ECY8TmPgij4oBbp5e0JvA+SnRp0biR750TXwIHytUtNe0o1R0kpyqo+OUtR79lTe
 rQyX4CRrNQozmUTsCiTuWf972jHJW4IInbrEr6PU89MB/WrdAiS6TnKxtDprGMqe
 5TzKGxd6UxuX/X7ZGte0+mTW5ur/Jgg2C4mQx6UD3Wp7iJn3geXsdxnwTA9dWi+0
 iz8l10/EY2bPBYm3UbiclDuv68uxFy3h+2pTYbguIvHvRqIwwpQzt0/iIwpkoNGN
 XDC6g4l4+B97opV+uoNJub2b64ev4gJQ3ugxfZMgQOKWA6FNjABmIpvlQKQzWylp
 B5R5fXz/eyhbqtzGcb7Y/7kS+ezO+8pz8WdwGRAQKQ0B/cGHeS3aoA6JaOZXIeN1
 nzVmKpeZfCiKGF16v8Ds6cz0QJcQWDHU/WMsPKS2KnHwd0ipp8DtR/F9PX+KNomv
 LZiUyJ5ER9g1bVEPm1K2zyQ0LbIfpQsw0xHAD05BEKflep+eleYOFhja/iX4hs+9
 n1wbz4GnhKFEG40lwq6Z0kwiKSupJrv9Wzbtb/Yv9SDOVD5Zj9M=
 =eL6d
 -----END PGP SIGNATURE-----

Merge tag 'renesas-soc-for-v4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Pull "Renesas ARM Based SoC Updates for v4.16" from Simon Horman:

* Identify R-Car M3-W ES1.1

  Geert Uytterhoeven says "The Product Register of R-Car M3-W ES1.1
  incorrectly identifies the SoC revision as ES2.0.  Add a workaround to
  fix this."

  It is my understanding that this is likely to be forwards-compatibile.

* tag 'renesas-soc-for-v4.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  soc: renesas: Identify R-Car M3-W ES1.1
2017-12-21 16:17:59 +01:00
weiyi.lu@mediatek.com 320f4ced45 soc: mediatek: add MT2712 scpsys support
add scpsys driver for MT2712

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-12-21 11:49:23 +01:00
weiyi.lu@mediatek.com d1fb29fac8 soc: mediatek: add dependent clock jpgdec/audio for scpsys
There are dependent clock jpgdec/audio in scpsys on MT2712,
and will exist three dependent clocks on MT2712 VDEC.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-12-21 11:49:23 +01:00
weiyi.lu@mediatek.com fa7e843a90 soc: mediatek: extend bus protection API
MT2712 add "set/clear" bus control register to each control register set
instead of providing only one "enable" control register, we could avoid
the read-modify-write racing by declaring "bus_prot_reg_update" as "false"
in scp_soc_data or declaring as "true" to use the legacy update method.
By improving the mtk-infracfg bus protection implementation to
support set/clear bus protection control method by IC configuration.

Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-12-21 11:49:22 +01:00
Florian Fainelli f780429adf soc: brcmstb: biuctrl: Move to early_initcall
Being called during early_initcall() is early enough that it occurs
before SMP initialization, which is all we care about for the Bus
Interface Unit configuration.

This solves lack of BIU initialization on ARM64 platforms where we do
not have an anchor where to put the BIU initialization (since there are
no machine descriptors).

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-12-20 17:37:44 -08:00
Florian Fainelli 5d4567ec3b soc: brcmstb: Split initialization
We may need access to family_id and product_id fairly early on boot for
other parts of the code (e.g: biuctrl.c), so split the initialization
between an early_init() and an arch_initcall() which allows us to do
that.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-12-20 17:37:43 -08:00
Florian Fainelli b4b32e3216 soc: brcmstb: biuctrl: Fine tune B53 MCP interface settings
In order to achieve expected MCP bus throughput on 3 particular chips:
7268, 7271 and 7278, do the appropriate programming of the MCP
interface: increase number of MCP write credits, turn on write-back
throttling when present.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-12-20 17:37:43 -08:00
Florian Fainelli 6451d644b8 soc: brcmstb: biuctrl: Wire-up new registers
Add definitions for B53 systems register: CPU_MCP_FLOW_REG and
CPU_WRITEBACK_CTRL_REG. These register will be saved and restored
accordingly.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-12-20 17:37:42 -08:00
Florian Fainelli 584e55d543 soc: brcmstb: biuctrl: Prepare for saving/restoring other registers
In preparation for saving/restoring additional registers required on
some newer platforms (7268, 7271, 7278), migrate the code to use enums
and helper functions to access registers.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-12-20 17:37:39 -08:00
Florian Fainelli 22f7a9116e soc: brcmstb: Correct CPU_CREDIT_REG offset for Brahma-B53 CPUs
On Broadcom Brahma-B53 CPUs, the CPU_CREDIT_REG offset got moved to
0x0b0 instead of 0x184, correct this such that we correcty
enable/disable write-pairing for these chips.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-12-20 17:37:36 -08:00
Florian Fainelli 9257091cf6 soc: brcmstb: Make CPU credit offset more parameterized
In preparation for fixing and changing values in the CPU_CREDIT_REG
register for B53-based systems, make the offset parameterized.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-12-20 17:37:32 -08:00
Bjorn Andersson 3830d0771e soc: qcom: Introduce QMI helpers
Drivers that needs to communicate with a remote QMI service all has to
perform the operations of discovering the service, encoding and decoding
the messages and operate the socket. This introduces an abstraction for
these common operations, reducing most of the duplication in such cases.

Acked-by: Chris Lew <clew@codeaurora.org>
Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-12-20 15:38:34 -06:00
Bjorn Andersson 9b8a11e826 soc: qcom: Introduce QMI encoder/decoder
Add the helper library for encoding and decoding QMI encoded messages.
The implementation is taken from lib/qmi_encdec.c of the Qualcomm kernel
(msm-3.18).

Modifications has been made to the public API, source buffers has been
made const and the debug-logging part was omitted, for now.

Acked-by: Chris Lew <clew@codeaurora.org>
Tested-by: Chris Lew <clew@codeaurora.org>
Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-12-20 15:38:34 -06:00
Bjorn Andersson e71802647b soc: qcom: smp2p: Access APCS as mailbox client
Attempt to acquire the APCS IPC through the mailbox framework and fall
back to the old syscon based approach, to allow us to move away from
using the syscon.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-12-20 15:38:34 -06:00
Jesse Chan 3b229bdb54 soc: qcom: rmtfs_mem: add missing MODULE_DESCRIPTION/AUTHOR/LICENSE
This change resolves a new compile-time warning
when built as a loadable module:

WARNING: modpost: missing MODULE_LICENSE() in drivers/soc/qcom/rmtfs_mem.o
see include/linux/module.h for more information

This adds the license as "GPL v2", which matches the header of the file.

MODULE_DESCRIPTION and MODULE_AUTHOR are also added.

Signed-off-by: Jesse Chan <jc@linux.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-12-20 15:38:34 -06:00
Johan Hovold 8804517e9f soc: qcom: smsm: fix child-node lookup
Fix child-node lookup during probe, which ended up searching the whole
device tree depth-first starting at the parent rather than just matching
on its children.

Note that the original premature free of the parent node has already
been fixed separately.

Also note that this pattern of looking up the first child node with a
given property is rare enough that a generic helper is probably not
warranted.

Fixes: c97c4090ff ("soc: qcom: smsm: Add driver for Qualcomm SMSM")
Fixes: 3e8b554114 ("soc: qcom: smsm: fix of_node refcnting problem")
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Rob Clark <robdclark@gmail.com>
Signed-off-by: Johan Hovold <johan@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-12-20 15:38:34 -06:00
Geert Uytterhoeven 91c719f5ec soc: renesas: rcar-sysc: Keep wakeup sources active during system suspend
If an R-Car SYSC slave device is part of the CPG/MSTP or CPG/MSSR Clock
Domain and to be used as a wakeup source, it must be kept active during
system suspend.

Currently this is handled in device-specific drivers by explicitly
increasing the use count of the module clock when the device is
configured as a wakeup source.  However, the proper way to prevent the
device from being stopped is to inform this requirement to the genpd
core, by setting the GENPD_FLAG_ACTIVE_WAKEUP flag.

Note that this will only affect devices configured as wakeup sources.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-12-20 11:16:05 +01:00
Ma Shimiao aefc581855 soc: ti: fix max dup length for kstrndup
If source string longer than max, kstrndup will alloc max+1 space.
So, we should make sure the result will not over limit.

Signed-off-by: Ma Shimiao <mashimiao.fnst@cn.fujitsu.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
2017-12-16 14:45:33 -08:00
Thierry Reding c641ec6eab soc/tegra: pmc: Consolidate Tegra186 support
Move Tegra186 support to the consolidated PMC driver to reduce some of
the duplication and also gain I/O pad functionality on the new SoC as a
side-effect.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:06:44 +01:00
Thierry Reding 5be2255676 soc/tegra: pmc: Parameterize driver
Parameterize some aspects of the driver in preparation for Tegra186 PMC
support. Initially the Tegra186 driver had been split off into an extra
driver, but it turns out the backwards-compatibility break isn't as bad
as originally assumed, so with a little parameterization the same code
can be used to keep supporting all SoC generations.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 13:04:50 +01:00
Thierry Reding 75c15b90e4 soc/tegra: fuse: Add Tegra186 chip ID support
The register region containing chip ID information has been relocated in
Tegra186 and changed in backwards-incompatible ways. Add a compatible
string to allow the driver to make the distinction.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 12:43:31 +01:00
Thierry Reding da943840bc soc/tegra: fuse: Warn if accessing unmapped registers
If the FUSE registers are accessed but the region is not mapped, warn
and return 0. This potentially catches hard to diagnose bugs because the
accesses happen before any kernel log output.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 12:43:31 +01:00
Thierry Reding 1f1607dbd9 soc/tegra: fuse: Move register mapping check
The tegra_read_chipid() function can be called from places other than
tegra_get_chip_id(), so the check for a valid mapping of the MISC
registers needs to be moved to tegra_read_chipid() to catch all
potential accesses.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 12:43:30 +01:00
Timo Alho 83468fe259 soc/tegra: fuse: Add Tegra186 support
Tegra210 and Tegra186 are mostly compatible from a fuses point of view.
However, speedo support is implemented in the BPMP firmware, hence the
implementation needs to be skipped in the fuses driver.

Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
[treding@nvidia.com: reword commit message]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 12:43:29 +01:00
yangbo lu 6ea0acfd07 soc: fsl: support GUTS driver for ls1012a/ls1046a
This patch is to add compatible strings "fsl,ls1021a-dcfg" and
"fsl,ls1043a-dcfg" into device match table of GUTS driver.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2017-12-08 16:22:59 -06:00
Arnaud Patard 044d71bc6c meson-gx-socinfo: Fix package id parsing
I've noticed the following message while booting a S905X based board:

soc soc0: Amlogic Meson GXL (S905D) Revision 21:82 (b:2) Detected

The S905D string is obviously wrong. The vendor code does:
...
        ver = (readl(assist_hw_rev) >> 8) & 0xff;
        meson_cpu_version[MESON_CPU_VERSION_LVL_MINOR] = ver;
        ver =  (readl(assist_hw_rev) >> 16) & 0xff;
        meson_cpu_version[MESON_CPU_VERSION_LVL_PACK] = ver;
...

while the current code does:
...
...

This means that the current mainline code has package id and minor
version reversed.

Fixes: a9daaba296 ("soc: Add Amlogic SoC Information driver")
Signed-off-by: Arnaud Patard <apatard@hupstream.com>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-11-30 15:29:44 -08:00
Andreas Färber 3ad85b08f7 soc: actions: sps: Add S700
Add power domains for S700 SoC.

Signed-off-by: Andreas Färber <afaerber@suse.de>
2017-11-27 23:11:01 +01:00
Geert Uytterhoeven 90f0d2b344 soc: renesas: Identify R-Car M3-W ES1.1
The Product Register of R-Car M3-W ES1.1 incorrectly identifies the SoC
revision as ES2.0.  Add a workaround to fix this.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-11-27 11:40:57 +01:00
Linus Torvalds cf9b0772f2 ARM: SoC driver updates for v4.15
This branch contains platform-related driver updates for ARM and ARM64,
 these are the areas that bring the changes:
 
 New drivers:
  - Driver support for Renesas R-Car V3M (R8A77970)
  - Power management support for Amlogic GX
  - A new driver for the Tegra BPMP thermal sensor
  - A new bus driver for Technologic Systems NBUS
 
 Changes for subsystems that prefer to merge through arm-soc:
  - The usual updates for reset controller drivers from Philipp Zabel,
    with five added drivers for SoCs in the arc, meson, socfpa, uniphier
    and mediatek families.
  - Updates to the ARM SCPI and PSCI frameworks, from Sudeep Holla,
    Heiner Kallweit and Lorenzo Pieralisi.
 
 Changes specific to some ARM-based SoC
  - The Freescale/NXP DPAA QBMan drivers from PowerPC can now work
    on ARM as well.
  - Several changes for power management on Broadcom SoCs
  - Various improvements on Qualcomm, Broadcom, Amlogic, Atmel, Mediatek
  - Minor Cleanups for Samsung, TI OMAP SoCs
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJaDggbAAoJEGCrR//JCVInIeQQAN1MDyO1UaWiFYnbkVOgzFcj
 dqbFOc41DBE/90JoBWE8kR/rjyF83OqztiaYpx9viu2qMMBZVcOwxhCUthWK59c/
 IujYdw4zGevLscF+jdrLbXgk97nfaWebsHyTAF307WAdZVJxiVGGzQEcgm71d6Zp
 CXjLiUii4winHUMK9FLRY2st0HKAevXhuvZJVV432+sTg3p7fGVilYeGOL5G62WO
 zQfCisqzC5q677kGGyUlPRGlHWMPkllsTTnfXcmV/FUiGyVa3lUWY5sEu+wCl96O
 U1ffPENeNj/A/4fa1dbErtbiNnC2z/+jf+Dg7Cn8w/dPk4Suf0ppjP8RqIGyxmDl
 Wm/UxbwDClxaeF4GSaYh2yKgGRJMH5N87bJnZRINE5ccGiol8Ww/34bFG0xNnfyh
 jSAFAc318AFG62WD4lvqWc7LSpzOYxp/MNqIFXKN692St/MJLkx8/q0nTwY1qPY0
 3SELz9II3hz+3MfDRqtRi7hZpkgHgQ+UG7S5+Xhmqrl309GOEldCjPVJhhXxWoxK
 ZPtZOuyYvGhIC+YAnHaN6lUjADIdNJZHwbuXFImx85oKHVofoxHbcni5vk8Uu7z1
 sQNYOtdDGaPG/2u9RJdJlPg/jIgLKxxt/Xm9TYVawpZ5hFANhBTtIq5ExCRAil68
 j9sMOrpZ1DzCQyR7zN2v
 =qDhq
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Arnd Bergmann:
 "This branch contains platform-related driver updates for ARM and
  ARM64, these are the areas that bring the changes:

  New drivers:

   - driver support for Renesas R-Car V3M (R8A77970)

   - power management support for Amlogic GX

   - a new driver for the Tegra BPMP thermal sensor

   - a new bus driver for Technologic Systems NBUS

  Changes for subsystems that prefer to merge through arm-soc:

   - the usual updates for reset controller drivers from Philipp Zabel,
     with five added drivers for SoCs in the arc, meson, socfpa,
     uniphier and mediatek families

   - updates to the ARM SCPI and PSCI frameworks, from Sudeep Holla,
     Heiner Kallweit and Lorenzo Pieralisi

  Changes specific to some ARM-based SoC

   - the Freescale/NXP DPAA QBMan drivers from PowerPC can now work on
     ARM as well

   - several changes for power management on Broadcom SoCs

   - various improvements on Qualcomm, Broadcom, Amlogic, Atmel,
     Mediatek

   - minor Cleanups for Samsung, TI OMAP SoCs"

[ NOTE! This doesn't work without the previous ARM SoC device-tree pull,
  because the R8A77970 driver is missing a header file that came from
  that pull.

  The fact that this got merged afterwards only fixes it at this point,
  and bisection of that driver will fail if/when you walk into the
  history of that driver.           - Linus ]

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (96 commits)
  soc: amlogic: meson-gx-pwrc-vpu: fix power-off when powered by bootloader
  bus: add driver for the Technologic Systems NBUS
  memory: omap-gpmc: Remove deprecated gpmc_update_nand_reg()
  soc: qcom: remove unused label
  soc: amlogic: gx pm domain: add PM and OF dependencies
  drivers/firmware: psci_checker: Add missing destroy_timer_on_stack()
  dt-bindings: power: add amlogic meson power domain bindings
  soc: amlogic: add Meson GX VPU Domains driver
  soc: qcom: Remote filesystem memory driver
  dt-binding: soc: qcom: Add binding for rmtfs memory
  of: reserved_mem: Accessor for acquiring reserved_mem
  of/platform: Generalize /reserved-memory handling
  soc: mediatek: pwrap: fix fatal compiler error
  soc: mediatek: pwrap: fix compiler errors
  arm64: mediatek: cleanup message for platform selection
  soc: Allow test-building of MediaTek drivers
  soc: mediatek: place Kconfig for all SoC drivers under menu
  soc: mediatek: pwrap: add support for MT7622 SoC
  soc: mediatek: pwrap: add common way for setup CS timing extenstion
  soc: mediatek: pwrap: add MediaTek MT6380 as one slave of pwrap
  ..
2017-11-16 16:05:01 -08:00
Linus Torvalds 894025f24b USB/PHY patches for 4.15-rc1
Here is the big set of USB and PHY driver updates for 4.15-rc1.
 
 There is the usual amount of gadget and xhci driver updates, along with
 phy and chipidea enhancements.  There's also a lot of SPDX tags and
 license boilerplate cleanups as well, which provide some churn in the
 diffstat.
 
 Other major thing is the typec code that moved out of staging and into
 the "real" part of the drivers/usb/ tree, which was nice to see happen.
 
 All of these have been in linux-next with no reported issues for a
 while.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
 -----BEGIN PGP SIGNATURE-----
 
 iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCWgm/Vw8cZ3JlZ0Brcm9h
 aC5jb20ACgkQMUfUDdst+yktXwCdGgpInfOEvOGFd83EPDL7a1ncyc4AoM5wI8yl
 1CeLipqVIN3IsMMJptvb
 =zvDI
 -----END PGP SIGNATURE-----

Merge tag 'usb-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb

Pull USB/PHY updates from Greg KH:
 "Here is the big set of USB and PHY driver updates for 4.15-rc1.

  There is the usual amount of gadget and xhci driver updates, along
  with phy and chipidea enhancements. There's also a lot of SPDX tags
  and license boilerplate cleanups as well, which provide some churn in
  the diffstat.

  Other major thing is the typec code that moved out of staging and into
  the "real" part of the drivers/usb/ tree, which was nice to see
  happen.

  All of these have been in linux-next with no reported issues for a
  while"

* tag 'usb-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (263 commits)
  usb: gadget: f_fs: Fix use-after-free in ffs_free_inst
  USB: usbfs: compute urb->actual_length for isochronous
  usb: core: message: remember to reset 'ret' to 0 when necessary
  USB: typec: Remove remaining redundant license text
  USB: typec: add SPDX identifiers to some files
  USB: renesas_usbhs: rcar?.h: add SPDX tags
  USB: chipidea: ci_hdrc_tegra.c: add SPDX line
  USB: host: xhci-debugfs: add SPDX lines
  USB: add SPDX identifiers to all remaining Makefiles
  usb: host: isp1362-hcd: remove a couple of redundant assignments
  USB: adutux: remove redundant variable minor
  usb: core: add a new usb_get_ptm_status() helper
  usb: core: add a 'type' parameter to usb_get_status()
  usb: core: introduce a new usb_get_std_status() helper
  usb: core: rename usb_get_status() 'type' argument to 'recip'
  usb: core: add Status Type definitions
  USB: gadget: Remove redundant license text
  USB: gadget: function: Remove redundant license text
  USB: gadget: udc: Remove redundant license text
  USB: gadget: legacy: Remove redundant license text
  ...
2017-11-13 21:14:07 -08:00
Rafael J. Wysocki 29aaf90875 Merge branch 'pm-domains'
* pm-domains:
  PM / Domains: Fix genpd to deal with drivers returning 1 from ->prepare()
  PM / domains: Rework governor code to be more consistent
  PM / Domains: Remove gpd_dev_ops.active_wakeup() callback
  soc: rockchip: power-domain: Use GENPD_FLAG_ACTIVE_WAKEUP
  soc: mediatek: Use GENPD_FLAG_ACTIVE_WAKEUP
  ARM: shmobile: pm-rmobile: Use GENPD_FLAG_ACTIVE_WAKEUP
  PM / Domains: Allow genpd users to specify default active wakeup behavior
  PM / Domains: Add support to select performance-state of domains
  PM / Domains: Rename genpd internals from pm_genpd_* to genpd_*
2017-11-13 01:33:35 +01:00
Neil Armstrong 339cd0ea08 soc: amlogic: meson-gx-pwrc-vpu: fix power-off when powered by bootloader
In the case the VPU power domain has been powered on by the bootloader
and no driver are attached to this power domain, the genpd will power it
off after a certain amount of time, but the clocks hasn't been enabled
by the kernel itself and the power-off will trigger some faults.
This patch enable the clocks to have a coherent state for an eventual
poweroff and switches to the pm_domain_always_on_gov governor.

Fixes: 75fcb5ca4b ("soc: amlogic: add Meson GX VPU Domains driver")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-11-09 11:42:17 +01:00
Geert Uytterhoeven 89c7aea915 soc: rockchip: power-domain: Use GENPD_FLAG_ACTIVE_WAKEUP
Set the newly introduced GENPD_FLAG_ACTIVE_WAKEUP, which allows to
remove the driver's own flag-based callback.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-11-08 01:00:47 +01:00
Geert Uytterhoeven 7534d181a8 soc: mediatek: Use GENPD_FLAG_ACTIVE_WAKEUP
Set the newly introduced GENPD_FLAG_ACTIVE_WAKEUP, which allows to
remove the driver's own flag-based callback.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-11-08 01:00:47 +01:00
Arnd Bergmann d771d62e31 soc: qcom: remove unused label
The newly added driver comes with a harmless warning:

drivers/soc/qcom/rmtfs_mem.c: In function 'qcom_rmtfs_mem_probe':
drivers/soc/qcom/rmtfs_mem.c:211:1: error: label 'remove_cdev' defined but not used [-Werror=unused-label]

This removes the unused label to avoid the warning.

Fixes: 702baebb8e00 ("soc: qcom: Remote filesystem memory driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-11-03 13:24:56 +01:00
Arnd Bergmann 30f3b0678c soc: amlogic: gx pm domain: add PM and OF dependencies
The new driver introduces harmless warnings:

warning: (PM_RMOBILE && ARCH_RCAR_GEN1 && ARCH_RCAR_GEN2 && ARCH_R7S72100 && MESON_GX_PM_DOMAINS) selects PM_GENERIC_DOMAINS which has unmet direct dependencies (PM)
warning: (MESON_GX_PM_DOMAINS) selects PM_GENERIC_DOMAINS_OF which has unmet direct dependencies (PM_GENERIC_DOMAINS && OF)

This adds CONFIG_OF and CONFIG_PM dependencies to ensure it
will only be enabled in valid configurations.

Fixes: 75fcb5ca4b ("soc: amlogic: add Meson GX VPU Domains driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-11-02 23:43:55 +01:00
Arnd Bergmann e54a7867f3 Amlogic drivers for v4.15, round 2
- add PM domain driver for GX VPU
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAln2AqsACgkQWTcYmtP7
 xmUIzA/9EMFQ/uJ0Y4adKVZ5f3Av+h692uvFRxEsLw14Y/5K5wP8/dO5KDFUDhgp
 vLmzDKSMU6jIFhBXefKtljXr9RtkEYnjG0Q46gTIJYbB1dh6Ux9fJ83YYJe1IHcf
 1YTilbVaKekShhv8oWZMSy4KvQU9HubBnfQZkEjJSIGX15LFDcw54qKAMsNX4jfr
 4W8MbVa1AEMH37lsbyxY2Gufpd1sn9MagHopQJZcrK3O2MFdUi+biamDQmyg+JnB
 +aZHpOMyDW3LM6p+y221LRvAmZFwcmYeDp8QXeT6xTLPkFa27l7cV1ojbusIyzMi
 NuZLcUh6UoR3l/UzOHsBO2ljoJJXO7SLSpCGiKya3DHCVuuOKX1/4yfvWEsOI393
 9ivypN7EsQvMdafBlpmNmyd55qd47M40TVz0BYHutykgQjeGH7OseEbqxZtv78m0
 TTyNa/++6KrVFbKL3FnjfdqRTns7G1SEwxM3HJPcJOnU53jazuGcGUMiOaOBKWAN
 SDWtdkxubLTjmoAvJ8yYymTLjnSq+mQHDtwZNMlvM6ihfDBLljyUZP/7MLp5f5hE
 cieSjk/qCvBNTJ6+i9Z8BQp1gRNXBZHTIbQ26ju/URREAKZazeim1jwufocVjrU2
 Cwxe83Mmzizdr2YKU0eVeLkvjtTf+08IgMLmE7T8rB8HcluePRo=
 =RZx8
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-drivers-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/drivers

Pull "Amlogic drivers for v4.15, round 2" from Kevin Hilman:

- add PM domain driver for GX VPU

* tag 'amlogic-drivers-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  dt-bindings: power: add amlogic meson power domain bindings
  soc: amlogic: add Meson GX VPU Domains driver
2017-11-02 16:36:23 +01:00
Arnd Bergmann 9855b3db51 - add 32 bit read/write support to pwrap
- add mt7622 support to pwrap
 - test build all mediatek soc drivers
 - fix compiler issues
 - clean up Kconfig description
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAlns36cXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00Ozxg/9EL0cErlhOwxCVfLljeVlRsQV
 2qKgoFKINT/JoTd0OW3Xodzhia0Mbf7G6xtfokktEG7R4jUV6W5UoyftlRVDJjw+
 OAM1t/QoGBifcRP5XJfxVnln9GT3egcfixLJB7e1KR9HM+Yjin8pX8EK5blWJ5X5
 nJPHAuxo6/RcU+TaLhTNMyLa22OpFkVGKkaxsOh1/qKVMk9SfVe3oW2WYqXRc/3Y
 9Qt83xldIqXXkwS0p/o5GeZZq8pui29V3y2jLBzv9soKqkVAM6fO3hXSQFsEAMre
 doAhErbXwHFwV8TnVqdnoDK5Q41TNpDC215wi0ElywrMV5TbV4TtEclNMxR2xdc7
 t8pf8TNj08dzV3xiOK0RDrxmmAymxnbjqVEacdNHgByu0wSryD5Js/BDYcwmweUv
 VTCCJyTFA/vEeTdo4vEZCy+SHmiw73mBcIVmc+fgxFqw9J6BCNGFcasPS8TGNlfa
 ouGbkK+fEWep+659dKECuwYgyT4ODqpJ05hYQDMn8vArHTh5pXi/GyGlR/c+xPgY
 cHWU0XCZx80jAF80iVbXVdBU/TuKwuoyytyvAG44lmMY5BIj2Q/xoWPTwkEgJ/ZV
 JyGE04QzANP2SxTGoBHEgwOe5NvU2aulyUF18/kJh6t1los+/sKtoDzf9hGKrwB/
 VkLn2D2qpoKqNz5yvkk=
 =ZWf/
 -----END PGP SIGNATURE-----

Merge tag 'v4.14-next-soc' of https://github.com/mbgg/linux-mediatek into next/drivers

Pull "Mediatek: soc driver updates for v4.15" from Matthias Brugger:

- add 32 bit read/write support to pwrap
- add mt7622 support to pwrap
- test build all mediatek soc drivers
- fix compiler issues
- clean up Kconfig description

* tag 'v4.14-next-soc' of https://github.com/mbgg/linux-mediatek:
  soc: mediatek: pwrap: fix fatal compiler error
  soc: mediatek: pwrap: fix compiler errors
  arm64: mediatek: cleanup message for platform selection
  soc: Allow test-building of MediaTek drivers
  soc: mediatek: place Kconfig for all SoC drivers under menu
  soc: mediatek: pwrap: add support for MT7622 SoC
  soc: mediatek: pwrap: add common way for setup CS timing extenstion
  soc: mediatek: pwrap: add MediaTek MT6380 as one slave of pwrap
  soc: mediatek: pwrap: refactor pwrap_init for the various PMIC types
  soc: mediatek: pwrap: add pwrap_write32 for writing in 32-bit mode
  soc: mediatek: pwrap: add pwrap_read32 for reading in 32-bit mode
  dt-bindings: arm: mediatek: add MT7622 string to the PMIC wrapper doc
  ARM: mediatek: Cocci spatch "of_table"
  soc: mediatek: pwrap: fixup warnings from coding style
2017-11-02 16:29:56 +01:00
Arnd Bergmann 84cbda2fec soc for 4.15
- add SoC ids for the sama5d2 SiPs
  - Improve the AT91 maintainers entry
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEXx9Viay1+e7J/aM4AyWl4gNJNJIFAlns86oACgkQAyWl4gNJ
 NJKaTQ//dzKkEGdZrGNWam5ALEwx6TAFP3GGrER4M3Z85zqXj9tmIxdshG/Ok0Sj
 dhrRH0s7ExdtRW9VITDR0Hfy1PjqxcHEe7AgRYHtTQsI5j4Dgwln8D2lZ7DMP9rw
 s/3ORemlW9cilA618ndircN7yFOgdMc+ga6bQ0aXCfRrwifWRakf3Hf6xiO2Ot2m
 /MrFjGNSrE2287XbuRiPNxnmytUS3jc+e5wYENhN/zO74XVVujWTDPbBWuzANT7j
 S43r5Zf8sRC8OjNtH5x+/e3pHfwhIJ5czmrLVbfo05Fb+kKAQp8YlK76ThN5TBcC
 YvsEuWrd+MPCjiias/PNQvvkBZTG9L7uLOm0uo96SaWs0NGB+i+gZ/EeUOQr/7v0
 oL2bkFhg17jEDGdMChwoHfM5yTiVUfc4ivjSGK26/tUFWxNW1tqOKu4Q9nU+/t66
 3u6kq/0AywInHHLvalTQ4hJ39M1UDV+IFWpqhgWnlWIxKMopjxG1rkCn+oR+XmIQ
 SkgSPEtV7jL3BIEIC+3X7evGWVfMaRJIiIVUewS7xArV/Zm5+Q8CYAz3XG9wij+0
 UchcgZ4xuzRELlyAID/xmIeGChNKnW8b5UscxibZhPSDIwN6tXctib03CGg7JTE3
 9DhR8Dt3AjjeO0kivWvT3qVw3zZOISrg5v4Q55ULkMWPw/LeiFc=
 =rOv0
 -----END PGP SIGNATURE-----

Merge tag 'at91-ab-4.15-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/abelloni/linux into next/drivers

Pull "soc for 4.15" from Alexandre Belloni:

 - add SoC ids for the sama5d2 SiPs
 - Improve the AT91 maintainers entry

* tag 'at91-ab-4.15-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/abelloni/linux:
  MAINTAINERS: Add SoC drivers to AT91 entry
  drivers: soc: atmel: Add basic support for new sama5d2 SiPs
2017-11-02 16:28:44 +01:00
Arnd Bergmann f3e69db2c0 Amlogic drivers for v4.15
- add SoC info driver for 32-bit Amlogic SoCs
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAlnsbdwACgkQWTcYmtP7
 xmVSvRAAjRexieeKCa5RuHn6UH/UC0ICWQeF87usIw1bOZ0dk0VWi3Zp0CKhoYnZ
 nnDnPq8hu1aFLb+6Me3tj8lIFzTHm4eKoeQXLAQtn9ZpAtAgfaoQ9Pc+L7xRD6Kj
 DEGHDo1OO+Rt1L8tPY4fv/6dkBrO0Tbew6nen5xLYukZ4lWf8rHyZ7u9CmUTUdSo
 v1zDpO5DVXA/MgVgz8XVrUaz5RglclKqcO/QfLyxMR7CXWPfKyZQiYFj5eIodDdY
 IwYw8ISckmBVrEX9pP36lXZxR7HkulwpfduD4IPEdhqUk5OAsdtkQh+NJgAS5Ulr
 FPVWbyocai3FYJwFGQ8upcCzusRKx1PpoIEn7W9TALS1/DNBsqIJdBldTdJ5kAeM
 qCYRyEovSp/oXKj7c6SB9nDVrhMdMoZKcsKz88jM0Luc1XSJhJ/8uxpkmN19niFN
 Y1Ty0G0kRN/kQhe8vnOIUtPvy3pnJjPcD37uuTP+mYETCftVpeIWDIn4yNaZTQF3
 LOL0+uU/MfRjCTr6Qbn7AWXh9PbIUI6yif741sJwAfb0+zuNLOpoWrscotySa6y7
 vV6DQVERzs3wgCJQCssixb3D74ejvYmleqjkZM1SXPkQDD2RTsX1HFqd8DgdcPnz
 gr571iAdCg3vWO9AbAi0pGXqaYxLp+kOq+ht1WxRDCoDofqOXg0=
 =rzEd
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-drivers' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/drivers

Pull "Amlogic drivers for v4.15" from Kevin Hilman:

- add SoC info driver for 32-bit Amlogic SoCs

* tag 'amlogic-drivers' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  soc: amlogic: Add Meson6/Meson8/Meson8b/Meson8m2 SoC Information driver
2017-11-02 16:26:05 +01:00
Arnd Bergmann ae1d77fce7 Qualcomm ARM Based Driver Updates for v4.15 Part 2
* Add Qualcomm Remote Filesystem Memory driver
 * Add OF linkage for RMTFS
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZ7G5TAAoJEFKiBbHx2RXVhYgP/23hFR610Nb/00Zdukt8pRAv
 2Q54WO8oWl0CKjY6ohkHhOCwHFIp6Td/DHcg01yw1jTD7gnRJEFZleMX4/SJOWjX
 eIui9+sztCI3MpQbWOqCGmfSVGwlCmivto2fyyJfqQaKUTYfs4CtqSGFw5t01TH2
 /fnvP1z06Qa3mPk38La8vmxGdQCF7O97O0RceWxFNyiOEhksLZUOktkC/DEfupzU
 DjKbcgDIr7GGok7mdP26mRMGLcqtkIV+ZdQsIyx6JTMm7tC7Yq6jNn7e2iwMTDnt
 aYJQ3iecWMoa9XV9+jG4OzR0aMl1IzFy75BewJIsSKOMt6DhlN/wxF7HNpnxnIMZ
 HmtXgrqDM4k8yIyG7Gp5C152N6vK5cNXGuJSfJliw+cMtGC2ikBu/aQkCU9H5+gh
 wa0pcYKxdBdImhJfj+bC5SmoJ3ERUKH3neH90aOTfsUZilGVAwrJ72eGT8zchbB1
 R9oHlez4RIGsM1gx0DyK8stqYdYrrelML43qsBsbC9OiwgCJY9Y5ObykMjO+s3Oa
 zSxn1f7b4LxgdnQnzRgcJIMAKlR6zv/vUI7+TGRWe3lrcMJAEqx2dmxI6k+2yatG
 ijRAyS2SBaK4aVb5Qk1dBUGRD9isEyD6aqyr8TAl1kLLYm5x4XKqLXtmC0NLU1ee
 3Kw/ohbcBRlPlaZzWs9v
 =E/Ae
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-4.15-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers

Pull "Qualcomm ARM Based Driver Updates for v4.15 Part 2" from Andy Gross:

* Add Qualcomm Remote Filesystem Memory driver
* Add OF linkage for RMTFS

* tag 'qcom-drivers-for-4.15-2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  soc: qcom: Remote filesystem memory driver
  dt-binding: soc: qcom: Add binding for rmtfs memory
  of: reserved_mem: Accessor for acquiring reserved_mem
  of/platform: Generalize /reserved-memory handling
2017-11-02 16:24:36 +01:00
Arnd Bergmann 4e53097313 soc/tegra: Changes for v4.15-rc1
Contains a fix to the generic power domain driver to properly report
 errors propagated from BPMP.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlnp4ZETHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zoS8BEAC4HLNmOcPaVa82NqYEH0xlTohw2I4k
 Jcpe73eRN+JACzljRLXeJ+aL9FYBaroPEZ2Rs/pWsbVWva/W6VAN9hXVaStkgFGx
 hWXbSfGEPRQDbn58zg0ZZa4kCGMfYbFLh3HPM/HAkEqkYmWCLVMsd43adkI8P+Kg
 Cyec8mrC29VlVWMRZ223NiBHcqShZOnFgo4ZlyNtNczpUNhmw0OVnRKyqtpNxC7w
 OGzZXU7Vcgz7W5iqOmvZ1G5VY9+hhwW317TiPWJTpOQku3KzB8zr5dvY0+vud6cz
 oJQVge8m7vjY4Qdh9V96AynWC5yCZOYVEMr2JZqbTmiSGeefIvU0VQ+cX+fYTwWD
 37V7b5j7+TROa1mZkIezqyy1zbgolY/DGoC403g/zT3SzEs3YUaOtdPOez+F1eJT
 9pmZdX1SUDJmeG/piuG1J8Rhh01RUFNLnchy+Vc7d3/RrjHmj26RceKhiuqx8+K4
 NpiOHcz9wdXszeZYSsjiAci8SLWlGOPcHtpIoYc0VjBxAoPXzXeESC6236pMyqGw
 VNdoz37CI5RTkCSAQmPd21M4nbydvGqgaMZ2FdWSzeRdYbKSen6Chk3rV0YbuHbF
 2gjHmoJBi8/rQXZVYR5ea8ZJYy9NrC0siola0Z+imH8arMAHeakBVVpvCJvRymZ3
 wdx1Q0gsMIpdww==
 =tkiA
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-4.15-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

Pull "soc/tegra: Changes for v4.15-rc1" from Thierry Reding:

Contains a fix to the generic power domain driver to properly report
errors propagated from BPMP.

* tag 'tegra-for-4.15-soc' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: bpmp: Check BPMP response return code
2017-11-02 16:16:09 +01:00
Greg Kroah-Hartman b24413180f License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.

By default all files without license information are under the default
license of the kernel, which is GPL version 2.

Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier.  The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.

This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.

How this work was done:

Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
 - file had no licensing information it it.
 - file was a */uapi/* one with no licensing information in it,
 - file was a */uapi/* one with existing licensing information,

Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.

The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne.  Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.

The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed.  Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.

Criteria used to select files for SPDX license identifier tagging was:
 - Files considered eligible had to be source code files.
 - Make and config files were included as candidates if they contained >5
   lines of source
 - File already had some variant of a license header in it (even if <5
   lines).

All documentation files were explicitly excluded.

The following heuristics were used to determine which SPDX license
identifiers to apply.

 - when both scanners couldn't find any license traces, file was
   considered to have no license information in it, and the top level
   COPYING file license applied.

   For non */uapi/* files that summary was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0                                              11139

   and resulted in the first patch in this series.

   If that file was a */uapi/* path one, it was "GPL-2.0 WITH
   Linux-syscall-note" otherwise it was "GPL-2.0".  Results of that was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0 WITH Linux-syscall-note                        930

   and resulted in the second patch in this series.

 - if a file had some form of licensing information in it, and was one
   of the */uapi/* ones, it was denoted with the Linux-syscall-note if
   any GPL family license was found in the file or had no licensing in
   it (per prior point).  Results summary:

   SPDX license identifier                            # files
   ---------------------------------------------------|------
   GPL-2.0 WITH Linux-syscall-note                       270
   GPL-2.0+ WITH Linux-syscall-note                      169
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause)    21
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)    17
   LGPL-2.1+ WITH Linux-syscall-note                      15
   GPL-1.0+ WITH Linux-syscall-note                       14
   ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause)    5
   LGPL-2.0+ WITH Linux-syscall-note                       4
   LGPL-2.1 WITH Linux-syscall-note                        3
   ((GPL-2.0 WITH Linux-syscall-note) OR MIT)              3
   ((GPL-2.0 WITH Linux-syscall-note) AND MIT)             1

   and that resulted in the third patch in this series.

 - when the two scanners agreed on the detected license(s), that became
   the concluded license(s).

 - when there was disagreement between the two scanners (one detected a
   license but the other didn't, or they both detected different
   licenses) a manual inspection of the file occurred.

 - In most cases a manual inspection of the information in the file
   resulted in a clear resolution of the license that should apply (and
   which scanner probably needed to revisit its heuristics).

 - When it was not immediately clear, the license identifier was
   confirmed with lawyers working with the Linux Foundation.

 - If there was any question as to the appropriate license identifier,
   the file was flagged for further research and to be revisited later
   in time.

In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.

Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights.  The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.

Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.

In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.

Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
 - a full scancode scan run, collecting the matched texts, detected
   license ids and scores
 - reviewing anything where there was a license detected (about 500+
   files) to ensure that the applied SPDX license was correct
 - reviewing anything where there was no detection but the patch license
   was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
   SPDX license was correct

This produced a worksheet with 20 files needing minor correction.  This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.

These .csv files were then reviewed by Greg.  Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected.  This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.)  Finally Greg ran the script using the .csv files to
generate the patches.

Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-02 11:10:55 +01:00
Neil Armstrong 75fcb5ca4b soc: amlogic: add Meson GX VPU Domains driver
The Video Processing Unit needs a specific Power Domain powering scheme
this driver handles this as a PM Power Domain driver.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-10-29 07:25:53 -07:00
Bjorn Andersson d1de6d6c63 soc: qcom: Remote filesystem memory driver
The Qualcomm remote file system protocol is used by certain remoteprocs,
in particular the modem, to read and write persistent storage in
platforms where only the application CPU has physical storage access.

The protocol is based on a set of QMI-encoded control-messages and a
shared memory buffer for exchaning the data. This driver implements the
latter, providing the user space service access to the carved out chunk
of memory.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-10-22 05:06:34 -05:00
Matthias Brugger f32fbbadaf soc: mediatek: pwrap: fix fatal compiler error
When adding the MT6380 compatible, the sentinel for of_device_id was
deleted, which leades to the following compiler error:
FATAL: drivers/soc/mediatek/mtk-pmic-wrap: struct of_device_id is not terminated with a NULL entry!

Fix this by adding the sentinel again.

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-10-21 10:23:28 +02:00
Matthias Brugger fb2c1934f3 soc: mediatek: pwrap: fix compiler errors
When compiling using sparse, we got the following error:
drivers/soc/mediatek/mtk-pmic-wrap.c:686:25: error: dubious one-bit signed bitfield

Changing the data type to unsigned fixes this.

Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-10-21 10:17:47 +02:00
Arnd Bergmann 1c6788e874 FSL/NXP ARM SoC drivers updates for 4.14
This adds the DPAA QBMan support for ARM SoCs and a few minor fixes/updates.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZxWAhAAoJEIbcUA77rBVU/jAQAKJ4a8sRMPWzIAK0lAzCzfQS
 yaHeVoBlzUp7raXziIJPOv+ahIcunh6Fe6+J36fOJy0telggNTqOJZDhPcUXRbIk
 af3vSYvQCbRmQQbfZ5dwhVnSOB+lSabBODJKIHAVC3MAzuIkfrU3Q7snnOGANh+4
 5Ln4R4Z5qZ9cCUPb0keeEEO3qi3Y+Ln3jVWjNxqW7lCyY76gCMtS1X+x4byRdI1P
 Md5YqBy+jbGqnnT5c+d0ssvLjR5fe+rXNXv+lR3bqC0N7LzKNrlHNrWkAAyQvyKp
 Sw5onzaS0wBN2ybHvta8XMT4V3GahHVNmLK/tZH6ehichOc6V0MzVFoHtj/vdLmy
 U8Wdov+Dn1gyKv4bfp+m4bk26BsenCvHlz9Lznhcf/omWHBT/cpCJMcL4x+BpINA
 rVZ4kuX5qlJleTeu4/OT1hJaQCqYh9PbJydvWE2XrBldy8Pk/kwpeCj7lKiMFLhL
 fqBAEjoHtwjFyeSRLD3MZUA4dS4JhqGZTrjGeoXA1JruIJL7H34E6IzvIa2uTA1A
 H+XF+TumFLWV2ELrQ0QZf1cFgf3p/oujYvlcNReYPixm2aevlUwTBDKhiFTQb5ew
 DTU6SqoaW3N92wE2SDKYpEaVIOCKLbWfTVqxmTCzKG/eHpan4Z7lX7Xv8LAC/vyM
 faA91WfTza/swKjWXSyW
 =BpKO
 -----END PGP SIGNATURE-----

Merge tag 'soc-fsl-for-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux into next/drivers

Pull "FSL/NXP ARM SoC drivers updates for 4.14" from Li Yang:

This adds the DPAA QBMan support for ARM SoCs and a few minor fixes/updates.

This pull request includes updates to the QMAN/BMAN drivers to make
them work on the arm/arm64 architectures in addition to the power
architecture and a few minor update/bug-fix to the soc/fsl drivers.

We got the Reviewed-by from Catalin on the ARM architecture side.

DPAA (Data Path Acceleration Architecture) is a set of hardware
components used on some FSL/NXP QorIQ Networking SoCs, it provides the
infrastructure to support simplified sharing of networking interfaces
and accelerators by multiple CPU cores, and the accelerators
themselves.  The QMan(Queue Manager) and BMan(Buffer Manager) are
infrastructural components within the DPAA framework.  They are used to
manage queues and buffers for various I/O interfaces, hardware
accelerators.

* tag 'soc-fsl-for-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/leo/linux:
  soc/fsl/qbman: Enable FSL_LAYERSCAPE config on ARM
  soc/fsl/qbman: Add missing headers on ARM
  soc/fsl/qbman: different register offsets on ARM
  soc/fsl/qbman: add QMAN_REV32
  soc/fsl/qbman: Rework portal mapping calls for ARM/PPC
  soc/fsl/qbman: Fix ARM32 typo
  soc/fsl/qbman: Drop L1_CACHE_BYTES compile time check
  soc/fsl/qbman: Drop set/clear_bits usage
  dt-bindings: soc/fsl: Update reserved memory binding for QBMan
  soc/fsl/qbman: Use shared-dma-pool for QMan private memory allocations
  soc/fsl/qbman: Use shared-dma-pool for BMan private memory allocations
  soc/fsl/qbman: Add common routine for QBMan private allocations
  soc/fsl/guts: Add compatible string for LS1088
  soc/fsl/qman: Sleep instead of stuck hacking jiffies
2017-10-20 22:43:05 +02:00
Arnd Bergmann 8a36c27d19 Qualcomm ARM Based Driver Updates for v4.15
* Add SCM firmware APIs for download mode and secure IO service
 * Add SMEM support for cached entries
 * Add SMEM support for global partition, dynamic item limit, and more hosts
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZ5QSAAAoJEFKiBbHx2RXVo80QAIBfwxvORm9XVXasPZG+u+Yy
 8Gtq8m/e9Z5V6KIsYAczdy7tEV0vVmyDBdG5q/rkyHKvi8t9dbRROSxlsFb7INkY
 LOJ4X+9YaBAx7ikxn6TAoxiXKITcTIVpfKbCzXpAm0Q3AhtUI65nsGsFBWTPL7O5
 H8uzNQcn8196PPfY1/M/c+cwsPDa4GVPFEyT86mg+6XNljziY3Ky+6BZEdv+Vri/
 xA8ACb3huCqbpDjVVsTYdP/FvOQYDSHfTzEXwfXvW1IiKpiZ/gJG/OvUalUL28gf
 McRfpG+Cb164w6dHeysZjE3TJI6TaUOzrBU7CkVFj9z3h+DIqneLQShKwwykSG4h
 7XL+g/+rDEftl9N0eMDYNRW7K+bMdqmqfZODMBbEWwg0hhXkghNTPENII0MRx7Al
 /HxbyU3q66bXPWMXir5QVr81QexUn5h9PcVRq1wJ8Gx9VqL2dL+s3B4ffMViPTfc
 LCVawvGM2uBao4oeUsDgrqIBz7e7ctYaJk6z8T3wG1GrAmxN7iW5h447ve/HhvnW
 uh5qpUvt31h9+iEAPGlZTGhzHgCsOhE5k5iGzNvClp7b6Fb4bUxMMj3LQtYsoH61
 1DAnH2Xf5DLsBkGRb8YYBarbT7Meqt/VJWzz84ZTlK5stTKIsguiviEcxM51h2ZD
 znhjeVtzmgMpza8UeB0d
 =9wWp
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers

Pull "Qualcomm ARM Based Driver Updates for v4.15" from Andy Gross:

* Add SCM firmware APIs for download mode and secure IO service
* Add SMEM support for cached entries
* Add SMEM support for global partition, dynamic item limit, and more hosts

* tag 'qcom-drivers-for-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  firmware: qcom: scm: Expose download-mode control
  firmware: qcom: scm: Expose secure IO service
  soc: qcom: smem: Increase the number of hosts
  soc: qcom: smem: Support dynamic item limit
  soc: qcom: smem: Support global partition
  soc: qcom: smem: Read version from the smem header
  soc: qcom: smem: Use le32_to_cpu for comparison
  soc: qcom: smem: Support getting cached entries
  soc: qcom: smem: Rename "uncached" accessors
2017-10-20 22:34:41 +02:00
Arnd Bergmann ea9e3fbc17 Samsung soc drivers changes for v4.15
Remove of Exynos4212 related dead code (no more support for this SoC).
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABCAAGBQJZ4xBvAAoJEME3ZuaGi4PXSroP/inI0fpKpo9U3ciCTOvYiO5y
 zu6TxJP7xUu43vFBLdTA7FOaddSHnpvAGQ9hS4HXs1F5/+paeqhqJ+U6BPwrC1na
 VJPEmdTL3wrp46V9AGoaMZBlLFP5zjIgAvez1QhgOd8GiveS6o9ZDE4N7MidB1ob
 SXGfmKw4yVJQ6TrCKUcx8M1yyov9125d8GVWNA2WP67UR/vtSOdH7rMLwh1Mvoi+
 eJpABOx9ZQfzyNxcFvBjr2wCMkqTb6muPiTl0UIzVZ16aya8Dx4UznEjMCgmdkQX
 ZtaZI+CJahpnzzi9+EKJzBsm57Q4jWV4TJujLrjZ59sI3zsKkNs9R7L8gwQdzYKa
 slhCXNLBG2/g3DQ+Gl8nM3vT/DJgNlcEvStmGU5SoQuYBr1w75XpK/kDKZs25zxF
 Tjz3mzXj1eg4aZT/Ier1jV05ej26AvwG0AJfgvKFl3L3kBG5Zi32mZqhh0aD93Fg
 v832J/BZQ3+Cqha7U1uW1ESBFftRiBg4Y0yfI1WaD//Yu5PlNDnHd098bPeXdvCG
 2tWQ4wzSjKUX9ZzTIhLgGpv6T+vkP/nvW9ufDMUUf7SVWMmIjE4q0LCwNk4zRxGp
 YvcMkn9xuXyG+DRjK/dyz85qV1AbtGobeImL2G+6SEL8XVnW3yTqxhJdaAQWjFH/
 8DwxWwhWs/AvVptTKeBw
 =7Lj1
 -----END PGP SIGNATURE-----

Merge tag 'samsung-drivers-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers

Pull "Samsung soc drivers changes for v4.15" from Krzysztof Kozłowski:

Remove of Exynos4212 related dead code (no more support for this SoC).

* tag 'samsung-drivers-4.15' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  soc: samsung: Remove Exynos4212 related dead code
2017-10-20 22:33:54 +02:00
Arnd Bergmann 4b367f2e88 Renesas ARM Based SoC Drivers Updates for v4.15
Add basic support for R-Car V3M (R8A77970) SoC.
 
 Sergei Shtylyov says:
 
 * Add support for R-Car V3M (R8A77970) SoC power areas to the R-Car SYSC
   driver
 
 * Add support for identifying the R-Car V3M (R8A77970) SoC
 
 * Add support for R-Car V3M (R8A77970) to the R-Car RST driver -- this
   driver is  needed  for the clock driver to work
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZyLPOAAoJENfPZGlqN0++Y2IP/047AAFemZCm5+FH3freRXhP
 sSju7WUSQ3pVZ55ZIAec+O8Xn2P+yUX/2++6vWRMENEUT6M9TEQGVAm51VWJNYNr
 QKz0mnrMU1L9A8uRMpljDjGR+ClYT9SpLCx2AzjKDTYEeEJROQQNYUFCDzCK/muE
 FXlTqg7pvXGJ9uaWi+nFOFQzL54QA/AzbTlN+Tjbz012U+OOIZOlDt9FQd4Y7IV8
 GaOQSJdVKUQ5ZPBpcbZi5NP7o56pFX6rzPm2je7dean9D2e0NJioYFi0lY/bpPjn
 k7aOCSV/2OCQpxVhkDIJpOUCqotDhASLZTuQPi3CDMCpxnBk9k7I+fxXKPRW1qoG
 ZM5aeU4U3SnlPpcsLiSbvSsl8m0F5FyFn3Ulw2HNX2DAmbi7GB9UJXRtABf03S4n
 JyJQ/2DKfQwAv5qgAvbfre2RBGtJyBkDcKw8q59PlYEdDbXbGbiIWwb9OpoFPn+3
 nsnPP6lhD5V9GGRrxbFMqePFxEVxwvDTeG6KbucR96ldt+dl5h4a17H03KL1otru
 6oyXUiIFeDH7OH/LK5ZFSN6DFQpWPNSAVpD70OFdM0K5nB7cueiROTK6wfdCSASr
 ABN8VNIAMMRYYtce6mjpLfHHonyMLxuWXd8gj9aIDgdrietQVuNJk03ixMm/gaD9
 YzShptWzf7YiRIk/5upV
 =5yPj
 -----END PGP SIGNATURE-----

Merge tag 'renesas-drivers-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

Pull "Renesas ARM Based SoC Drivers Updates for v4.15" from Simon Horman:

Add basic support for R-Car V3M (R8A77970) SoC.

Sergei Shtylyov says:

* Add support for R-Car V3M (R8A77970) SoC power areas to the R-Car SYSC
  driver

* Add support for identifying the R-Car V3M (R8A77970) SoC

* Add support for R-Car V3M (R8A77970) to the R-Car RST driver -- this
  driver is  needed  for the clock driver to work

* tag 'renesas-drivers-for-v4.15' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  soc: renesas: rcar-sysc: add R8A77970 support
  soc: renesas: identify R-Car V3M
  soc: renesas: rcar-rst: add R8A77970 support
2017-10-20 22:27:58 +02:00
Jean Delvare ab86ba2f8c soc: Allow test-building of MediaTek drivers
The COMPILE_TEST alternative dependency allows test-building the
drivers but only as long as the build system itself will look into
the directory where the drivers reside.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Cc: Sean Wang <sean.wang@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-10-20 12:08:36 +02:00
Sean Wang 31d7b359a9 soc: mediatek: place Kconfig for all SoC drivers under menu
Add cleanup for placing all Kconfig for all MediaTek SoC drivers under
the independent menu as other SoCs vendor usually did. Since the menu
would be shown depending on "ARCH_MEDIATEK || COMPILE_TEST" selected and
MTK_PMIC_WRAP is still safe compiling with the case of "COMPILE_TEST"
only, the superfluous dependency for those items under the menu also is
also being removed for the sake of simplicity.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-10-20 12:08:01 +02:00
Chenglin Xu 69d0c060ac soc: mediatek: pwrap: add support for MT7622 SoC
Add the registers, callbacks and data structures required to make the
PMIC wrapper work on MT7622.

Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com>
Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-10-20 11:54:39 +02:00
Sean Wang 68189ed59d soc: mediatek: pwrap: add common way for setup CS timing extenstion
Multiple platforms would always use their own way handling CS timing
extension on the bus which leads to a little bit code duplication.
Therefore, the patch groups the similar logic to handle CS timing
extension into the common function which allows the following SoCs
have more reusability for configing CS timing.

Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-10-20 11:54:38 +02:00
Sean Wang 7f80f10078 soc: mediatek: pwrap: add MediaTek MT6380 as one slave of pwrap
Add MediaTek MT6380 regulator becoming one of PMIC wrapper slave
and also add extra new regmap_config of 32-bit mode for MT6380
since old regmap_config of 16-bit mode can't be fit into the need.

Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com>
Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-10-20 11:54:38 +02:00
Sean Wang d56b31e2ea soc: mediatek: pwrap: refactor pwrap_init for the various PMIC types
pwrap initialization is highly associated with the base SoC and the
target PMICs, so slight refactorization is made here for allowing
pwrap_init to run on those PMICs with different capability from the
previous MediaTek PMICs and the determination for the enablement of the
pwrap capability depending on PMIC type. Apart from this, the patch
makes the driver more extensible especially when more PMICs join into
the pwrap driver.

Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-10-20 11:54:37 +02:00
Sean Wang a10616f053 soc: mediatek: pwrap: add pwrap_write32 for writing in 32-bit mode
Some regulators such as MediaTek MT6380 also has to be written in
32-bit mode. So the patch adds pwrap_write32, rename old pwrap_write
into pwrap_write16 and one additional function pointer is introduced
for increasing flexibility allowing the determination which mode is
used by the pwrap slave detection through device tree.

Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com>
Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-10-20 11:54:37 +02:00
Sean Wang ec83368635 soc: mediatek: pwrap: add pwrap_read32 for reading in 32-bit mode
Some regulators such as MediaTek MT6380 has to be read in 32-bit mode.
So the patch adds pwrap_read32, rename old pwrap_read into pwrap_read16
and one function pointer is introduced for increasing flexibility allowing
the determination which mode is used by the pwrap slave detection through
device tree.

Signed-off-by: Chenglin Xu <chenglin.xu@mediatek.com>
Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-10-20 11:54:36 +02:00
Timo Alho 775dba87f8 soc/tegra: bpmp: Check BPMP response return code
Add checks for the return code in BPMP response messages.

Signed-off-by: Timo Alho <talho@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-10-19 16:33:57 +02:00
Chris Lew e691b48dcc soc: qcom: smem: Increase the number of hosts
Increase the maximum number of hosts in a system to 10.

Signed-off-by: Chris Lew <clew@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-10-11 23:48:27 -05:00
Chris Lew 5b39406761 soc: qcom: smem: Support dynamic item limit
In V12 SMEM, SBL writes SMEM parameter information after the TOC. Use
the SBL provided item count as the max item number.

Signed-off-by: Chris Lew <clew@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-10-11 23:48:27 -05:00
Chris Lew d52e404874 soc: qcom: smem: Support global partition
SMEM V12 creates a global partition to allocate global smem items from
instead of a global heap. The global partition has the same structure as
a private partition.

Signed-off-by: Chris Lew <clew@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-10-11 23:48:27 -05:00
Chris Lew dcc0967dd7 soc: qcom: smem: Read version from the smem header
The SMEM header structure includes the version information. Read the
version directly from the header instead of getting an item from the
global heap.

Signed-off-by: Chris Lew <clew@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-10-11 23:48:27 -05:00
Chris Lew a216000f01 soc: qcom: smem: Use le32_to_cpu for comparison
Endianness can vary in the system, add le32_to_cpu when comparing
partition sizes from smem.

Signed-off-by: Chris Lew <clew@codeaurora.org>
Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-10-11 23:48:27 -05:00
Bjorn Andersson c7c1dc3587 soc: qcom: smem: Support getting cached entries
On msm8996 cached SMEM items are used for storing the GLINK FIFOs, so
for items not found in the uncached list we need to also search the
cased list for these items.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-10-11 16:58:11 -05:00
Bjorn Andersson 01f1415444 soc: qcom: smem: Rename "uncached" accessors
In preparation for adding accessors for "cached" entries rename the
"uncached" accessors. Also rename "first" cached entry to "last", as
the cached list grows backwards.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-10-11 16:58:11 -05:00
Sean Wang cbd71f0aaa soc: mediatek: pwrap: fixup warnings from coding style
fixup those warnings such as lines over 80 words and parenthesis
alignment which would be complained by checkpatch.pl.

Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-10-10 12:02:52 +02:00
Marek Szyprowski c40610198f soc: samsung: Remove Exynos4212 related dead code
Support for Exynos4212 SoCs has been removed by commit bca9085e0a ("ARM:
dts: exynos: remove Exynos4212 support (dead code)"), so there is no need
to keep remaining dead code related to this SoC version.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2017-10-08 14:17:13 +02:00
Martin Blumenstingl 5e68c0fc8d soc: amlogic: Add Meson6/Meson8/Meson8b/Meson8m2 SoC Information driver
Amlogic SoCs have an information register which contains the SoC type
and revision information.
This patchs adds support for decoding those registers and exposing the
resulting information via the SoC bus infrastructure.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2017-10-06 15:36:17 -07:00
Al Cooper 7f20333fe7 soc: brcmstb: Add Product ID and Family ID helper functions
Add Product ID and Family ID helper functions for brcmstb soc.

Signed-off-by: Al Cooper <alcooperx@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-10-03 11:54:54 +05:30
Justin Chen 0e9b114132 soc bcm: brcmstb: Add support for S2/S3/S5 suspend states (MIPS)
This commit adds support for the Broadcom STB S2/S3/S5 suspend
states on MIPS based SoCs.

This requires quite a lot of code in order to deal with the
different HW blocks that need to be quiesced during suspend:

- DDR PHY
- DDR memory controller and arbiter
- control processor

The final steps of the suspend execute in cache and there is is a little
bit of assembly code in order to shut down the DDR PHY PLL and then go
into a wait loop until a wake-up even occurs. Conversely the resume part
involves waiting for the DDR PHY PLL to come back up and resume
executions where we left.

Signed-off-by: Justin Chen <justinpopo6@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-09-25 11:47:14 -07:00
Brian Norris 0b741b8234 soc: bcm: brcmstb: Add support for S2/S3/S5 suspend states (ARM)
This commit adds support for the Broadcom STB S2/S3/S5 suspend states on
ARM based SoCs.

This requires quite a lot of code in order to deal with the different HW
blocks that need to be quiesced during suspend:

- DDR PHY SHIM
- DDR memory controller and sequencer
- control processor

The final steps of the suspend execute in an on-chip SRAM and there is a
little bit of assembly code in order to shut down the DDR PHY PLL and
then go into a wfi loop until a wake-up even occurs. Conversely the
resume part involves waiting for the DDR PHY PLL to come back up and
resume executions where we left.

For S3, because of our memory hashing (actual hashing code not included
for simplicity, and is bypassed) we need to relocate the writable
variables (stack) into SRAM shortly before suspending in order to leave
the DRAM untouched and create a reliable hash of its contents.

This code has been contributed by Brian Norris initially and has been
incrementally fixed and updated to support new chips by a lot of people.

Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Markus Mayer <mmayer@broadcom.com>
Signed-off-by: Justin Chen <justinpopo6@gmail.com>
Signed-off-by: Gareth Powell <gpowell@broadcom.com>
Signed-off-by: Doug Berger <opendmb@gmail.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2017-09-25 11:46:48 -07:00
Madalin Bucur e868adf21c soc/fsl/qbman: Enable FSL_LAYERSCAPE config on ARM
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
[Stuart: changed to use ARCH_LAYERSCAPE]
Signed-off-by: Stuart Yoder <stuart.yoder@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2017-09-22 13:33:07 -05:00
Claudiu Manoil e6b909fe84 soc/fsl/qbman: Add missing headers on ARM
Unlike PPC builds, ARM builds need following headers
explicitly:
+#include <linux/io.h>		for ioread32be()
+#include <linux/delay.h>		for udelay()

Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2017-09-22 13:33:07 -05:00
Madalin Bucur 21772c4355 soc/fsl/qbman: different register offsets on ARM
Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2017-09-22 13:33:07 -05:00
Madalin Bucur 2c62f8b6fb soc/fsl/qbman: add QMAN_REV32
Add revision 3.2 of the QBMan block.  This is the version
for LS1043A and LS1046A SoCs.

Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2017-09-22 13:33:07 -05:00
Roy Pledge e6e2df69c8 soc/fsl/qbman: Rework portal mapping calls for ARM/PPC
Rework portal mapping for PPC and ARM. The PPC devices require a
cacheable coherent mapping while ARM will work with a non-cachable/write
combine mapping. This also eliminates the need for manual cache
flushes on ARM. This also fixes the code so sparse checking is clean.

Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2017-09-22 13:33:07 -05:00
Valentin Rothberg 219e8e0580 soc/fsl/qbman: Fix ARM32 typo
The Kconfig symbol for 32bit ARM is 'ARM', not 'ARM32'.

Signed-off-by: Valentin Rothberg <valentinrothberg@gmail.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2017-09-22 13:33:07 -05:00
Claudiu Manoil 6111d19836 soc/fsl/qbman: Drop L1_CACHE_BYTES compile time check
Not relevant and arch dependent. Overkill for PPC.

Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2017-09-22 13:33:07 -05:00
Madalin Bucur f5bd229960 soc/fsl/qbman: Drop set/clear_bits usage
Replace PPC specific set/clear_bits API with standard
bit twiddling so driver is portalable outside PPC.

Signed-off-by: Madalin Bucur <madalin.bucur@nxp.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2017-09-22 13:33:07 -05:00
Roy Pledge 07f86917a4 soc/fsl/qbman: Use shared-dma-pool for QMan private memory allocations
Use the shared-memory-pool mechanism for frame queue descriptor and
packed frame descriptor record area allocations.

Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2017-09-22 13:33:07 -05:00
Roy Pledge 5ae783c6a1 soc/fsl/qbman: Use shared-dma-pool for BMan private memory allocations
Use the shared-memory-pool mechanism for free buffer proxy record
area allocation.

Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2017-09-22 13:33:07 -05:00
Roy Pledge 42d0349784 soc/fsl/qbman: Add common routine for QBMan private allocations
The QBMan device uses several memory regions to manage frame
queues and buffers. Add a common routine for extracting and
initializing these reserved memory areas.

Signed-off-by: Roy Pledge <roy.pledge@nxp.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2017-09-22 13:33:07 -05:00
ashish kumar b496468083 soc/fsl/guts: Add compatible string for LS1088
Adding compatible string "ls1088a-dcfg" so that
guts driver can be init for ls1088

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2017-09-22 13:33:07 -05:00
Karim Eshapa 7ce2e93417 soc/fsl/qman: Sleep instead of stuck hacking jiffies
Use msleep() instead of stucking with long delay will be more efficient.

Signed-off-by: Karim Eshapa <karim.eshapa@gmail.com>
Acked-by: Scott Wood <oss@buserror.net>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
2017-09-22 13:32:57 -05:00
Sergei Shtylyov bab9b2a74f soc: renesas: rcar-sysc: add R8A77970 support
Add support for R-Car V3M (R8A77970) SoC power areas to the R-Car SYSC
driver.

Based on the original (and large) patch by Daisuke Matsushita
<daisuke.matsushita.ns@hitachi.com>.

Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-09-18 09:46:50 +02:00
Sergei Shtylyov bb0030752f soc: renesas: identify R-Car V3M
Add support for identifying the R-Car V3M (R8A77970) SoC.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-09-18 07:59:58 +02:00
Sergei Shtylyov 17760376ae soc: renesas: rcar-rst: add R8A77970 support
Add support for R-Car V3M (R8A77970) to the R-Car RST driver -- this driver
is  needed  for the clock driver to work.

Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2017-09-18 07:59:55 +02:00
Cristian Birsan cd2e9be89a drivers: soc: atmel: Add basic support for new sama5d2 SiPs
Add basic support for new sama5d2 System in a Package chips.

Signed-off-by: Cristian Birsan <cristian.birsan@microchip.com>
[claudiu.beznea@microchip.com: use MiB instead of MB]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2017-09-17 19:45:59 +02:00
Linus Torvalds 7318413077 Merge branch '4.14-features' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle:
 "This is the main pull request for 4.14 for MIPS; below a summary of
  the non-merge commits:

  CM:
   - Rename mips_cm_base to mips_gcr_base
   - Specify register size when generating accessors
   - Use BIT/GENMASK for register fields, order & drop shifts
   - Add cluster & block args to mips_cm_lock_other()

  CPC:
   - Use common CPS accessor generation macros
   - Use BIT/GENMASK for register fields, order & drop shifts
   - Introduce register modify (set/clear/change) accessors
   - Use change_*, set_* & clear_* where appropriate
   - Add CM/CPC 3.5 register definitions
   - Use GlobalNumber macros rather than magic numbers
   - Have asm/mips-cps.h include CM & CPC headers
   - Cluster support for topology functions
   - Detect CPUs in secondary clusters

  CPS:
   - Read GIC_VL_IDENT directly, not via irqchip driver

  DMA:
   - Consolidate coherent and non-coherent dma_alloc code
   - Don't use dma_cache_sync to implement fd_cacheflush

  FPU emulation / FP assist code:
   - Another series of 14 commits fixing corner cases such as NaN
     propgagation and other special input values.
   - Zero bits 32-63 of the result for a CLASS.D instruction.
   - Enhanced statics via debugfs
   - Do not use bools for arithmetic. GCC 7.1 moans about this.
   - Correct user fault_addr type

  Generic MIPS:
   - Enhancement of stack backtraces
   - Cleanup from non-existing options
   - Handle non word sized instructions when examining frame
   - Fix detection and decoding of ADDIUSP instruction
   - Fix decoding of SWSP16 instruction
   - Refactor handling of stack pointer in get_frame_info
   - Remove unreachable code from force_fcr31_sig()
   - Convert to using %pOF instead of full_name
   - Remove the R6000 support.
   - Move FP code from *_switch.S to *_fpu.S
   - Remove unused ST_OFF from r2300_switch.S
   - Allow platform to specify multiple its.S files
   - Add #includes to various files to ensure code builds reliable and
     without warning..
   - Remove __invalidate_kernel_vmap_range
   - Remove plat_timer_setup
   - Declare various variables & functions static
   - Abstract CPU core & VP(E) ID access through accessor functions
   - Store core & VP IDs in GlobalNumber-style variable
   - Unify checks for sibling CPUs
   - Add CPU cluster number accessors
   - Prevent direct use of generic_defconfig
   - Make CONFIG_MIPS_MT_SMP default y
   - Add __ioread64_copy
   - Remove unnecessary inclusions of linux/irqchip/mips-gic.h

  GIC:
   - Introduce asm/mips-gic.h with accessor functions
   - Use new GIC accessor functions in mips-gic-timer
   - Remove counter access functions from irq-mips-gic.c
   - Remove gic_read_local_vp_id() from irq-mips-gic.c
   - Simplify shared interrupt pending/mask reads in irq-mips-gic.c
   - Simplify gic_local_irq_domain_map() in irq-mips-gic.c
   - Drop gic_(re)set_mask() functions in irq-mips-gic.c
   - Remove gic_set_polarity(), gic_set_trigger(), gic_set_dual_edge(),
     gic_map_to_pin() and gic_map_to_vpe() from irq-mips-gic.c.
   - Convert remaining shared reg access, local int mask access and
     remaining local reg access to new accessors
   - Move GIC_LOCAL_INT_* to asm/mips-gic.h
   - Remove GIC_CPU_INT* macros from irq-mips-gic.c
   - Move various definitions to the driver
   - Remove gic_get_usm_range()
   - Remove __gic_irq_dispatch() forward declaration
   - Remove gic_init()
   - Use mips_gic_present() in place of gic_present and remove
     gic_present
   - Move gic_get_c0_*_int() to asm/mips-gic.h
   - Remove linux/irqchip/mips-gic.h
   - Inline __gic_init()
   - Inline gic_basic_init()
   - Make pcpu_masks a per-cpu variable
   - Use pcpu_masks to avoid reading GIC_SH_MASK*
   - Clean up mti, reserved-cpu-vectors handling
   - Use cpumask_first_and() in gic_set_affinity()
   - Let the core set struct irq_common_data affinity

  microMIPS:
   - Fix microMIPS stack unwinding on big endian systems

  MIPS-GIC:
   - SYNC after enabling GIC region

  NUMA:
   - Remove the unused parent_node() macro

  R6:
   - Constify r2_decoder_tables
   - Add accessor & bit definitions for GlobalNumber

  SMP:
   - Constify smp ops
   - Allow boot_secondary SMP op to return errors

  VDSO:
   - Drop gic_get_usm_range() usage
   - Avoid use of linux/irqchip/mips-gic.h

  Platform changes:

  Alchemy:
   - Add devboard machine type to cpuinfo
   - update cpu feature overrides
   - Threaded carddetect irqs for devboards

  AR7:
   - allow NULL clock for clk_get_rate

  BCM63xx:
   - Fix ENETDMA_6345_MAXBURST_REG offset
   - Allow NULL clock for clk_get_rate

  CI20:
   - Enable GPIO and RTC drivers in defconfig
   - Add ethernet and fixed-regulator nodes to DTS

  Generic platform:
   - Move Boston and NI 169445 FIT image source to their own files
   - Include asm/bootinfo.h for plat_fdt_relocated()
   - Include asm/time.h for get_c0_*_int()
   - Include asm/bootinfo.h for plat_fdt_relocated()
   - Include asm/time.h for get_c0_*_int()
   - Allow filtering enabled boards by requirements
   - Don't explicitly disable CONFIG_USB_SUPPORT
   - Bump default NR_CPUS to 16

  JZ4700:
   - Probe the jz4740-rtc driver from devicetree

  Lantiq:
   - Drop check of boot select from the spi-falcon driver.
   - Drop check of boot select from the lantiq-flash MTD driver.
   - Access boot cause register in the watchdog driver through regmap
   - Add device tree binding documentation for the watchdog driver
   - Add docs for the RCU DT bindings.
   - Convert the fpi bus driver to a platform_driver
   - Remove ltq_reset_cause() and ltq_boot_select(
   - Switch to a proper reset driver
   - Switch to a new drivers/soc GPHY driver
   - Add an USB PHY driver for the Lantiq SoCs using the RCU module
   - Use of_platform_default_populate instead of __dt_register_buses
   - Enable MFD_SYSCON to be able to use it for the RCU MFD
   - Replace ltq_boot_select() with dummy implementation.

  Loongson 2F:
   - Allow NULL clock for clk_get_rate

  Malta:
   - Use new GIC accessor functions

  NI 169445:
   - Add support for NI 169445 board.
   - Only include in 32r2el kernels

  Octeon:
   - Add support for watchdog of 78XX SOCs.
   - Add support for watchdog of CN68XX SOCs.
   - Expose support for mips32r1, mips32r2 and mips64r1
   - Enable more drivers in config file
   - Add support for accessing the boot vector.
   - Remove old boot vector code from watchdog driver
   - Define watchdog registers for 70xx, 73xx, 78xx, F75xx.
   - Make CSR functions node aware.
   - Allow access to CIU3 IRQ domains.
   - Misc cleanups in the watchdog driver

  Omega2+:
   - New board, add support and defconfig

  Pistachio:
   - Enable Root FS on NFS in defconfig

  Ralink:
   - Add Mediatek MT7628A SoC
   - Allow NULL clock for clk_get_rate
   - Explicitly request exclusive reset control in the pci-mt7620 PCI driver.

  SEAD3:
   - Only include in 32 bit kernels by default

  VoCore:
   - Add VoCore as a vendor t0 dt-bindings
   - Add defconfig file"

* '4.14-features' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (167 commits)
  MIPS: Refactor handling of stack pointer in get_frame_info
  MIPS: Stacktrace: Fix microMIPS stack unwinding on big endian systems
  MIPS: microMIPS: Fix decoding of swsp16 instruction
  MIPS: microMIPS: Fix decoding of addiusp instruction
  MIPS: microMIPS: Fix detection of addiusp instruction
  MIPS: Handle non word sized instructions when examining frame
  MIPS: ralink: allow NULL clock for clk_get_rate
  MIPS: Loongson 2F: allow NULL clock for clk_get_rate
  MIPS: BCM63XX: allow NULL clock for clk_get_rate
  MIPS: AR7: allow NULL clock for clk_get_rate
  MIPS: BCM63XX: fix ENETDMA_6345_MAXBURST_REG offset
  mips: Save all registers when saving the frame
  MIPS: Add DWARF unwinding to assembly
  MIPS: Make SAVE_SOME more standard
  MIPS: Fix issues in backtraces
  MIPS: jz4780: DTS: Probe the jz4740-rtc driver from devicetree
  MIPS: Ci20: Enable RTC driver
  watchdog: octeon-wdt: Add support for 78XX SOCs.
  watchdog: octeon-wdt: Add support for cn68XX SOCs.
  watchdog: octeon-wdt: File cleaning.
  ...
2017-09-15 20:43:33 -07:00
Linus Torvalds ae46654bcf ARM: SoC driver updates for v4.14
This branch contains platform-related driver updates for ARM and ARM64.
 
 Among them:
 
  - Reset driver updates:
   + New API for dealing with arrays of resets
   + Make unimplemented {de,}assert return success on shared resets
   + MSDKv1 driver
   + Removal of obsolete Gemini reset driver
   + Misc updates for sunxi and Uniphier
 
  - SoC drivers:
   + Platform SoC driver registration on Tegra
   + Shuffle of Qualcomm drivers into a submenu
   + Allwinner A64 support for SRAM
   + Renesas R-Car R3 support
   + Power domains for Rockchip RK3366
 
  - Misc updates and smaller fixes for TEE and memory driver subsystems
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZtdt7AAoJEIwa5zzehBx3EboP/jR2T9lrMavXR1zL48L14yJb
 S+fiJlrX1Kr42UF4PQvsfs+uTqOLmycrPVFkMb6IwoUPzQ9UCOSoiMzYm2b7ZPvt
 uIesHhdM3/xun6wKfieN8GmNA1yDVynTxo0TTYDw5ha7I6s2GHgw0GSFzy3wm0Qg
 KzerAO3gzf3L5XsKR0cai3IXNjHO9ubpFG1ReR09da28nPElP8ggWg0KnqdO76Ch
 BGpFj78EC875ZNqwHgnspUqgGDJnBjig3m/uA4FWA0G9Jl38tCyKTZfUR7cEraoV
 kyCgBlR/UrI8eXVTyEy5k5iTsQ3A1VhX4rGjyH+5NZHTs1yWr4+RDND/qeGl9tSo
 VASuOtH6Rc3vdUDpHPBNAFNQH8fwwDoKf96dvN1tiffsx6LSKb//NyOfkXzKOtR6
 CP5raYfX4YktLtHq0XVTZ/6r3XmLcTHzElR/dCFpQOFcTOYii0pWtfcWouahbZ1w
 dhoBX/dbNq37MfzrxtHN2VTIEHpn2GU7u+ZGkp2ArokD58BAft/M3Xee1cDnF75g
 ZDwe5eNFT8aBZKaY7zwG8cdxiw9kACAivDRwW+zgpfUr39c+d0+QmVfnfJh4EGXK
 Ri6yr2EfBWK6jw3cwkdSyyt7iSzIkB+RiuuD1MjpYhWzAvoDpzqkXYukFGbpXnuy
 vUFHNuP1ocUsRtCs8mm1
 =yBzS
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC driver updates from Olof Johansson:
 "This branch contains platform-related driver updates for ARM and ARM64.

  Among them:

   - Reset driver updates:
     + New API for dealing with arrays of resets
     + Make unimplemented {de,}assert return success on shared resets
     + MSDKv1 driver
     + Removal of obsolete Gemini reset driver
     + Misc updates for sunxi and Uniphier

   - SoC drivers:
     + Platform SoC driver registration on Tegra
     + Shuffle of Qualcomm drivers into a submenu
     + Allwinner A64 support for SRAM
     + Renesas R-Car R3 support
     + Power domains for Rockchip RK3366

   - Misc updates and smaller fixes for TEE and memory driver
     subsystems"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
  firmware: arm_scpi: fix endianness of dev_id in struct dev_pstate_set
  soc/tegra: fuse: Add missing semi-colon
  soc/tegra: Restrict SoC device registration to Tegra
  drivers: soc: sunxi: add support for A64 and its SRAM C
  drivers: soc: sunxi: add support for remapping func value to reg value
  drivers: soc: sunxi: fix error processing on base address when claiming
  dt-bindings: add binding for Allwinner A64 SRAM controller and SRAM C
  bus: sunxi-rsb: Enable by default for ARM64
  soc/tegra: Register SoC device
  firmware: tegra: set drvdata earlier
  memory: Convert to using %pOF instead of full_name
  soc: Convert to using %pOF instead of full_name
  bus: Convert to using %pOF instead of full_name
  firmware: Convert to using %pOF instead of full_name
  soc: mediatek: add SCPSYS power domain driver for MediaTek MT7622 SoC
  soc: mediatek: add header files required for MT7622 SCPSYS dt-binding
  soc: mediatek: reduce code duplication of scpsys_probe across all SoCs
  dt-bindings: soc: update the binding document for SCPSYS on MediaTek MT7622 SoC
  reset: uniphier: add analog amplifiers reset control
  reset: uniphier: add video input subsystem reset control
  ...
2017-09-10 20:40:00 -07:00
Linus Torvalds 7f1b9be13a ARM/arm64: SoC platform updates for v4.14
This branch contains platform updates for 32- and 64-bit ARM,
 including defconfig updates to enable new options, drivers and
 platforms. There are also a few fixes and cleanups for some existing vendors.
 
 Some of the things worth highlighting here are:
 
  - Enabling new crypt drivers on arm64 defconfig
  - QCOM IPQ8074 clocks and pinctrl drivers on arm64 defconfig
  - Debug support enabled for Renesas r8a7743
  - Various config updates for Renesas platforms (sound, USB, other drivers)
  - Platform support (including SMP) for TI dra762
  - OMAP cleanups: Move to use generic 8250 debug_ll, removal of stale DMA code
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZtdXjAAoJEIwa5zzehBx3ExIQAJQ6anSZlkGysXqptA4c1HuL
 vgGq/U5xZ1Wa4Z/YX7//wuCMwRClc1j/zSJ5PP+wP0YsaviN7iF/8H1P/HQtCiTT
 DcEQPSI770829wzW4oMNW0PyU/ZnWMtuiMB+FAjdPVjbS8bT4PIK72D8PYKrT7f8
 8bU51+QezjSLamQaA8S2RyX+kYI/4znTa/9Aco4AlCtioV8h9gQanFYd2EI/EMhU
 1uvR3xUFf/YK49+M5J6m3DvtFffllHU9TKV/EAQD1Bhl1s5VPfem+a8JbVh1m7M+
 NzQOOoPJ9jYOGfjlaQQVmZ/1E4iKac1oK4x44Djk/i+RFjl+AT/2co3RcaEq9Npw
 5HNsK8ujnjzWB3xHu5wK5CbrjLNYco9hOpJaGkSeClo4ElDJVSKxyqWkZuhhnSA8
 bXXV5VraMX67tjG7Ou8+NtdbMkGdOUqnNbuBlCxkxpWxhtaUQG1YHHQDofUXNguy
 rtVhKRZRSkNYrp4lDCKCXVFFO077FGzP2Boq6JVzLv+U1l6JlZkkr3EWKYMY45HC
 o2rVcAB4lMR/k6tqE5MAmQC53jCNlFZt2xtf1WRVKf+0TfBVIGX3MxvFxl4E9wA+
 9pdJ9ujZWsPjTcZcktA6AsaK7uevRxcB2YZYv4pXVjR1RcZ/SfiEf4UW+md3j4QB
 igKej5WsRiCPwnkMFKs0
 =g8cF
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-platforms' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM/arm64 SoC platform updates from Olof Johansson: "This branch
  contains platform updates for 32- and 64-bit ARM, including defconfig
  updates to enable new options, drivers and platforms. There are also a
  few fixes and cleanups for some existing vendors.

  Some of the things worth highlighting here are:

   - Enabling new crypt drivers on arm64 defconfig

   - QCOM IPQ8074 clocks and pinctrl drivers on arm64 defconfig

   - Debug support enabled for Renesas r8a7743

   - Various config updates for Renesas platforms (sound, USB, other
     drivers)

   - Platform support (including SMP) for TI dra762

   - OMAP cleanups: Move to use generic 8250 debug_ll, removal of stale
     DMA code"

* tag 'armsoc-platforms' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (109 commits)
  ARM: multi_v7_defconfig: make eSDHC driver built-in
  arm64: defconfig: enable rockchip graphics
  MAINTAINERS: Update Cavium ThunderX2 entry
  ARM: config: aspeed: Add I2C, VUART, LPC Snoop
  ARM: configs: aspeed: Update Aspeed G4 with VMSPLIT_2G
  ARM: s3c24xx: Fix NAND ECC mode for mini2440 board
  ARM: davinci_all_defconfig: enable tinydrm and ST7586
  arm64: defconfig: Enable QCOM IPQ8074 clock and pinctrl
  ARM: defconfig: tegra: Enable ChipIdea UDC driver
  ARM: configs: Add Tegra I2S interfaces to multi_v7_defconfig
  ARM: tegra: Add Tegra I2S interfaces to defconfig
  ARM: tegra: Update default configuration for v4.13-rc1
  MAINTAINERS: update ARM/ZTE entry
  soc: versatile: remove unnecessary static in realview_soc_probe()
  ARM: Convert to using %pOF instead of full_name
  ARM: hisi: Fix typo in comment
  ARM: multi_v7_defconfig: add CONFIG_BRCMSTB_THERMAL
  arm64: defconfig: add CONFIG_BRCMSTB_THERMAL
  arm64: defconfig: add recently added crypto drivers as modules
  arm64: defconfig: enable CONFIG_UNIPHIER_WATCHDOG
  ...
2017-09-10 20:35:46 -07:00
Linus Torvalds d7efc352ab remoteproc updates for v4.14
This adds and improves remoteproc support for TI DA8xx/OMAP-L13x DSP, TI
 Keystone 66AK2G DSP and iMX6SX/7D Cortex M4 coprocessors. It introduces the
 Qualcomm restart notifier and a few fixes.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZswmrAAoJEAsfOT8Nma3FVAwP/1SEQkDsfrx9HIVtm9zSy7h5
 DJ2dAUVMATJkTiDU8djz/KttL9bOLIcG5u0hiNbtPELm/5t3qAHiN8axO0w5Oxrv
 0xO2yIwzxyhOU4cI8k+RWReTcihSqBYs5nHDXXhbhO5IKiaIfAQWljL6H1rL41gH
 SnKEuQuXfD6j/cvRyHEh10EWfDrVMnaim9aK3OiSz6i6YRyRC3r2VT+KiRnbaLq0
 XIk1HATM6xEd6YfAeiuPZh6SbKuEibsBoPVQpAl9HjZvKY+n1dC11solohAEMYFC
 r222I6LYPRy5eteLnSqhTYof5l+pd9/eECIuXCdvxGfbkPhyPf7/K3WI3iV9sD8a
 h+QM22IpiwSzxnJPNJzmYtPnhqfOHZQTb64Fp2xiTTYa/ILbSH7VCAohxofEaheS
 8rtIJqGhxT1WINvcBaoxwhL/CMMnBL+TlrqlAc5Qjd9zKFhJu4rcv1oQFNGMBMrN
 WY4R4x//oYgfmagIBEkmxMEcVMoJeI34AsbtSvazmcIQdvpcJ3Y0AMa+Ly0eyzBf
 RoTJY9y/Q3Y2DjcJoK+6iFeGRo0qI8/ytkKC6wb3RpaTnbDQ39X3GfCICwhsDCh7
 uv19AmG5M26VRHxjlNnLpJp8jG3Up335TYQhkXV/CZYZcOxTmfJjGe3ItxOK/tTz
 YMv+IR72T/M+feeAS4Ge
 =R9dP
 -----END PGP SIGNATURE-----

Merge tag 'rproc-v4.14' of git://github.com/andersson/remoteproc

Pull remoteproc updates from Bjorn Andersson:
 "This adds and improves remoteproc support for TI DA8xx/OMAP-L13x DSP,
  TI Keystone 66AK2G DSP and iMX6SX/7D Cortex M4 coprocessors. It
  introduces the Qualcomm restart notifier and a few fixes"

* tag 'rproc-v4.14' of git://github.com/andersson/remoteproc:
  remoteproc: Introduce rproc handle accessor for children
  remoteproc: qcom: Make ssr_notifiers local
  remoteproc: Stop subdevices in reverse order
  remoteproc: imx_rproc: add a NXP/Freescale imx_rproc driver
  remoteproc: dt: Provide bindings for iMX6SX/7D Remote Processor Controller driver
  remoteproc: qcom: Use PTR_ERR_OR_ZERO
  remoteproc: st: explicitly request exclusive reset control
  remoteproc: qcom: explicitly request exclusive reset control
  remoteproc/keystone: explicitly request exclusive reset control
  remoteproc/keystone: Add support for Keystone 66AK2G SOCs
  remoteproc/davinci: Add device tree support for OMAP-L138 DSP
  dt-bindings: remoteproc: Add bindings for Davinci DSP processors
  remoteproc/davinci: Add support to parse internal memories
  remoteproc/davinci: Switch to platform_get_resource_byname()
  remoteproc: make device_type const
  soc: qcom: GLINK SSR notifier
  remoteproc: qcom: Add support for SSR notifications
  remoteproc: Merge __rproc_boot() with rproc_boot()
2017-09-09 14:30:50 -07:00
Martin Blumenstingl 126534141b MIPS: lantiq: Add a GPHY driver which uses the RCU syscon-mfd
Compared to the old xrx200_phy_fw driver the new version has multiple
enhancements. The name of the firmware files does not have to be added
to all .dts files anymore - one now configures the GPHY mode (FE or GE)
instead. Each GPHY can now also boot separate firmware (thus mixing of
GE and FE GPHYs is now possible).
The new implementation is based on the RCU syscon-mfd and uses the
reeset_controller framework instead of raw RCU register reads/writes.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: john@phrozen.org
Cc: p.zabel@pengutronix.de
Cc: kishon@ti.com
Cc: mark.rutland@arm.com
Cc: linux-mips@linux-mips.org
Cc: linux-mtd@lists.infradead.org
Cc: linux-watchdog@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-spi@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17128/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-09-04 21:19:02 +02:00
Hauke Mehrtens c20b3b8019 MIPS: lantiq: Convert the fpi bus driver to a platform_driver
Instead of hacking the configuration of the FPI bus into the arch code
add an own bus driver for this internal bus. The FPI bus is the main
bus of the SoC. This bus driver makes sure the bus is configured
correctly before the child drivers are getting initialized. This driver
will probably also be used on different SoCs later.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: john@phrozen.org
Cc: p.zabel@pengutronix.de
Cc: kishon@ti.com
Cc: mark.rutland@arm.com
Cc: linux-mips@linux-mips.org
Cc: linux-mtd@lists.infradead.org
Cc: linux-watchdog@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-spi@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17122/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-09-04 21:19:02 +02:00
Arnd Bergmann 3889e85100 Samsung soc drivers changes for v4.14
Conversion to kbasename from Rob Herring.
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABCAAGBQJZna2cAAoJEME3ZuaGi4PXOoAQAIH92exb/UrUjnwOPfXgq9NT
 pz0HGBxe8gYzHHSu8jry1GWCnACxdZBZEMzli8NyXELzIwb2OmVSdTCQI1DbJ7ot
 gIsO+xl+1LhXrzTi11oRJhMSpTYnRZy3tRRJ9ABwUthO5h058tvd5hSlfIa+XDt7
 rpzDhquyI8BRE+8eLgGDu07g+9a2DeMnEIaM+wE3vm9R/YmxB4Whi92kAkbPwKCy
 ADEV964DZge4unSyOjxV27FjDqSSOF7vovDp6/R7YSNmEb0uqchvcREBCtwSJjVj
 HdDxxjxU1eN+okLv6NB9bWqPK9bUvuyst5wjvt5e1YIiisXN4UMMGZYeEnqmODJd
 ZWnKWk4prP1PWAm0hBKZ6GXlmwhNDsUaUNUtt9jN/SBIn+SXgANv+xU1H/xeZf9c
 xELAUXMkc3P5bg+ewGkUIsj8qcRN0gs0fx9peu8thofcC0wo3xLMa5AnEJJ3gB4Z
 yXLePcFse/z8uQHrcUp+PGC8Wtc7krlAEuPkNGa/KDf4A4NPlBtUF2A2aY3Kh+/X
 5ZK5FtK3vh4Uyk1JFWXw06bnYvT6tYEsJRuxNfbVD8JNrl6oFKodkNb+5FC3tXKg
 bi9CQ+hc+hR8PEPKzMw0UsEVna2MzC0l3GH+PmhnHJHMW+BBQbv8D4R7WPhjEl78
 Hu8C1qlg88w2+jjdZSd2
 =gwbs
 -----END PGP SIGNATURE-----

Merge tag 'samsung-drivers-4.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/drivers

Pull "Samsung soc drivers changes for v4.14" from Krzysztof Kozłowski:

Conversion to kbasename from Rob Herring.

* tag 'samsung-drivers-4.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  soc: samsung: Use kbasename instead of open coding
2017-08-23 21:46:12 +02:00
Thierry Reding 9261b43e70 soc/tegra: fuse: Add missing semi-colon
Commit 8a46828e623c ("soc/tegra: Register SoC device") added a new
initcall, but forgot to terminate the line with a semi-colon. Some
recent versions of GCC seem to report this as an error.

Fixes: 8a46828e623c ("soc/tegra: Register SoC device")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-08-23 11:54:27 +02:00
Thierry Reding 226cff485c soc/tegra: Restrict SoC device registration to Tegra
Commit 8a46828e623c ("soc/tegra: Register SoC device") added an initcall
to register the SoC device on Tegra. However, that code is unrestricted
and will run on all platforms, causing unwanted warnings.

Fix this by first checking that we're running on hardware that supports
the fuses block that we use to provide SoC information.

Fixes: 8a46828e623c ("soc/tegra: Register SoC device")
Reported-by: Sudeep Holla <sudeep.holla@arm.com>
Tested-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-08-23 11:54:10 +02:00
Arnd Bergmann 2e9a41dca3 Allwinner driver changes for 4.14
Usual driver changes:
 
   - SUNXI_RSB bus driver enabled by default for ARM64
 
   - Support for SRAM controller and SRAM C block on the A64 added
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAlmXuVkOHHdlbnNAY3Np
 ZS5vcmcACgkQOJpUIZwPJDABghAAynR1zup2Fk1O3vC/49/oqojoFDoMar9ZOEpe
 Aw/kMphhVUSyedVpNjef1bfu2TYfXxl/bD56T3oQbNLIHM7A7sW2Ay/blt+5/tOz
 v0QiCY+y3nGpP49TOp6NSgoFb8H75xh09HDzey+ETWA34NV8ywz7dCry1XJ4Taln
 IIULlsWJJkfefJB0fcWULG/omGArqM9SiZnXnwPaf+3D1wZTFh3X/vjkVq5tewOf
 To/kLZNE4C5mubcXqurDRNiomzQpnbGD54ZYfnK+F1W/PdJoOrwsMRwEAGe0+zOI
 wehMKvd2cOgt1lnLt5fsEESNGr8T/5gdPB1JNP437+DP1uou0KBdmZKTwTx0eYI/
 YADxSqGVVpF9UVrMYDGK2sBTfhcKFCo8I6Xw9yfLraVY4Gs3uzAAe2MtDgTYITrO
 H3jHsmt6bqDrWgYDG3kzbFvKDyn5+uB6UgZ67Reg5eP+XcubAj7UEQEu8oliRz1V
 qOu4YbO0tkqnYCeotq3yEGEVbSr9KQ+M2MUR/5pdyRgjqg7ZueppmDh9DqD9Ene+
 v/hiI4M+TpdpOLuywYsctDRYWEjnUSeIrxy3HJSRXqH+LMzhxm9KL2jHQy6EcICv
 ALaGhyEtnstDrI61hgG/di/jq7TjL8LHL9lubxrbt8Eiq+52hJy5EmPexq5YQM/1
 raOLKkQ=
 =i+D6
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-drivers-for-4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/drivers

Pull "Allwinner driver changes for 4.14" from Chen-Yu Tsai:

Usual driver changes:

  - SUNXI_RSB bus driver enabled by default for ARM64

  - Support for SRAM controller and SRAM C block on the A64 added

* tag 'sunxi-drivers-for-4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  drivers: soc: sunxi: add support for A64 and its SRAM C
  drivers: soc: sunxi: add support for remapping func value to reg value
  drivers: soc: sunxi: fix error processing on base address when claiming
  dt-bindings: add binding for Allwinner A64 SRAM controller and SRAM C
  bus: sunxi-rsb: Enable by default for ARM64
2017-08-21 09:25:22 +02:00
Keerthy 4459398b6d soc: ti: knav: Add a NULL pointer check for kdev in knav_pool_create
knav_pool_create is an exported function. In the event of a call
before knav_queue_probe, we encounter a NULL pointer dereference
in the following line. Hence return -EPROBE_DEFER to the caller till
the kdev pointer is non-NULL.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-08-21 09:19:50 +02:00
Arnd Bergmann f2970be50a soc/tegra: Changes for v4.14-rc1
Contains a fix for unbalanced reference counting of device tree nodes in
 the PMC-based generic power domains code.
 
 A second change moves the SoC device registration code from its old
 location in arch/arm/mach-tegra to drivers/soc/tegra so that it can be
 shared between 32-bit and 64-bit ARM Tegra SoCs.
 -----BEGIN PGP SIGNATURE-----
 
 iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAlmW+3ITHHRyZWRpbmdA
 bnZpZGlhLmNvbQAKCRDdI6zXfz6zocmaEACeb9YuHAXaLz4ujzE8JiDmjIIKTtbd
 16d75z/d29vVfxCzKAV7yzqugJjPsvc1J6IsWA5g9m+0O36chgpqaQq6AOmTP4us
 zE9WRXG922aGu3++9YQVFA3I+ew/9SKBMDJ53JptP8oQsHNERolgNgV5OAeX1SQ7
 XBrGLvsnLWtYIj4QjtkbTQhRy8/O7r4kl/mNWuh5LP+dmYA5dfd8v2d2w2xBGKua
 4w9f1iLK8fJnBoRXNZj+e/d4LFsYuZcElsqQ46fHN0APAjg9TBuTvYGTAmWeAP8b
 VEKjTR1Jaix8XLxyjjIivEUT591BnO15NLfZ3yC8/1wY64daRtE3oFuH3VLM5fgt
 E1mrIAd3SJSt2zD/ubh1+Dm21e7bXehajsb+AL6t6wheHbVlM4jf0rjszzGGZof6
 s76IY1WcuSYQYx0u0S3upPGBcjPqw+JEf/4hJQ8H/RXpx70v1KDP4dUW6PR58jxk
 cPZeOtcqLGWvCfg04/U20OjWn2mpVDU1Gbr7nO5J0xyam/IG7fiDgU4hFLC7HqoE
 q67QI7/kssGRmYuWQMBu+cqLj6saOXTUDLvGCrN508r04HbuVwhK4t42P+tmaK8G
 ujDNcsdcekjvWn7tgxm5LV7m0puCWbblBwV2WTaFaR5Jv/EKRBQisBByDndNxy8h
 lFV8tbUTL8tvNw==
 =Qbm4
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-4.14-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers

Pull "soc/tegra: Changes for v4.14-rc1" from Thierry Reding:

Contains a fix for unbalanced reference counting of device tree nodes in
the PMC-based generic power domains code.

A second change moves the SoC device registration code from its old
location in arch/arm/mach-tegra to drivers/soc/tegra so that it can be
shared between 32-bit and 64-bit ARM Tegra SoCs.

* tag 'tegra-for-4.14-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  soc/tegra: Register SoC device
  soc/tegra: Fix bad of_node_put() in powergate init
2017-08-18 23:29:52 +02:00
Arnd Bergmann 9da95d8f5b - add mt7623a smp support
- scpsys: reduce code duplication
 - scpsys: add mt7622 support
 - pmic wrapper: make of_device_ids constant
 -----BEGIN PGP SIGNATURE-----
 
 iQJLBAABCAA1FiEEiUuSfQSYnG8EMsBltDliWyzx00MFAlmVfMEXHG1hdHRoaWFz
 LmJnZ0BnbWFpbC5jb20ACgkQtDliWyzx00MGyw//b1Ax9tAl+eX1phkU5r/sdyd6
 KS72i4pMo4yyyuoPCLKhpwH2rL1UrgY/T6f6bEyVf6KNhzgUvx1P4Y5PSpo2R+Jv
 AJ9lIypXCxUvmrQL5FOuQ+8SY694SSm1IBsoJ70pNA+/m7//Yfk0eiueUa7epNI0
 dhrHOvNaZPQbnCUjFa+qdkK8x04MoAKUQcq9sp1vpcvYTL7V6OrW2V6kc0iqwaN1
 G91QW2r+XAgO1KA1PIMqC8E9v06dhYWuaPI3SMCIqp/NFnNZA8j58KySzW7+nB/B
 7IlDARYDyzokw/JTUuWSlOOPh425xVSExidkTbCgb7m0Lt8i3CvW89yXsqKSL/+U
 Ezek9w/rJNGb5OoLhT1xQfy6XrXFCW78gl9HKZhbrM1eBiEeJctLlmQula57nyJH
 qIlCMjuueKYHUKTGT5LXidNbGesfx4vLt6v803XouF4D3NCIqPahdFqtBnEfsOEO
 l1xwbTSq44VSFtUKSdRrgt6e8Uxa25ftOkbKlS8vIPcsYJ7gnK7r2/ERWNJF8F+f
 x4toGOKhOVRTRwAZIx9ncKnQp08g6jegiRHW4JrJNmPnUwwC00I06+Jiltg5KJIP
 ZqgfjXesdjD660pWl70YGMRtdUNLuNgZRnyXg1CM94CfOimUBZi2PXhoK1Wm/7sj
 Db0QrPV4DQHti15Q0ig=
 =IW3o
 -----END PGP SIGNATURE-----

Merge tag 'v4.13-next-soc' of https://github.com/mbgg/linux-mediatek into next/drivers

Pull "arm: mediatek: soc updates for v4.14" from Matthias Brugger:

- add mt7623a smp support
- scpsys: reduce code duplication
- scpsys: add mt7622 support
- pmic wrapper: make of_device_ids constant

* tag 'v4.13-next-soc' of https://github.com/mbgg/linux-mediatek:
  soc: mediatek: add SCPSYS power domain driver for MediaTek MT7622 SoC
  soc: mediatek: add header files required for MT7622 SCPSYS dt-binding
  soc: mediatek: reduce code duplication of scpsys_probe across all SoCs
  dt-bindings: soc: update the binding document for SCPSYS on MediaTek MT7622 SoC
  soc: mtk-pmic-wrap: make of_device_ids const.
  ARM: mediatek: add MT7623a smp bringup code
2017-08-18 23:27:22 +02:00
Dave Gerlach 4dd6a9973b soc: ti: ti_sci_pm_domains: Populate name for genpd
Commit b6a1d093f9 ("PM / Domains: Extend generic power domain
debugfs") now creates a debugfs directory for each genpd based on the
name of the genpd. Currently no name is given to the genpd created by
ti_sci_pm_domains driver so because of this we see a NULL pointer
dereferences when it is accessed on boot when the debugfs entry creation
is attempted.

Give the genpd a name before registering it to avoid this.

Fixes: 52835d59fc ("soc: ti: Add ti_sci_pm_domains driver")
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-08-18 11:59:53 +02:00
Icenowy Zheng 5e4fb64297 drivers: soc: sunxi: add support for A64 and its SRAM C
Allwinner A64's display engine claims the SRAM C section to work.

Add support for the A64 SRAM controller and the SRAM C section of it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2017-08-18 14:30:21 +08:00
Icenowy Zheng 8fed2ce98e drivers: soc: sunxi: add support for remapping func value to reg value
On some Allwinner SoCs, sometimes the value needed to write into the
register to claim SRAM is not equal to the value specified in the
device tree.

The device tree binding defines 0 as "mapped to CPU" and 1 as "mapped
to X device". This matches the value written to the configuration
register for the SRAM blocks currently supported. However, the not yet
supported VE SRAM block is claimed for the device by writing 0x7fffffff,
which is vastly different from the other blocks. On the A64, SRAM C is
claimed by the device by writing a 0, which is the opposite of the
current design.

Add a value remapping in sunxi_sram_func structure, and let the
sunxi_sram_of_parse function set the remapped register value.
This allows us to keep the convention currently used in the device tree
binding.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
[wens@csie.org: Clarified commit message]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2017-08-18 14:30:20 +08:00
Icenowy Zheng 2262a65f0b drivers: soc: sunxi: fix error processing on base address when claiming
When claiming SRAM, if the base is set to an error, it means that the
SRAM controller has been probed, but failed to remap the controller
memory zone. If the base is zero, thus the SRAM controller should be not
probed at all, and it should return -EPROBE_DEFER. However, currently we
returned -EPROBE_DEFER in the former situation, and ignored the latter
situation (which will lead to the kernel to panic).

Fix the behavior on abnormal base address processing when claiming.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Fixes: 4af34b572a ("drivers: soc: sunxi: Introduce SoC driver to map
		      SRAMs")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2017-08-18 14:30:19 +08:00
Thierry Reding 27a0342ac1 soc/tegra: Register SoC device
Move this code from arch/arm/mach-tegra and make it common among 32-bit
and 64-bit Tegra SoCs. This is slightly complicated by the fact that on
32-bit Tegra, the SoC device is used as the parent for all devices that
are instantiated from device tree.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-08-17 16:43:13 +02:00
Arnd Bergmann 87a1cb5b2f Amlogic driver updates for v4.14
- add SoC info driver
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v2
 
 iQIcBAABCAAGBQJZlRc+AAoJEFk3GJrT+8ZleCwQAJUo268engY6X31m/DI6EUfM
 QypaVnu3gKaXfM02UXBS9/Cu2r0SQcdCALvfhrcejhMqUf+7jmRmclE87mbFxMaj
 nzzlhwJk+jGnLWzyhKfRoD4DS5Y+oC6WjKx6cjssG0El4g6Ha1wTate3ZI37N+No
 s4Ph+4o1MwuxpP/20YByUfvg78KySyhnqmZTLqQohj+gYsmMKH2AJIBHqf7Qi4NT
 f8TQXziGHes2flhvZLN29rnlOVWD2Xhi/z7b3e4XFeklwDhOrQBolkK2RKaY46qw
 63fypDobgsBQ/TRutcTESFh00tP9cND4A+KbvxsUflEH8bGQVCWIuTMqEEHU1G/w
 KYTIgvjm6ZzpQHcAv0rBnw9YoEi38VNUdwCK27KqXL/Y8ORwZXYoE+es78m56xWC
 GLBC4rwTmMdNlX/rCb4kXz2nqNLG+u3RF/2tn8dbNxgTYVsmzicECKFq0oX9X/Lv
 /2kZSIy6d78H91UaDXvkWm7u/hyIW/kGEzpAyhjXp3XvNh5b1DbVCHnuPjUgmyCD
 xs6SC+vI3qTeeBdSyiZaCSUg5gEqaGvQi1CZxVYEiu8izybwXKk1JK3xRjQh0BCV
 IaZtXuPyGsLXRhlX7cH6cK6zf0/SeVMma9+8IPHuHL+I7Hu2f5gTz8q0/A6WV4Fm
 QUA5k63cc+idv9Cvzq+e
 =J+R9
 -----END PGP SIGNATURE-----

Merge tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/drivers

Pull "Amlogic driver updates for v4.14" from Kevin Hilman:

- add SoC info driver

* tag 'amlogic-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
  soc: Add Amlogic SoC Information driver
  dt-bindings: arm: amlogic: Add SoC information bindings
2017-08-17 11:04:58 +02:00
Gustavo A. R. Silva db86ab0616 soc: versatile: remove unnecessary static in realview_soc_probe()
Remove unnecessary static on local variables syscon_regmap.
Such variables are initialized before being used, on every
execution path throughout the functions. The static has no
benefit and, removing it reduces the object file size.

This issue was detected using Coccinelle and the following
semantic patch:

@bad exists@
position p;
identifier x;
type T;
@@

static T x@p;
...
x = <+...x...+>

@@
identifier x;
expression e;
type T;
position p != bad.p;
@@

-static
 T x@p;
 ... when != x
     when strict
?x = e;

In the following log you can see the difference in the object file size.
This log is the output of the size command, before and after the code
change:

before:
   text    data     bss     dec     hex filename
   3339    2104     128    5571    15c3 drivers/soc/versatile/soc-realview.o

after:
   text    data     bss     dec     hex filename
   3321    2048      64    5433    1539 drivers/soc/versatile/soc-realview.o

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-08-16 22:28:27 +02:00
Arnd Bergmann f822e60085 Renesas ARM Based SoC Drivers Updates for v4.14
Add R-Car D3 (r8a77995) support to the Renesas-specific SoC drivers
 - SoC identification
 - System controller
 - Reset controller
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZf0DrAAoJENfPZGlqN0++LacP/jcymVeUMDpkkPTcoM6b37Qq
 ADSDdiR+1Szu29wtfNDTFUoAlh4UvlpAN93GGJLZ/iYsMDyZYIhcUhnE4l119fdy
 6iMwDhctXHlQ8VNhY0Z9MUXZyyN2Fu/9L2ZDJ2briM2xoNiMgdUYvMlsZI8ZaN1/
 JRmfP+lzCM25Rkdi9sLYolj8szaxbW9RgLBgvXD7ERJ5bsJRKGs6aDrJ2AXMZpwn
 BVOeughlPTxvv+NVFA1qZXWh63/7RjW5t6OMgHw3eNOABKv+o5YfdqOZAa8PHgn9
 LhNAkR90Il9hsGesWwHMKPuCgGHE0R/2nQppWM0xBWO/HfMRnpx8DEt+em/Kjpep
 uxex+bqMOJB0GksVWPM73ci1CQmQxKS6xrTXeTE9kiN+6WD+b0Fsntoz2XN62uJO
 df0z46N6T3I4jFc00vOBnXxCdgDCBCJLxtU8NFg8jzmGP+NkKxxYiwCEs1auKlLF
 CUVX+o8H4V9FKnD3h0/mNsNyw/gCw6TWXlyr/Ba6AjBuZ8TghhMjQ+zbY+xCN9sb
 IFONbr69pVBJ9N2ssGWdf2iLfa+JNcaJdEPZUkumgUlZ9M5RgS+yg3YoTFtlAO6R
 JN2uP1E20qBLlrvAu7pv9HQEim80RyDT2DU2a1qFNx32vhqfl6g3sccJJvGpzodj
 7y7per6KkpvUGrck0kAI
 =AO//
 -----END PGP SIGNATURE-----

Merge tag 'renesas-drivers-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers

Pull "Renesas ARM Based SoC Drivers Updates for v4.14" from Simon Horman:

Add R-Car D3 (r8a77995) support to the Renesas-specific SoC drivers
- SoC identification
- System controller
- Reset controller

* tag 'renesas-drivers-for-v4.14' of https://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  soc: renesas: rcar-rst: Add support for R-Car D3
  soc: renesas: rcar-sysc: Add support for R-Car D3 power areas
  soc: renesas: Add r8a77995 SYSC PM Domain Binding Definitions
  soc: renesas: Identify R-Car D3
2017-08-16 21:55:03 +02:00
Arnd Bergmann 900452f304 Qualcomm ARM Based Driver Updates for v4.14
* Minor fixes for SMSM and WCNSS_CTRL
 * Move Qcom SoC drivers to submenu
 * Fix mdt_loader to use request_firmware_into_buf()
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJZk7qeAAoJEFKiBbHx2RXVR8MQAMeo4ESQT2+puYg1VQKXVS4l
 MPf+rBDkBUD+NiX8LBWa4xo9M8oyfB5oKI+X8u/PV5RXTVHcgcWBbycdR4BeasWg
 G1mAPS7o0/zqZkDsw/nPPhr8V/QkO22h/XjziWlU6/aqTxNw4AXNi/raRAV/Koi9
 /0WM8tQ3zPaqYagOoTeaSpNhVOJ931NEUIFxzvbkz5ul8vY0OQBNac/g/FcJoqUo
 RN9baKkX81z+HyxtYndQ1Js+cZMLjKo/ZfD++6aJNZg6N9zcBb5GVPJlwMxpHM0E
 4InbQWTmnEUtTGx5Pc5C9VghnElwFLSx7KcYkmnPFxJQGEnSdsfzXkeJ6lDBeIdh
 w7BCIVU97xbHTMMolYSDdwx9iPH0C96NcSPkSFFViOHNuWtBQSzaoSDQymwFDoXD
 fN2I8L8guyOMMe/mZG/I3LdHgaNZODuGB744Cc6/NxnEZKL6hBpu6MreMvJRSlvm
 kvktkS/WylAf1ucvTV/kcI1Y2x5bupymYLbyb8irqs5VSt2XGK8cUN9pgPycepyq
 5EX2NHWfUZAUyJHNZvxya8wXkaARXHZvV6TLJAXYsI97qg/ctzM+u0YZMXTzpkXB
 pMMKOB+8MoC8tIJoMwcT8LfjjjtS8ZiVfpSgGlRzDdt35EBWznxTE1RR7w9PtDqW
 YPbRR7ytQsVhnUDkG7OP
 =gnby
 -----END PGP SIGNATURE-----

Merge tag 'qcom-drivers-for-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux into next/drivers

Pull "Qualcomm ARM Based Driver Updates for v4.14" from Andy Gross:

* Minor fixes for SMSM and WCNSS_CTRL
* Move Qcom SoC drivers to submenu
* Fix mdt_loader to use request_firmware_into_buf()

* tag 'qcom-drivers-for-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/agross/linux:
  soc: qcom: mdt_loader: Use request_firmware_into_buf()
  soc: qcom: bring all qcom drivers into a submenu
  soc: qcom: wcnss_ctrl: add missing MODULE_DEVICE_TABLE()
  soc: qcom: smsm: fix of_node refcnting problem
2017-08-16 21:49:26 +02:00
Arnd Bergmann 526ca89ebe Powerdomain support for rk3366 and disabling of the automatic
jtag/sdmmc switching for rk3328.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlmEP/AQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgf/lCACcJnVGr9PB9ibmTo7LASmljN+OP2G+9o3i
 sOlxlkh5eM5sh9Tbg0NPVBziPmTYhBoPrFQjGEvt01m62gAOf7wugPRStKAivL7h
 /pAUhkL1f4yIR0AnplLgy4+9wNJ7zK5DCj4dDCwd0+vX+aZbgDACPLdqn0afwuu2
 g8pA3C5fRvThVjNpXzwHQSicUOmsvHPWpOWzx1YiKnXxXGKO0Xev+jDseWGqTMXR
 8BXtb62G0QMHGgnrEu2TFex+SzdTumv9r4NpxP3+uytSQogbWUwCUAWpLxxxvgEJ
 dAX9VcTaaJU3CMUwKot1mqmec0wElbwogx961An9bi4EoE+ru4Lt
 =YgWd
 -----END PGP SIGNATURE-----

Merge tag 'v4.14-rockchip-drivers-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers

Pull "Rockchip driver changes for 4.14" from Heiko Stübner:

Powerdomain support for rk3366 and disabling of the automatic
jtag/sdmmc switching for rk3328.

* tag 'v4.14-rockchip-drivers-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  soc: rockchip: power-domain: add power domain support for rk3366
  dt-bindings: add binding for rk3366 power domains
  dt-bindings: power: add RK3366 SoCs header for power-domain
  soc: rockchip: disable jtag switching for RK3328 Soc
2017-08-16 21:47:09 +02:00
Rob Herring 37c342cba5 soc: Convert to using %pOF instead of full_name
Now that we have a custom printf format specifier, convert users of
full_name to use %pOF instead. This is preparation to remove storing
of the full path string for each node.

Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Cc: Scott Wood <oss@buserror.net>
Cc: Qiang Zhao <qiang.zhao@nxp.com>
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-08-16 21:32:36 +02:00
Arnd Bergmann 64c2c372db i.MX fixes for 4.13, round 2:
- Add missing 'ranges' property for i.MX25 device tree TSCADC node, so
    that it's child nodes ADC and TSC device can be probed by kernel.
  - Fix i.MX GPCv2 power domain driver to request regulator after power
    domain initialization, since regulator could defer probing and
    therefore cause power domain initialized twice.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQEcBAABAgAGBQJZhcIQAAoJEFBXWFqHsHzO6N8H/1Uyq0u3a6T29U3BeI6CBKuD
 ACYVHKv+eZCk4uMjmVknWTsMKaoGtho52TThd7GYwLxCSB4lmjurXnOpnSbMmgVX
 Tl1XfCrmZECf4M0e5eTPbHbfMAI+EJXzNc8echgiLpJwA8rqQ/u9tJ0hxJjviDaI
 KtUL01MT5ZfkLD6gXZnBvWA2BvU5ibatgLq1gX2WYONkGwp1aombzcYgM7ADw9NY
 xEvJHLb5uVoQRUECW25evQ54leBj0YeoOWFgvjMvFrR9kr/H/LSCG0cKQidCcv1C
 v85d6GcYZq/GWtlZn8ThbeQJS044S8KnLS9/z3cqXXjllN5tBB6wEM1s1XcwxKY=
 =u055
 -----END PGP SIGNATURE-----

Merge tag 'imx-fixes-4.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes

Pull "i.MX fixes for 4.13, round 2" from Shawn Guo:

 - Add missing 'ranges' property for i.MX25 device tree TSCADC node, so
   that it's child nodes ADC and TSC device can be probed by kernel.
 - Fix i.MX GPCv2 power domain driver to request regulator after power
   domain initialization, since regulator could defer probing and
   therefore cause power domain initialized twice.

* tag 'imx-fixes-4.13-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: i.MX25: add ranges to tscadc
  soc: imx: gpcv2: fix regulator deferred probe
2017-08-15 17:34:52 +02:00
Sean Wang 52510ee934 soc: mediatek: add SCPSYS power domain driver for MediaTek MT7622 SoC
Add SCPSYS power domain driver for MT7622 SoC having four power domains
which are respectively ETHSYS for Ethernet including embedded switch,
WBSYS for WIFI and Bluetooth, HIF0SYS for PCI-E and SATA, and HIF1SYS for
USB. Those functions could be selectively powered gated when the
corresponding function is no longer to use in order to reach more minimal
power dissipation.

Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-08-14 17:28:40 +02:00
Sean Wang 53fddb1a66 soc: mediatek: reduce code duplication of scpsys_probe across all SoCs
Reduce code duplication of scpsys_probe_mtXXXX across all SoCs using
the more generic scpsys_probe all covering all cases to avoid starting
to bloat the driver when more MediaTek SoCs supported are added.

Suggested-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2017-08-14 17:28:27 +02:00
Bjorn Andersson 445c2410a4 soc: qcom: mdt_loader: Use request_firmware_into_buf()
By switching to the request_firmware_into_buf() we load the segment data
straight into the preallocated buffers, reducing the need for allocating
scratch buffers for these. In particular the modem firmware consists of
multiple segments in the range 5-15MB, making this worth while.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-08-08 17:41:23 -05:00
Srinivas Kandagatla 2a464815d3 soc: qcom: bring all qcom drivers into a submenu
As the number of qcom drivers increase, entries in SOC menu looks
scattered with other SOC drivers. Make a submenu for Qcom drivers
to make it visibly clear while selecting qcom SOC specific drivers.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
2017-08-08 14:39:17 -05:00