The g_std and s_std operations are video-related, move them to the video
ops where they belong.
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Hans Verkuil <hans.verkuil@cisco.com>
Acked-by: Lad, Prabhakar <prabhakar.csengg@gmail.com>
Acked-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
In core_init make sure access to EDID DDC lines are disabled
before chip is powered up. Also DISABLE_AUTO_EDID before power up.
The correct setting is applied later when setting the EDID.
Some sources (MAC) kept on reading EDID even when Hotplug was low
and in the short period in core_init before the DDC lines was enabled
read a corrupt EDID.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This was the reason for enabling the HDMI/DVI-D mode irq in the first place.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This applies to HDMI-map register 0x69.
So far we have been using HPA manual mode.
This way we had control of HPA which could be
set after EDID had been programmed.
Using a Mac Mini with mini-displayport to DVI-D converter as source
caused the adv7842 to lock up and fail to detect any further signals.
After experimenting with different configurations it was found that
using the HPA auto mode and in addition letting RX-termination
be controlled by HPA prevented this error from occuring.
I was not able to re-create this problem on the adv7604.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Cc: Mats Randgaard <matrandg@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Clear any pending AVI checksum-errors.
To be able to display last received AVI.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Cc: Mats Randgaard <matrandg@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Incorrect registers used for pixelclock read-out.
Same registers as for adv7604 which actually gave an almost
correct read-out, even they are not documented for adv7842.
Corrected deep-color pixel-clock correction.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Cc: Mats Randgaard <matrandg@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
If the input signal is DVI-D and quantization range is RGB full range,
gain and offset must be adjusted to get the right range on the output.
Copied and adopted from adv7604.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Cc: Mats Randgaard <matrandg@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Add a proper driver strength enum and use the same names in the platform
data as with adv7604.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This timing must be supported by all HDMI equipment, so that's a
reasonable default.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
The correct LLC DLL phase depends on the board layout, so this
should be part of the platform_data.
Also updated the platform_data in ezkit to ensure that what was the old
default value is now explicitly specified, so the behavior for that board
is unchanged.
Tested-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Cc: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Return 0 if the new timings are equal to the current timings as
it caused extra cp-loss/lock interrupts.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
The free-run mode can be board-specific.
Also updated the platform_data in ezkit to ensure that what was the old
default value is now explicitly specified, so the behavior for that board
is unchanged.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Cc: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Must clear timings before setting after test to recover.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Clear i2c_clients ptr when unregistered.
Warn if configured i2c-addr is zero.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
The STDI block may measure wrong values, especially for lcvs and lcf.
If the driver can not find any valid timing, the STDI block is restarted
to measure the video timings again. The function will return an error,
but the restart of STDI will generate a new STDI interrupt and the format
detection process will restart.
Copied from adv7604.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Cc: Mats Randgaard <matrandg@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
May also be wrong if the receiver is connected to more than one connector.
Signed-off-by: Mats Randgaard <matrandg@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Wait 5ms after main reset. The data-sheet doesn't specify the wait
after i2c-controlled reset, so using same value as after pin-controlled
reset.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Both the PAL and NTSC standards are interlaced where a
frame consist of two fields. Total number of lines in a frame in both systems
are an odd number so the two fields will have different length.
In the 625 line standard ("PAL") the odd field of the frame is transmitted first,
while in the 525 standard ("NTSC") the even field is transmitted first.
This adds the possibility to change output config between the fields and standards.
This setting will reduce the "format-jitter" on the signal sent by the pixelport
moving the difference between the fields to vertical front/back-porch only.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
For edid with no Source Physical Address (spa), set
spa-location to default and use correct values from edid.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Cc: Mats Randgaard <matrandg@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Added support for YCrCb analog input.
If input is ADV7842_MODE_RGB and RGB quantization range is set to
V4L2_DV_RGB_RANGE_AUTO, then video with CEA timings will be received
as RGB. For ADV7842_MODE_COMP, automatic CSC mode will be selected.
See table 48 on page 281 in "ADV7842 Hardware Manual, Rev. 0, January 2011"
for details.
Make sure that when switching inputs the RGB quantization range is
updated as well.
Also updated the platform_data in ezkit to ensure that what was the old
default value is now explicitly specified, so the behavior for that board
is unchanged.
Signed-off-by: Mats Randgaard <matrandg@cisco.com>
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Cc: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
The method of disabling the irq-output pin caused many "empty"
interrupts. Instead, actually disable/enable the interrupts by
changing the interrupt masks.
Also enable STORE_MASKED_IRQ in INT1 configuration, otherwise when HDMI
events happen while the interrupt is masked those events will be ignored
when the interrupt is unmasked.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Bit 6 of register 0x8f was cleared incorrectly (must be 1), and bit 4
of register 0x91 was set incorrectly (must be 0).
These bits are undocumented, so we shouldn't modify them to values different
from what the datasheet specifies.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This simplified the code quite a bit.
Signed-off-by: Martin Bugge <marbugge@cisco.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Fix various spelling errors in strings and comments throughout the media
tree. The majority of these were found using Lucas De Marchi's codespell
tool.
[m.chehab@samsung.com: discard hunks with conflicts]
Signed-off-by: Jonathan McCrohan <jmccrohan@gmail.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This is a Analog Devices Component/Graphics/SD Digitizer with 2:1
Multiplexed HDMI Receiver.
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Laurent Pinchart