ISP1760 requires a delay of 90ns between programming the address and
reading the data. Current driver solves this by a mdelay(1) which is
very heavy weighted and slow. This patch applies the workaround from
the ISP1760 FAQ by using two different banks for PTD and payload data
and using a common wait for them. This wait is done by an additional
ISP1760 access (whose timing constraints guarantee the 90ns delay).
This improves speed when reading from an USB stick from:
$ time dd if=/dev/sda of=/dev/zero bs=65536 count=1638
real 1m 15.43s
user 0m 0.44s
sys 0m 39.46s
to
$ time dd if=/dev/sda of=/dev/zero bs=65536 count=1638
real 0m 18.53s
user 0m 0.16s
sys 0m 12.97s
[bigeasy@linutronix.de: fixed comment formating, moved define into
header file, obey 80 char rule]
Signed-off-by: Enrico Scholz <enrico.scholz@sigma-chemnitz.de>
Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This adds support for hardware configurations that don't match the
chip default register settings (e.g., 16-bit data bus, DACK and
DREQ pulled up instead of down, analog overcurrent mode).
These settings are passed in via the OF device tree. The PCI
interface still assumes the same default values.
Signed-off-by: Nate Case <ncase@xes-inc.com>
Acked-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This driver has been written from scratch and supports the ISP1760. ISP1761
might (should) work as well but the OTG isn't supported. Also ISO packets are
not. However, it works on my little PowerPC board.
Signed-off-by: Sebastian Siewior <bigeasy@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Enrico Scholz