Add SPDX license identifiers to all Make/Kconfig files which:
- Have no license information of any form
These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:
GPL-2.0-only
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The cadence media drivers can be built-in while the v4l2 core is a loadable
module. This is a mistake and leads to link errors:
drivers/media/v4l2-core/v4l2-fwnode.o: In function `v4l2_async_register_subdev_sensor_common':
v4l2-fwnode.c:(.text+0x12f0): undefined reference to `v4l2_async_subdev_notifier_register'
v4l2-fwnode.c:(.text+0x1304): undefined reference to `v4l2_async_register_subdev'
v4l2-fwnode.c:(.text+0x1318): undefined reference to `v4l2_async_notifier_unregister'
v4l2-fwnode.c:(.text+0x1338): undefined reference to `v4l2_async_notifier_cleanup'
cdns-csi2rx.c:(.text+0x9f8): undefined reference to `v4l2_subdev_init'
cdns-csi2rx.c:(.text+0xa78): undefined reference to `v4l2_async_register_subdev'
drivers/media/platform/cadence/cdns-csi2tx.o: In function `csi2tx_remove':
cdns-csi2tx.c:(.text+0x88): undefined reference to `v4l2_async_unregister_subdev'
drivers/media/platform/cadence/cdns-csi2tx.o: In function `csi2tx_probe':
cdns-csi2tx.c:(.text+0x884): undefined reference to `v4l2_subdev_init'
cdns-csi2tx.c:(.text+0xa9c): undefined reference to `v4l2_async_register_subdev'
An explicit Kconfig dependency on VIDEO_V4L2 avoids the problem.
Fixes: 1fc3b37f34 ("media: v4l: cadence: Add Cadence MIPI-CSI2 RX driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
The Cadence MIPI-CSI2 TX controller is an hardware block meant to be used
as a bridge between pixel interfaces and a CSI-2 bus.
It supports operating with an internal or external D-PHY, with up to 4
lanes, or without any D-PHY. The current code only supports the latter
case.
While the virtual channel input on the pixel interface can be directly
mapped to CSI2, the datatype input is actually a selection signal (3-bits)
mapping to a table of up to 8 preconfigured datatypes/formats (programmed
at start-up)
The block supports up to 8 input datatypes.
Acked-by: Benoit Parrot <bparrot@ti.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
The Cadence CSI-2 RX Controller is an hardware block meant to be used as a
bridge between a CSI-2 bus and pixel grabbers.
It supports operating with internal or external D-PHY, with up to 4 lanes,
or without any D-PHY. The current code only supports the latter case.
It also support dynamic mapping of the CSI-2 virtual channels to the
associated pixel grabbers, but that isn't allowed at the moment either.
Acked-by: Benoit Parrot <bparrot@ti.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Thomas Gleixner