mirror of https://gitee.com/openkylin/linux.git
2074 Commits
| Author | SHA1 | Message | Date |
|---|---|---|---|
Linus Torvalds
|
4ef1a30c6b |
ARM: SoC: late updates
This is some material that we picked up into our tree late, or that had
more complex dependencies on more than one topic branch that makes sense
to keep separately.
- TI support for secure accelerators and hwrng on OMAP4/5
- TI camera changes for dra7 and am437x and SGX improvement due to better
reset control support on am335x, am437x and dra7
- Davinci moves to proper clocksource on DM365, and regulator/audio
improvements for DM365 and DM644x eval boards
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Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC late updates from Olof Johansson:
"This is some material that we picked up into our tree late, or that
had more complex dependencies on more than one topic branch that makes
sense to keep separately.
- TI support for secure accelerators and hwrng on OMAP4/5
- TI camera changes for dra7 and am437x and SGX improvement due to
better reset control support on am335x, am437x and dra7
- Davinci moves to proper clocksource on DM365, and regulator/audio
improvements for DM365 and DM644x eval boards"
* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (32 commits)
ARM: dts: omap4-droid4: Enable hdq for droid4 ds250x 1-wire battery nvmem
ARM: dts: motorola-cpcap-mapphone: Configure calibration interrupt
ARM: dts: Configure interconnect target module for am437x sgx
ARM: dts: Configure sgx for dra7
ARM: dts: Configure rstctrl reset for am335x SGX
ARM: dts: dra7: Add ti-sysc node for VPE
ARM: dts: dra7: add vpe clkctrl node
ARM: dts: am43x-epos-evm: Add VPFE and OV2659 entries
ARM: dts: am437x-sk-evm: Add VPFE and OV2659 entries
ARM: dts: am43xx: add support for clkout1 clock
arm: dts: dra76-evm: Add CAL and OV5640 nodes
arm: dtsi: dra76x: Add CAL dtsi node
arm: dts: dra72-evm-common: Add entries for the CSI2 cameras
ARM: dts: DRA72: Add CAL dtsi node
ARM: dts: dra7-l4: Add ti-sysc node for CAM
ARM: OMAP: DRA7xx: Make CAM clock domain SWSUP only
ARM: dts: dra7: add cam clkctrl node
ARM: OMAP2+: Drop legacy platform data for omap4 des
ARM: OMAP2+: Drop legacy platform data for omap4 sham
ARM: OMAP2+: Drop legacy platform data for omap4 aes
...
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Linus Torvalds
|
eab3540562 |
ARM: SoC-related driver updates
Various driver updates for platforms:
- Nvidia: Fuse support for Tegra194, continued memory controller pieces
for Tegra30
- NXP/FSL: Refactorings of QuickEngine drivers to support ARM/ARM64/PPC
- NXP/FSL: i.MX8MP SoC driver pieces
- TI Keystone: ring accelerator driver
- Qualcomm: SCM driver cleanup/refactoring + support for new SoCs.
- Xilinx ZynqMP: feature checking interface for firmware. Mailbox
communication for power management
- Overall support patch set for cpuidle on more complex hierarchies
(PSCI-based)
+ Misc cleanups, refactorings of Marvell, TI, other platforms.
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC-related driver updates from Olof Johansson:
"Various driver updates for platforms:
- Nvidia: Fuse support for Tegra194, continued memory controller
pieces for Tegra30
- NXP/FSL: Refactorings of QuickEngine drivers to support
ARM/ARM64/PPC
- NXP/FSL: i.MX8MP SoC driver pieces
- TI Keystone: ring accelerator driver
- Qualcomm: SCM driver cleanup/refactoring + support for new SoCs.
- Xilinx ZynqMP: feature checking interface for firmware. Mailbox
communication for power management
- Overall support patch set for cpuidle on more complex hierarchies
(PSCI-based)
and misc cleanups, refactorings of Marvell, TI, other platforms"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (166 commits)
drivers: soc: xilinx: Use mailbox IPI callback
dt-bindings: power: reset: xilinx: Add bindings for ipi mailbox
drivers: soc: ti: knav_qmss_queue: Pass lockdep expression to RCU lists
MAINTAINERS: Add brcmstb PCIe controller entry
soc/tegra: fuse: Unmap registers once they are not needed anymore
soc/tegra: fuse: Correct straps' address for older Tegra124 device trees
soc/tegra: fuse: Warn if straps are not ready
soc/tegra: fuse: Cache values of straps and Chip ID registers
memory: tegra30-emc: Correct error message for timed out auto calibration
memory: tegra30-emc: Firm up hardware programming sequence
memory: tegra30-emc: Firm up suspend/resume sequence
soc/tegra: regulators: Do nothing if voltage is unchanged
memory: tegra: Correct reset value of xusb_hostr
soc/tegra: fuse: Add APB DMA dependency for Tegra20
bus: tegra-aconnect: Remove PM_CLK dependency
dt-bindings: mediatek: add MT6765 power dt-bindings
soc: mediatek: cmdq: delete not used define
memory: tegra: Add support for the Tegra194 memory controller
memory: tegra: Only include support for enabled SoCs
memory: tegra: Support DVFS on Tegra186 and later
...
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Linus Torvalds
|
1afa9c3b7c |
ARM: Device-tree updates
New SoCs:
- Atmel/Microchip SAM9X60 (ARM926 SoC)
- OMAP 37xx gets split into AM3703/AM3715/DM3725, who are all variants
of it with different GPU/media IP configurations.
- ST stm32mp15 SoCs (1-2 Cortex-A7, CAN, GPU depending on SKU)
- ST Ericsson ab8505 (variant of ab8500) and db8520 (variant of db8500)
- Unisoc SC9863A SoC (8x Cortex-A55 mobile chipset w/ GPU, modem)
- Qualcomm SC7180 (8-core 64bit SoC, unnamed CPU class)
New boards:
- Allwinner
+ Emlid Neutis SoM (H3 variant)
+ Libre Computer ALL-H3-IT
+ PineH64 Model B
- Amlogic
+ Libretech Amlogic GX PC (s905d and s912-based variants)
- Atmel/Microchip:
+ Kizboxmini, sam9x60 EK, sama5d27 Wireless SOM (wlsom1)
- Marvell:
+ Armada 385-based SolidRun Clearfog GTR
- NXP:
+ Gateworks GW59xx boards based on i.MX6/6Q/6QDL
+ Tolino Shine 3 eBook reader (i.MX6sl)
+ Embedded Artists COM (i.MX7ULP)
+ SolidRun CLearfog CX/ITX and HoneyComb (LX2160A-based systems)
+ Google Coral Edge TPU (i.MX8MQ)
- Rockchip
+ Radxa Dalang Carrier (supports rk3288 and rk3399 SOMs)
+ Radxa Rock Pi N10 (RK3399Pro-based)
+ VMARC RK3399Pro SOM
- ST
+ Reference boards for stm32mp15
- ST Ericsson
+ Samsung Galaxy S III mini (GT-I8190)
+ HREF520 reference board for DB8520
- TI OMAP
+ Gen1 Amazon Echo (OMAP3630-based)
- Qualcomm
+ Inforce 6640 Single Board Computer (msm8996-based)
+ SC7180 IDP (SC7180-based)
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM Device-tree updates from Olof Johansson:
"New SoCs:
- Atmel/Microchip SAM9X60 (ARM926 SoC)
- OMAP 37xx gets split into AM3703/AM3715/DM3725, who are all
variants of it with different GPU/media IP configurations.
- ST stm32mp15 SoCs (1-2 Cortex-A7, CAN, GPU depending on SKU)
- ST Ericsson ab8505 (variant of ab8500) and db8520 (variant of
db8500)
- Unisoc SC9863A SoC (8x Cortex-A55 mobile chipset w/ GPU, modem)
- Qualcomm SC7180 (8-core 64bit SoC, unnamed CPU class)
New boards:
- Allwinner:
+ Emlid Neutis SoM (H3 variant)
+ Libre Computer ALL-H3-IT
+ PineH64 Model B
- Amlogic:
+ Libretech Amlogic GX PC (s905d and s912-based variants)
- Atmel/Microchip:
+ Kizboxmini, sam9x60 EK, sama5d27 Wireless SOM (wlsom1)
- Marvell:
+ Armada 385-based SolidRun Clearfog GTR
- NXP:
+ Gateworks GW59xx boards based on i.MX6/6Q/6QDL
+ Tolino Shine 3 eBook reader (i.MX6sl)
+ Embedded Artists COM (i.MX7ULP)
+ SolidRun CLearfog CX/ITX and HoneyComb (LX2160A-based systems)
+ Google Coral Edge TPU (i.MX8MQ)
- Rockchip:
+ Radxa Dalang Carrier (supports rk3288 and rk3399 SOMs)
+ Radxa Rock Pi N10 (RK3399Pro-based)
+ VMARC RK3399Pro SOM
- ST:
+ Reference boards for stm32mp15
- ST Ericsson:
+ Samsung Galaxy S III mini (GT-I8190)
+ HREF520 reference board for DB8520
- TI OMAP:
+ Gen1 Amazon Echo (OMAP3630-based)
- Qualcomm:
+ Inforce 6640 Single Board Computer (msm8996-based)
+ SC7180 IDP (SC7180-based)"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (623 commits)
dt-bindings: fix compilation error of the example in marvell,mmp3-hsic-phy.yaml
arm64: dts: ti: k3-am654-base-board: Add CSI2 OV5640 camera
arm64: dts: ti: k3-am65-main Add CAL node
arm64: dts: ti: k3-j721e-main: Add McASP nodes
arm64: dts: ti: k3-am654-main: Add McASP nodes
arm64: dts: ti: k3-j721e: DMA support
arm64: dts: ti: k3-j721e-main: Move secure proxy and smmu under main_navss
arm64: dts: ti: k3-j721e-main: Correct main NAVSS representation
arm64: dts: ti: k3-j721e: Correct the address for MAIN NAVSS
arm64: dts: ti: k3-am65: DMA support
arm64: dts: ti: k3-am65-main: Move secure proxy under cbass_main_navss
arm64: dts: ti: k3-am65-main: Correct main NAVSS representation
ARM: dts: aspeed: rainier: Add UCD90320 power sequencer
ARM: dts: aspeed: rainier: Switch PSUs to unknown version
arm64: dts: rockchip: Kill off "simple-panel" compatibles
ARM: dts: rockchip: Kill off "simple-panel" compatibles
arm64: dts: rockchip: rename dwmmc node names to mmc
ARM: dts: rockchip: rename dwmmc node names to mmc
arm64: dts: exynos: Rename Samsung and Exynos to lowercase
arm64: dts: uniphier: add reset-names to NAND controller node
...
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Linus Torvalds
|
b34f01f76a |
linux-watchdog 5.6-rc1 tag
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Linus Torvalds
|
f4a6365ae8 |
There are a few changes to the core framework this time around, in addition to
the normal collection of driver updates to support new SoCs, fix incorrect
data, and convert various drivers to clk_hw based APIs.
In the core, we allow clk_ops::init() to return an error code now so that we
can fail clk registration if the callback does something like fail to allocate
memory. We also add a new "terminate" clk_op so that things done in
clk_ops::init() can be undone, e.g. free memory. We also spit out a warning now
when critical clks fail to enable and we support changing clk rates and
enable/disable state through debugfs when developers compile the kernel
themselves.
On the driver front, we get support for what seems like a lot of Qualcomm and
NXP SoCs given that those vendors dominate the diffstat. There are a couple new
drivers for Xilinx and Amlogic SoCs too. The updates are all small things like
fixing the way glitch free muxes switch parents, avoiding div-by-zero problems,
or fixing data like parent names. See the updates section below for more
details.
Finally, the "basic" clk types have been converted to support specifying
parents with clk_hw pointers. This work includes an overhaul of the fixed-rate
clk type to be more modern by using clk_hw APIs.
Core:
- Let clk_ops::init() return an error code
- Add a clk_ops::terminate() callback to undo clk_ops::init()
- Warn about critical clks that fail to enable or prepare
- Support dangerous debugfs actions on clks with dead code
New Drivers:
- Support for Xilinx Versal platform clks
- Display clk controller on qcom sc7180
- Video clk controller on qcom sc7180
- Graphics clk controller on qcom sc7180
- CPU PLLs for qcom msm8916
- Move qcom msm8974 gfx3d clk to RPM control
- Display port clk support on qcom sdm845 SoCs
- Global clk controller on qcom ipq6018
- Add a driver for BCLK of Freescale SAI cores
- Add cam, vpe and sgx clock support for TI dra7
- Add aess clock support for TI omap5
- Enable clks for CPUfreq on Allwinner A64 SoCs
- Add Amlogic meson8b DDR clock controller
- Add input clocks to Amlogic meson8b controllers
- Add SPIBSC (SPI FLASH) clock on Renesas RZ/A2
- i.MX8MP clk driver support
Updates:
- Convert gpio, fixed-factor, mux, gate, divider basic clks to hw based APIs
- Detect more PRMCU variants in ux500 driver
- Adjust the composite clk type to new way of describing clk parents
- Fixes for clk controllers on qcom msm8998 SoCs
- Fix gmac main clock for TI dra7
- Move TI dra7-atl clock header to correct location
- Fix hidden node name dependency on TI clkctrl clocks
- Fix Amlogic meson8b mali clock update using the glitch free mux
- Fix Amlogic pll driver division by zero at init
- Prepare for split of Renesas R-Car H3 ES1.x and ES2.0+ config symbols
- Switch more i.MX clk drivers to clk_hw based APIs
- Disable non-functional divider between pll4_audio_div and
pll4_post_div on imx6q
- Fix watchdog2 clock name typo in imx7ulp clock driver
- Set CLK_GET_RATE_NOCACHE flag for DRAM related clocks on i.MX8M SoCs
- Suppress bind attrs for i.MX8M clock driver
- Add a big comment in imx8qxp-lpcg driver to tell why
devm_platform_ioremap_resource() shouldn't be used for the driver
- A correction on i.MX8MN usb1_ctrl parent clock setting
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Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"There are a few changes to the core framework this time around, in
addition to the normal collection of driver updates to support new
SoCs, fix incorrect data, and convert various drivers to clk_hw based
APIs.
In the core, we allow clk_ops::init() to return an error code now so
that we can fail clk registration if the callback does something like
fail to allocate memory. We also add a new "terminate" clk_op so that
things done in clk_ops::init() can be undone, e.g. free memory. We
also spit out a warning now when critical clks fail to enable and we
support changing clk rates and enable/disable state through debugfs
when developers compile the kernel themselves.
On the driver front, we get support for what seems like a lot of
Qualcomm and NXP SoCs given that those vendors dominate the diffstat.
There are a couple new drivers for Xilinx and Amlogic SoCs too. The
updates are all small things like fixing the way glitch free muxes
switch parents, avoiding div-by-zero problems, or fixing data like
parent names. See the updates section below for more details.
Finally, the "basic" clk types have been converted to support
specifying parents with clk_hw pointers. This work includes an
overhaul of the fixed-rate clk type to be more modern by using clk_hw
APIs.
Core:
- Let clk_ops::init() return an error code
- Add a clk_ops::terminate() callback to undo clk_ops::init()
- Warn about critical clks that fail to enable or prepare
- Support dangerous debugfs actions on clks with dead code
New Drivers:
- Support for Xilinx Versal platform clks
- Display clk controller on qcom sc7180
- Video clk controller on qcom sc7180
- Graphics clk controller on qcom sc7180
- CPU PLLs for qcom msm8916
- Move qcom msm8974 gfx3d clk to RPM control
- Display port clk support on qcom sdm845 SoCs
- Global clk controller on qcom ipq6018
- Add a driver for BCLK of Freescale SAI cores
- Add cam, vpe and sgx clock support for TI dra7
- Add aess clock support for TI omap5
- Enable clks for CPUfreq on Allwinner A64 SoCs
- Add Amlogic meson8b DDR clock controller
- Add input clocks to Amlogic meson8b controllers
- Add SPIBSC (SPI FLASH) clock on Renesas RZ/A2
- i.MX8MP clk driver support
Updates:
- Convert gpio, fixed-factor, mux, gate, divider basic clks to hw
based APIs
- Detect more PRMCU variants in ux500 driver
- Adjust the composite clk type to new way of describing clk parents
- Fixes for clk controllers on qcom msm8998 SoCs
- Fix gmac main clock for TI dra7
- Move TI dra7-atl clock header to correct location
- Fix hidden node name dependency on TI clkctrl clocks
- Fix Amlogic meson8b mali clock update using the glitch free mux
- Fix Amlogic pll driver division by zero at init
- Prepare for split of Renesas R-Car H3 ES1.x and ES2.0+ config
symbols
- Switch more i.MX clk drivers to clk_hw based APIs
- Disable non-functional divider between pll4_audio_div and
pll4_post_div on imx6q
- Fix watchdog2 clock name typo in imx7ulp clock driver
- Set CLK_GET_RATE_NOCACHE flag for DRAM related clocks on i.MX8M
SoCs
- Suppress bind attrs for i.MX8M clock driver
- Add a big comment in imx8qxp-lpcg driver to tell why
devm_platform_ioremap_resource() shouldn't be used for the driver
- A correction on i.MX8MN usb1_ctrl parent clock setting"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (140 commits)
dt/bindings: clk: fsl,plldig: Drop 'bindings' from schema id
clk: ls1028a: Fix warning on clamp() usage
clk: qoriq: add ls1088a hwaccel clocks support
clk: ls1028a: Add clock driver for Display output interface
dt/bindings: clk: Add YAML schemas for LS1028A Display Clock bindings
clk: fsl-sai: new driver
dt-bindings: clock: document the fsl-sai driver
clk: composite: add _register_composite_pdata() variants
clk: qcom: rpmh: Sort OF match table
dt-bindings: fix warnings in validation of qcom,gcc.yaml
dt-binding: fix compilation error of the example in qcom,gcc.yaml
clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag
clk: zynqmp: Fix divider calculation
clk: zynqmp: Add support for get max divider
clk: zynqmp: Warn user if clock user are more than allowed
clk: zynqmp: Extend driver for versal
dt-bindings: clock: Add bindings for versal clock driver
clk: ti: clkctrl: Fix hidden dependency to node name
clk: ti: add clkctrl data dra7 sgx
clk: ti: omap5: Add missing AESS clock
...
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Stephen Boyd
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db865ee447 |
Merge branches 'clk-imx', 'clk-ti', 'clk-xilinx', 'clk-nvidia', 'clk-qcom', 'clk-freescale' and 'clk-qoriq' into clk-next
- Support for Xilinx Versal platform clks - Display clk controller on qcom sc7180 - Video clk controller on qcom sc7180 - Graphics clk controller on qcom sc7180 - CPU PLLs for qcom msm8916 - Fixes for clk controllers on qcom msm8998 SoCs - Move qcom msm8974 gfx3d clk to RPM control - Display port clk support on qcom sdm845 SoCs - Global clk controller on qcom ipq6018 - Adjust composite clk to new way of describing clk parents - Add a driver for BCLK of Freescale SAI cores * clk-imx: (32 commits) clk: imx: Add support for i.MX8MP clock driver dt-bindings: imx: Add clock binding doc for i.MX8MP clk: imx: gate4: Switch imx_clk_gate4_flags() to clk_hw based API clk: imx: imx8mq: Switch to clk_hw based API clk: imx: imx8mm: Switch to clk_hw based API clk: imx: imx8mn: Switch to clk_hw based API clk: imx: Remove __init for imx_obtain_fixed_clk_hw() API clk: imx: gate3: Switch to clk_hw based API clk: imx: add hw API imx_clk_hw_mux2_flags clk: imx: add imx_unregister_hw_clocks clk: imx: clk-composite-8m: Switch to clk_hw based API clk: imx: clk-pll14xx: Switch to clk_hw based API clk: imx7up: Rename the clks to hws clk: imx: Rename the imx_clk_divider_gate to imply it's clk_hw based clk: imx: Rename the imx_clk_pfdv2 to imply it's clk_hw based clk: imx: Rename the imx_clk_pllv4 to imply it's clk_hw based clk: imx: Rename sccg and frac pll register to suggest clk_hw clk: imx: imx7ulp composite: Rename to show is clk_hw based clk: imx: pllv2: Switch to clk_hw based API clk: imx: pllv1: Switch to clk_hw based API ... * clk-ti: clk: ti: clkctrl: Fix hidden dependency to node name clk: ti: add clkctrl data dra7 sgx clk: ti: omap5: Add missing AESS clock clk: ti: dra7: fix parent for gmac_clkctrl clk: ti: dra7: add vpe clkctrl data clk: ti: dra7: add cam clkctrl data dt-bindings: clock: Move ti-dra7-atl.h to dt-bindings/clock * clk-xilinx: clk: zynqmp: Add support for clock with CLK_DIVIDER_POWER_OF_TWO flag clk: zynqmp: Fix divider calculation clk: zynqmp: Add support for get max divider clk: zynqmp: Warn user if clock user are more than allowed clk: zynqmp: Extend driver for versal dt-bindings: clock: Add bindings for versal clock driver * clk-nvidia: clk: tegra20/30: Explicitly set parent clock for Video Decoder clk: tegra20/30: Don't pre-initialize displays parent clock clk: tegra: divider: Check UART's divider enable-bit state on rate's recalculation clk: tegra: clk-dfll: Remove call to pm_runtime_irq_safe() clk: tegra: Mark fuse clock as critical * clk-qcom: (35 commits) clk: qcom: rpmh: Sort OF match table dt-bindings: fix warnings in validation of qcom,gcc.yaml dt-binding: fix compilation error of the example in qcom,gcc.yaml clk: qcom: Add ipq6018 Global Clock Controller support clk: qcom: Add DT bindings for ipq6018 gcc clock controller clk: qcom: gcc-msm8996: Fix parent for CLKREF clocks clk: qcom: rpmh: Add IPA clock for SC7180 clk: qcom: rpmh: skip undefined clocks when registering clk: qcom: Add video clock controller driver for SC7180 dt-bindings: clock: Introduce SC7180 QCOM Video clock bindings dt-bindings: clock: Add YAML schemas for the QCOM VIDEOCC clock bindings clk: qcom: Add graphics clock controller driver for SC7180 dt-bindings: clock: Introduce SC7180 QCOM Graphics clock bindings dt-bindings: clock: Add YAML schemas for the QCOM GPUCC clock bindings clk: qcom: apcs-msm8916: use clk_parent_data to specify the parent clk: qcom: Add display clock controller driver for SC7180 dt-bindings: clock: Introduce QCOM sc7180 display clock bindings dt-bindings: clock: Add YAML schemas for the QCOM DISPCC clock bindings clk: qcom: clk-alpha-pll: Add support for Fabia PLL calibration clk: qcom: alpha-pll: Remove useless read from set rate ... * clk-freescale: clk: fsl-sai: new driver dt-bindings: clock: document the fsl-sai driver clk: composite: add _register_composite_pdata() variants * clk-qoriq: clk: qoriq: add ls1088a hwaccel clocks support clk: ls1028a: Add clock driver for Display output interface dt/bindings: clk: Add YAML schemas for LS1028A Display Clock bindings |
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Stephen Boyd
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6e7a9f0c4e |
Merge branches 'clk-debugfs-danger', 'clk-basic-hw', 'clk-renesas', 'clk-amlogic' and 'clk-allwinner' into clk-next
- Support dangerous debugfs actions on clks with dead code - Convert gpio, fixed-factor, mux, gate, divider basic clks to hw based APIs * clk-debugfs-danger: clk: Add support for setting clk_rate via debugfs * clk-basic-hw: clk: divider: Add support for specifying parents via DT/pointers clk: gate: Add support for specifying parents via DT/pointers clk: mux: Add support for specifying parents via DT/pointers clk: asm9260: Use parent accuracy in fixed rate clk clk: fixed-rate: Document that accuracy isn't a rate clk: fixed-rate: Add clk flags for parent accuracy clk: fixed-rate: Add support for specifying parents via DT/pointers clk: fixed-rate: Document accuracy member clk: fixed-rate: Move to_clk_fixed_rate() to C file clk: fixed-rate: Remove clk_register_fixed_rate_with_accuracy() clk: fixed-rate: Convert to clk_hw based APIs clk: gpio: Use DT way of specifying parents * clk-renesas: clk: renesas: Prepare for split of R-Car H3 config symbol dt-bindings: clock: renesas: cpg-mssr: Fix r8a774b1 typo clk: renesas: r7s9210: Add SPIBSC clock clk: renesas: rcar-gen3: Allow changing the RPC[D2] clocks clk: renesas: Remove use of ARCH_R8A7796 clk: renesas: rcar-gen2: Change multipliers and dividers to u8 * clk-amlogic: clk: clarify that clk_set_rate() does updates from top to bottom clk: meson: meson8b: make the CCF use the glitch-free mali mux clk: meson: pll: Fix by 0 division in __pll_params_to_rate() clk: meson: g12a: fix missing uart2 in regmap table clk: meson: meson8b: use of_clk_hw_register to register the clocks clk: meson: meson8b: don't register the XTAL clock when provided via OF clk: meson: meson8b: change references to the XTAL clock to use [fw_]name clk: meson: meson8b: use clk_hw_set_parent in the CPU clock notifier clk: meson: add a driver for the Meson8/8b/8m2 DDR clock controller dt-bindings: clock: meson8b: add the clock inputs dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding * clk-allwinner: clk: sunxi: a23/a33: Export the MIPI PLL clk: sunxi: a31: Export the MIPI PLL clk: sunxi-ng: a64: export CLK_CPUX clock for DVFS clk: sunxi-ng: add mux and pll notifiers for A64 CPU clock clk: sunxi-ng: r40: Export MBUS clock clk: sunxi: use of_device_get_match_data |
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Linus Torvalds
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701a9c8092 |
Char/Misc driver changes for 5.6-rc1
Here is the big char/misc/whatever driver changes for 5.6-rc1 Included in here are loads of things from a variety of different driver subsystems: - soundwire updates - binder updates - nvmem updates - firmware drivers updates - extcon driver updates - various misc driver updates - fpga driver updates - interconnect subsystem and driver updates - bus driver updates - uio driver updates - mei driver updates - w1 driver cleanups - various other small driver updates All of these have been in linux-next for a while with no reported issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXjFKeQ8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ynjVACgg6JWfOyPCnz3GfRD1vQZyUl+Hg0An1H+Eh08 +LQk5Qpb3vVwBpCp6qR3 =MB+D -----END PGP SIGNATURE----- Merge tag 'char-misc-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc Pull char/misc driver updates from Greg KH: "Here is the big char/misc/whatever driver changes for 5.6-rc1 Included in here are loads of things from a variety of different driver subsystems: - soundwire updates - binder updates - nvmem updates - firmware drivers updates - extcon driver updates - various misc driver updates - fpga driver updates - interconnect subsystem and driver updates - bus driver updates - uio driver updates - mei driver updates - w1 driver cleanups - various other small driver updates All of these have been in linux-next for a while with no reported issues" * tag 'char-misc-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (86 commits) mei: me: add jasper point DID char: hpet: Use flexible-array member binder: fix log spam for existing debugfs file creation. mei: me: add comet point (lake) H device ids nvmem: add QTI SDAM driver dt-bindings: nvmem: add binding for QTI SPMI SDAM dt-bindings: imx-ocotp: Add i.MX8MP compatible dt-bindings: soundwire: fix example soundwire: cadence: fix kernel-doc parameter descriptions soundwire: intel: report slave_ids for each link to SOF driver siox: Use the correct style for SPDX License Identifier w1: omap-hdq: Simplify driver with PM runtime autosuspend firmware: stratix10-svc: Remove unneeded semicolon firmware: google: Probe for a GSMI handler in firmware firmware: google: Unregister driver_info on failure and exit in gsmi firmware: google: Release devices before unregistering the bus slimbus: qcom: add missed clk_disable_unprepare in remove slimbus: Use the correct style for SPDX License Identifier slimbus: qcom-ngd-ctrl: Use dma_request_chan() instead dma_request_slave_channel() dt-bindings: SLIMBus: add slim devices optional properties ... |
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Linus Torvalds
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aac9662671 |
USB/Thunderbolt/PHY driver updates for 5.6-rc1
Here is the big USB and Thunderbolt and PHY driver updates for 5.6-rc1. With the advent of USB4, "Thunderbolt" has really become USB4, so the renaming of the Kconfig option and starting to share subsystem code has begun, hence both subsystems coming in through the same tree here. PHY driver updates also touched USB drivers, so that is coming in through here as well. Major stuff included in here are: - USB 4 initial support added (i.e. Thunderbolt) - musb driver updates - USB gadget driver updates - PHY driver updates - USB PHY driver updates - lots of USB serial stuff fixed up - USB typec updates - USB-IP fixes - lots of other smaller USB driver updates All of these have been in linux-next for a while now (the usb-serial tree is already tested in linux-next on its own before merged into here), with no reported issues. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCXjFTNw8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ynpKQCgrh2FoobS2x0oFg/OUHdjokQV/BYAoJGWLOmt 8S5cnsCuLq3w5qpCcBva =PMGd -----END PGP SIGNATURE----- Merge tag 'usb-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB/Thunderbolt/PHY driver updates from Greg KH: "Here is the big USB and Thunderbolt and PHY driver updates for 5.6-rc1. With the advent of USB4, "Thunderbolt" has really become USB4, so the renaming of the Kconfig option and starting to share subsystem code has begun, hence both subsystems coming in through the same tree here. PHY driver updates also touched USB drivers, so that is coming in through here as well. Major stuff included in here are: - USB 4 initial support added (i.e. Thunderbolt) - musb driver updates - USB gadget driver updates - PHY driver updates - USB PHY driver updates - lots of USB serial stuff fixed up - USB typec updates - USB-IP fixes - lots of other smaller USB driver updates All of these have been in linux-next for a while now (the usb-serial tree is already tested in linux-next on its own before merged into here), with no reported issues" [ Removed an incorrect compile test enablement for PHY_EXYNOS5250_SATA that causes configuration warnings - Linus ] * tag 'usb-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (207 commits) Doc: ABI: add usb charger uevent usb: phy: show USB charger type for user usb: cdns3: fix spelling mistake and rework grammar in text usb: phy: phy-gpio-vbus-usb: Convert to GPIO descriptors USB: serial: cyberjack: fix spelling mistake "To" -> "Too" USB: serial: ir-usb: simplify endpoint check USB: serial: ir-usb: make set_termios synchronous USB: serial: ir-usb: fix IrLAP framing USB: serial: ir-usb: fix link-speed handling USB: serial: ir-usb: add missing endpoint sanity check usb: typec: fusb302: fix "op-sink-microwatt" default that was in mW usb: typec: wcove: fix "op-sink-microwatt" default that was in mW usb: dwc3: pci: add ID for the Intel Comet Lake -V variant usb: typec: tcpci: mask event interrupts when remove driver usb: host: xhci-tegra: set MODULE_FIRMWARE for tegra186 usb: chipidea: add inline for ci_hdrc_host_driver_init if host is not defined usb: chipidea: handle single role for usb role class usb: musb: fix spelling mistake: "periperal" -> "peripheral" phy: ti: j721e-wiz: Fix build error without CONFIG_OF_ADDRESS USB: usbfs: Always unlink URBs in reverse order ... |
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Linus Torvalds
|
abb22e44cf |
- Depromote debug print on the db8500 platform (Linus Walleij)
- Fix compilation warning when compiling with make W=1 (Amit Kucheria) - Code cleanup and refactoring, regmap conversion and add hwmon support on Qoriq (Andrey Smirnov) - Add an idle injection cpu cooling device and its documentation, rename the cpu_cooling device to cpufreq_cooling device (Daniel Lezcano) - Convert unexported functions to static, add the __init annotation in the thermal-of code and remove the pointless wrapper functions (Daniel Lezcano) - Fix register offset for Armada XP and register reset bit initialization (Zak Hays) - Enable hwmon on the rockchip (Stefan Schaeckeler) - Add the thermal sensor for the H6/H5/H3/A64/A83T/R40 sun8i platform and their device tree bindings, followed by a fix for the ths number and the sparse warnings (Yangtao Li) - Code cleansup for the sun8i and hwmon support (Yangtao Li) - Silent some messages which are misleading given the changes made in the previous version on generic-adc (Martin Blumenstingl) - Rename exynos to Exynos (Krzysztof Kozlowski) - Add the bcm2711 thermal driver with the device tree bindings (Stefan Wahren) - Use usleep_range() instead of udelay() as the call is always done in a sleep-able context (Geert Uytterhoeven) - Do code cleanup and re-organization to set the scene for a new process for the brcmstb (Florian Fainelli) - Fix bindings check issues on brcm (Stefan Wahren) - Add Jasper Lake support on int340x (Nivedita Swaminathan) - Add Comet Lake support on intel pch (Gayatri Kammela) - Fix unmatched pci_release_region() on x86 (Chuhong Yuan) - Remove temperature boundaries for rcar and rcar3 (Niklas Söderlund) - Fix return value to -ENODEV when thermal_zone_of_sensor_register() is called with the of-node is missing (Peter Mamonov) - Code cleanup, interrupt bouncing, and better support on stm32 (Pascal Paillet) -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRuKdf4M92Gi9vqihve5qtOL396pgUCXjAFCAAKCRDe5qtOL396 prIfAQCjhNWKqP3U4oewia9p8dwwfsOpJMqUXge/k6sKzAqscAD/Rg4lWXaayOsX OWKhS/iL5eN7aXVnSH4MxONsTWhLTAs= =eZkX -----END PGP SIGNATURE----- Merge tag 'thermal-v5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux Pull thermal updates from Daniel Lezcano: - Depromote debug print on the db8500 platform (Linus Walleij) - Fix compilation warning when compiling with make W=1 (Amit Kucheria) - Code cleanup and refactoring, regmap conversion and add hwmon support on Qoriq (Andrey Smirnov) - Add an idle injection cpu cooling device and its documentation, rename the cpu_cooling device to cpufreq_cooling device (Daniel Lezcano) - Convert unexported functions to static, add the __init annotation in the thermal-of code and remove the pointless wrapper functions (Daniel Lezcano) - Fix register offset for Armada XP and register reset bit initialization (Zak Hays) - Enable hwmon on the rockchip (Stefan Schaeckeler) - Add the thermal sensor for the H6/H5/H3/A64/A83T/R40 sun8i platform and their device tree bindings, followed by a fix for the ths number and the sparse warnings (Yangtao Li) - Code cleansup for the sun8i and hwmon support (Yangtao Li) - Silent some messages which are misleading given the changes made in the previous version on generic-adc (Martin Blumenstingl) - Rename exynos to Exynos (Krzysztof Kozlowski) - Add the bcm2711 thermal driver with the device tree bindings (Stefan Wahren) - Use usleep_range() instead of udelay() as the call is always done in a sleep-able context (Geert Uytterhoeven) - Do code cleanup and re-organization to set the scene for a new process for the brcmstb (Florian Fainelli) - Fix bindings check issues on brcm (Stefan Wahren) - Add Jasper Lake support on int340x (Nivedita Swaminathan) - Add Comet Lake support on intel pch (Gayatri Kammela) - Fix unmatched pci_release_region() on x86 (Chuhong Yuan) - Remove temperature boundaries for rcar and rcar3 (Niklas Söderlund) - Fix return value to -ENODEV when thermal_zone_of_sensor_register() is called with the of-node is missing (Peter Mamonov) - Code cleanup, interrupt bouncing, and better support on stm32 (Pascal Paillet) * tag 'thermal-v5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thermal/linux: (66 commits) thermal: stm32: Fix low threshold interrupt flood thermal: stm32: Improve temperature computing thermal: stm32: Handle multiple trip points thermal: stm32: Disable interrupts at probe thermal: stm32: Rework sensor mode management thermal: stm32: Fix icifr register name thermal: of: Make thermal_zone_of_sensor_register return -ENODEV if a sensor OF node is missing thermal: rcar_gen3_thermal: Remove temperature bound thermal: rcar_thermal: Remove temperature bound thermal: intel: intel_pch_thermal: Add Comet Lake (CML) platform support thermal: intel: Fix unmatched pci_release_region thermal: int340x: processor_thermal: Add Jasper Lake support dt-bindings: brcm,avs-ro-thermal: Fix binding check issues thermal: brcmstb_thermal: Register different ops per process thermal: brcmstb_thermal: Restructure interrupt registration thermal: brcmstb_thermal: Add 16nm process thermal parameters dt-bindings: thermal: Define BCM7216 thermal sensor compatible thermal: brcmstb_thermal: Prepare to support a different process thermal: brcmstb_thermal: Do not use DT coefficients thermal: rcar_thermal: Use usleep_range() instead of udelay() ... |
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Linus Torvalds
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3d3b44a61a |
The interrupt departement provides:
- A mechanism to shield isolated tasks from managed interrupts:
The affinity of managed interrupts is completely controlled by the
kernel and user space has no influence on them. The reason is that
the automatically assigned affinity correlates to the multi-queue
CPU handling of block devices.
If the generated affinity mask spaws both housekeeping and isolated CPUs
the interrupt could be routed to an isolated CPU which would then be
disturbed by I/O submitted by a housekeeping CPU.
The new mechamism ensures that as long as one housekeeping CPU is online
in the assigned affinity mask the interrupt is routed to a housekeeping
CPU.
If there is no online housekeeping CPU in the affinity mask, then the
interrupt is routed to an isolated CPU to keep the device queue intact,
but unless the isolated CPU submits I/O by itself these interrupts are
not raised.
- A small addon to the device tree irqdomain core code to avoid
duplication in irq chip drivers
- Conversion of the SiFive PLIC to hierarchical domains
- The usual pile of new irq chip drivers: SiFive GPIO, Aspeed SCI, NXP
INTMUX, Meson A1 GPIO
- The first cut of support for the new ARM GICv4.1
- The usual pile of fixes and improvements in core and driver code
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Merge tag 'irq-core-2020-01-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq updates from Thomas Gleixner:
"The interrupt departement provides:
- A mechanism to shield isolated tasks from managed interrupts:
The affinity of managed interrupts is completely controlled by the
kernel and user space has no influence on them. The reason is that
the automatically assigned affinity correlates to the multi-queue
CPU handling of block devices.
If the generated affinity mask spaws both housekeeping and isolated
CPUs the interrupt could be routed to an isolated CPU which would
then be disturbed by I/O submitted by a housekeeping CPU.
The new mechamism ensures that as long as one housekeeping CPU is
online in the assigned affinity mask the interrupt is routed to a
housekeeping CPU.
If there is no online housekeeping CPU in the affinity mask, then
the interrupt is routed to an isolated CPU to keep the device queue
intact, but unless the isolated CPU submits I/O by itself these
interrupts are not raised.
- A small addon to the device tree irqdomain core code to avoid
duplication in irq chip drivers
- Conversion of the SiFive PLIC to hierarchical domains
- The usual pile of new irq chip drivers: SiFive GPIO, Aspeed SCI,
NXP INTMUX, Meson A1 GPIO
- The first cut of support for the new ARM GICv4.1
- The usual pile of fixes and improvements in core and driver code"
* tag 'irq-core-2020-01-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (33 commits)
genirq, sched/isolation: Isolate from handling managed interrupts
irqchip/gic-v4.1: Allow direct invalidation of VLPIs
irqchip/gic-v4.1: Suppress per-VLPI doorbell
irqchip/gic-v4.1: Add VPE INVALL callback
irqchip/gic-v4.1: Add VPE eviction callback
irqchip/gic-v4.1: Add VPE residency callback
irqchip/gic-v4.1: Add mask/unmask doorbell callbacks
irqchip/gic-v4.1: Plumb skeletal VPE irqchip
irqchip/gic-v4.1: Implement the v4.1 flavour of VMOVP
irqchip/gic-v4.1: Don't use the VPE proxy if RVPEID is set
irqchip/gic-v4.1: Implement the v4.1 flavour of VMAPP
irqchip/gic-v4.1: VPE table (aka GICR_VPROPBASER) allocation
irqchip/gic-v3: Add GICv4.1 VPEID size discovery
irqchip/gic-v3: Detect GICv4.1 supporting RVPEID
irqchip/gic-v3-its: Fix get_vlpi_map() breakage with doorbells
irqdomain: Fix a memory leak in irq_domain_push_irq()
irqchip: Add NXP INTMUX interrupt multiplexer support
dt-bindings: interrupt-controller: Add binding for NXP INTMUX interrupt multiplexer
irqchip: Define EXYNOS_IRQ_COMBINER
irqchip/meson-gpio: Add support for meson a1 SoCs
...
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Linus Torvalds
|
a5b871c91d |
dmaengine updates for v5.6-rc1
- Core:
- Support for dynamic channels
- Removal of various slave wrappers
- Make few slave request APIs as private to dmaengine
- Symlinks between channels and slaves
- Support for hotplug of controllers
- Support for metadata_ops for dma_async_tx_descriptor
- Reporting DMA cached data amount
- Virtual dma channel locking updates
- New drivers/device/feature support support:
- Driver for Intel data accelerators
- Driver for TI K3 UDMA
- Driver for PLX DMA engine
- Driver for hisilicon Kunpeng DMA engine
- Support for eDMA support for QorIQ LS1028A in fsl edma driver
- Support for cyclic dma in sun4i driver
- Support for X1830 in JZ4780 driver
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Merge tag 'dmaengine-5.6-rc1' of git://git.infradead.org/users/vkoul/slave-dma
Pull dmaengine updates from Vinod Koul:
"This time we have a bunch of core changes to support dynamic channels,
hotplug of controllers, new apis for metadata ops etc along with new
drivers for Intel data accelerators, TI K3 UDMA, PLX DMA engine and
hisilicon Kunpeng DMA engine. Also usual assorted updates to drivers.
Core:
- Support for dynamic channels
- Removal of various slave wrappers
- Make few slave request APIs as private to dmaengine
- Symlinks between channels and slaves
- Support for hotplug of controllers
- Support for metadata_ops for dma_async_tx_descriptor
- Reporting DMA cached data amount
- Virtual dma channel locking updates
New drivers/device/feature support support:
- Driver for Intel data accelerators
- Driver for TI K3 UDMA
- Driver for PLX DMA engine
- Driver for hisilicon Kunpeng DMA engine
- Support for eDMA support for QorIQ LS1028A in fsl edma driver
- Support for cyclic dma in sun4i driver
- Support for X1830 in JZ4780 driver"
* tag 'dmaengine-5.6-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (62 commits)
dmaengine: Create symlinks between DMA channels and slaves
dmaengine: hisilicon: Add Kunpeng DMA engine support
dmaengine: idxd: add char driver to expose submission portal to userland
dmaengine: idxd: connect idxd to dmaengine subsystem
dmaengine: idxd: add descriptor manipulation routines
dmaengine: idxd: add sysfs ABI for idxd driver
dmaengine: idxd: add configuration component of driver
dmaengine: idxd: Init and probe for Intel data accelerators
dmaengine: add support to dynamic register/unregister of channels
dmaengine: break out channel registration
x86/asm: add iosubmit_cmds512() based on MOVDIR64B CPU instruction
dmaengine: ti: k3-udma: fix spelling mistake "limted" -> "limited"
dmaengine: s3c24xx-dma: fix spelling mistake "to" -> "too"
dmaengine: Move dma_get_{,any_}slave_channel() to private dmaengine.h
dmaengine: Remove dma_request_slave_channel_compat() wrapper
dmaengine: Remove dma_device_satisfies_mask() wrapper
dt-bindings: fsl-imx-sdma: Add i.MX8MM/i.MX8MN/i.MX8MP compatible string
dmaengine: zynqmp_dma: fix burst length configuration
dmaengine: sun4i: Add support for cyclic requests with dedicated DMA
dmaengine: fsl-qdma: fix duplicated argument to &&
...
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yong.liang
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fe42cc30a9 |
dt-bindings: mediatek: mt2712: Add #reset-cells
Add #reset-cells and update mtk-wdt.txt Signed-off-by: yong.liang <yong.liang@mediatek.com> Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Guenter Roeck <groeck7@gmail.com> Link: https://lore.kernel.org/r/20200115085828.27791-3-yong.liang@mediatek.com Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org> |
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yong.liang
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f43f97a0fc |
dt-bindings: mediatek: mt8183: Add #reset-cells
Add #reset-cells property and update example Signed-off-by: yong.liang <yong.liang@mediatek.com> Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> Reviewed-by: Yingjoe Chen <yingjoe.chen@mediatek.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Guenter Roeck <groeck7@gmail.com> Link: https://lore.kernel.org/r/20200115085828.27791-2-yong.liang@mediatek.com Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org> |
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Krzysztof Kozlowski
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ca07ee4e3d |
thermal: exynos: Rename Samsung and Exynos to lowercase
Fix up inconsistent usage of upper and lowercase letters in "Samsung" and "Exynos" names. "SAMSUNG" and "EXYNOS" are not abbreviations but regular trademarked names. Therefore they should be written with lowercase letters starting with capital letter. The lowercase "Exynos" name is promoted by its manufacturer Samsung Electronics Co., Ltd., in advertisement materials and on website. Although advertisement materials usually use uppercase "SAMSUNG", the lowercase version is used in all legal aspects (e.g. on Wikipedia and in privacy/legal statements on https://www.samsung.com/semiconductor/privacy-global/). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20200104152107.11407-7-krzk@kernel.org |
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Rajan Vaja
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352546805a |
dt-bindings: clock: Add bindings for versal clock driver
Add documentation to describe Xilinx Versal clock driver bindings. Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lkml.kernel.org/r/1575527759-26452-2-git-send-email-rajan.vaja@xilinx.com Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Tony Lindgren
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723a567f43 |
ARM: dts: Add missing omap5 secure clocks
The secure clocks on omap5 are similar to what we already have for dra7 with dra7_l4sec_clkctrl_regs and documented in the omap5432 TRM in "Table 3-1044. CORE_CM_CORE Registers Mapping Summary". The secure clocks are part of the l4per clock manager. As the l4per clock manager has now two clock domains as children, let's also update the l4per clockdomain node name to follow the "clock" node naming with a domain specific compatible property. Compared to omap4, omap5 has more clocks working in hardare autogating mode. Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> |
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Tony Lindgren
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cfcbc2dbb7 |
ARM: dts: Add missing omap4 secure clocks
The secure clocks on omap4 are similar to what we already have for dra7 in dra7_l4sec_clkctrl_regs and documented in the omap4460 TRM "Table 3-1346 L4PER_CM2 Registers Mapping Summary". The secure clocks are part of the l4_per clock manager. As the l4_per clock manager has now two clock domains as children, let's also update the l4_per clockdomain node name to follow the "clock" node naming with a domain specific compatible property. Cc: devicetree@vger.kernel.org Cc: Rob Herring <robh+dt@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com> |
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Greg Kroah-Hartman
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10d3e38c79 |
interconnect patches for 5.6
Here are the interconnect patches for the 5.6-rc1 merge window. - New core helper functions for some common functionalities in drivers. - Improvements in the information exposed via debugfs. - Basic tracepoints support. - New interconnect driver for msm8916 platforms. - Misc fixes. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> -----BEGIN PGP SIGNATURE----- iQIcBAABAgAGBQJeIXe2AAoJEIDQzArG2BZjmToQAMijCGSN8TkzoS1/9w95ML9Q vbth57JAjHRoigpIt2nVP9c/oIAqxprIB+ZsXX6pKUtnRVTJo/gviQEw1UCqMp58 d1v2Yb/b8lyzAbXdiVHbFKjF7pdNRUZDraMZ7HSC3UGD1LIy5cx0YjqwYyWFJEz6 +9Ko3uDYEGqh3HM4Ybl5X5F019tdYY8TrTpajnKnh9yQDh3SAzw5mEDc7PuldAFn jgd0KVx56LRKWpA7SKfCjfsS8h4Ft48yzaUATJdNlcihl09mvNYcJ8ZHrGod/n/B cBKSwdaKwK0/LuGHrEM6I4UmbbfTmiNJ9dImtMwo5XapBG+OFBNhcVukJrW5xINe D3N9hXdUWSnnQyT+sOm8U3cL70PiueKP/CofhEJ4UxBrlckYfPGCZLLTAi4+dfPS T2rTonMGNIBCoqZ7iLDGff8uVQxGfOJkdNfd/UpJ64OLshQIXU+WQfa9PbVzkTly 5opGJlU4X261S3lxxYCKFAP0QGUyDvrzItSMBegcDvUFFwQN06ISMYdXp0VJh3xk vYXV3vokqKJZcU8/YBGlZU8DAlHMxtEETt2B+Ua2tuYMzyHFWd76aQt3q7Id0xRB Dp6FoZROyBMgH00FCAdAK25dhL0M2CiUpSjmgDXprZeMX1YJRz24zR4u+fJOmq5g XZpJM/HIdRlq9pHHEZ/h =5hpf -----END PGP SIGNATURE----- Merge tag 'icc-5.6-rc1' of https://git.linaro.org/people/georgi.djakov/linux into char-misc-next Georgi writes: interconnect patches for 5.6 Here are the interconnect patches for the 5.6-rc1 merge window. - New core helper functions for some common functionalities in drivers. - Improvements in the information exposed via debugfs. - Basic tracepoints support. - New interconnect driver for msm8916 platforms. - Misc fixes. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> * tag 'icc-5.6-rc1' of https://git.linaro.org/people/georgi.djakov/linux: interconnect: qcom: Add MSM8916 interconnect provider driver dt-bindings: interconnect: Add Qualcomm MSM8916 DT bindings interconnect: Check for valid path in icc_set_bw() interconnect: Print the tag in the debugfs summary interconnect: Add interconnect_graph file to debugfs interconnect: qcom: Use the standard aggregate function interconnect: Add a common standard aggregate function interconnect: Add basic tracepoints interconnect: Add a name to struct icc_path interconnect: Move internal structs into a separate file interconnect: qcom: Use the new common helper for node removal interconnect: Add a common helper for removing all nodes |
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Greg Kroah-Hartman
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dd7d99dc68 |
Merge 5.5-rc7 into usb-next
We need the USB fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> |
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Olof Johansson
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684415d0de |
cmdq:
- clean ups of unused code and debuggability - add cmdq_instruction to make the function call interface more readable - add functions for polling and providing info for the user of cmdq scpsys: - add bindings for MT6765 -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAl4cPekXHG1hdHRoaWFz LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH6YDA/+MRYiMb26fu+Ac3pF1SW6ao0A fCI0JH2L8Zj4nklg3Y/hoi2PG7DJL2vaG71Ng3iQxQqKLWJdS1WbF/DBl8JdozQx mJXXZ0JM5cc/gIvrG8PLAauWRTDUIPDC2ZZ66mO4CiR6T7Kp/LpnmZF5ZR4qxu/W KNAYxSeyPJ36WQ3HCmubBWOn4JaetOeBFID6z3roKhsGyFXLmCo0Djw4c0Lpk79t 3qVpo7TcC3hintZSC8ufIjQZA/KU3kwy3pS2O+HKMDb4EwORl14Grd6/cN9rAf0p twprn4Y9Jx4cBy0jGyZShKMbIn6wT6zF8GqpoV71vvXTgknyr8XoaiepnjMd2Enm BXw7R8kUt3w4mHnMwX9aUPAP48S1DVMm0OsbwOOqRcSXyJWnQBFB85LnkKeSfzRW iWfeXQBaESCQziYkJSkXz2D4epV/Rzq/L1y5IrddQuwIlpQ3eeqYUWBDYhuV3VlY K4r/AawG0NKPWTvH0bgLZAiWybnzXPZUvVJzwkdwRBjpiyhsl0FX1oZb1H8Vf6mK yrCUgaTIVp6z0pMd8kaxPTyi2AXryKODOXp+XJ2JFmdLFuBPQMSLCiG+B6sDa2Sw eYMcZpFtL5B/p/NpNuSUlGZ2HXTxknS3RnIDTUJ583BZLeItShHnBW3P/8qjx7Wm 8oGsLh0ZLF0G5iqdeuM= =Q9/6 -----END PGP SIGNATURE----- Merge tag 'v5.5-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into arm/drivers cmdq: - clean ups of unused code and debuggability - add cmdq_instruction to make the function call interface more readable - add functions for polling and providing info for the user of cmdq scpsys: - add bindings for MT6765 * tag 'v5.5-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: dt-bindings: mediatek: add MT6765 power dt-bindings soc: mediatek: cmdq: delete not used define soc: mediatek: cmdq: add cmdq_dev_get_client_reg function soc: mediatek: cmdq: add polling function soc: mediatek: cmdq: define the instruction struct soc: mediatek: cmdq: remove OR opertaion from err return Link: https://lore.kernel.org/r/9b365e76-e346-f813-d750-d7cfd0d16e4e@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net> |
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Eddie James
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5350a237b4 |
dt-bindings: interrupt-controller: Add Aspeed SCU interrupt controller
Document the Aspeed SCU interrupt controller and add an include file for the interrupts it provides. Signed-off-by: Eddie James <eajames@linux.ibm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/1579123790-6894-2-git-send-email-eajames@linux.ibm.com |
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Tony Lindgren
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957ad44ff5 |
clk: ti: add clkctrl data dra7 sgx
This is similar to what we have for omap5 except the gpu_cm address is different, the mux clocks have one more source option, and there's no divider clock. Note that because of the current dts node name dependency for mapping to clock domain, we must still use "gpu-clkctrl@" naming instead of generic "clock@" naming for the node. And because of this, it's probably best to apply the dts node addition together along with the other clock changes. For accessing the GPU, we also need to configure the interconnect target module for GPU similar to what we have for omap5, I'll send that change separately. Cc: Benoit Parrot <bparrot@ti.com> Cc: "H. Nikolaus Schaller" <hns@goldelico.com> Cc: Robert Nelson <robertcnelson@gmail.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Tero Kristo <t-kristo@ti.com> |
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Tony Lindgren
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364975eeb4 |
clk: ti: omap5: Add missing AESS clock
Looks like we're missing AESS clock for omap5. This is similar to what omap4 has. Cc: H. Nikolaus Schaller <hns@goldelico.com> Cc: Matthijs van Duin <matthijsvanduin@gmail.com> Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tero Kristo <t-kristo@ti.com> |
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Benoit Parrot
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7dfd5e619d |
clk: ti: dra7: add vpe clkctrl data
Add clkctrl data for VPE. Signed-off-by: Benoit Parrot <bparrot@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Tero Kristo <t-kristo@ti.com> |
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Benoit Parrot
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7054c14f05 |
clk: ti: dra7: add cam clkctrl data
Add clkctrl data for CAM domain. Signed-off-by: Benoit Parrot <bparrot@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Tero Kristo <t-kristo@ti.com> |
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Peter Ujfalusi
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8e28918a85 |
dt-bindings: clock: Move ti-dra7-atl.h to dt-bindings/clock
Most of the clock related dt-binding header files are located in dt-bindings/clock folder. It would be good to keep all the similar header files at a single location. Suggested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Tero Kristo <t-kristo@ti.com> |
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Jyri Sarha
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8a79db5e83 |
dt-bindings: phy: Add PHY_TYPE_DP definition
Add definition for DisplayPort phy type. Signed-off-by: Jyri Sarha <jsarha@ti.com> Reviewed-by: Roger Quadros <rogerq@ti.com> Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> |
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Olof Johansson
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a0be47376f |
ARM: dts: Amlogic updates for v5.6
- add DDR clock controller - GPU OPP updates -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAl4XcxQACgkQWTcYmtP7 xmVjBhAAqL8rNKURAhAs7TkdgXxv3DGA1BlcMi0Sb/iuwlNBu5AbptO31FY7Jqb1 ZZ/GFRUljj1BHapjzekdMJUpqwQdPOtDKSrlhc65BkkAcgzXkzTlvvNiS/8/hMEC RNrmT+O/YgOys/FpSc2wPdzg6WAgql9vhG0pAlI7gth3tPZxQosLTlzNDJ3yW9+K qhPx5ivF1Q3w6TPnM0Q4eZj4MHnUSeQUDc6aA1b02V1ojt6pqeBkzVFzXyxdxWNs yp3E8tLmNhQ6p2B3kCPTDt2H4jH1wEei1CrsnZFB4WMu80EoWnNi+VjsoBajmlR2 lufMkX623K47NlZiZ7/XQZ0ki5/09TqDJ4W53mPrpebJ7Cmw8sdSz/tMZ7cOveh0 FRa4VCSTiq4BxfdFks4vXPLDX40ucTXHA26jc1Hrrbb7n6uC93i87I5At7U03SY7 r4Lddd/1Rh6du7hLmxAEM5Ul9M5m82GYFYXgNKngsJHUxz/V1/Ym+rSzBFM/csBj U2maAFYvvR8B3WBQfpONIYgUo5gJ8YgxglmboivZM226VgalPzsMtEm467xvROKn xT7knR/pHu9wWL6OxCZGXsEQfjJM3FKn6Z1Fe2VolJpaouULdqBxWfRtnSMUwmgG E/WqojV/8AOZSSqj6/ixQBr2Soaaim/Q2LmM81lBjcJ+bTCtSlA= =CTqX -----END PGP SIGNATURE----- Merge tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into arm/dt ARM: dts: Amlogic updates for v5.6 - add DDR clock controller - GPU OPP updates * tag 'amlogic-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic: ARM: dts: meson8b: use the actual frequency for the GPU's 364MHz OPP ARM: dts: meson8: use the actual frequency for the GPU's 182.1MHz OPP ARM: dts: meson8b: fix the clock controller compatible string ARM: dts: meson8b: add the DDR clock controller ARM: dts: meson8: add the DDR clock controller ARM: dts: meson: provide the XTAL clock using a fixed-clock dt-bindings: clock: meson8b: add the clock inputs dt-bindings: clock: add the Amlogic Meson8 DDR clock controller binding Link: https://lore.kernel.org/r/7hwo9udi7m.fsf@baylibre.com Signed-off-by: Olof Johansson <olof@lixom.net> |
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Olof Johansson
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333505a406 |
Qualcomm driver updates for v5.6
* SCM major refactoring and cleanup * Properly flag active only power domains as active only * Add SC7180 and SM8150 RPMH power domains * Return EPROBE_DEFER from QMI if packet family is not yet available -----BEGIN PGP SIGNATURE----- iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAl4czaUbHGJqb3JuLmFu ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FgKkP/1QC1e9VUQ5xc25A+2g0 5fVbOUkQxHLsPtTuN2GUwlxo5dj/dTnvXrQziQLfSGeAhX8FRNnImH0NCwNt7vmU i8XeRV/+Biv5IXhdM5k7IgT5bIwj3cQbzfswUL9KcCBxceJs8WDhtiu2MxeZh1g2 Gjq5+pRpC8yOC3v8AiFDWINoBduBqJGwucBtIE33/+29RqN4b7hLl4WK75yvp2Ce mpnB0Pl7GcvVeQZNAogUQW1u7kogmq+ByqBhpYXhlhUGw/CYSF2gIdfU6piiEJCz GWYfslABgYcGJGwMu+1RGVxe5+5I21ONUj2t8ichS5kmIZQ1lnavEAeGJ6cM8G3Y kDsQSE5eTfFJ13lX0HXCd6COUS6ZBV0xcoUek+gvzIu94U9l2D/qINf9kX91cPFq OSJlFJG1Yx9rcL1j1ROhDMMvuzr9QYslZZyGTRwVIwXLMQRT3Xzpx4qzATgWme5H vPJ55dMtxAWPk5NqxHurFbDP5nIRPyJ1M7IgjTJQrWp97mXx3+RCKdO6UEeqJu/1 wdp7IwziErNjOAbFgdboFdncFOEvwctwayDOEjb7gZE8WsSCa1LwXWZfXulkaOcC MTYnLZKZJtRJiy8WT/NvIukc60CnjYMj6IV1Vkem6NGSkvglhpRCGrxUuKi76+JR 5vPfeYhJ79KlkTWSr8lhh5VG =IcVk -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers Qualcomm driver updates for v5.6 * SCM major refactoring and cleanup * Properly flag active only power domains as active only * Add SC7180 and SM8150 RPMH power domains * Return EPROBE_DEFER from QMI if packet family is not yet available * tag 'qcom-drivers-for-5.6' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (27 commits) firmware: qcom_scm: Dynamically support SMCCC and legacy conventions firmware: qcom_scm: Remove thin wrappers firmware: qcom_scm: Order functions, definitions by service/command firmware: qcom_scm-32: Add device argument to atomic calls firmware: qcom_scm-32: Create common legacy atomic call firmware: qcom_scm-32: Move SMCCC register filling to qcom_scm_call firmware: qcom_scm-32: Use qcom_scm_desc in non-atomic calls firmware: qcom_scm-32: Add funcnum IDs firmware: qcom_scm-32: Use SMC arch wrappers firmware: qcom_scm-64: Improve SMC convention detection firmware: qcom_scm-64: Move SMC register filling to qcom_scm_call_smccc firmware: qcom_scm-64: Add SCM results struct firmware: qcom_scm-64: Move svc/cmd/owner into qcom_scm_desc firmware: qcom_scm-64: Make SMC macros less magical firmware: qcom_scm: Remove unused qcom_scm_get_version firmware: qcom_scm: Apply consistent naming scheme to command IDs firmware: qcom_scm: Rename macros and structures soc: qcom: rpmhpd: Set 'active_only' for active only power domains firmware: scm: Add stubs for OCMEM and restore_sec_cfg_available dt-bindings: power: rpmpd: Convert rpmpd bindings to yaml ... Link: https://lore.kernel.org/r/20200113204405.GD3325@yoga Signed-off-by: Olof Johansson <olof@lixom.net> |
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Olof Johansson
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e64d0098dd |
dt-bindings: Changes for v5.6-rc1
This contains a conversion of the Tegra124 EMC bindings to json-schema as well as the addition of the bindings for the memory subsystem found on Tegra186 and Tegra194. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAl4ZDFwTHHRyZWRpbmdA bnZpZGlhLmNvbQAKCRDdI6zXfz6zoQf4EACrBQLZaB/icm92vqFk4zt39sdmxTat 7SmBbhe5LdXplMIV5xZY07DscRgl7RHfcxX1Sl6IOo78oKodEhM6USd8juwobq+E GcOVgZ3v+fLTiFIOQcOI3Sa96jq/E+sPzQzgD45foF79xlSox79s5dE4xXjCKG8b mN5zEpZYaIkbOxsLqdKSb4p45XUIVB9YYhRPNNds5j7gEg0UgufnrRLp/r1QPDzS RjMCngFEAs9bat8N2JUJJS9xvQM8KamW/HIwkpBQLujkBfuO+QHqpNrRhe5h2hOn Ui3Y5Lbn4eCvac0nfr9APK0j++BkRKW+2i+2R0YTx8ZqqpDwl4ox4cJDKwtk46Xh KcBkvcvwAQE4NjnEUDBwRRlW446SqfVpnRhTM5y+MHhSG/SyLx4PMydahhsdUNpk eeCVOyiEOQufwBHd4waR+M0tHUqgc1gQ5xdKZ6f5vKhQEGlMcu0L9jlgDNZaOg7L LWFqqzNnRdmdS4plctv67DqbjXBUZ73wxgs2OjUofP+MGUVT2jUjLbW7XmAfl903 5LwXx8mMZIjEnYo84IyylYDC/u8FGT3T4RnFWNuWrjHCz7+qVv+2v3CF6fBFrL// KcZY5m/Kb04dSmQCvW2/2D3LnLGDgg8p3vzUgmBw1VRpfPVvvhY1JFdVBcw9S0iI 6poWBdVfrMEsag== =iPZ2 -----END PGP SIGNATURE----- Merge tag 'tegra-for-5.6-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt dt-bindings: Changes for v5.6-rc1 This contains a conversion of the Tegra124 EMC bindings to json-schema as well as the addition of the bindings for the memory subsystem found on Tegra186 and Tegra194. * tag 'tegra-for-5.6-dt-bindings' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: memory: Add Tegra186 memory subsystem dt-bindings: memory: Add Tegra194 memory controller header dt-bindings: memory: Add Tegra186 memory client IDs dt-bindings: memory-controller: Convert Tegra124 EMC to json-schema Link: https://lore.kernel.org/r/20200111003553.2411874-1-thierry.reding@gmail.com Signed-off-by: Olof Johansson <olof@lixom.net> |
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Anson Huang
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1088691447 |
dt-bindings: imx: Add clock binding doc for i.MX8MP
Add the clock binding doc for i.MX8MP. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Abel Vesa <abel.vesa@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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Mars Cheng
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56f6737167 |
dt-bindings: mediatek: add MT6765 power dt-bindings
This adds power dt-bindings for MT6765 Signed-off-by: Mars Cheng <mars.cheng@mediatek.com> Signed-off-by: Owen Chen <owen.chen@mediatek.com> Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> |
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Sricharan R
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d15b1ff1bd |
clk: qcom: Add DT bindings for ipq6018 gcc clock controller
Add the compatible strings and the include file for ipq6018 gcc clock controller. Co-developed-by: Anusha Canchi Ramachandra Rao <anusharao@codeaurora.org> Signed-off-by: Anusha Canchi Ramachandra Rao <anusharao@codeaurora.org> Co-developed-by: Abhishek Sahu <absahu@codeaurora.org> Signed-off-by: Abhishek Sahu <absahu@codeaurora.org> Co-developed-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Sricharan R <sricharan@codeaurora.org> Link: https://lkml.kernel.org/r/1578557121-423-2-git-send-email-sricharan@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Thierry Reding
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a213f9f1c3 |
dt-bindings: memory: Add Tegra194 memory controller header
This header contains definitions for the memory controller found on NVIDIA Tegra194 SoCs, such as the stream IDs used for the ARM SMMU and the IDs used to identify the various memory clients. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> |
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Thierry Reding
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96b0239bbd |
dt-bindings: memory: Add Tegra186 memory client IDs
Add IDs for the memory clients found on NVIDIA Tegra186 SoCs. This will be used to describe interconnect paths from devices to system memory. Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Rob Herring <robh@kernel.org> |
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Georgi Djakov
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ebb37bd064 |
dt-bindings: interconnect: Add Qualcomm MSM8916 DT bindings
The Qualcomm MSM8916 platform has several bus fabrics that could be controlled and tuned dynamically according to the bandwidth demand. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> |
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Lubomir Rintel
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247aa9e4d2 |
dt-bindings: marvell,mmp2: Add clock ids for the HSIC clocks
There are two USB HSIC controllers on MMP2 and MMP3. Link: https://lore.kernel.org/r/20191220065314.237624-2-lkundrak@v3.sk Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Olof Johansson <olof@lixom.net> |
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Taniya Das
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4cc62ebd0c |
dt-bindings: clock: Introduce SC7180 QCOM Video clock bindings
Add device tree bindings for video clock controller for Qualcomm Technology Inc's SC7180 SoCs. Signed-off-by: Taniya Das <tdas@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lkml.kernel.org/r/1577428714-17766-6-git-send-email-tdas@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Taniya Das
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468e727d18 |
dt-bindings: clock: Introduce SC7180 QCOM Graphics clock bindings
Add device tree bindings for graphics clock controller for Qualcomm Technology Inc's SC7180 SoCs. Signed-off-by: Taniya Das <tdas@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lkml.kernel.org/r/1577428714-17766-3-git-send-email-tdas@codeaurora.org [sboyd@kernel.org: Indicate sc7180 in commit subject] Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Maxime Ripard
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9c232d324b
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clk: sunxi: a23/a33: Export the MIPI PLL
The MIPI PLL is used for LVDS. Make sure it's exported in the dt bindings headers. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> |
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Maxime Ripard
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a655ede064
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clk: sunxi: a31: Export the MIPI PLL
The MIPI PLL is used for LVDS. Make sure it's exported in the dt bindings headers. Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> |
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Vasily Khoruzhick
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a9b5c67178
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clk: sunxi-ng: a64: export CLK_CPUX clock for DVFS
Export CLK_CPUX so we can reference it in CPU node. Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Signed-off-by: Maxime Ripard <maxime@cerno.tech> |
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Chen-Yu Tsai
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b406cadbc8
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clk: sunxi-ng: r40: Export MBUS clock
The MBUS clock needs to be referenced in the MBUS device node. Export it. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime@cerno.tech> |
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Tomer Maimon
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a5df0d4e9d |
dt-bindings: reset: Add binding constants for NPCM7xx reset controller
Add device tree binding constants for Nuvoton BMC NPCM7xx reset controller. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> |
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Taniya Das
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75616da712 |
dt-bindings: clock: Introduce QCOM sc7180 display clock bindings
Add device tree bindings for display clock controller for Qualcomm Technology Inc's SC7180 SoCs. Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lkml.kernel.org/r/1573812245-23827-3-git-send-email-tdas@codeaurora.org Reviewed-by: Rob Herring <robh@kernel.org> [sboyd@kernel.org: Add sc7180 to subject] Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Jeffrey Hugo
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db2c7c0a04 |
clk: qcom: Add missing msm8998 gcc_bimc_gfx_clk
gcc_bimc_gfx_clk is a required clock for booting the GPU and GPU SMMU.
Fixes:
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周琰杰 (Zhou Yanjie)
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b98900548b |
dt-bindings: dmaengine: Add X1830 bindings.
Add the dmaengine bindings for the X1830 Soc from Ingenic. Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> Link: https://lore.kernel.org/r/1576591140-125668-3-git-send-email-zhouyanjie@wanyeetech.com Signed-off-by: Vinod Koul <vkoul@kernel.org> |
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Jeffrey Hugo
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e6494bf65a |
dt-bindings: clock: Add support for the MSM8998 mmcc
Document the multimedia clock controller found on MSM8998. Signed-off-by: Jeffrey Hugo <jhugo@codeaurora.org> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lkml.kernel.org/r/1576596018-10140-1-git-send-email-jhugo@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org> |
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Taniya Das
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c1079b4ec1 |
clk: qcom: dispcc: Add support for display port clocks
SDM845 dispcc supports RCG and CBCRs for display port, so add support for the same. Signed-off-by: Taniya Das <tdas@codeaurora.org> Link: https://lkml.kernel.org/r/20190731182713.8123-3-tdas@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org> |