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5 Commits

Author SHA1 Message Date
Laxman Dewangan 031b77afc3 ARM: DT: tegra114: add pinmux DT entry 
Add DT entry for pinmux and drive configuration addresses.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
 2013-01-29 11:02:15 -07:00
Laxman Dewangan b16f9183c7 ARM: DT: tegra114: add GPIO DT entry 
Tegra114 has the GPIO controllers with 8 GPIO bank and each bank
supports 32 pins.

Add DT entry for GPIO controller. Tegra114 GPIO controller is
compatible with Tegra30 GPIO controller driver.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
 2013-01-29 11:02:14 -07:00
Hiroshi Doyu 2da139657b ARM: tegra: Add SMMU entry to Tegra114 DT 
Add SMMU entry.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
 2013-01-29 11:01:14 -07:00
Hiroshi Doyu 0dfe42edcc ARM: tegra: add AHB entry to Tegra114 DT 
Add AHB entry.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
 2013-01-28 11:57:08 -07:00
Hiroshi Doyu 18a4df7051 ARM: dt: tegra114: Add new SoC base, Tegra114 SoC 
Initial support for Tegra 114 SoC. This is expected to be included in
the board DTS files, Tegra 114 SoC based evaluation board family.

Signed-off-by: Hiroshi Doyu <hdoyu@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
 2013-01-28 11:23:05 -07:00