Commit Graph

1217 Commits

Author SHA1 Message Date
Felipe Balbi 984f66a6f9 usb: dwc3: core: add flag for EP0 direction
Add a flag to keep track of ep0 direction.
This flag will be used on a following patch.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:06 +03:00
Felipe Balbi a6829706ce usb: dwc3: ep0: add handling for unaligned OUT transfers
In case we have transfers which aren't aligned
to wMaxPacketSize, we need to be careful with
how we start the transfer with the HW. OUT
transfers _must_ be aligned with wMaxPacketSize
and in order to guarantee that, we use a bounce
buffer.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:05 +03:00
Felipe Balbi 5812b1c236 usb: dwc3: add a bounce buffer for control endpoints
This core cannot handle OUT transfers which aren't
aligned to wMaxPacketSize, but that can happen at
least on control endpoint with the USB Audio Class.

This patch adds a bounce buffer to be used on the
case of a non-aligned ep0out request is queued.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:04 +03:00
Felipe Balbi dc137f01ac usb: dwc3: core: add defines for XferNotReady event on Control EPs
The status field of the Transfer Not Read event
is different on Control Endpoints. On this patch
we are just adding the defines to be used on a
later patch which will re-work the control endpoint
handling.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:03 +03:00
Felipe Balbi 164f6e141e usb: dwc3: gadget: improve command completion debug message
the previous message had too little meaning. Make
it more human readable and use the macro we already
had for extracting the command completion status out
of DEPCMDn register.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:02 +03:00
Felipe Balbi f198ead21b usb: dwc3: gadget: set request dma to invalid when unmapping
if we don't set DMA address to invalid when unmapping,
we might fall in a situation where request buffer
can't be mapped to DMA again.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:01 +03:00
Felipe Balbi c611ccb48a usb: dwc3: ep0: fix 'transfered' typo
trivial patch. No functional changes.

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:00 +03:00
Felipe Balbi 91db07dcbf usb: dwc3: core: add missing @ for kerneldoc
trivial patch, no functional changes

Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:02:00 +03:00
Dan Carpenter b4f28a98ea usb: dwc3: debugfs: add a kfree() on error to dwc3_testmode_open()
We may as well fix this potential leak so we don't have to listen to
the static checkers complain.

Signed-off-by: Dan Carpenter <error27@gmail.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:01:59 +03:00
Sebastian Andrzej Siewior 0156cf8603 usb: dwc3: gaget: clear DWC3_EP_WILL_SHUTDOWN bit
Without this patch we won't clear that bit and instead will
clear all other bits on our endpoint flag.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:01:57 +03:00
Sebastian Andrzej Siewior 5a18999ebd usb: dwc3: gadget: use TRB type 6 for ISOC transfers
Type 6 should be used for the first transfer during an interval. This is
also what the reference driver is using. Type 7 seems to be for following
or additional transfers within the same interval.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:01:56 +03:00
Sebastian Andrzej Siewior a1ae9be5fc usb: dwc3: gadget: reset resource index to zero
If we collected two requests together (i.e. only the last of them has
LST=1) then we only have to stop transfer once: The clean-up code will
cleanup everything until first TRB with the LST bit set.
After XferComplete this index should be no longer valid since there is
no transfer pending.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:01:55 +03:00
Sebastian Andrzej Siewior 0d2f475853 usb: dwc3: gadget: fixing dequeue of TRBs
A TRB which is dequeued seems to have its HWO bits set to 1. Therefore
we ignore it if we dequeue it after the command is completed.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Felipe Balbi <balbi@ti.com>
2011-09-09 13:01:54 +03:00
Randy Dunlap 096cb25d62 usb: fix dwc3 build when USB_GADGET_DWC3 is not enabled
Fix build error when CONFIG_USB_GADGET_DWC3 is not enabled:

ERROR: "dwc3_send_gadget_ep_cmd" [drivers/usb/dwc3/dwc3.ko] undefined!

Signed-off-by: Randy Dunlap <rdunlap@xenotime.net>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-08-24 15:06:53 -07:00
Kuninori Morimoto 29cc88979a USB: use usb_endpoint_maxp() instead of le16_to_cpu()
Now ${LINUX}/drivers/usb/* can use usb_endpoint_maxp(desc) to get maximum packet size
instead of le16_to_cpu(desc->wMaxPacketSize).
This patch fix it up

Cc: Armin Fuerst <fuerst@in.tum.de>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Johannes Erdfelt <johannes@erdfelt.com>
Cc: Vojtech Pavlik <vojtech@suse.cz>
Cc: Oliver Neukum <oliver@neukum.name>
Cc: David Kubicek <dave@awk.cz>
Cc: Johan Hovold <jhovold@gmail.com>
Cc: Brad Hards <bhards@bigpond.net.au>
Acked-by: Felipe Balbi <balbi@ti.com>
Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Cc: Thomas Dahlmann <dahlmann.thomas@arcor.de>
Cc: David Brownell <david-b@pacbell.net>
Cc: David Lopo <dlopo@chipidea.mips.com>
Cc: Alan Stern <stern@rowland.harvard.edu>
Cc: Michal Nazarewicz <m.nazarewicz@samsung.com>
Cc: Xie Xiaobo <X.Xie@freescale.com>
Cc: Li Yang <leoli@freescale.com>
Cc: Jiang Bo <tanya.jiang@freescale.com>
Cc: Yuan-hsin Chen <yhchen@faraday-tech.com>
Cc: Darius Augulis <augulis.darius@gmail.com>
Cc: Xiaochen Shen <xiaochen.shen@intel.com>
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: OKI SEMICONDUCTOR, <toshiharu-linux@dsn.okisemi.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Cc: Ben Dooks <ben@simtec.co.uk>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Cc: Herbert Pötzl <herbert@13thfloor.at>
Cc: Arnaud Patard <arnaud.patard@rtp-net.org>
Cc: Roman Weissgaerber <weissg@vienna.at>
Acked-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Cc: Tony Olech <tony.olech@elandigitalsystems.com>
Cc: Florian Floe Echtler <echtler@fs.tum.de>
Cc: Christian Lucht <lucht@codemercs.com>
Cc: Juergen Stuber <starblue@sourceforge.net>
Cc: Georges Toth <g.toth@e-biz.lu>
Cc: Bill Ryder <bryder@sgi.com>
Cc: Kuba Ober <kuba@mareimbrium.org>
Cc: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-08-23 09:47:40 -07:00
Stephen Rothwell 46a57283e8 usb: include module.h in the DesignWare USB3 DRD driver
Fixes this build error:

drivers/usb/dwc3/dwc3-pci.c: In function 'dwc3_pci_init':
drivers/usb/dwc3/dwc3-pci.c:211:9: error: 'THIS_MODULE' undeclared (first use in this function)

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-08-23 09:47:40 -07:00
Felipe Balbi 72246da40f usb: Introduce DesignWare USB3 DRD Driver
The DesignWare USB3 is a highly
configurable IP Core which can be
instantiated as Dual-Role Device (DRD),
Peripheral Only and Host Only (XHCI)
configurations.

Several other parameters can be configured
like amount of FIFO space, amount of TX and
RX endpoints, amount of Host Interrupters,
etc.

The current driver has been validated with
a virtual model of version 1.73a of that core
and with an FPGA burned with version 1.83a
of the DRD core. We have support for PCIe
bus, which is used on FPGA prototyping, and
for the OMAP5, more adaptation (or glue)
layers can be easily added and the driver
is half prepared to handle any possible
configuration the HW engineer has chosen
considering we have the information on
one of the GHWPARAMS registers to do
runtime checking of certain features.

More runtime checks can, and should, be added
in order to make this driver even more flexible
with regards to number of endpoints, FIFO sizes,
transfer types, etc.

While this supports only the device side, for
now, we will add support for Host side (xHCI -
see the updated series Sebastian has sent [1])
and OTG after we have it all stabilized.

[1] http://marc.info/?l=linux-usb&m=131341992020339&w=2

Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2011-08-22 16:03:11 -07:00