Commit Graph

168346 Commits

Author SHA1 Message Date
Russell King 4b46d64165 ARM: ensure initial page tables are setup for SMP systems
Mapping the same memory using two different attributes (memory
type, shareability, cacheability) is unpredictable.  During boot,
we encounter a situation when we're updating the kernel's page
tables which can lead to dirty cache lines existing in the cache
which are subsequently missed.  This causes stack corruption,
and therefore a crash.

Therefore, ensure that the shared and cacheability settings
matches the configuration that will be used later; this together
with the restriction in early_cachepolicy() ensures that we won't
create a mismatch during boot.

Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-02 16:59:59 +00:00
Claudio Scordino 6603a4fd51 ARM: 5776/1: Check compiler version and EABI support when adding ARM unwind support.
ARM unwind is known to compile only with EABI and not-buggy compilers.
The problem is not the unwinding information but the -fno-frame-pointer
option added as a result of !CONFIG_FRAME_POINTER.  Now we check the
compiler and raise a #warning in case of wrong compiler.

Signed-off-by: Claudio Scordino <claudio@evidence.eu.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2009-11-02 16:59:45 +00:00
Neil Jones 89933dee5b ASoC: Add support for the WM8727 DAC.
Add support for the Wolfson Microelectronics WM8727 DAC, this is a simple
non-configurable DAC.

Signed-off-by: Neil Jones <neil.jones@imgtec.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2009-11-02 15:24:19 +00:00
Takashi Iwai 8fd6959de1 Merge branch 'fix/hda' into for-linus 2009-11-02 16:18:33 +01:00
Takashi Iwai 01e324b463 Merge branch 'fix/asoc' into for-linus 2009-11-02 16:18:29 +01:00
Eric Van Hensbergen 3e2796a90c 9p: fix readdir corner cases
The patch below also addresses a couple of other corner cases in readdir
seen with a large (e.g. 64k) msize.  I'm not sure what people think of
my co-opting of fid->aux here.  I'd be happy to rework if there's a better
way.

When the size of the user supplied buffer passed to readdir is smaller
than the data returned in one go by the 9P read request, v9fs_dir_readdir()
currently discards extra data so that, on the next call, a 9P read
request will be issued with offset < previous offset + bytes returned,
which voilates the constraint described in paragraph 3 of read(5) description.
This patch preseves the leftover data in fid->aux for use in the next call.

Signed-off-by: Jim Garlick <garlick@llnl.gov>
Signed-off-by: Eric Van Hensbergen <ericvh@gmail.com>
2009-11-02 08:43:45 -06:00
Martin Stava 2511cd0b3b 9p: fix readlink
I do not know if you've looked on the patch, but unfortunately it is
incorrect. A suggested better version is in this email (the old
version didn't work in case the user provided buffer was not long
enough - it incorrectly appended null byte on a position of last char,
and thus broke the contract of the readlink method). However, I'm
still not sure this is 100% correct thing to do, I think readlink is
supposed to return buffer without last null byte in all cases, but we
do return last null byte (even the old version).. on the other hand it
is likely unspecified what is in the remaining part of the buffer, so
null character may be fine there ;):

Signed-off-by: Martin Stava <martin.stava@gmail.com>
Signed-off-by: Eric Van Hensbergen <ericvh@gmail.com>
2009-11-02 08:43:45 -06:00
Martin Stava f91b90993f 9p: fix a small bug in readdir for long directories
Here is a proposed patch for bug in readdir. Listing of dirs with
many files fails without this patch.

Signed-off-by: Martin Stava <martin.stava@gmail.com>
Signed-off-by: Eric Van Hensbergen <ericvh@gmail.com>
2009-11-02 08:43:44 -06:00
Takashi Iwai ad87c64f00 ALSA: hda - Don't check invalid HP pin
alc_automute_pin() might be called even if any HP pin is defined, and
it will result in verbs with NID=0.

This patch adds a check for the validity of HP widget before issuing
any verbs.

Signed-off-by: Takashi Iwai <tiwai@suse.de>
2009-11-02 14:23:15 +01:00
Takashi Iwai 23aebca486 ALSA: dummy - Fix descriptions of pcm_substreams parameter
Now up to 128 substreams are supported.

Reported-by: Adrian Bridgett <adrian@smop.co.uk>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2009-11-02 14:11:55 +01:00
Manuel Lauss 0f83d639d8 ASoC: au1x: convert to platform drivers.
Convert psc-ac97,i2s to platform drivers similar to the davinci ones.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2009-11-02 11:27:07 +00:00
Arnaud Patard 049a31afe1 MIPS: O32: Fix ppoll
sys_ppoll syscall needs to use a compat handler on 64bit kernels with o32
user-space.

Signed-off-by: Arnaud Patard <apatard@mandriva.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:08 +01:00
Wu Zhangjin 55f4e1d4fe MIPS: Oprofile: Rename cpu_type from godson2 to loongson2
Unify the naming method between kernel and the user-space oprofile tool.
Because loongson is used instead of godson in most of the places, we agreed
to use loongson instead, which will simplify future maintenance.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Acked-by: Robert Richter <robert.richter@amd.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:08 +01:00
Manuel Lauss 44f2c586a3 MIPS: Alchemy: Fix hang with high-frequency edge interrupts
The handle_edge_irq() flowhandler disables edge int sources which occur
too fast (i.e. another edge comes in before the irq handler function
had a chance to finish).  Currently, the mask_ack() callback does not
ack the edges in hardware, leading to an endless loop in the flowhandler
where it tries to shut up the irq source.

When I rewrote the alchemy IRQ code  I wrongly assumed the mask_ack()
callback was only used by the level flowhandler, hence it omitted the
(at the time pointless) edge acks.  Turned out I was wrong; so here
is a complete mask_ack implementation for Alchemy IC, which fixes
the above mentioned problem.

Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:08 +01:00
Atsushi Nemoto fcc152f3bf MIPS: TXx9: Fix spi-baseclk value
TXx9 SPI bit rate is calculated by:
	fBR = fSPI / 2 / (n + 1)
	(fSPI is SPI master clock freq, i.e. imbusclk freq.)
So use imbus_clk / 2 as a spi-baseclk.

Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:07 +01:00
Florian Fainelli 2b5b9b786c MIPS: bcm63xx: Set the correct BCM3302 CPU name
For consistency with other BCM63xx SoC set the CPU name to "Broadcom
BCM6338" when actually running on that system.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:07 +01:00
Zhang Le e8d4c342e5 MIPS: Loongson 2: Set cpu_has_dc_aliases and cpu_icache_snoops_remote_store
Loongson 2 does not have dcache aliases when is using 16k pages. and the

And because Loongson 2 doesn't do SMP , cpu_icache_snoops_remote_store does
not matter here.

Signed-off-by: Zhang Le <r0bertz@gentoo.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:07 +01:00
Ralf Baechle c2ea1d56ea MIPS: Avoid potential hazard on Context register
set_saved_sp reads Context register. Avoid reading stale value from
earlier incomplete write.

Issue found and fixed for head.S by Chris Dearman <chris@mips.com>.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:07 +01:00
David Daney cd847b7857 MIPS: Octeon: Use lockless interrupt controller operations when possible.
Some newer Octeon chips have registers that allow lockless operation of
the interrupt controller.  Take advantage of them.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:07 +01:00
David Daney b6b74d5490 MIPS: Octeon: Use write_{un,}lock_irq{restore,save} to set irq affinity
Since the locks are used from interrupt context we need the
irqsave/irqrestore versions of the locking functions.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:07 +01:00
Ralf Baechle 0db2b74e91 MIPS: Set S-cache linesize to 64-bytes for MTI's S-cache
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:06 +01:00
Jaidev Patwardhan 2e41f91d9e MIPS: SMTC: Avoid queing multiple reschedule IPIs
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:06 +01:00
Jaidev Patwardhan 05cf20790b MIPS: GCMP: Avoid accessing registers when they are not present
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:06 +01:00
Chris Dearman 7098f74828 MIPS: GIC: Random fixes and enhancements.
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:06 +01:00
Chris Dearman 2ee0a42961 MIPS: CMP: Fix memory barriers for correct operation of amon_cpu_start
Signed-off-by: Chris Dearman (chris@mips.com)
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:05 +01:00
Nigel Stephens cea2be4443 MIPS: Fix abs.[sd] and neg.[sd] emulation for NaN operands
This patch ensures that the sign bit is always updated for NaN operands.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:05 +01:00
Chris Dearman a074f0e89f MIPS: SPRAM: Clean up support code a little
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:05 +01:00
Ralf Baechle a4e7cac18f MIPS: 1004K: Enable SPRAM support.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:04 +01:00
Ralf Baechle a951f2829a MIPS: Malta: Enable PCI 2.1 compatibility in PIIX4
Based on original patch by Chris Dearman <chris@mips.com>.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:04 +01:00
Ralf Baechle c708875551 MIPS: Kconfig: Fix duplicate default value for MIPS_L1_CACHE_SHIFT.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:04 +01:00
Chris Dearman accfd35a4e MIPS: MTI: Fix accesses to device registers on MIPS boards
This fixes the remaining problems introduced by
f197465384 (incorrect access length &
byteswapping in bigendian mode)

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:04 +01:00
Kevin Cernekee 0f334a3e8c MIPS: Fix machine check exception in kmap_coherent()
On an SMP system with cache aliases, the following sequence of events may
happen:

1) copy_user_highpage() runs on CPU0, invoking kmap_coherent() to create a
   temporary mapping in the fixmap region
2) copy_page() starts on CPU0
3) CPU1 sends CPU0 an IPI asking CPU0 to run local_r4k_flush_cache_page()
4) CPU0 takes the interrupt, interrupting copy_page()
5) local_r4k_flush_cache_page() on CPU0 calls kmap_coherent() again
6) The second invocation of kmap_coherent() on CPU0 tries to use the
   same fixmap virtual address that was being used by copy_user_highpage()
7) CPU0 throws a machine check exception for the TLB address conflict

Fixed by creating an extra set of fixmap entries for use in interrupt
handlers.  This prevents fixmap VA conflicts between copy_user_highpage()
running in user context, and local_r4k_flush_cache_page() invoked from an
SMP IPI.

Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:04 +01:00
Ralf Baechle 39d2211d20 MIPS: MTX-1: Fix build if CONFIG_PCI is disabled.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:04 +01:00
Florian Fainelli 72838a1703 MIPS: AR7: register watchdog device only if enabled in hw configuration
This patch checks if the watchdog enable bit is set in the DCL register
meaning that the hardware watchdog actually works and if so, register the
ar7_wdt platform_device.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:03 +01:00
Florian Fainelli 2cfac7f7f2 MIPS: BCM63xx: Prepare for watchdog support
This patch prepares the board code to register a bcm63xx_wdt
platform_device that we are going to use in a subsequent patch.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:03 +01:00
Florian Fainelli 6c1e7a5ad9 MIPS: BCM63xx: Make bcm63xx_uart_register an initfunc
This patch removes the calls to bcm63xx_uart_register in board_bcm963xx.c
and make bcm63xx_uart_register an initfunc.  Allows us to remove
bcm63xx_dev_uart.h which was there to make checkpatch.pl happy.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:03 +01:00
Florian Fainelli e85843a1e1 MIPS: AU1000: Fix build failure for db1x00 configured for Au1100 SoC
This patch fixes the following warning, which becomes an error due to
-Werror to be turned on:
  CC      arch/mips/alchemy/common/gpiolib-au1000.o
cc1: warnings being treated as errors
arch/mips/alchemy/common/gpiolib-au1000.c: In function 'au1100_gpio2_to_irq':
/home/florian/dev/kernel/linux-queue/arch/mips/include/asm/mach-au1x00/gpio-au1000.h:107: warning: control reaches end of non-void function

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:03 +01:00
Florian Fainelli e85d59df13 MIPS: BCM63xx: Fix soft-reset lockup on BCM6345
This patch fixes a lockup on BCM6345 where setting the PLL soft reset bit
will also lock the other blocks including UART.  Instead of setting only
the PLL soft reset bit in the software reset register, set this bit but do
not touch the others.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:03 +01:00
Ralf Roesch a2e62f3a85 MIPS: TXx9: Fix error handling / Fix for noenexisting gpio_remove.
Error was introduced by commit 0385d1f3d394c6814be0b165c153fc3fc254469a.

Signed-off-by: Ralf Roesch <ralf.roesch@rw-gmbh.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:02 +01:00
Wu Zhangjin c49e38c1a5 MIPS: Add IRQF_TIMER flag for timer interrupts
As the commit 3ee4c147 shows, we need to "Add IRQF_TIMER flag for timer
interrupts", Atsushi Nemoto have reported that some other timer interrupts
should be considered, Here it is.

Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:02 +01:00
Wu Zhangjin 80b8585b07 MIPS: 64-bit: Fix o32 lookup_dcookie syscall
An o32 aplication passes a 64-bit value in a pair of registers; a 64-bit
kernel expects a 64-bit argument in a single register.

Signed-off-by: Chen Jie <chenj@lemote.com>
Signed-off-by: Hu Hongbing <huhb@lemote.com>
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:02 +01:00
Ralf Baechle a22d621c80 MIPS: VPE: Remove stray unlock_kernel.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Reported-by: Josip Rodin <joy@entuzijast.net>
2009-11-02 12:00:02 +01:00
Wu Zhangjin f45e518361 MIPS: Add IRQF_TIMER flag for timer interrupts
Along the lines of d6c585a434, add IRQF_TIMER
flag for all timer interrupts  This ensures that timer interrupts won't be
disabled on suspend and not threaded for PREEMPT_RT.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:02 +01:00
Wu Zhangjin b40bb20e74 MIPS: Loongson: Remove redundant local_irq_disable()
That code is executed with irq disabled already, so, remove the redundant
local_irq_disable() here.

Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:02 +01:00
Ralf Baechle 01a6fbf759 MIPS: IP27: Fix build
Broken by 182a85f8a1.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:01 +01:00
Ralf Baechle 962a9dd47e MIPS: Cleanup CONFIG_DEBUG_STACK_USAGE version of alloc_thread_info.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:01 +01:00
David Daney 067f3290f7 MIPS: Octeon: Fix compile error in arch/mips/cavium-octeon/smp.c
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:01 +01:00
Ralf Baechle d30cecbcbe MIPS: Don't write ones to reserved entryhi bits.
We've silently been relying on the hardware chopping off excess, reserved
ASID bits for no better reason that it saving an instruction.  Because we
already have:

#define cpu_asid(cpu, mm)       (cpu_context((cpu), (mm)) & ASID_MASK)

in <asm/mmu_context.h>.

We can use a cleanup to avoid writing non-zero bits into the reserved
entryhi bits.  This avoid triggering some debugging assertion in the
Cavium simulator.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:01 +01:00
Ralf Baechle 22242681cf MIPS: Extend COMMAND_LINE_SIZE
Some firmware may pass well over 256 bytes these days.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2009-11-02 12:00:01 +01:00
Dominik Brodowski 0d488234fd ALSA: pcmcia: use dynamic debug infrastructure, deprecate CS_CHECK (sound)
Convert PCMCIA drivers to use the dynamic debug infrastructure, instead of
requiring manual settings of PCMCIA_DEBUG.

Also, remove all usages of the CS_CHECK macro and replace them with proper
Linux style calling and return value checking. The extra error reporting may
be dropped, as the PCMCIA core already complains about any (non-driver-author)
errors.

Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2009-11-02 11:41:41 +01:00