Commit Graph

12 Commits

Author SHA1 Message Date
Dinh Nguyen 4d3e72b119 ARM: dts: socfpga: set desired i2c clock on Cyclone5 and Arria5 devkits
The I2C LCD display on the Cyclone5 and Arria5 devkits is only capable of
the standard 100 kHz clock. Set the "clock-frequency" of the I2C node
to be 100000.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-01-04 18:11:51 -06:00
Dinh Nguyen 55b0f44cc2 ARM: dts: socfpga: enable GPIO and LEDs for Cyclone5 and Arria5 devkits
Enable all the GPIO ports and define the GPIO-based leds on the Cyclone5 and
Arria5 devkits.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2017-01-04 18:09:07 -06:00
Dinh Nguyen 47d5c5ffa3 ARM: dts: socfpga: Enable QSPI on the Arria5 devkit
Enable the QSPI node and add the flash chip.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2016-11-08 15:40:36 -06:00
Marek Vasut 91f69147d6 ARM: socfpga: dts: Enable MMC support at correct place in the DT
The socfpga.dtsi explicitly enabled MMC support, but not all boards are
equiped with an MMC card. There are setups which only have QSPI NOR.
Therefore, disable the MMC support on socfpga.dtsi level and enable it
on per-board basis.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Alan Tull <atull@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Olof Johansson <olof@lixom.net>
Cc: Thor Thayer <tthayer@altera.com>
Cc: Vince Bridgers <vbridgers2013@gmail.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-12-21 00:44:21 -06:00
Dinh Nguyen efc1985c8f ARM: dts: socfpga: use stdout-path for chosen node
Use stdout-path dts property for kernel console.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2015-07-20 10:07:50 -05:00
Dinh Nguyen efb4a44e24 ARM: dts: socfpga: Add a 3.3V fixed regulator node
Without the 3.3V regulator node, the SDMMC driver will give these warnings:

dw_mmc ff704000.dwmmc0: No vmmc regulator found
dw_mmc ff704000.dwmmc0: No vqmmc regulator found

This patch adds the regulator node, and points the SD/MMC to the regulator.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
---
v3: Rename nodes to have schematic-name_regulator and remove "boot-on" and
    "always-on"
v2: Move the regulator nodes to their respective board dts file and
    correctly rename them to match the schematic
2014-10-22 21:00:19 -05:00
Dinh Nguyen 6314b31873 ARM: dts: socfpga: remove extra alias in the ArriaV devkit
commit [2755e187 dts: socfpga: Add DTS entry for adding the stmmac glue
layer for stmmac.] added an extra ethernet alias in the ArriaV devkit
board file. This patch removes it.

Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
2014-09-04 10:15:50 -05:00
Dinh Nguyen 1403250b6b ARM: socfpga: dts: Add DTS entries for USB
Update all the SOCFPGA DTS files with USB entries.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-05 22:33:16 -05:00
Dinh Nguyen 58303f1f96 ARM: socfpga: dts: add eeprom and rtc on i2c0
The Altera Cyclone5 and Arria5 devkit has an EEPROM and a RTC on the
board. This patch adds support for them.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
---
v2: Remove LCD as the driver has not been upstreamed.
2014-05-05 22:33:15 -05:00
Steffen Trumtrar 7da9b436d8 ARM: socfpga: dts: convert to preprocessor includes
Convert all socfpga DT files to the dtc preprocessor include syntax.
This allows to include header files in the devicetrees like other
SoC-types already do.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
2014-05-05 22:33:14 -05:00
Dinh Nguyen 2755e18748 dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac.
This patch adds the dts bindings documenation for the Altera SOCFPGA glue
layer for the Synopsys STMMAC ethernet driver.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-03-29 01:11:46 +01:00
Dinh Nguyen 163a036468 dts: socfpga: Add support for Altera's SOCFPGA Arria V board
Add support for a new SOCFPGA board that has an Arria V FPGA along with
dual ARM Cortex-A9 cores.

Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Cc: Pavel Machek <pavel@denx.de>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Cc: devicetree@vger.kernel.org
CC: linux-arm-kernel@lists.infradead.org
2013-10-09 16:58:31 -05:00