mirror of https://gitee.com/openkylin/linux.git
163 Commits
| Author | SHA1 | Message | Date |
|---|---|---|---|
Linus Torvalds
|
92a578b064 |
ACPI and power management updates for 3.19-rc1
This time we have some more new material than we used to have during
the last couple of development cycles.
The most important part of it to me is the introduction of a unified
interface for accessing device properties provided by platform
firmware. It works with Device Trees and ACPI in a uniform way and
drivers using it need not worry about where the properties come
from as long as the platform firmware (either DT or ACPI) makes
them available. It covers both devices and "bare" device node
objects without struct device representation as that turns out to
be necessary in some cases. This has been in the works for quite
a few months (and development cycles) and has been approved by
all of the relevant maintainers.
On top of that, some drivers are switched over to the new interface
(at25, leds-gpio, gpio_keys_polled) and some additional changes are
made to the core GPIO subsystem to allow device drivers to manipulate
GPIOs in the "canonical" way on platforms that provide GPIO information
in their ACPI tables, but don't assign names to GPIO lines (in which
case the driver needs to do that on the basis of what it knows about
the device in question). That also has been approved by the GPIO
core maintainers and the rfkill driver is now going to use it.
Second is support for hardware P-states in the intel_pstate driver.
It uses CPUID to detect whether or not the feature is supported by
the processor in which case it will be enabled by default. However,
it can be disabled entirely from the kernel command line if necessary.
Next is support for a platform firmware interface based on ACPI
operation regions used by the PMIC (Power Management Integrated
Circuit) chips on the Intel Baytrail-T and Baytrail-T-CR platforms.
That interface is used for manipulating power resources and for
thermal management: sensor temperature reporting, trip point setting
and so on.
Also the ACPI core is now going to support the _DEP configuration
information in a limited way. Basically, _DEP it supposed to reflect
off-the-hierarchy dependencies between devices which may be very
indirect, like when AML for one device accesses locations in an
operation region handled by another device's driver (usually, the
device depended on this way is a serial bus or GPIO controller).
The support added this time is sufficient to make the ACPI battery
driver work on Asus T100A, but it is general enough to be able to
cover some other use cases in the future.
Finally, we have a new cpufreq driver for the Loongson1B processor.
In addition to the above, there are fixes and cleanups all over the
place as usual and a traditional ACPICA update to a recent upstream
release.
As far as the fixes go, the ACPI LPSS (Low-power Subsystem) driver
for Intel platforms should be able to handle power management of
the DMA engine correctly, the cpufreq-dt driver should interact
with the thermal subsystem in a better way and the ACPI backlight
driver should handle some more corner cases, among other things.
On top of the ACPICA update there are fixes for race conditions
in the ACPICA's interrupt handling code which might lead to some
random and strange looking failures on some systems.
In the cleanups department the most visible part is the series
of commits targeted at getting rid of the CONFIG_PM_RUNTIME
configuration option. That was triggered by a discussion
regarding the generic power domains code during which we realized
that trying to support certain combinations of PM config options
was painful and not really worth it, because nobody would use them
in production anyway. For this reason, we decided to make
CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and that lead to the
conclusion that the latter became redundant and CONFIG_PM could
be used instead of it. The material here makes that replacement
in a major part of the tree, but there will be at least one more
batch of that in the second part of the merge window.
Specifics:
- Support for retrieving device properties information from ACPI
_DSD device configuration objects and a unified device properties
interface for device drivers (and subsystems) on top of that.
As stated above, this works with Device Trees and ACPI and allows
device drivers to be written in a platform firmware (DT or ACPI)
agnostic way. The at25, leds-gpio and gpio_keys_polled drivers
are now going to use this new interface and the GPIO subsystem
is additionally modified to allow device drivers to assign names
to GPIO resources returned by ACPI _CRS objects (in case _DSD is
not present or does not provide the expected data). The changes
in this set are mostly from Mika Westerberg, Rafael J Wysocki,
Aaron Lu, and Darren Hart with some fixes from others (Fabio Estevam,
Geert Uytterhoeven).
- Support for Hardware Managed Performance States (HWP) as described
in Volume 3, section 14.4, of the Intel SDM in the intel_pstate
driver. CPUID is used to detect whether or not the feature is
supported by the processor. If supported, it will be enabled
automatically unless the intel_pstate=no_hwp switch is present in
the kernel command line. From Dirk Brandewie.
- New Intel Broadwell-H ID for intel_pstate (Dirk Brandewie).
- Support for firmware interface based on ACPI operation regions
used by the PMIC chips on the Intel Baytrail-T and Baytrail-T-CR
platforms for power resource control and thermal management
(Aaron Lu).
- Limited support for retrieving off-the-hierarchy dependencies
between devices from ACPI _DEP device configuration objects
and deferred probing support for the ACPI battery driver based
on the _DEP information to make that driver work on Asus T100A
(Lan Tianyu).
- New cpufreq driver for the Loongson1B processor (Kelvin Cheung).
- ACPICA update to upstream revision 20141107 which only affects
tools (Bob Moore).
- Fixes for race conditions in the ACPICA's interrupt handling
code and in the ACPI code related to system suspend and resume
(Lv Zheng and Rafael J Wysocki).
- ACPI core fix for an RCU-related issue in the ioremap() regions
management code that slowed down significantly after CPUs had
been allowed to enter idle states even if they'd had RCU callbakcs
queued and triggered some problems in certain proprietary graphics
driver (and elsewhere). The fix replaces synchronize_rcu() in
that code with synchronize_rcu_expedited() which makes the issue
go away. From Konstantin Khlebnikov.
- ACPI LPSS (Low-Power Subsystem) driver fix to handle power
management of the DMA engine included into the LPSS correctly.
The problem is that the DMA engine doesn't have ACPI PM support
of its own and it simply is turned off when the last LPSS device
having ACPI PM support goes into D3cold. To work around that,
the PM domain used by the ACPI LPSS driver is redesigned so at
least one device with ACPI PM support will be on as long as the
DMA engine is in use. From Andy Shevchenko.
- ACPI backlight driver fix to avoid using it on "Win8-compatible"
systems where it doesn't work and where it was used by default by
mistake (Aaron Lu).
- Assorted minor ACPI core fixes and cleanups from Tomasz Nowicki,
Sudeep Holla, Huang Rui, Hanjun Guo, Fabian Frederick, and
Ashwin Chaugule (mostly related to the upcoming ARM64 support).
- Intel RAPL (Running Average Power Limit) power capping driver
fixes and improvements including new processor IDs (Jacob Pan).
- Generic power domains modification to power up domains after
attaching devices to them to meet the expectations of device
drivers and bus types assuming devices to be accessible at
probe time (Ulf Hansson).
- Preliminary support for controlling device clocks from the
generic power domains core code and modifications of the
ARM/shmobile platform to use that feature (Ulf Hansson).
- Assorted minor fixes and cleanups of the generic power
domains core code (Ulf Hansson, Geert Uytterhoeven).
- Assorted minor fixes and cleanups of the device clocks control
code in the PM core (Geert Uytterhoeven, Grygorii Strashko).
- Consolidation of device power management Kconfig options by making
CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and removing the latter
which is now redundant (Rafael J Wysocki and Kevin Hilman). That
is the first batch of the changes needed for this purpose.
- Core device runtime power management support code cleanup related
to the execution of callbacks (Andrzej Hajda).
- cpuidle ARM support improvements (Lorenzo Pieralisi).
- cpuidle cleanup related to the CPUIDLE_FLAG_TIME_VALID flag and
a new MAINTAINERS entry for ARM Exynos cpuidle (Daniel Lezcano and
Bartlomiej Zolnierkiewicz).
- New cpufreq driver callback (->ready) to be executed when the
cpufreq core is ready to use a given policy object and cpufreq-dt
driver modification to use that callback for cooling device
registration (Viresh Kumar).
- cpufreq core fixes and cleanups (Viresh Kumar, Vince Hsu,
James Geboski, Tomeu Vizoso).
- Assorted fixes and cleanups in the cpufreq-pcc, intel_pstate,
cpufreq-dt, pxa2xx cpufreq drivers (Lenny Szubowicz, Ethan Zhao,
Stefan Wahren, Petr Cvek).
- OPP (Operating Performance Points) framework modification to
allow OPPs to be removed too and update of a few cpufreq drivers
(cpufreq-dt, exynos5440, imx6q, cpufreq) to remove OPPs (added
during initialization) on driver removal (Viresh Kumar).
- Hibernation core fixes and cleanups (Tina Ruchandani and
Markus Elfring).
- PM Kconfig fix related to CPU power management (Pankaj Dubey).
- cpupower tool fix (Prarit Bhargava).
/
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Merge tag 'pm+acpi-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull ACPI and power management updates from Rafael Wysocki:
"This time we have some more new material than we used to have during
the last couple of development cycles.
The most important part of it to me is the introduction of a unified
interface for accessing device properties provided by platform
firmware. It works with Device Trees and ACPI in a uniform way and
drivers using it need not worry about where the properties come from
as long as the platform firmware (either DT or ACPI) makes them
available. It covers both devices and "bare" device node objects
without struct device representation as that turns out to be necessary
in some cases. This has been in the works for quite a few months (and
development cycles) and has been approved by all of the relevant
maintainers.
On top of that, some drivers are switched over to the new interface
(at25, leds-gpio, gpio_keys_polled) and some additional changes are
made to the core GPIO subsystem to allow device drivers to manipulate
GPIOs in the "canonical" way on platforms that provide GPIO
information in their ACPI tables, but don't assign names to GPIO lines
(in which case the driver needs to do that on the basis of what it
knows about the device in question). That also has been approved by
the GPIO core maintainers and the rfkill driver is now going to use
it.
Second is support for hardware P-states in the intel_pstate driver.
It uses CPUID to detect whether or not the feature is supported by the
processor in which case it will be enabled by default. However, it
can be disabled entirely from the kernel command line if necessary.
Next is support for a platform firmware interface based on ACPI
operation regions used by the PMIC (Power Management Integrated
Circuit) chips on the Intel Baytrail-T and Baytrail-T-CR platforms.
That interface is used for manipulating power resources and for
thermal management: sensor temperature reporting, trip point setting
and so on.
Also the ACPI core is now going to support the _DEP configuration
information in a limited way. Basically, _DEP it supposed to reflect
off-the-hierarchy dependencies between devices which may be very
indirect, like when AML for one device accesses locations in an
operation region handled by another device's driver (usually, the
device depended on this way is a serial bus or GPIO controller). The
support added this time is sufficient to make the ACPI battery driver
work on Asus T100A, but it is general enough to be able to cover some
other use cases in the future.
Finally, we have a new cpufreq driver for the Loongson1B processor.
In addition to the above, there are fixes and cleanups all over the
place as usual and a traditional ACPICA update to a recent upstream
release.
As far as the fixes go, the ACPI LPSS (Low-power Subsystem) driver for
Intel platforms should be able to handle power management of the DMA
engine correctly, the cpufreq-dt driver should interact with the
thermal subsystem in a better way and the ACPI backlight driver should
handle some more corner cases, among other things.
On top of the ACPICA update there are fixes for race conditions in the
ACPICA's interrupt handling code which might lead to some random and
strange looking failures on some systems.
In the cleanups department the most visible part is the series of
commits targeted at getting rid of the CONFIG_PM_RUNTIME configuration
option. That was triggered by a discussion regarding the generic
power domains code during which we realized that trying to support
certain combinations of PM config options was painful and not really
worth it, because nobody would use them in production anyway. For
this reason, we decided to make CONFIG_PM_SLEEP select
CONFIG_PM_RUNTIME and that lead to the conclusion that the latter
became redundant and CONFIG_PM could be used instead of it. The
material here makes that replacement in a major part of the tree, but
there will be at least one more batch of that in the second part of
the merge window.
Specifics:
- Support for retrieving device properties information from ACPI _DSD
device configuration objects and a unified device properties
interface for device drivers (and subsystems) on top of that. As
stated above, this works with Device Trees and ACPI and allows
device drivers to be written in a platform firmware (DT or ACPI)
agnostic way. The at25, leds-gpio and gpio_keys_polled drivers are
now going to use this new interface and the GPIO subsystem is
additionally modified to allow device drivers to assign names to
GPIO resources returned by ACPI _CRS objects (in case _DSD is not
present or does not provide the expected data). The changes in
this set are mostly from Mika Westerberg, Rafael J Wysocki, Aaron
Lu, and Darren Hart with some fixes from others (Fabio Estevam,
Geert Uytterhoeven).
- Support for Hardware Managed Performance States (HWP) as described
in Volume 3, section 14.4, of the Intel SDM in the intel_pstate
driver. CPUID is used to detect whether or not the feature is
supported by the processor. If supported, it will be enabled
automatically unless the intel_pstate=no_hwp switch is present in
the kernel command line. From Dirk Brandewie.
- New Intel Broadwell-H ID for intel_pstate (Dirk Brandewie).
- Support for firmware interface based on ACPI operation regions used
by the PMIC chips on the Intel Baytrail-T and Baytrail-T-CR
platforms for power resource control and thermal management (Aaron
Lu).
- Limited support for retrieving off-the-hierarchy dependencies
between devices from ACPI _DEP device configuration objects and
deferred probing support for the ACPI battery driver based on the
_DEP information to make that driver work on Asus T100A (Lan
Tianyu).
- New cpufreq driver for the Loongson1B processor (Kelvin Cheung).
- ACPICA update to upstream revision 20141107 which only affects
tools (Bob Moore).
- Fixes for race conditions in the ACPICA's interrupt handling code
and in the ACPI code related to system suspend and resume (Lv Zheng
and Rafael J Wysocki).
- ACPI core fix for an RCU-related issue in the ioremap() regions
management code that slowed down significantly after CPUs had been
allowed to enter idle states even if they'd had RCU callbakcs
queued and triggered some problems in certain proprietary graphics
driver (and elsewhere). The fix replaces synchronize_rcu() in that
code with synchronize_rcu_expedited() which makes the issue go
away. From Konstantin Khlebnikov.
- ACPI LPSS (Low-Power Subsystem) driver fix to handle power
management of the DMA engine included into the LPSS correctly. The
problem is that the DMA engine doesn't have ACPI PM support of its
own and it simply is turned off when the last LPSS device having
ACPI PM support goes into D3cold. To work around that, the PM
domain used by the ACPI LPSS driver is redesigned so at least one
device with ACPI PM support will be on as long as the DMA engine is
in use. From Andy Shevchenko.
- ACPI backlight driver fix to avoid using it on "Win8-compatible"
systems where it doesn't work and where it was used by default by
mistake (Aaron Lu).
- Assorted minor ACPI core fixes and cleanups from Tomasz Nowicki,
Sudeep Holla, Huang Rui, Hanjun Guo, Fabian Frederick, and Ashwin
Chaugule (mostly related to the upcoming ARM64 support).
- Intel RAPL (Running Average Power Limit) power capping driver fixes
and improvements including new processor IDs (Jacob Pan).
- Generic power domains modification to power up domains after
attaching devices to them to meet the expectations of device
drivers and bus types assuming devices to be accessible at probe
time (Ulf Hansson).
- Preliminary support for controlling device clocks from the generic
power domains core code and modifications of the ARM/shmobile
platform to use that feature (Ulf Hansson).
- Assorted minor fixes and cleanups of the generic power domains core
code (Ulf Hansson, Geert Uytterhoeven).
- Assorted minor fixes and cleanups of the device clocks control code
in the PM core (Geert Uytterhoeven, Grygorii Strashko).
- Consolidation of device power management Kconfig options by making
CONFIG_PM_SLEEP select CONFIG_PM_RUNTIME and removing the latter
which is now redundant (Rafael J Wysocki and Kevin Hilman). That
is the first batch of the changes needed for this purpose.
- Core device runtime power management support code cleanup related
to the execution of callbacks (Andrzej Hajda).
- cpuidle ARM support improvements (Lorenzo Pieralisi).
- cpuidle cleanup related to the CPUIDLE_FLAG_TIME_VALID flag and a
new MAINTAINERS entry for ARM Exynos cpuidle (Daniel Lezcano and
Bartlomiej Zolnierkiewicz).
- New cpufreq driver callback (->ready) to be executed when the
cpufreq core is ready to use a given policy object and cpufreq-dt
driver modification to use that callback for cooling device
registration (Viresh Kumar).
- cpufreq core fixes and cleanups (Viresh Kumar, Vince Hsu, James
Geboski, Tomeu Vizoso).
- Assorted fixes and cleanups in the cpufreq-pcc, intel_pstate,
cpufreq-dt, pxa2xx cpufreq drivers (Lenny Szubowicz, Ethan Zhao,
Stefan Wahren, Petr Cvek).
- OPP (Operating Performance Points) framework modification to allow
OPPs to be removed too and update of a few cpufreq drivers
(cpufreq-dt, exynos5440, imx6q, cpufreq) to remove OPPs (added
during initialization) on driver removal (Viresh Kumar).
- Hibernation core fixes and cleanups (Tina Ruchandani and Markus
Elfring).
- PM Kconfig fix related to CPU power management (Pankaj Dubey).
- cpupower tool fix (Prarit Bhargava)"
* tag 'pm+acpi-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (120 commits)
i2c-omap / PM: Drop CONFIG_PM_RUNTIME from i2c-omap.c
dmaengine / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
tools: cpupower: fix return checks for sysfs_get_idlestate_count()
drivers: sh / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
e1000e / igb / PM: Eliminate CONFIG_PM_RUNTIME
MMC / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
MFD / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
misc / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
media / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
input / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
leds: leds-gpio: Fix multiple instances registration without 'label' property
iio / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
hsi / OMAP / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
i2c-hid / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
drm / exynos / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
gpio / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
hwrandom / exynos / PM: Use CONFIG_PM in #ifdef
block / PM: Replace CONFIG_PM_RUNTIME with CONFIG_PM
USB / PM: Drop CONFIG_PM_RUNTIME from the USB core
PM: Merge the SET*_RUNTIME_PM_OPS() macros
...
|
|
|
Rafael J. Wysocki
|
d3eaf5875e |
Merge branch 'device-properties'
* device-properties: leds: leds-gpio: Fix multiple instances registration without 'label' property leds: leds-gpio: Fix legacy GPIO number case ACPI / property: Drop size_prop from acpi_dev_get_property_reference() leds: leds-gpio: Convert gpio_blink_set() to use GPIO descriptors ACPI / GPIO: Document ACPI GPIO mappings API net: rfkill: gpio: Add default GPIO driver mappings for ACPI ACPI / GPIO: Driver GPIO mappings for ACPI GPIOs input: gpio_keys_polled: Make use of device property API leds: leds-gpio: Make use of device property API gpio: Support for unified device properties interface Driver core: Unified interface for firmware node properties input: gpio_keys_polled: Add support for GPIO descriptors leds: leds-gpio: Add support for GPIO descriptors gpio: sch: Consolidate core and resume banks gpio / ACPI: Add support for _DSD device properties misc: at25: Make use of device property API ACPI: Allow drivers to match using Device Tree compatible property Driver core: Unified device properties interface for platform firmware ACPI: Add support for device specific properties |
|
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Gregory CLEMENT
|
2f90bce7ff |
ARM: orion: convert the irq_reg_{readl,writel} calls to the new API
The commit "genirq: Generic chip: Change irq_reg_{readl,writel}
arguments" modified the API. In the same tome the
arch/arm/plat-orion/gpio.c file received a fix with the use of the old
API: "ARM: orion: Fix for certain sequence of request_irq can cause
irq storm". This commit fixes the use of the API.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Olof Johansson <olof@lixom.net>
Link: https://lkml.kernel.org/r/1416928752-24529-1-git-send-email-gregory.clement@free-electrons.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
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Mika Westerberg
|
c673a2b400 |
leds: leds-gpio: Convert gpio_blink_set() to use GPIO descriptors
Commit 21f2aae91e902aad ("leds: leds-gpio: Add support for GPIO
descriptors") already converted most of the driver to use GPIO descriptors.
What is still missing is the platform specific hook gpio_blink_set() and
board files which pass legacy GPIO numbers to this driver in platform data.
In this patch we handle the former and convert gpio_blink_set() to take
GPIO descriptor instead. In order to do this we convert the existing four
users to accept GPIO descriptor and translate it to legacy GPIO number in
the platform code. This effectively "pushes" legacy GPIO number usage from
the driver to platforms.
Also add comment to the remaining block describing that it is legacy code
path and we are getting rid of it eventually.
Suggested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
|
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Evgeniy Dushistov
|
9ece8839b1 |
ARM: orion: Fix for certain sequence of request_irq can cause irq storm
The problem is that hardware handled by arm/plat-orion/gpio.c, require ack for edge irq, and no ack for level irq. The code handle this issue, by two "struct irq_chip_type" per one "struct irq_chip_generic". For one "struct irq_chip_generic" irq_ack pointer is setted, for another it is NULL. But we have only one mask_cache per two "struct irq_chip_type". So if we 1)unmask interrupt A for "edge type" trigger, 2)unmask interrupt B for "level type" trigger, 3)unmask interrupt C for "edge type", we, because of usage of generic irq_gc_mask_clr_bit/irq_gc_mask_set_bit, have hardware configured to trigger interrupt B on "edge type", because of shared mask_cache. But kernel think that B is "level type", so when interrupt B occur via "edge" reason, we don't ack it, and B triggered again and again. Signed-off-by: Evgeniy A. Dushistov <dushistov@mail.ru> Link: https://lkml.kernel.org/r/20140726155659.GA22977@fifteen Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
|
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Alexander Duyck
|
b4d2394d01 |
dsa: Replace mii_bus with a generic host device
This change makes it so that instead of passing and storing a mii_bus we instead pass and store a host_dev. From there we can test to determine the exact type of device, and can verify it is the correct device for our switch. So for example it would be possible to pass a device pointer from a pci_dev and instead of checking for a PHY ID we could check for a vendor and/or device ID. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
|
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Thomas Petazzoni
|
19e00f20e9 |
ARM: orion: remove no longer needed gpio DT code
Following the move to pure DT-based probing of the GPIO controllers on Orion5x, some code in plat-orion/orion-gpio.c can be removed as it is no longer used. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/1398202002-28530-39-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
|
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Thomas Petazzoni
|
880ff3e225 |
ARM: orion: remove no longer needed DT IRQ code
Following the move of the Orion5x Device Tree support to use irqchip_init() for the interrupt controller probing, the plat-orion/irq.c code for DT-probing of the interrupt controller is no longer necessary, so we can get rid of it. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/1398202002-28530-38-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Thomas Petazzoni
|
deac3d874e |
ARM: orion: switch to a per-platform handle_irq() function
Moving to the Device Tree implies having CONFIG_MULTI_IRQ_HANDLER enabled, even for non-DT platforms (if we want both DT and non-DT platforms to be supported in a single kernel). However, the common CONFIG_MULTI_IRQ_HANDLER handler for non-DT platforms in plat-orion/irq.c doesn't match the needs of Orion5x. Also, it doesn't make much sense for orion_irq_init() to register the multi-IRQ handler: orion_irq_init() is called once for each IRQ cause/mask tuple, while the multi-IRQ handler only needs to be registered once. To solve this problem, we move the multi-IRQ handle in per-platform code: mach-kirkwood/irq.c and mach-dove/irq.c. The Orion5x variant will be introduced in a followup commit. Of course, this code will ultimately be completely removed once all boards are converted to the Device Tree. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Link: https://lkml.kernel.org/r/1398202002-28530-23-git-send-email-thomas.petazzoni@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Linus Torvalds
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cbda94e039 |
ARM: SoC: driver changes
These changes are mostly for ARM specific device drivers that either don't have an upstream maintainer, or that had the maintainer ask us to pick up the changes to avoid conflicts. A large chunk of this are clock drivers (bcm281xx, exynos, versatile, shmobile), aside from that, reset controllers for STi as well as a large rework of the Marvell Orion/EBU watchdog driver are notable. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAUz/1+GCrR//JCVInAQJmfg/9GyqHatDjjUPUBjUQRIEtKgGdmQwdbDqF x+OrS/q5B5zYbpIWkbkt1IUYJfU+89Z5ev9jxI4rV824Nu9Y92mHPDnv+N/ptkIh q2OVP3bQDpWs3aEVV2B1HBNcWrNUuwco9BJu05eegEePii/cto0/wKwWIgUmrmjy xOLthsnp2YmeplGs7ctC6Dz8XbmELebpawejTGylARXei/SwmzB/YYDgJbYjRL2I WSCVa8Vo+MZaGC/yxdKVTtvsKVQenxGoMO3ojikJeRdvuVRJds48Cw+UBdzWYNeJ 3Ssvbdx6Xltf9jy/7H0btOUgxPetZuUV+2XpbWfGu0Zr9FcGDv3q9hrxA+UYKnkY GIGU0otSsmpHnX5Ms3E2xnHiV/fihxA3qohqts5kYRBDr5uc+IpW6SbDymQliCGG OO4XmIVM3pmsqAqP3Zuseemt9CeSW2yC0XlfXkzjO74yY39c+WLBbtGI40Z5W6i0 mM1C8RD3QSNijYCEC8eqz06BQfRImsPs+jllsnJTZaHfbOsib718uvandjfG26lN 616YMcqq0Sp51HIQ4qW7f2dQr7vOyNqbukdkrwF5JgkY/nVki5kdciRg/yeipRy6 Ey80a+OTq0GQljM0F2dcH/A1eHH9KsuI1L6NdSMJsl0h6guIBORPTwTw3qJ13OkR wpJyM+Gm+Fk= =u/FI -----END PGP SIGNATURE----- Merge tag 'drivers-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC driver changes from Arnd Bergmann: "These changes are mostly for ARM specific device drivers that either don't have an upstream maintainer, or that had the maintainer ask us to pick up the changes to avoid conflicts. A large chunk of this are clock drivers (bcm281xx, exynos, versatile, shmobile), aside from that, reset controllers for STi as well as a large rework of the Marvell Orion/EBU watchdog driver are notable" * tag 'drivers-3.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (99 commits) Revert "dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac." Revert "net: stmmac: Add SOCFPGA glue driver" ARM: shmobile: r8a7791: Fix SCIFA3-5 clocks ARM: STi: Add reset controller support to mach-sti Kconfig drivers: reset: stih416: add softreset controller drivers: reset: stih415: add softreset controller drivers: reset: Reset controller driver for STiH416 drivers: reset: Reset controller driver for STiH415 drivers: reset: STi SoC system configuration reset controller support dts: socfpga: Add sysmgr node so the gmac can use to reference dts: socfpga: Add support for SD/MMC on the SOCFPGA platform reset: Add optional resets and stubs ARM: shmobile: r7s72100: fix bus clock calculation Power: Reset: Generalize qnap-poweroff to work on Synology devices. dts: socfpga: Update clock entry to support multiple parents ARM: socfpga: Update socfpga_defconfig dts: socfpga: Add DTS entry for adding the stmmac glue layer for stmmac. net: stmmac: Add SOCFPGA glue driver watchdog: orion_wdt: Use %pa to print 'phys_addr_t' drivers: cci: Export CCI PMU revision ... |
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Andrew Lunn
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3c317d00ba |
ARM: orion: Move cache-feroceon-l2.h out of plat-orion
With the gradual move to DT, kirkwood has become a lot less dependent on plat-orion. cache-feroceon-l2.h is the last dependency. Move it out so we can drop plat-orion when building DT only kirkwood boards. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Arnd Bergmann <arnd@arndb.de> Tested-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Ezequiel Garcia
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868eb61602 |
watchdog: orion: Make RSTOUT register a separate resource
In order to support other SoC, it's required to distinguish the 'control' timer register, from the 'rstout' register that enables system reset on watchdog expiration. To prevent a compatibility break, this commit adds a fallback to a hardcoded RSTOUT address. Reviewed-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Acked-by: Wim Van Sebroeck <wim@iguana.be> Tested-By: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Olof Johansson
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167eeb4700 |
mvebu fixes for v3.13 (incremental #2)
- allow building and booting DT and non-DT plat-orion SoCs - catch proper return value for kirkwood_pm_init() - properly check return of of_iomap to solve boot hangs (mirabox, others) - remove a compile warning on Armada 370 with non-SMP. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABAgAGBQJS5rNhAAoJEP45WPkGe8ZnuUEQALIAxdILNe7TuyybvCJeuAJY NZW3TdM6t5pqls2lFrni8ackm7M/dwqrtgYHnyRuX22ZrKCUQcOKO4s4APcFiTQw 2N/fTcMjzbw/ShRrULeSXiY+h3RX7hz4GAVZq2rrQNS3OPcHntAm/HGpx2fwyexZ FMfbZJ6e44prat+X+cKLwKxsVvQEuhQAsQC4zTAE7l3asxu+ScJvsINAiEUNoFvL Zj1o2YyqoqVJBgc8AS77ZwqfHNPGPGSB3uxOpgpf4PTwE/Kp/vZfgCr7xEU25KQF ++oN8AS0UP0ugsg3bFuyrw4bOdAtKtO5CcAt6ljGKa81gHadZtGGsazIQdkMnCVP lXlg/OFUrUCKUE7TU4Xw5oWa90eddFIdJMKRTbwRRYSK+oH0nq043fRmJD40Z6xL b/XyDz4RHSOJfY+wdhLIltAPAdiPIugs0JTDLeu2Z7fujSwRLVi2TpESPHhuhRfO 45/llW4DM3gfSFuQTVZHIdBBFCQJ/lDLe4DyTTouy9r/kPQ0dq0SPEt5T0D8P5zX aPyjKlJqEfN115R0CyckqMswO3ConKSBZn33OfRQcYBj4MHXfYIUEv91ztmCABch SBqqBtjOAteaAjhPY53w5C2pVI3LHuqy/K0WeLxSVZln4Q3QcfQlCeXZzk9crDTp QpVdjXqRHZucltXK+ajA =mxq4 -----END PGP SIGNATURE----- Merge tag 'mvebu-fixes-3.13-2' of git://git.infradead.org/linux-mvebu into fixes mvebu fixes for v3.13 (incremental #2) - allow building and booting DT and non-DT plat-orion SoCs - catch proper return value for kirkwood_pm_init() - properly check return of of_iomap to solve boot hangs (mirabox, others) - remove a compile warning on Armada 370 with non-SMP. * tag 'mvebu-fixes-3.13-2' of git://git.infradead.org/linux-mvebu: ARM: mvebu: fix compilation warning on Armada 370 (i.e. non-SMP) ARM: mvebu: Fix kernel hang in mvebu_soc_id_init() when of_iomap failed ARM: kirkwood: kirkwood_pm_init() should return void ARM: orion: provide C-style interrupt handler for MULTI_IRQ_HANDLER Signed-off-by: Olof Johansson <olof@lixom.net> |
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Linus Torvalds
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dfd10e7ae6 |
ARM: SoC platform changes for 3.14
New core SoC-specific changes.
New platforms:
* Introduction of a vendor, Hisilicon, and one of their SoCs with some
random numerical product name.
* Introduction of EFM32, embedded platform from Silicon Labs (ARMv7m, i.e. !MMU).
* Marvell Berlin series of SoCs, which include the one in Chromecast.
* MOXA platform support, ARM9-based platform used mostly in industrial products
* Support for Freescale's i.MX50 SoC.
Other work:
* Renesas work for new platforms and drivers, and conversion over to
more multiplatform-friendly device registration schemes.
* SMP support for Allwinner sunxi platforms.
* ... plus a bunch of other stuff across various platforms.
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Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform changes from Olof Johansson:
"New core SoC-specific changes.
New platforms:
* Introduction of a vendor, Hisilicon, and one of their SoCs with
some random numerical product name.
* Introduction of EFM32, embedded platform from Silicon Labs (ARMv7m,
i.e. !MMU).
* Marvell Berlin series of SoCs, which include the one in Chromecast.
* MOXA platform support, ARM9-based platform used mostly in
industrial products
* Support for Freescale's i.MX50 SoC.
Other work:
* Renesas work for new platforms and drivers, and conversion over to
more multiplatform-friendly device registration schemes.
* SMP support for Allwinner sunxi platforms.
* ... plus a bunch of other stuff across various platforms"
* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (201 commits)
ARM: tegra: fix tegra_powergate_sequence_power_up() inline
ARM: msm_defconfig: Update for multi-platform
ARM: msm: Move MSM's DT based hardware to multi-platform support
ARM: msm: Only build timer.c if required
ARM: msm: Only build clock.c on proc_comm based platforms
ARM: ux500: Enable system suspend with WFI support
ARM: ux500: turn on PRINTK_TIME in u8500_defconfig
ARM: shmobile: r8a7790: Fix I2C controller names
ARM: msm: Simplify ARCH_MSM_DT config
ARM: msm: Add support for MSM8974 SoC
ARM: sunxi: select ARM_PSCI
MAINTAINERS: Update Allwinner sunXi maintainer files
ARM: sunxi: Select RESET_CONTROLLER
ARM: imx: improve the comment of CCM lpm SW workaround
ARM: imx: improve status check of clock gate
ARM: imx: add necessary interface for pfd
ARM: imx_v6_v7_defconfig: Select CONFIG_REGULATOR_PFUZE100
ARM: imx_v6_v7_defconfig: Select MX35 and MX50 device tree support
ARM: imx: Add cpu frequency scaling support
ARM i.MX35: Add devicetree support.
...
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Sebastian Hesselbarth
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f28d7de6bd |
ARM: orion: provide C-style interrupt handler for MULTI_IRQ_HANDLER
DT-enabled Marvell Kirkwood and Dove SoCs make use of an irqchip driver. As expected for irqchip drivers, it uses a C-style interrupt handler and therefore selects MULTI_IRQ_HANDLER. Now, compiling a kernel with both non-DT and DT support enabled, selecting MULTI_IRQ_HANDLER will break ASM irq handler used by non-DT boards. Therefore, we provide a C-style irq handler even for non-DT boards, if MULTI_IRQ_HANDLER is set. By installing the C-style irq handler in orion_irq_init this is transparent to all non-DT board files. While the regression report was filed on Marvell Kirkwood, also Marvell Dove non-DT boards are affected and fixed by this patch. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Ian Campbell <ijc@hellion.org.uk> Reported-by: Ian Campbell <ijc@hellion.org.uk> Cc: <stable@vger.kernel.org> # v3.12+ Fixes: |
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Andrew Lunn
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48fce88cb5 |
ARM: Orion: Add missing includes
Building with C=1 generates warnings because of missing includes and static keywords. Add them. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Michael Opdenacker
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eb4d552b93 |
arm: plat-orion: remove deprecated IRQF_DISABLED
This patch proposes to remove the use of the IRQF_DISABLED flag It's a NOOP since 2.6.35 and it will be removed one day. Signed-off-by: Michael Opdenacker <michael.opdenacker@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Stephen Boyd
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b44653baed |
ARM: orion: Switch to sched_clock_register()
The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Kevin Hilman <khilman@linaro.org> |
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Sebastian Hesselbarth
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fa8c5a811e |
ARM: plat-orion: add reg offset to DT irq driver stub
With irqchip driver for Orion SoCs, reg layout of orion-intc has changed. This updates irq driver stub implemented before to the new reg layout by adding an offset to the base address passed by DT node. As orion5x still uses this stub, it cannot be removed yet. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Linus Torvalds
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21884a83b2 |
Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull timer core updates from Thomas Gleixner:
"The timer changes contain:
- posix timer code consolidation and fixes for odd corner cases
- sched_clock implementation moved from ARM to core code to avoid
duplication by other architectures
- alarm timer updates
- clocksource and clockevents unregistration facilities
- clocksource/events support for new hardware
- precise nanoseconds RTC readout (Xen feature)
- generic support for Xen suspend/resume oddities
- the usual lot of fixes and cleanups all over the place
The parts which touch other areas (ARM/XEN) have been coordinated with
the relevant maintainers. Though this results in an handful of
trivial to solve merge conflicts, which we preferred over nasty cross
tree merge dependencies.
The patches which have been committed in the last few days are bug
fixes plus the posix timer lot. The latter was in akpms queue and
next for quite some time; they just got forgotten and Frederic
collected them last minute."
* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (59 commits)
hrtimer: Remove unused variable
hrtimers: Move SMP function call to thread context
clocksource: Reselect clocksource when watchdog validated high-res capability
posix-cpu-timers: don't account cpu timer after stopped thread runtime accounting
posix_timers: fix racy timer delta caching on task exit
posix-timers: correctly get dying task time sample in posix_cpu_timer_schedule()
selftests: add basic posix timers selftests
posix_cpu_timers: consolidate expired timers check
posix_cpu_timers: consolidate timer list cleanups
posix_cpu_timer: consolidate expiry time type
tick: Sanitize broadcast control logic
tick: Prevent uncontrolled switch to oneshot mode
tick: Make oneshot broadcast robust vs. CPU offlining
x86: xen: Sync the CMOS RTC as well as the Xen wallclock
x86: xen: Sync the wallclock when the system time is set
timekeeping: Indicate that clock was set in the pvclock gtod notifier
timekeeping: Pass flags instead of multiple bools to timekeeping_update()
xen: Remove clock_was_set() call in the resume path
hrtimers: Support resuming with two or more CPUs online (but stopped)
timer: Fix jiffies wrap behavior of round_jiffies_common()
...
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Thomas Gleixner
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2b0f89317e |
Merge branch 'timers/posix-cpu-timers-for-tglx' of
git://git.kernel.org/pub/scm/linux/kernel/git/frederic/linux-dynticks into timers/core Frederic sayed: "Most of these patches have been hanging around for several month now, in -mmotm for a significant chunk. They already missed a few releases." Signed-off-by: Thomas Gleixner <tglx@linutronix.de> |
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Bartlomiej Zolnierkiewicz
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48a9db462d |
drivers/dma: remove unused support for MEMSET operations
There have never been any real users of MEMSET operations since they
have been introduced in January 2007 by commit
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Javier Martinez Canillas
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f88704c95b |
arm: orion: Use irq_get_trigger_type() to get IRQ flags
Use irq_get_trigger_type() to get the IRQ trigger type flags instead calling irqd_get_trigger_type(irq_get_irq_data(irq)) Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Cc: Grant Likely <grant.likely@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Samuel Ortiz <sameo@linux.intel.com> Acked-by: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@linux-mips.org Link: http://lkml.kernel.org/r/1371228049-27080-6-git-send-email-javier.martinez@collabora.co.uk Signed-off-by: Thomas Gleixner <tglx@linutronix.de> |
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Stephen Boyd
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38ff87f77a |
sched_clock: Make ARM's sched_clock generic for all architectures
Nothing about the sched_clock implementation in the ARM port is specific to the architecture. Generalize the code so that other architectures can use it by selecting GENERIC_SCHED_CLOCK. Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> [jstultz: Merge minor collisions with other patches in my tree] Signed-off-by: John Stultz <john.stultz@linaro.org> |
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Gregory CLEMENT
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2b8b279714 |
ARM: plat-orion: Fix num_resources and id for ge10 and ge11
When platform data were moved from arch/arm/mach-mv78xx0/common.c to arch/arm/plat-orion/common.c with the commit "7e3819d ARM: orion: Consolidate ethernet platform data", there were few typo made on gigabit Ethernet interface ge10 and ge11. This commit writes back their initial value, which allows to use this interfaces again. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Cc: <stable@vger.kernel.org> # v3.0.x Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Sebastian Hesselbarth
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7c14068f5a |
ARM: plat-orion: add missing ehci include to common.h
Removing orion ehci include from board files will raise a compiler error because plat/common.h is using an enum provided by orion ehci but not including the include itself. This just adds the missing include. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Linus Torvalds
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5647ac0ad4 |
Removal of GENERIC_GPIO for v3.10
GENERIC_GPIO now synonymous with GPIOLIB. There are no longer any valid cases for enableing GENERIC_GPIO without GPIOLIB, even though it is possible to do so which has been causing confusion and breakage. This branch does the work to completely eliminate GENERIC_GPIO. However, it is not trivial to just create a branch to remove it. Over the course of the v3.9 cycle more code referencing GENERIC_GPIO has been added to linux-next that conflicts with this branch. The following must be done to resolve the conflicts when merging this branch into mainline: * "git grep CONFIG_GENERIC_GPIO" should return 0 hits. Matches should be replaced with CONFIG_GPIOLIB * "git grep '\bGENERIC_GPIO\b'" should return 1 hit in the Chinese documentation. * Selectors of GENERIC_GPIO should be turned into selectors of GPIOLIB * definitions of the option in architecture Kconfig code should be deleted. Stephen has 3 merge fixup patches[1] that do the above. They are currently applicable on mainline as of May 2nd. [1] http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg428056.html -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJRifUnAAoJEEFnBt12D9kBs2YP/0U6+ia+xYvkVaJc28PDVIzn OReZNcJOYU8D5voxz0voaRD0EdcPwjbMu9Kp9aXMHlk4VxevF+8jCc/us0bIjtO1 VcB5VmSCIhMhxdnBlum11Mk7Vr5MCweyl9NBsypnPt8cl4obMBZHf2yzoodFktNb wtyYlOb6FALtc6iDbOO6dG3w9F7FAOLvskUFzdv89m8mupTsBu9jw9NqFDbJHOex rxq0Sdd+kWF/nkJVcV5Y6jIdletRlhpipefMJ9diexreHvwqh+c4kJEYZaXgB5+m ha95cPbReK1d+RqzM3A8d4irzSVSmq4k7ijI6QkFOr48+AH7XsgKv5so885LKzMN IIXg2Phm9i0H8+ecEvhcc4oIYBHJiEKK54Y0qUD9dqbFoDGPTCSqMHdSSMbpAY+J bIIXlVzj1En3PPNUJLPt8q8Qz6WxCT9mDST3QSGYnD4o90HT+1R9j92RxGL6McOq rUOyJDwmzFvpBvKK4raGdOU435M+ps2NPKKNIRaIGQPPY9rM1kN4YqvhXukEsC9L 3a3+3cQLh7iKxBHncxeQsJfethP1CPkJnzvF9r+ZZLf2rcPH4pbQIE2uO0XnX/nd 5/DKi0nGgAJ//GMMzdo3RiOA5zGFjIZ/KMvfhQldpP6qFJRhqdGi6FPlAcwr1z1n YnCByPwwlvfC4LTXFOGL =xodc -----END PGP SIGNATURE----- Merge tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux Pull removal of GENERIC_GPIO from Grant Likely: "GENERIC_GPIO now synonymous with GPIOLIB. There are no longer any valid cases for enableing GENERIC_GPIO without GPIOLIB, even though it is possible to do so which has been causing confusion and breakage. This branch does the work to completely eliminate GENERIC_GPIO." * tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux: gpio: update gpio Chinese documentation Remove GENERIC_GPIO config option Convert selectors of GENERIC_GPIO to GPIOLIB blackfin: force use of gpiolib m68k: coldfire: use gpiolib mips: pnx833x: remove requirement for GENERIC_GPIO openrisc: default GENERIC_GPIO to false avr32: default GENERIC_GPIO to false xtensa: remove explicit selection of GENERIC_GPIO sh: replace CONFIG_GENERIC_GPIO by CONFIG_GPIOLIB powerpc: remove redundant GENERIC_GPIO selection unicore32: default GENERIC_GPIO to false unicore32: remove unneeded select GENERIC_GPIO arm: plat-orion: use GPIO driver on CONFIG_GPIOLIB arm: remove redundant GENERIC_GPIO selection mips: alchemy: require gpiolib mips: txx9: change GENERIC_GPIO to GPIOLIB mips: loongson: use GPIO driver on CONFIG_GPIOLIB mips: remove redundant GENERIC_GPIO select |
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Linus Torvalds
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fcba914542 |
ARM: arm-soc platform updates for 3.10, part 3
This is the third and smallest of the SoC specific updates.
Changes include:
* SMP support for the Xilinx zynq platform
* Smaller imx changes
* LPAE support for mvebu
* Moving the orion5x, kirkwood, dove and mvebu platforms
to a common "mbus" driver for their internal devices.
It would be good to get feedback on the location of the "mbus"
driver. Since this is used on multiple platforms may potentially
get shared with other architectures (powerpc and arm64), it
was moved to drivers/bus/. We expect other similar drivers to
get moved to the same place in order to avoid creating more
top-level directories under drivers/ or cluttering up the
messy drivers/misc/ even more.
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Merge tag 'soc-for-linus-3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates (part 3) from Arnd Bergmann:
"This is the third and smallest of the SoC specific updates. Changes
include:
- SMP support for the Xilinx zynq platform
- Smaller imx changes
- LPAE support for mvebu
- Moving the orion5x, kirkwood, dove and mvebu platforms to a common
"mbus" driver for their internal devices.
It would be good to get feedback on the location of the "mbus" driver.
Since this is used on multiple platforms may potentially get shared
with other architectures (powerpc and arm64), it was moved to
drivers/bus/. We expect other similar drivers to get moved to the
same place in order to avoid creating more top-level directories under
drivers/ or cluttering up the messy drivers/misc/ even more."
* tag 'soc-for-linus-3' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits)
ARM: imx: reset_controller may be disabled
ARM: mvebu: Align the internal registers virtual base to support LPAE
ARM: mvebu: Limit the DMA zone when LPAE is selected
arm: plat-orion: remove addr-map code
arm: mach-mv78xx0: convert to use the mvebu-mbus driver
arm: mach-orion5x: convert to use mvebu-mbus driver
arm: mach-dove: convert to use mvebu-mbus driver
arm: mach-kirkwood: convert to use mvebu-mbus driver
arm: mach-mvebu: convert to use mvebu-mbus driver
ARM i.MX53: set CLK_SET_RATE_PARENT flag on the tve_ext_sel clock
ARM i.MX53: tve_di clock is not part of the CCM, but of TVE
ARM i.MX53: make tve_ext_sel propagate rate change to PLL
ARM i.MX53: Remove unused tve_gate clkdev entry
ARM i.MX5: Remove tve_sel clock from i.MX53 clock tree
ARM: i.MX5: Add PATA and SRTC clocks
ARM: imx: do not bring up unavailable cores
ARM: imx: add initial imx6dl support
ARM: imx1: mm: add call to mxc_device_init
ARM: imx_v4_v5_defconfig: Add CONFIG_GPIO_SYSFS
ARM: imx_v6_v7_defconfig: Select CONFIG_PERF_EVENTS
...
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Linus Torvalds
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a7726350e0 |
ARM: arm-soc cleanup for 3.10
Here is a collection of cleanup patches. Among the pieces that stand out are:
- The deletion of h720x platforms
- Split of at91 non-dt platforms to their own Kconfig file to keep them separate
- General cleanups and refactoring of i.MX and MXS platforms
- Some restructuring of clock tables for OMAP
- Convertion of PMC driver for Tegra to dt-only
- Some renames of sunxi -> sun4i (Allwinner A10)
- ... plus a bunch of other stuff that I haven't mentioned
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Merge tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC cleanup from Olof Johansson:
"Here is a collection of cleanup patches. Among the pieces that stand
out are:
- The deletion of h720x platforms
- Split of at91 non-dt platforms to their own Kconfig file to keep
them separate
- General cleanups and refactoring of i.MX and MXS platforms
- Some restructuring of clock tables for OMAP
- Convertion of PMC driver for Tegra to dt-only
- Some renames of sunxi -> sun4i (Allwinner A10)
- ... plus a bunch of other stuff that I haven't mentioned"
* tag 'cleanup-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (119 commits)
ARM: i.MX: remove unused ARCH_* configs
ARM i.MX53: remove platform ahci support
ARM: sunxi: Rework the restart code
irqchip: sunxi: Rename sunxi to sun4i
irqchip: sunxi: Make use of the IRQCHIP_DECLARE macro
clocksource: sunxi: Rename sunxi to sun4i
clocksource: sunxi: make use of CLKSRC_OF
clocksource: sunxi: Cleanup the timer code
ARM: at91: remove trailing semicolon from macros
ARM: at91/setup: fix trivial typos
ARM: EXYNOS: remove "config EXYNOS_DEV_DRM"
ARM: EXYNOS: change the name of USB ohci header
ARM: SAMSUNG: Remove unnecessary code for dma
ARM: S3C24XX: Remove unused GPIO drive strength register definitions
ARM: OMAP4+: PM: Restore CPU power state to ON with clockdomain force wakeup method
ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2412
ARM: S3C24XX: Removed unneeded dependency on CPU_S3C2410
ARM: S3C24XX: Removed unneeded dependency on ARCH_S3C24XX for boards
ARM: SAMSUNG: Fix typo "CONFIG_SAMSUNG_DEV_RTC"
ARM: S5P64X0: Fix typo "CONFIG_S5P64X0_SETUP_SDHCI"
...
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Alexandre Courbot
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7fd2bf3d32 |
Remove GENERIC_GPIO config option
GENERIC_GPIO has been made equivalent to GPIOLIB in architecture code and all driver code has been switch to depend on GPIOLIB. It is thus safe to have GENERIC_GPIO removed. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> |
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Thomas Petazzoni
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7ad2a78342 |
arm: plat-orion: remove addr-map code
Now that all Marvell EBU platforms have been converted to use the mvebu-mbus driver, we can remove the common plat-orion/addr-map.c code that isn't compiled anymore. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Thomas Petazzoni
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95b80e0a9a |
arm: mach-mv78xx0: convert to use the mvebu-mbus driver
This commit convers the mach-mv78xx0 sub-architecture to use the mvebu-mbus driver. We simply have to call mvebu_mbus_init() in the ->init_early() function, and modify the PCIe code so that it uses the new functions provided by mvebu-mbus to create the needed PCIe windows. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Thomas Petazzoni
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5d1190ea69 |
arm: mach-orion5x: convert to use mvebu-mbus driver
This commit migrates the mach-orion5x platforms to use the mvebu-mbus driver and therefore removes the Orion5x-specific addr-map code. The dove_init_early() function now initializes the mvebu-mbus driver by calling mvebu_mbus_init(). We also convert a number of orion5x_setup_xyz_win() calls to the appropriate mvebu_mbus_add_window() calls, as each board was doing its own setup for the NOR window or other devices. Ultimately, those devices will be probed from the DT. The common address decoding windows are now registered in the orion5x_setup_wins() function. It is worth noting that the four PCIe address decoding windows will ultimately no longer have to be registered here: it will be done automatically by the PCIe driver once Dove has been migrated to use the upcoming mvebu PCIe driver. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Thomas Petazzoni
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7d55490277 |
arm: mach-dove: convert to use mvebu-mbus driver
This commit migrates the mach-dove platforms to use the mvebu-mbus driver and therefore removes the Dove-specific addr-map code. The dove_init_early() function now initializes the mvebu-mbus driver by calling mvebu_mbus_init(). The address decoding windows are now registered in the dove_setup_cpu_wins() function. It is worth noting that the four PCIe address decoding windows will ultimately no longer have to be registered here: it will be done automatically by the PCIe driver once Dove has been migrated to use the upcoming mvebu PCIe driver. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Thomas Petazzoni
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5cc0673a67 |
arm: mach-kirkwood: convert to use mvebu-mbus driver
This commit migrates the mach-kirkwood platforms to use the mvebu-mbus driver and therefore removes the Kirkwood-specific addr-map code. The kirkwood_init_early() function is now responsible for initializing the mvebu-mbus driver by calling mvebu_mbus_init(). The address decoding windows are now registered in the kirkwood_setup_wins() function. It is worth noting that the four PCIe address decoding windows will ultimately no longer have to be registered here: it will be done automatically by the PCIe driver once Kirkwood has been migrated to use the upcoming mvebu PCIe driver. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Thomas Petazzoni
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87e1bed406 |
arm: mach-mvebu: convert to use mvebu-mbus driver
The changes needed to migrate the mach-mvebu (Armada 370 and Armada XP) to the mvebu-mbus driver are fairly minimal, since not many devices currently supported on those SoCs use address decoding windows. The only one being the BootROM window, used to bring up secondary CPUs. However, this BootROM window needed for SMP brings an important requirement: the mvebu-mbus driver must be initialized at the ->early_init() time, otherwise the BootROM window cannot be setup early enough to be ready before the secondary CPUs are started. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Olof Johansson
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c2573077df |
Merge branch 'gic' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64 into next/cleanup
* 'gic' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64: irqchip: gic: Perform the gic_secondary_init() call via CPU notifier irqchip: gic: Call handle_bad_irq() directly arm: Move chained_irq_(enter|exit) to a generic file arm: Move the set_handle_irq and handle_arch_irq declarations to asm/irq.h + Linux 3.9-rc3 Signed-off-by: Olof Johansson <olof@lixom.net> |
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Jason Cooper
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02ac5b3fc5 |
mvebu cleanup for v3.10
- plat-orion: prep for mvebu-mbus driver -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.19 (GNU/Linux) iQEcBAABAgAGBQJRRgjnAAoJEAi3KVZQDZAeJWsH/03OAVvN/yBHrWHoi++RWJyx sX9BL2i+dqFXpjN82OtPh3z2D1CRZSiJhGsbSZznY6Le1JhzeKXon2BErU0B9hO4 ZYWKzlDIbQ8Rls41mrDlAFhqmbw9w7lXux70yaYFyXY42JfNMDQ7yKDvcmlyOOdY X0fDSaUkSuMRQpEqOCSvp1bZ8BTcgJr3dICUYgxWvQlV/CUfUXI+FXwybZxadwGk XwXe03f4ZcKp/jl/+Ttd4wKtwowKuD/yM7Z/VYirmHSgnfGXD41EZrIZJspUVUX8 rfWnUoCJ1As+jjE3GKD17ZpD98NSdlf7PDju5RKK+6TSfjXl4Nl/AHwTsmoz3fA= =2Udw -----END PGP SIGNATURE----- Merge tag 'tags/cleanup_for_v3.10' into mvebu/soc mvebu cleanup for v3.10 - plat-orion: prep for mvebu-mbus driver |
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Simon Guinot
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8d00748873 |
ARM: Orion: add dbg_show function to gpio-orion driver
This patch adds a dedicated dbg_show function to the gpio-mvebu driver. In addition to the generic gpiolib informations, this function displays informations related with the specific Marvell registers (blink enable, data in polarity, interrupt masks and cause). Signed-off-by: Simon Guinot <simon.guinot@sequanux.org> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Florian Fainelli
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c3a07134e6 |
mv643xx_eth: convert to use the Marvell Orion MDIO driver
This patch converts the Marvell MV643XX ethernet driver to use the Marvell Orion MDIO driver. As a result, PowerPC and ARM platforms registering the Marvell MV643XX ethernet driver are also updated to register a Marvell Orion MDIO driver. This driver voluntarily overlaps with the Marvell Ethernet shared registers because it will use a subset of this shared register (shared_base + 0x4 to shared_base + 0x84). The Ethernet driver is also updated to look up for a PHY device using the Orion MDIO bus driver. For ARM and PowerPC we register a single instance of the "mvmdio" driver in the system like it used to be done with the use of the "shared_smi" platform_data cookie on ARM. Note that it is safe to register the mvmdio driver only for the "ge00" instance of the driver because this "ge00" interface is guaranteed to always be explicitely registered by consumers of arch/arm/plat-orion/common.c and other instances (ge01, ge10 and ge11) were all pointing their shared_smi to ge00. For PowerPC the in-tree Device Tree Source files mention only one MV643XX ethernet MAC instance so the MDIO bus driver is registered only when id == 0. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: David S. Miller <davem@davemloft.net> |
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Alexandre Courbot
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43b426d6fa |
arm: plat-orion: use GPIO driver on CONFIG_GPIOLIB
The GPIO driver uses gpiolib, thus it should be compiled when CONFIG_GPIOLIB is defined and not only CONFIG_GENERIC_GPIO Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Linus Walleij <linus.walleij@linaro.org> |
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Thomas Petazzoni
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59f16137b2 |
arm: plat-orion: use mv_mbus_dram_info() in PCIe code
The PCIe code was directly accessing the orion_mbus_dram_info structure to get access to a description of the SDRAM chip selects in order to configure the PCIe -> SDRAM address decoding windows. However, with the introduction of the orion-mbus driver, we are going to remove this global structure and instead leave only the exported mv_mbus_dram_info() function to access this description of the SDRAM chip selects. Therefore, we simply switch to using this API. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Thomas Petazzoni
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efaaa98d30 |
arm: plat-orion: only build addr-map.c when needed
-flagmail-match: MVEBU X-flagmail-match: KIRKWOOD X-flagmail-match: DOVE For now, addr-map.c is needed by all 5 Marvell EBU sub-architectures. However, we are going to introduce the orion-mbus driver, which will replace the address decoding code from addr-map.c. In order to ease the migration process, we will do that one sub-architecture at a time, which will require us to remove the compilation of addr-map.c one sub-architecture at a time. Therefore, we split the unconditional obj-y inclusion of addr-map.c into 5 conditionals obj-$(CONFIG_...) lines, one per sub-architecture. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Thomas Petazzoni
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217bef3d37 |
arm: plat-orion: fix address decoding when > 4GB is used
During the system initialization, the orion_setup_cpu_mbus_target() function reads the SDRAM address decoding registers to find out how many chip-selects of SDRAM have been enabled, and builds a small array with one entry per chip-select. This array is then used by device drivers (XOR, Ethernet, etc.) to configure their own address decoding windows to the SDRAM. However, devices can only access the first 32 bits of the physical memory. Even though LPAE is not supported for now, some Marvell boards are now showing up with 8 GB of RAM, configured using two SDRAM address decoding windows: the first covering the first 4 GB, the second covering the last 4 GB. The array built by orion_setup_cpu_mbus_target() has therefore two entries, and device drivers try to set up two address decoding windows to the SDRAM. However, in the device registers for the address decoding, the base address is only 32 bits, so those two windows overlap each other, and the devices do not work at all. This patch makes sure that the array built by orion_setup_cpu_mbus_target() only contains the SDRAM decoding windows that correspond to the first 4 GB of the memory. To do that, it ignores the SDRAM decoding windows for which the 4 low-order bits are not zero (the 4 low-order bits of the base register are used to store bits 32:35 of the base address, so they actually indicate whether the base address is above 4 GB). This patch allows the newly introduced armada-xp-gp board to properly operate when it is mounted with more than 4 GB of RAM. Without that, all devices doing DMA (for example XOR and Ethernet) do not work at all. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Linus Torvalds
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b274776c54 |
arm-soc: cleanups
A large number of cleanups, all over the platforms. This is dominated largely by the Samsung platforms (s3c, s5p, exynos) and a few of the others moving code out of arch/arm into more appropriate subsystems. The clocksource and irqchip drivers are now abstracted to the point where platforms that are already cleaned up do not need to even specify the driver they use, it can all get configured from the device tree as we do for normal device drivers. The clocksource changes basically touch every single platform in the process. We further clean up the use of platform specific header files here, with the goal of turning more of the platforms over to being "multiplatform" enabled, which implies that they cannot expose their headers to architecture independent code any more. It is expected that no functional changes are part of the cleanup. The overall reduction in total code lines is mostly the result of removing broken and obsolete code. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIVAwUAUSUyKmCrR//JCVInAQIN8RAAnb/uPytmlMjn5yCksF4Mvb/FVbn/TVwz KRIGpCHOzyKK1q7pM8NRUVWfjW2SZqbXJFqx6zBGKSlDPvFTOhsLyyupU+Tnyu5W IX4eIUBwb+a6H7XDHw0X2YI8uHzi5RNLhne0A1QyDKcnuHs1LDAttXnJHaK4Ap6Y NN2YFt3l3ld7DXWXJtMsw5v8lC10aeIFGTvXefaPDAdeMLivmI57qEUMDXknNr7W Odz/Rc0/cw3BNBVl/zNHA0jw7FOjKAymCYYNUa4xDCJEr+JnIRTqizd0N/YIIC7x aA2xjJ3oKUFyF51yiJE6nFuTyJznhwtehc+uiMOSIkjrPLym52LEHmd7G5Yqlmjz oiei09qBb870q3lGxwfht9iaeIwYgQFYGfD0yW5QWArCO5pxhtCPLPH7YZNZtcQd ZJRSGGqT/ljBz3bm0K9OLESeeTTN7+Nxvtpiz/CD+Piegz0gWJzDYJRTzkJ3UWpA WTVhVQdWUeX2JrNkgM7Z3Tu8iXOe+LIEs7kVXGJZSREmIIZiRvR36UrODZtAkp9I 7YQ+srX/uaR832pgK0RrHK0zY0psU6MmIvhYxJZFbx7keiPA9eH6drb0x7tGqcUD FzEUzvcZvyqppndfBi+R60H/YKAhJDEXdwxzo6dyCpPQaW1T9GnzIqXuE1zin+Aw X7Y8YywMbHI= =DvgJ -----END PGP SIGNATURE----- Merge tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC cleanups from Arnd Bergmann: "A large number of cleanups, all over the platforms. This is dominated largely by the Samsung platforms (s3c, s5p, exynos) and a few of the others moving code out of arch/arm into more appropriate subsystems. The clocksource and irqchip drivers are now abstracted to the point where platforms that are already cleaned up do not need to even specify the driver they use, it can all get configured from the device tree as we do for normal device drivers. The clocksource changes basically touch every single platform in the process. We further clean up the use of platform specific header files here, with the goal of turning more of the platforms over to being "multiplatform" enabled, which implies that they cannot expose their headers to architecture independent code any more. It is expected that no functional changes are part of the cleanup. The overall reduction in total code lines is mostly the result of removing broken and obsolete code." * tag 'cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (133 commits) ARM: mvebu: correct gated clock documentation ARM: kirkwood: add missing include for nsa310 ARM: exynos: move exynos4210-combiner to drivers/irqchip mfd: db8500-prcmu: update resource passing drivers/db8500-cpufreq: delete dangling include ARM: at91: remove NEOCORE 926 board sunxi: Cleanup the reset code and add meaningful registers defines ARM: S3C24XX: header mach/regs-mem.h local ARM: S3C24XX: header mach/regs-power.h local ARM: S3C24XX: header mach/regs-s3c2412-mem.h local ARM: S3C24XX: Remove plat-s3c24xx directory in arch/arm/ ARM: S3C24XX: transform s3c2443 subirqs into new structure ARM: S3C24XX: modify s3c2443 irq init to initialize all irqs ARM: S3C24XX: move s3c2443 irq code to irq.c ARM: S3C24XX: transform s3c2416 irqs into new structure ARM: S3C24XX: modify s3c2416 irq init to initialize all irqs ARM: S3C24XX: move s3c2416 irq init to common irq code ARM: S3C24XX: Modify s3c_irq_wake to use the hwirq property ARM: S3C24XX: Move irq syscore-ops to irq-pm clocksource: always define CLOCKSOURCE_OF_DECLARE ... |
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Gerlando Falauto
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830f8b9105 |
arm: plat-orion: fix printing of "MPP config unavailable on this hardware"
refactored printing of the kernel warning: "orion_mpp_conf: requested MPP%u config unavailable on this hardware\n" which is not to be printed in case of variant_mask = 0 (unknown variant). This check should be performed using a logical AND (&&) as opposed to a bitwise AND (&). Otherwise, test would fail (and message would not be printed) if variant_mask != 1 Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Olof Johansson <olof@lixom.net> Cc: Nicolas Pitre <nico@linaro.org> Cc: Holger Brunck <holger.brunck@keymile.com> Acked-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Shawn Guo
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838a2ae80a |
ARM: use clockevents_config_and_register() where possible
The clockevent core is able to figure out the best mult and shift, calculate min_delta_ns and max_delta_ns, with the necessary info passed into clockevents_config_and_register(). Use this combined configure and register function where possible to make the codes less error prone and gain some positive diff stat. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Reviewed-by: Anton Vorontsov <cbouatmailru@gmail.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Tested-by: Roland Stigge <stigge@antcom.de> Acked-by: Eric Miao <eric.y.miao@gmail.com> Cc: Haojian Zhuang <haojian.zhuang@gmail.com> Cc: David Brown <davidb@codeaurora.org> Tested-by: Tony Lindgren <tony@atomide.com> Acked-by: Barry Song <baohua.song@csr.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Tony Prisk <linux@prisktech.co.nz> Cc: Lennert Buytenhek <buytenh@wantstofly.org> Cc: Wan ZongShun <mcuos.com@gmail.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Jason Cooper <jason@lakedaemon.net> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Olof Johansson <olof@lixom.net> |
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Linus Torvalds
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c2714334b9 |
ARM: arm-soc: Updates for Marvell mvebu/kirkwood
This is a branch with updates for Marvell's mvebu/kirkwood platforms. They came in late-ish, and were heavily interdependent such that it didn't make sense to split them up across the cross-platform topic branches. So here they are (for the second release in a row) in a branch on their own. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQy5i9AAoJEIwa5zzehBx3ZskP/2wxjbwEaNdnR+7j8595bTaa GYq8qJ4lUCOKmSqp3bQkg/Plm2D88p78BO5qTm2io527gl10HemzCiGaejclujIw sDFZPAE8K0Z8p0gQcBNlRZNuI3J1N6IKRqYH5SIJ2vWmBMfO7nKRR9nmTiDpm5bx IcuKX2u/mhyXWN+F0EcHqcupH1K+mdzyGdIQk80Tyqni+UTN+pd0efLM6WL4SFJM 5fj64dDFpVDA8t+O2Avz8p+lx07vkSy2wIXWt7Ik9BVtsyZQecn+9lpl8FvcrSK/ MgL3QO4kqDpJDs88M7DJURU1/EdsWZc32M63avctaWnGWItQAbOJYBDmZTlng08x ZGrKOgf/I6le7wEpnzdag9ymI/rAL8I0755FkfXxf1R7/X40b+t8/61J/ddOKTDs 1sTVt+eKyyIMWle4V4zENa03goVBApCIEXcmnuFisFNbBY6azV31inJEp/3PvpgE GeMBfxBDkvn+03LkRFcZlhTeDsNTdctD+sfgrNPaQf5bZGIvEz87vgfNTIiaU3GA Vd5aiainVDQgmpoFfRG6391gdFlF2l9d67LoG4ClCjn4WL+UxcTRuzBW/liORpUO E7CwMHtPq6eoGKywiKMFRzY2QRIKZRkxrC2PCJ/1V9mbIGwgaD/3BQ2/czwrnc8q 1gnxWx8E5SKEGcDJXD+6 =7luC -----END PGP SIGNATURE----- Merge tag 'mvebu' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC updates for Marvell mvebu/kirkwood from Olof Johansson: "This is a branch with updates for Marvell's mvebu/kirkwood platforms. They came in late-ish, and were heavily interdependent such that it didn't make sense to split them up across the cross-platform topic branches. So here they are (for the second release in a row) in a branch on their own." * tag 'mvebu' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (88 commits) arm: l2x0: add aurora related properties to OF binding arm: mvebu: add Aurora L2 Cache Controller to the DT arm: mvebu: add L2 cache support dma: mv_xor: fix error handling path dma: mv_xor: fix error checking of irq_of_parse_and_map() dma: mv_xor: use request_irq() instead of devm_request_irq() dma: mv_xor: clear the window override control registers arm: mvebu: fix address decoding armada_cfg_base() function ARM: mvebu: update defconfig with I2C and RTC support ARM: mvebu: Add SATA support for OpenBlocks AX3-4 ARM: mvebu: Add support for the RTC in OpenBlocks AX3-4 ARM: mvebu: Add support for I2C on OpenBlocks AX3-4 ARM: mvebu: Add support for I2C controllers in Armada 370/XP arm: mvebu: Add hardware I/O Coherency support arm: plat-orion: Add coherency attribute when setup mbus target arm: dma mapping: Export a dma ops function arm_dma_set_mask arm: mvebu: Add SMP support for Armada XP arm: mm: Add support for PJ4B cpu and init routines arm: mvebu: Add IPI support via doorbells arm: mvebu: Add initial support for power managmement service unit ... |
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Andrew Lunn
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f9e7592230 |
ARM: Kirkwood: Make use of mvebu pincltl and gpio drivers
Select the generic mvebu kirkwood pincltr driver and generic mvebu gpio driver. This requires minor changes to the DT, and the calls to configure plat-orion gpio driver are removed. Signed-off-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Michael Walle <michael@walle.cc> Tested-by: Simon Baatz <gmbnomis@gmail.com> Tested-by: Jamie Lentin <jm@lentin.co.uk> Tested-by: Joshua Coombs <josh.coombs@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net> |
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Jason Cooper
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32d6448a08 |
Add hardware I/O coherency support for Armada 370/XP
The purpose of this patch set is to add hardware I/O Coherency support for Armada 370 and Armada XP. Theses SoCs come with an unit called coherency fabric. A beginning of the support for this unit have been introduced with the SMP patch set. This series extend this support: the coherency fabric unit allows to use the Armada XP and the Armada 370 as nearly coherent architectures. The third patches enables this new feature and register our own set of DMA ops, to benefit this hardware enhancement. The first patches exports a dma operation function needed to register our own set of dma ops. The second patch introduces a new flag for the address decoding configuration in order to be able to set the memory windows as shared memory. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iEYEABECAAYFAlCs/LcACgkQCwYYjhRyO9WrOgCfeWpA9XdQnwexySw5tPXS7Qdp aJEAn2ql07SECpTRWezTJptHL0oI1dFF =b0T7 -----END PGP SIGNATURE----- Merge tag 'marvell-hwiocc-for-3.8' of git://github.com/MISL-EBU-System-SW/mainline-public into mvebu/everything Add hardware I/O coherency support for Armada 370/XP The purpose of this patch set is to add hardware I/O Coherency support for Armada 370 and Armada XP. Theses SoCs come with an unit called coherency fabric. A beginning of the support for this unit have been introduced with the SMP patch set. This series extend this support: the coherency fabric unit allows to use the Armada XP and the Armada 370 as nearly coherent architectures. The third patches enables this new feature and register our own set of DMA ops, to benefit this hardware enhancement. The first patches exports a dma operation function needed to register our own set of dma ops. The second patch introduces a new flag for the address decoding configuration in order to be able to set the memory windows as shared memory. |