This makes nouveau recognise and report more kinds of PGRAPH errors, as
well as prevent GPU lockups resulting from some of them.
Lots of guesswork was involved and some part of this is probably
incorrect. Some potential-lockuop situations are handled by just
resetting a whole PGRAPH subunit, which doesn't sound like a "proper"
solution, but seems to work just fine... for now.
Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This will fix races between generated ctxprogs and interrupt handler.
Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
NV50 is nice and has a switch that autoaligns stuff for us. Pre-NV50,
we need to align input bitmap width manually.
Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
11c/004 offset corresponds to PGRAPH reg 0x400828, and is initialised
earlier anyway by both our ctxprog generator and blob ctxvals. It's
actually incorrect with the generator, since we use different layout
on pre-NVA0.
Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This is in preference to disconnected. If there's no other outputs
connected this will cause LVDS to be programmed even with the lid
closed rather than having X fail to start because of no available
outputs.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Not entirely identical to 0x21, the per-encoder table header lacks the
third init table pointer. However, our current parsing of the table
should work just fine.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This removes dependence on external firmware for NV50 generation cards.
If the generated ctxprogs don't work for you for some reason, please
report it.
Signed-off-by: Marcin Kościelnicki <koriakin@0x04.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This makes this code common to both the nv04 and nv50 paths.
For the moment, we keep the previous behaviour with HDMI/eDP connectors
and report them as DVI-D/DP instead. This will be fixed once the rest
of the code has been fixed to deal with those types.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Found by sparse.
Signed-off-by: Luca Barbieri <luca@luca-barbieri.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
i2c_entries seems to be the number of i2c entries,
so with index equal to this number, we could read
invalid data from i2ctable. Fix it.
Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reported-by: Dan Carpenter <error27@gmail.com>
Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
get_tmds_index_reg reads some value from stack when mlv happens
to be equal to size of pramdac_table array. Fix it.
Reported-by: Dan Carpenter <error27@gmail.com>
Signed-off-by: Marcin Slusarz <marcin.slusarz@gmail.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit breaks the userspace interface, and requires a new libdrm for
nouveau to operate again.
The multiple GEM_PUSHBUF ioctls that were present in 0.0.15 for
compatibility purposes are now gone, and replaced with the new ioctl which
allows for multiple push buffers to be submitted (necessary for hw index
buffers in the nv50 3d driver) and relocations to be applied on any buffer.
A number of other ioctls (CARD_INIT, GEM_PIN, GEM_UNPIN) that were needed
for userspace modesetting have also been removed.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
This allows us to submit push buffers from any memtype to the hardware.
We'll need this ability for VRAM index buffers at some point.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
PFIFO on G80 and up has a new mode where the main ring buffer is simply a
ring of pointers to indirect buffers containing the actual command/data
packets. In order to be able to implement index buffers in the 3D driver
we need to be able to submit data-only push buffers right after the cmd
packet header, which is only possible using the new command submission
method.
This commit doesn't make it possible to implement index buffers yet, some
userspace interface changes will be required, but it does allow for
testing/debugging of the hardware-side support in the meantime.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
The nv50 pgraph handler (for example) could reenable pgraph fifo access
and that would be bad when pgraph context is being unloaded (we need the
guarantee a ctxprog isn't running).
Signed-off-by: Maarten Maathuis <madman2003@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This also modifies the unused PRAMIN PT entries to be all zeroes, can't
really recall why I used 9/0 initially, just that it didn't work for
some reason. It was likely masking a bug elsewhere that's since been
fixed.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit changes nouveau to construct PTEs which look very much like
the ones the binary driver creates.
I presume that filling multiple PTEs identically with length flags and
the physical address of the start of a block of VRAM is a hint to the
memory controller that it need not perform additional page table lookups
for that range of addresses.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Unset the bit that indicates that a ctxprog can continue at the end.
Signed-off-by: Maarten Maathuis <madman2003@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
ramfc is zero'ed upon destruction, so it's safer to do things in the right
order.
Signed-off-by: Maarten Maathuis <madman2003@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
- We need to disable pgraph fifo access before checking the current channel,
otherwise we could still hit a running ctxprog.
- The writes to 0x400500 are already handled by pgraph->fifo_access and are
therefore redundant, moreover pgraph fifo access should not be reenabled
before current context is set as invalid. So remove them altogether.
Signed-off-by: Maarten Maathuis <madman2003@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
- In the current situation the padding that is added is dangerous to write
to, userspace could potentially overwrite parts of another bo.
- Depth and stencil buffers are supposed to be large enough in general so
the waste of memory should be acceptable.
- Alternatives are hiding the padding from users or splitting vram into 2
zones.
Signed-off-by: Maarten Maathuis <madman2003@gmail.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Fixes DVI+VGA on my 9400, and likely a lot of other configurations that
got broken by the previos DVI-over-DP fix.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
With DVI and DP plugged, the DVI clock change interrupts being run can
cause DP link training to fail. This adds a spinlock around init table
parsing to prevent this.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
It appears we aren't required to do memory sizing ourselves on nv40
either. NV40 init tables read a strap from PEXTDEV_BOOT_0 into a
CRTC register, and then later use that value to select a memory
configuration (written to PFB_CFG0, just like INIT_COMPUTE_MEM on
earlier cards) with INIT_IO_RESTRICT_PROG.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Ben Skeggs