linux

Commit Graph

Author	SHA1	Message	Date
Stephen Warren	d4b8e2c5b0	dt: net: enhance DWC EQoS binding to support Tegra186 The Synopsys DWC EQoS is a configurable IP block which supports multiple options for bus type, clocking and reset structure, and feature list. Extend the DT binding to define a "compatible value" for the configuration contained in NVIDIA's Tegra186 SoC, and define some new properties and list property entries required by that configuration. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Rob Herring <robh@kernel.org>	2016-09-12 08:38:03 -05:00
Lars Persson	5b8b64843a	dwc_eth_qos: Add Synopsys DWC Ethernet QoS bindings Add device tree binding documentation for the Synopsys DWC Ethernet QoS driver supporting revision 4.10a of the hardware IP. Signed-off-by: Lars Persson <larper@axis.com> Signed-off-by: David S. Miller <davem@davemloft.net>	2015-07-28 23:55:00 -07:00

Author

SHA1

Message

Date

Stephen Warren

d4b8e2c5b0

dt: net: enhance DWC EQoS binding to support Tegra186

The Synopsys DWC EQoS is a configurable IP block which supports multiple
options for bus type, clocking and reset structure, and feature list.
Extend the DT binding to define a "compatible value" for the configuration
contained in NVIDIA's Tegra186 SoC, and define some new properties and
list property entries required by that configuration.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Rob Herring <robh@kernel.org>

2016-09-12 08:38:03 -05:00

Lars Persson

5b8b64843a

dwc_eth_qos: Add Synopsys DWC Ethernet QoS bindings

Add device tree binding documentation for the Synopsys DWC Ethernet
QoS driver supporting revision 4.10a of the hardware IP.

Signed-off-by: Lars Persson <larper@axis.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

2015-07-28 23:55:00 -07:00

2 Commits