Commit Graph

6 Commits

Author SHA1 Message Date
Barry Song 0d5983a62a ARM: PRIMA2: mv timer to timer-prima2 as we will add timer-marco
Marco timer has different timer IP with prima2, so rename the current timer
to timer-prima2 so that we can add timer-marco.

at the same time, if we don't find prima2 timer node in dt, don't panic the
system as we will make prima2 and marco use same kernel image.

Signed-off-by: Barry Song <Baohua.Song@csr.com>
2013-01-22 19:38:24 +08:00
Stephen Warren 6bb27d7349 ARM: delete struct sys_timer
Now that the only field in struct sys_timer is .init, delete the struct,
and replace the machine descriptor .timer field with the initialization
function itself.

This will enable moving timer drivers into drivers/clocksource without
having to place a public prototype of each struct sys_timer object into
include/linux; the intent is to create a single of_clocksource_init()
function that determines which timer driver to initialize by scanning
the device dtree, much like the proposed irqchip_init() at:
http://www.spinics.net/lists/arm-kernel/msg203686.html

Includes mach-omap2 fixes from Igor Grinberg.

Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-12-24 09:36:38 -07:00
Shawn Guo a4b4674e26 ARM: prima2: use machine specific hook for late init
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Barry Song <baohua.song@csr.com>
2012-05-08 20:36:22 +08:00
Russell King 125c4033f0 ARM: restart: prima2: use new restart hook
Hook these platforms restart code into the new restart hook rather
than using arch_reset().

Reviewed-by: Barry Song <Baohua.Song@csr.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-01-05 12:57:17 +00:00
Barry Song 31adb06f9d ARM: CSR: mapping early DEBUG_LL uart
Signed-off-by: Barry Song <baohua.song@csr.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-09 07:20:51 +08:00
Binghua Duan 02c981c07b ARM: CSR: Adding CSR SiRFprimaII board support
SiRFprimaII is the latest generation application processor from CSR’s
Multifunction SoC product family. Designed around an ARM cortex A9 core,
high-speed memory bus, advanced 3D accelerator and full-HD multi-format
video decoder, SiRFprimaII is able to meet the needs of complicated
applications for modern multifunction devices that require heavy concurrent
applications and fluid user experience. Integrated with GPS baseband,
analog and PMU, this new platform is designed to provide a cost effective
solution for Automotive and Consumer markets.

This patch adds the basic support for this SoC and EVB board based on device
tree. It is following the ZYNQ of Xilinx in some degree.

Signed-off-by: Binghua Duan <Binghua.Duan@csr.com>
Signed-off-by: Rongjun Ying <Rongjun.Ying@csr.com>
Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: Yuping Luo <Yuping.Luo@csr.com>
Signed-off-by: Bin Shi <Bin.Shi@csr.com>
Signed-off-by: Huayi Li <Huayi.Li@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2011-07-09 07:19:28 +08:00