Commit Graph

6 Commits

Author SHA1 Message Date
Ben Skeggs 6934618014 drm/nv40/pm: convert to new pwm hooks, also fixing pwm type detection
A NV49 appeared a while back that was using the "nv41 style" pwm registers,
rather than the "nv40 style" ones my board is using.  This disproves the
previous theory that the pwm controller choice is chipset-specific.

So, after looking at a bunch of vbios images it appears that the next viable
theory is that we should select the pwm controller to use based on the gpio
line the fan is tied to, just like we do on nv50.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:13 +10:00
Ben Skeggs 04de6a0461 drm/nv41/pm: implement a second type of fanspeed pwm
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:10 +10:00
Ben Skeggs 9232969e19 drm/nv40/pm: implement first type of pwm fanspeed funcs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-12-21 19:01:09 +10:00
Ben Skeggs 2bfa748222 drm/nv40/pm: fix issues on igp chipsets, which don't have memory
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-11-10 08:59:47 +10:00
Ben Skeggs 59ef9742f6 drm/nv40/pm: execute memory reset script from vbios
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:11:51 +10:00
Ben Skeggs 1262a206da drm/nv40/pm: write nv40-specific reclocking routines
Not 100% perfect yet, but a good start towards what it'll look like in the
end.

Actually seems stable on a NV44 I have here, as much as running around OA
for a fair amount of time constantly switching between performance levels
can prove..

My NV49 isn't quite so happy, and semaphores mess up somehow (sometimes) as
a result of the memory reclocking.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2011-09-20 16:10:45 +10:00