Commit Graph

6 Commits

Author SHA1 Message Date
Rob Herring 8dccafaa28 arm: dts: fix unit-address leading 0s
Fix dtc warnings for 'simple_bus_reg' due to leading 0s. Converted using
the following command:

perl -p -i -e 's/\@0+([0-9a-f])/\@$1/g' `find arch/arm/boot/dts -type -f -name '*.dts*'

Dropped changes to ARM, Ltd. boards LED nodes and manually fixed up some
occurrences of uppercase hex.

Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-10-20 00:37:54 +02:00
Suman Anna 877ad77f9a ARM: dts: keystone-k2hk: Add DSP nodes
The Keystone 2 66AK2H/66AK2K SoCs have upto 8 TMS320C66x DSP Core
Subsystems (C66x CorePacs), each with a 1.0 GHz or 1.2 GHz C66x
Fixed/Floating-Point DSP Core, and 32 KB of L1P & L1D SRAMs and a
1 MB L2 SRAM. Add the DT nodes for these DSP processor sub-systems.
The processors do not have an MMU, and use various IPC Generation
registers and shared memory for inter-processor communication.
The aliases with a stem 'rproc' have also been added for all the
DSPs, they provide a fixed remoteproc id to each DSP processor.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Sam Nelson <sam.nelson@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-07-30 20:50:05 -07:00
Suman Anna e695c71892 ARM: dts: keystone-k2hk: Add PSC reset controller node
The Power Sleep Controller (PSC) module contains specific
memory-mapped registers that can be used to perform reset
management using specific bits for the DSPs available on the
SoC. The PSC is defined using a syscon node, and the reset
functionality is defined using a child syscon reset controller
node.

Add this syscon reset controller node as well as the reset
control data for the resets it supports for the 66AK2H SoCs.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-01-19 09:44:11 -08:00
Suman Anna 2e54ecb662 ARM: dts: keystone-k2hk: Reserve MSM RAM for boot monitor
The Keystone 2 boot monitor uses 32 KB of the MSM RAM @ 0x0c5f0000
on 66AK2H SoCs, so add a reserved child node for the same.

This address is aligned to the values used within the latest boot
monitor firmware [1] as of commit cf8b431e8b3b ("soc: Move load
address to end of MSMC").

[1] git://git.ti.com/processor-firmware/ks2-boot-monitor.git

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-01-07 12:33:08 -08:00
Suman Anna b4d15ba8e7 ARM: dts: keystone-k2hk: Add MSM RAM node
Add the RAM managed by the Multicore Shared Memory Controller (MSMC)
as a mmio-sram node. The 66AK2H SoCs have 6 MB of such memory. Any
specific MSM memory range needed by a software module ought to be
reserved using an appropriate child node.

Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2017-01-07 12:33:07 -08:00
Nishanth Menon 5edafc2982 ARM: dts: k2*: Rename the k2* files to keystone-k2* files
As reported in [1], rename the k2* dts files to keystone-* files
this will force consistency throughout.

Script for the same (and hand modified for Makefile and MAINTAINERS
files):
for i in arch/arm/boot/dts/k2*
do
	b=`basename $i`;
	git mv $i arch/arm/boot/dts/keystone-$b;
	sed -i -e "s/$b/keystone-$b/g" arch/arm/boot/dts/*[si]
done

NOTE: bootloaders that depend on older dtb names will need to be
updated as well.

[1] http://marc.info/?l=linux-arm-kernel&m=145637407804754&w=2

Reported-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Santosh Shilimkar <ssantosh@kernel.org>
2016-04-13 08:51:27 -07:00