Commit Graph

73 Commits

Author SHA1 Message Date
Jean-Christophe PLAGNIOL-VILLARD 5314ec8e52 arm: at91: dt: at91sam9 add pinctrl support
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-10-13 09:21:43 +08:00
Jean-Christophe PLAGNIOL-VILLARD fc33ff4313 arm: at91: at91sam9x5: fix gpio number per bank
On the at91sam9x5 SoC series, GPIO banks B and D only have 19 and 22
pins. So add a property to set this parameter.

Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-10-13 09:09:29 +08:00
Jean-Christophe PLAGNIOL-VILLARD e4541ff212 at91: regroup gpio and pinctrl under the same ranges
Fix also the reg size as we have 512 bytes bank not 256 bytes per gpio/mux
controller

Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-10-13 09:09:28 +08:00
Wolfram Sang 102084d3d3 Linux 3.6-rc7
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Merge tag 'v3.6-rc7' into i2c-embedded/for-next

Linux 3.6-rc7

Needed to get updates from i2c-embedded/for-current into i2c-embedded/for-next
2012-10-08 12:46:32 +02:00
Jean-Christophe PLAGNIOL-VILLARD 51ac51a6a5 ARM: at91: fix missing #interrupt-cells on gpio-controller
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Tested-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-09-17 10:25:01 +02:00
Ludovic Desroches 05dcd361a2 ARM: dts: add twi nodes for atmel SoCs
Add TWI nodes for atmel SoCs but keep i2c-gpio ones in order to let the
choice to the user in dts files.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
2012-09-12 14:49:16 +02:00
Ludovic Desroches f8a073ee37 ARM: at91: add of irq priorities support
Add a third cell to define irq priority.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-07-02 14:26:58 +02:00
Jean-Christophe PLAGNIOL-VILLARD c657394370 ARM: at91: aic add dt support for external irqs
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-07-02 14:26:58 +02:00
Maxime Ripard d029f371b1 ARM: AT91: Add ADC driver to the at91sam9x5 dtsi
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-05-14 13:25:33 -07:00
Rob Herring eb03f28002 ARM: dts: remove blank interrupt-parent properties
These were incorrectly introduced and can cause problems for of_irq_init.

The correct way to define a root controller is no interrupt-parent set at
all or the interrupt-parent is set to the root controller itself when
inherited from a parent node.

Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Tested-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2012-04-14 17:46:46 -07:00
Ludovic Desroches dcce6ce802 ARM: at91: dt: remove unit-address part for memory nodes
Because of the inclusion of skeleton.dtsi, the memory node is
named "memory" we where not modifying the already included one
but creating a new one. It caused bad memory node detection during
early_init_dt_scan_memory() so we modify them.

Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: devicetree-discuss@lists.ozlabs.org
2012-04-04 18:35:52 +02:00
Nicolas Ferre 4352808cfd ARM: at91/at91sam9x5.dtsi: fix NAND ale/cle in DT file
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-04-04 18:35:42 +02:00
Jean-Christophe PLAGNIOL-VILLARD 62c5553ab7 ARM: at91: dt: enable usb ehci for sam9g45 and sam9x5
make the ECHI depends on ARCH_AT91

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: devicetree-discuss@lists.ozlabs.org
2012-03-16 00:40:59 +08:00
Jean-Christophe PLAGNIOL-VILLARD 6a06245990 ARM: at91: dt: enable usb ohci for sam9g20, sam9g45 amd sam9x5
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: devicetree-discuss@lists.ozlabs.org
2012-03-16 00:40:55 +08:00
Jean-Christophe PLAGNIOL-VILLARD 82015c4eae ARM: at91: add Shutdown Controller (SHDWC) DT support
Use a string to specific the wakeup mode to make it more readable.

Add the Real-time Clock Wake-up support too for sam9g45 and sam9x5.
Add AT91_SHDW_CPTWK0_MAX to specific the Max of the Wakeup Counter.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:38:02 +08:00
Jean-Christophe PLAGNIOL-VILLARD a7776ec625 ARM: at91: add ram controller DT support
We can now drop the call to ioremap_registers() as we have the binding for the
SDRAM/DDR Controller.

Drop ioremap_registers() for sam9x5 too.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:37:56 +08:00
Jean-Christophe PLAGNIOL-VILLARD c8082d344a ARM: at91: add RSTC (Reset Controller) dt support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:31:22 +08:00
Jean-Christophe PLAGNIOL-VILLARD eb5e76ffd4 ARM: at91: add pmc DT support
Specified the main Oscillator via clock binding.
This will allow to do not hardcode it anymore in the DT board at 12MHz.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:31:14 +08:00
Jean-Christophe PLAGNIOL-VILLARD 10f71c28b6 ARM: at91: sam9x5 add i2c DT support
For now on use i2c-gpio driver on the same pin as the hardware IP.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-15 23:29:48 +08:00
Jean-Christophe PLAGNIOL-VILLARD 86a89f4ff6 ARM: at91: sam9x5 add nand support
Enable the nand in the cpu module with the partition.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-03-15 23:29:19 +08:00
Nicolas Ferre 582d5fbd4e ARM: at91/pio: add new PIO3 features
This patch adds the support for new PIO controller found on some
at91sam SOCs.
- more peripheral multiplexing
- more features to configure on a PIO (pull-down, Schmitt trigger, debouncer)
- support for several IRQ triggering features (type and polarity)

Support for those new features are retrieved from the device tree
compatibility string.

Debugfs at91_gpio file is updated to monitor configuration.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-03-01 13:38:50 +01:00
Nicolas Ferre 21f8187278 ARM: at91/gpio: add irqdomain and DT support
Add "legacy" type of irqdomain to preserve old-style numbering
and allow smooth transition for both DT and non-DT cases.

Original idea and code by Jean-Christophe Plagniol-Villard.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2012-03-01 13:29:01 +01:00
Nicolas Ferre 467f1cf504 ARM: at91/at91sam9x5: Device tree definition files
Device tree include file for the AT91SAM9x5 SoC family.
An additional .dtsi file is created to describe the generic
SAM9x5 CPU Module (CM).
Device tree source files for each Evaluation Kit that are using
the generic CPU Module and the carrier board. The selection of
available peripherals is done in this .dts file.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2012-02-03 15:36:41 +01:00