Commit Graph

437 Commits

Author SHA1 Message Date
Linus Torvalds 55ec86f848 Merge branches 'x86-fixes-for-linus' and 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86-32: Make sure we can map all of lowmem if we need to
  x86, vt-d: Handle previous faults after enabling fault handling
  x86: Enable the intr-remap fault handling after local APIC setup
  x86, vt-d: Fix the vt-d fault handling irq migration in the x2apic mode
  x86, vt-d: Quirk for masking vtd spec errors to platform error handling logic
  x86, xsave: Use alloc_bootmem_align() instead of alloc_bootmem()
  bootmem: Add alloc_bootmem_align()
  x86, gcc-4.6: Use gcc -m options when building vdso
  x86: HPET: Chose a paranoid safe value for the ETIME check
  x86: io_apic: Avoid unused variable warning when CONFIG_GENERIC_PENDING_IRQ=n

* 'perf-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  perf: Fix off by one in perf_swevent_init()
  perf: Fix duplicate events with multiple-pmu vs software events
  ftrace: Have recordmcount honor endianness in fn_ELF_R_INFO
  scripts/tags.sh: Add magic for trace-events
  tracing: Fix panic when lseek() called on "trace" opened for writing
2010-12-19 10:44:54 -08:00
Neil Horman 49c2fa08a7 PCI: Update MCP55 quirk to not affect non HyperTransport variants
I wrote this quirk awhile ago to properly setup MCP55 chips on hypertransport
busses so that interrupts reached whatever cpu happend to boot the kdump kernel.
while that works well, it was recently shown to me that a a non-hypertransport
variant of the MCP55 exists, and on those system the register that this quirk
manipulates causes hangs if you write to it.  Since the quirk was only meant to
handle errors found on MCP55 chips that have a HT interface, this patch adds a
filter to make sure the chip is an HT capable before making the needed register
adjustment.  This lets the broken MCP55s work with kdump while not breaking the
non-HT variants.

Resolves https://bugzilla.kernel.org/show_bug.cgi?id=23952

Tested successfully by the reporter and myself.

Cc: stable@kernel.org
Reported-by: Mathieu Bérard <mathieu@mberard.eu>
Acked-by: Vivek Goyal <vgoyal@redhat.com>
Signed-off-by: Neil Horman <nhorman@tuxdriver.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-12-16 14:07:31 -08:00
Suresh Siddha 254e42006c x86, vt-d: Quirk for masking vtd spec errors to platform error handling logic
On platforms with Intel 7500 chipset, there were some reports of system
hang/NMI's during kexec/kdump in the presence of interrupt-remapping enabled.

During kdump, there is a window where the devices might be still using old
kernel's interrupt information, while the kdump kernel is coming up. This can
cause vt-d faults as the interrupt configuration from the old kernel map to
null IRTE entries in the new kernel etc. (with out interrupt-remapping enabled,
we still have the same issue but in this case we will see benign spurious
interrupt hit the new kernel).

Based on platform config settings, these platforms seem to generate NMI/SMI
when a vt-d fault happens and there were reports that the resulting SMI causes
the  system to hang.

Fix it by masking vt-d spec defined errors to platform error reporting logic.
VT-d spec related errors are already handled by the VT-d OS code, so need to
report the same error through other channels.

Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
LKML-Reference: <1291667190.2675.8.camel@sbsiddha-MOBL3.sc.intel.com>
Cc: stable@kernel.org	[v2.6.32+]
Reported-by: Max Asbock <masbock@linux.vnet.ibm.com>
Reported-and-tested-by: Takao Indoh <indou.takao@jp.fujitsu.com>
Acked-by: Chris Wright <chrisw@sous-sol.org>
Acked-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
2010-12-13 16:51:51 -08:00
Chris Metcalf f02cbbe657 pci root complex: support for tile architecture
This change enables PCI root complex support for TILEPro.  Unlike
TILE-Gx, TILEPro has no support for memory-mapped I/O, so the PCI
support consists of hypervisor upcalls for PIO, DMA, etc.  However,
the performance is fine for the devices we have tested with so far
(1Gb Ethernet, SATA, etc.).

The <asm/io.h> header was tweaked to be a little bit more aggressive
about disabling attempts to map/unmap IO port space.  The hacky
<asm/pci-bridge.h> header was rolled into the <asm/pci.h> header
and the result was simplified.  Both of the latter two headers were
preliminary versions not meant for release before now - oh well.

There is one quirk for our TILEmpower platform, which accidentally
negotiates up to 5GT and needs to be kicked down to 2.5GT.

Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
2010-11-24 13:13:49 -05:00
Linus Torvalds e9f29c9a56 Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (27 commits)
  x86: allocate space within a region top-down
  x86: update iomem_resource end based on CPU physical address capabilities
  x86/PCI: allocate space from the end of a region, not the beginning
  PCI: allocate bus resources from the top down
  resources: support allocating space within a region from the top down
  resources: handle overflow when aligning start of available area
  resources: ensure callback doesn't allocate outside available space
  resources: factor out resource_clip() to simplify find_resource()
  resources: add a default alignf to simplify find_resource()
  x86/PCI: MMCONFIG: fix region end calculation
  PCI: Add support for polling PME state on suspended legacy PCI devices
  PCI: Export some PCI PM functionality
  PCI: fix message typo
  PCI: log vendor/device ID always
  PCI: update Intel chipset names and defines
  PCI: use new ccflags variable in Makefile
  PCI: add PCI_MSIX_TABLE/PBA defines
  PCI: add PCI vendor id for STmicroelectronics
  x86/PCI: irq and pci_ids patch for Intel Patsburg DeviceIDs
  PCI: OLPC: Only enable PCI configuration type override on XO-1
  ...
2010-10-28 11:59:52 -07:00
Linus Torvalds 229aebb873 Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (39 commits)
  Update broken web addresses in arch directory.
  Update broken web addresses in the kernel.
  Revert "drivers/usb: Remove unnecessary return's from void functions" for musb gadget
  Revert "Fix typo: configuation => configuration" partially
  ida: document IDA_BITMAP_LONGS calculation
  ext2: fix a typo on comment in ext2/inode.c
  drivers/scsi: Remove unnecessary casts of private_data
  drivers/s390: Remove unnecessary casts of private_data
  net/sunrpc/rpc_pipe.c: Remove unnecessary casts of private_data
  drivers/infiniband: Remove unnecessary casts of private_data
  drivers/gpu/drm: Remove unnecessary casts of private_data
  kernel/pm_qos_params.c: Remove unnecessary casts of private_data
  fs/ecryptfs: Remove unnecessary casts of private_data
  fs/seq_file.c: Remove unnecessary casts of private_data
  arm: uengine.c: remove C99 comments
  arm: scoop.c: remove C99 comments
  Fix typo configue => configure in comments
  Fix typo: configuation => configuration
  Fix typo interrest[ing|ed] => interest[ing|ed]
  Fix various typos of valid in comments
  ...

Fix up trivial conflicts in:
	drivers/char/ipmi/ipmi_si_intf.c
	drivers/usb/gadget/rndis.c
	net/irda/irnet/irnet_ppp.c
2010-10-24 13:41:39 -07:00
Justin P. Mattock 631dd1a885 Update broken web addresses in the kernel.
The patch below updates broken web addresses in the kernel

Signed-off-by: Justin P. Mattock <justinmattock@gmail.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Finn Thain <fthain@telegraphics.com.au>
Cc: Randy Dunlap <rdunlap@xenotime.net>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Dimitry Torokhov <dmitry.torokhov@gmail.com>
Cc: Mike Frysinger <vapier.adi@gmail.com>
Acked-by: Ben Pfaff <blp@cs.stanford.edu>
Acked-by: Hans J. Koch <hjk@linutronix.de>
Reviewed-by: Finn Thain <fthain@telegraphics.com.au>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-10-18 11:03:14 +02:00
Neil Horman 66db60eaf1 PCI: add quirk for non-symmetric-mode irq routing to versions 0 and 4 of the MCP55 northbridge
A long time ago I worked on a RHEL5 bug in which kdump hung during boot
on a set of systems.  The systems hung because they never received timer
interrupts during calibrate_delay.  These systems also all had Opteron
processors on a hypertransport bus, bridged to a pci bus via an Nvidia
MCP55 northbridge chip.  After much wrangling I managed to learn from
Nvidia that they have an undocumented register in some versions of that
chip which control how legacy interrupts are send to the cpu complex
when the ioapic isn't active.  Nvidia defaults this register to only
send legacy interrupts to the BSP, so if kdump happens to boot on an AP,
we never get timer interrupts and boom.  I had initially used this quirk
as a workaround, with my intent being to move apic initalization to an
earlier point in the boot process, so the setting of the register would
be irrelevant.  Given the work involved in doing that however, the
fragile nature of the apic initalization code, and the fact that, over
the 2 years since we found this bug, the MCP55 is the only chip which
seems to have this issue, I've figure at this point its likely safer to
just carry the quirk around.  By setting the referenced bits in this
hidden register, interrupts will be broadcast to all cpus when the
ioapic isn't active on the above described systems.

Acked-by: Simon Horman <horms@verge.net.au>
Acked-by: Vivek Goyal <vgoyal@redhat.com>
Signed-off-by: Neil Horman <nhorman@tuxdriver.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-10-15 13:09:50 -07:00
Len Brown 4731fdcf6f intel_idle: PCI quirk to prevent Lenovo Ideapad s10-3 boot hang
When the Lenovo Ideapad S10-3 is booted with HT enabled,
it hits a boot hang in the intel_idle driver.

This occurs when entering ATM-C4 for the first time,
unless BM_STS is first cleared.

acpi_idle doesn't see this because it first checks
and clears BM_STS, but it would hit the same hang
if that check were disabled.

http://bugs.meego.com/show_bug.cgi?id=7093
https://bugs.launchpad.net/ubuntu/+source/linux/+bug/634702

Signed-off-by: Len Brown <len.brown@intel.com>
2010-09-24 21:09:19 -04:00
Linus Torvalds 1cfd2bda8c Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (30 commits)
  PCI: update for owner removal from struct device_attribute
  PCI: Fix warnings when CONFIG_DMI unset
  PCI: Do not run NVidia quirks related to MSI with MSI disabled
  x86/PCI: use for_each_pci_dev()
  PCI: use for_each_pci_dev()
  PCI: MSI: Restore read_msi_msg_desc(); add get_cached_msi_msg_desc()
  PCI: export SMBIOS provided firmware instance and label to sysfs
  PCI: Allow read/write access to sysfs I/O port resources
  x86/PCI: use host bridge _CRS info on ASRock ALiveSATA2-GLAN
  PCI: remove unused HAVE_ARCH_PCI_SET_DMA_MAX_SEGMENT_{SIZE|BOUNDARY}
  PCI: disable mmio during bar sizing
  PCI: MSI: Remove unsafe and unnecessary hardware access
  PCI: Default PCIe ASPM control to on and require !EMBEDDED to disable
  PCI: kernel oops on access to pci proc file while hot-removal
  PCI: pci-sysfs: remove casts from void*
  ACPI: Disable ASPM if the platform won't provide _OSC control for PCIe
  PCI hotplug: make sure child bridges are enabled at hotplug time
  PCI hotplug: shpchp: Removed check for hotplug of display devices
  PCI hotplug: pciehp: Fixed return value sign for pciehp_unconfigure_device
  PCI: Don't enable aspm before drivers have had a chance to veto it
  ...
2010-08-06 11:44:36 -07:00
Tejun Heo 5b6ae5ba0c libata: more PCI IDs for jmicron controllers
Add support for JMB364 and 369.

Patch-originally-from: Aries Lee <arieslee@jmicron.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-08-01 19:46:44 -04:00
Rafael J. Wysocki 3d2a531804 PCI: Do not run NVidia quirks related to MSI with MSI disabled
There is no reason to run NVidia-specific quirks related to HT MSI
mappings with MSI disabled via pci=nomsi, so make
__nv_msi_ht_cap_quirk() return immediately in that case.

This allows at least one machine to boot 100% of the time with
pci=nomsi (it still doesn't boot reliably without that).

Addresses https://bugzilla.kernel.org/show_bug.cgi?id=16443 .

Cc: stable@kernel.org
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-07-30 09:47:58 -07:00
Kulikov Vasiliy 4e344b1cc5 PCI: use for_each_pci_dev()
Use for_each_pci_dev() to simplify the code.

Signed-off-by: Kulikov Vasiliy <segooon@gmail.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-07-30 09:47:22 -07:00
Jacob Pan 253d2e5498 PCI: disable mmio during bar sizing
It is a known issue that mmio decoding shall be disabled while doing PCI
bar sizing. Host bridge and other devices (PCI PIC) shall be excluded for
certain platforms. This patch mainly comes from Mathew Willcox's
patch in http://kerneltrap.org/mailarchive/linux-kernel/2007/9/13/258969.

A new flag bit "mmio_alway_on" is added to pci_dev with the intention that
devices with their mmio decoding cannot be disabled during BAR sizing shall
have this bit set, preferrablly in their quirks.

Without this patch, Intel Moorestown platform graphics unit will be
corrupted during bar sizing activities.

Signed-off-by: Jacob Pan <jacob.jun.pan@linux.intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-07-30 09:29:35 -07:00
Tejun Heo 549e15611b PCI: disable MSI on VIA K8M800
MSI delivery from on-board ahci controller doesn't work on K8M800.  At
this point, it's unclear whether the culprit is with the ahci
controller or the host bridge.  Given the track record and considering
the rather minimal impact of MSI, disabling it seems reasonable.

Signed-off-by: Tejun Heo <tj@kernel.org>
Reported-by: Rainer Hurtado Navarro <publio.escipion.el.africano@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-07-30 09:29:12 -07:00
Clemens Ladisch aff6136974 PCI quirk: AMD 780: work around wrong vendor ID on APC bridge
In all AMD 780 family northbridges, the vendor ID of the internal
graphics PCI/PCI bridge reads not as AMD but as that of the mainboard
vendor, because the hardware actually returns the value of the subsystem
vendor ID (erratum 18).

We currently have additional quirk entries for Asus and Acer, but it is
likely that we will encounter more systems with other vendor IDs.

Since we do not know in advance all possible vendor IDs, a better way to
find the device is to declare the quirk on the host bridge, whose ID is
always correct, and use that device as a stepping stone to find the PCI/
PCI bridge, if present.

Reviewed-by: Matthew Wilcox <willy@linux.intel.com>
Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-07-30 09:29:11 -07:00
Tejun Heo 4daedcfe8c ahci: add pci quirk for JMB362
JMB362 is a new variant of jmicron controller which is similar to
JMB360 but has two SATA ports instead of one.  As there is no PATA
port, single function AHCI mode can be used as in JMB360.  Add pci
quirk for JMB362.

Signed-off-by: Tejun Heo <tj@kernel.org>
Reported-by: Aries Lee <arieslee@jmicron.com>
Cc: stable@kernel.org
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2010-06-07 16:03:10 -04:00
Felix Radensky 3322340a9d PCI: Allow manual resource allocation for PCI hotplug bridges
At the moment only PCI-E briges can be flagged as hotplug, thus
allowing manual resource preallocation via pci=hpmemsize=nnM and
pci=hpiosize=nnM kernel parameters. Some PCI hotplug bridges, e.g.
PLX 6254 can also benefit from this functionalily, as kernel fails
to properly allocate their resources when hotplug device is added
and PCI bus is rescanned.

This patch adds header quirk for PLX 6254 that marks this bridge
as hotplug. Other PCI bridges with similar problems can use it
as well.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-05-21 14:43:45 -07:00
Alex Deucher 9313ff4504 PCI quirks: disable msi on AMD rs4xx internal gfx bridges
Doesn't work reliably for internal gfx.  Fixes kernel bug
https://bugzilla.kernel.org/show_bug.cgi?id=15626.

Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
Cc: Stable <stable@kernel.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-05-18 14:33:07 -07:00
Ben Hutchings e4146bb908 PCI: Disable MSI for MCP55 on P5N32-E SLI
As reported in <http://bugs.debian.org/552299>, MSI appears to be
broken for this on-board device.  We already have a quirk for the
P5N32-SLI Premium; extend it to cover both variants of the board.

Reported-by: Romain DEGEZ <romain.degez@smartjog.com>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Cc: stable@kernel.org
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-05-18 14:32:32 -07:00
Clemens Ladisch 5193d7a7f5 PCI quirk: RS780/RS880: disable MSI behind the PCI bridge
The missing initialization of the nb_cntl.strap_msi_enable does not
seem to be the only problem that prevents MSI, so that quirk is not
sufficient to enable MSI on all machines.  To be safe, disable MSI
unconditionally for the internal graphics and HDMI audio on these
chipsets.

[rjw: Added the PCI_VENDOR_ID_AI quirk.]

Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-04-02 19:47:05 -07:00
Bjorn Helgaas f967a44343 PCI: don't say we claimed a resource if we failed
pci_claim_resource() can fail, so pay attention and only claim success
when it actually succeeded.  If pci_claim_resource() fails, it prints a
useful diagnostic.

Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-03-25 08:51:35 -07:00
Matthew Wilcox 134b345081 PCI quirk: Disable MSI on VIA K8T890 systems
Bugzilla 15287 indicates that there's a problem with Message Signalled
Interrupts on VIA K8T890 systems.  Add a quirk to disable MSI on these
systems.

Signed-off-by: Matthew Wilcox <willy@linux.intel.com>
Tested-by: Jan Kreuzer <kontrollator@gmx.de>
Tested-by: lh <jarryson@gmail.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-03-25 08:51:23 -07:00
Clemens Ladisch a5ee4eb754 PCI quirk: RS780/RS880: work around missing MSI initialization
AMD says in section 2.5.4 (GFX MSI Enable) of #43291 (AMD 780G Family
Register Programming Requirements):

  The SBIOS must enable internal graphics MSI capability in GCCFG by
  setting the following: NBCFG.NB_CNTL.STRAP_MSI_ENABLE='1'

Quite a few BIOS writers misinterpret this sentence and think that
enabling MSI is an optional feature.  However, clearing that bit just
prevents delivery of MSI messages but does not remove the MSI PCI
capabilities registers, and so leaves these devices unusable for any
driver that attempts to use MSI.

Setting that bit is not possible after the BIOS has locked down the
configuration registers, so we have to manually disable MSI for the
affected devices.

This fixes the codec communication errors in the HDA driver when
accessing the HDMI audio device, and allows us to get rid of the
overcautious quirk in radeon_irq_kms.c.

Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
Tested-by: Alex Deucher <alexdeucher@gamil.com>
Cc: <stable@kernel.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-03-24 13:21:38 -07:00
Tim Yamin ca84639263 PCI quirk: only apply CX700 PCI bus parking quirk if external VT6212L is present
Apply the CX700 quirk only when an external VT6212L is present (which
is the case for the errant hardware the quirk was written for), don't
touch the settings otherwise -- Hauppage PVR-500 tuners need PCI Bus
Parking in order to work and when that's turned on everything seems
to behave fine.

I guess the underlying problem is a combination of an external VT6212L
and the CX700 rather than the CX700's PCI being broken completely for
all cases...

Reported-by: Jeroen Roos <jeroen@roosnl.com>
Signed-off-by: Tim Yamin <plasm@roo.me.uk>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-03-24 13:21:37 -07:00
Maxim Levitsky 03cd8f7ebe ricoh_mmc: port from driver to pci quirk
This patch solves nasty problem original driver has.

Original goal of the ricoh_mmc was to disable this device because then,
mmc cards can be read using standard SDHCI controller, thus avoiding
writing of yet another driver.

However, the act of disablement, makes other pci functions that belong to
this controller (xD and memstick) shift up one level, thus pci core has
now wrong idea about these devices.

To fix this issue, this patch moves the driver into the pci quirk section,
thus it is executes before the pci is enumerated, and therefore solving
that issue, also same sequence of commands is performed on resume for same
reasons.

Also regardless of the above, this way is cleaner.  You still need to set
CONFIG_MMC_RICOH_MMC to enable this quirk

Signed-off-by: Maxim Levitsky <maximlevitsky@gmail.com>
Acked-by: Philip Langdale <philipl@overt.org>
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-03-06 11:26:36 -08:00
David S. Miller 47871889c6 Merge branch 'master' of /home/davem/src/GIT/linux-2.6/
Conflicts:
	drivers/firmware/iscsi_ibft.c
2010-02-28 19:23:06 -08:00
Rafael J. Wysocki 93177a748b PCI: Clean up build for CONFIG_PCI_QUIRKS unset
Currently, drivers/pci/quirks.c is built unconditionally, but if
CONFIG_PCI_QUIRKS is unset, the only things actually built in this
file are definitions of global variables and empty functions (due to
the #ifdef CONFIG_PCI_QUIRKS embracing all of the code inside the
file).  This is not particularly nice and if someone overlooks
the #ifdef CONFIG_PCI_QUIRKS, build errors are introduced.

To clean that up, move the definitions of the global variables in
quirks.c that are always built to pci.c, move the definitions of
the empty functions (compiled when CONFIG_PCI_QUIRKS is unset) to
headers (additionally make these functions static inline) and modify
drivers/pci/Makefile so that quirks.c is only built if
CONFIG_PCI_QUIRKS is set.

Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2010-02-22 16:15:21 -08:00
Alexander Duyck 7a0deb6bcd pci: add support for 82576NS serdes to existing SR-IOV quirk
This patch adds support for the 82576NS Serdes adapter to the existing pci
quirk for 82576 parts.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2010-02-22 15:45:33 -08:00
Andres Salomon 73d2eaac8a CS5536: apply pci quirk for BIOS SMBUS bug
The new cs5535-* drivers use PCI header config info rather than MSRs to
determine the memory region to use for things like GPIOs and MFGPTs.  As
anticipated, we've run into a buggy BIOS:

[    0.081818] pci 0000:00:14.0: reg 10: [io  0x6000-0x7fff]
[    0.081906] pci 0000:00:14.0: reg 14: [io  0x6100-0x61ff]
[    0.082015] pci 0000:00:14.0: reg 18: [io  0x6200-0x63ff]
[    0.082917] pci 0000:00:14.2: reg 20: [io  0xe000-0xe00f]
[    0.083551] pci 0000:00:15.0: reg 10: [mem 0xa0010000-0xa0010fff]
[    0.084436] pci 0000:00:15.1: reg 10: [mem 0xa0011000-0xa0011fff]
[    0.088816] PCI: pci_cache_line_size set to 32 bytes
[    0.088938] pci 0000:00:14.0: address space collision: [io 0x6100-0x61ff] already in use
[    0.089052] pci 0000:00:14.0: can't reserve [io  0x6100-0x61ff]

This is a Soekris board, and its BIOS sets the size of the PCI ISA bridge
device's BAR0 to 8k.  In reality, it should be 8 bytes (BAR0 is used for
SMBus stuff).  This quirk checks for an incorrect size, and resets it
accordingly.

Signed-off-by: Andres Salomon <dilinger@collabora.co.uk>
Tested-by: Leigh Porter <leigh@leighporter.org>
Tested-by: Jens Rottmann <JRottmann@LiPPERTEmbedded.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2010-02-05 07:36:50 -08:00
Linus Torvalds df9d1e8a43 pci: avoid compiler warning in quirks.c
Introduced by commit 5b889bf23 ("PCI: Fix build if quirks are not
enabled"), which made the pci_dev_reset_methods[] array static and
'const', but didn't then change the code to match, and use a const
pointer when moving it to quirks.c.

Trivially fixed by just adding the required 'const' to the iterator
variable.

Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-12-31 16:44:43 -08:00
Rafael J. Wysocki 5b889bf237 PCI: Fix build if quirks are not enabled
After commit b9c3b26641 ("PCI: support
device-specific reset methods") the kernel build is broken if
CONFIG_PCI_QUIRKS is unset.

Fix this by moving pci_dev_specific_reset() to drivers/pci/quirks.c and
providing an empty replacement for !CONFIG_PCI_QUIRKS builds.

Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Reported-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2009-12-31 12:00:45 -08:00
Dexuan Cui c763e7b58f PCI: add Intel 82599 Virtual Function specific reset method
Handle device specific timeout and use FLR.

Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Signed-off-by: Dexuan Cui <dexuan.cui@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-12-16 13:37:52 -08:00
Dexuan Cui aeb30016fe PCI: add Intel USB specific reset method
Handle device specific reset requirements (i.e. vendor reg for reset
along with appropriate timeout).

Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Signed-off-by: Dexuan Cui <dexuan.cui@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-12-16 13:37:51 -08:00
Dexuan Cui b9c3b26641 PCI: support device-specific reset methods
Add a new type of quirk for resetting devices at pci_dev_reset time.
This is necessary to handle device with nonstandard reset procedures,
especially useful for guest drivers.

Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Signed-off-by: Dexuan Cui <dexuan.cui@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-12-16 13:37:50 -08:00
Csaba Henk 2820f333e3 PCI: Handle case when no pci device can provide cache line size hint
Prior to this patch, if pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, ...)
returns 0 for all dev, pci_cache_line_size ends up set to zero
(instead of pci_dfl_cache_line_size).

This patch ensures the pci_cache_line_size = pci_dfl_cache_line_size
setting in the above scenario.

This happens in case of a kvm-88 guest (where, consequently, the rtl8139
NIC failed to initialize).

Acked-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Csaba Henk <csaba@gluster.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-12-16 13:37:50 -08:00
Bjorn Helgaas c7dabef8a2 vsprintf: use %pR, %pr instead of %pRt, %pRf
Jesse accidentally applied v1 [1] of the patchset instead of v2 [2].  This
is the diff between v1 and v2.

The changes in this patch are:
    - tidied vsprintf stack buffer to shrink and compute size more
      accurately
    - use %pR for decoding and %pr for "raw" (with type and flags) instead
      of adding %pRt and %pRf

[1] http://lkml.org/lkml/2009/10/6/491
[2] http://lkml.org/lkml/2009/10/13/441

Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-04 13:06:41 -08:00
Stefan Assmann 4fd8bdc567 PCI: avoid boot interrupt quirk for AMD 813x B1 devices
AMD 813x rev. B1 (like rev. B2) devices generate no interrupts if
quirk_disable_amd_813x_boot_interrupt is executed, add an exception.
http://bugzilla.kernel.org/show_bug.cgi?id=14159

Patch also adds missing cases for DECLARE_PCI_FIXUP_RESUME and
DECLARE_PCI_FIXUP_FINAL calls to quirk_disable_amd_813x_boot_interrupt.

Signed-off-by: Stefan Assmann <sassmann@redhat.com>
Tested-by: Gabriele Giorgetti <g.giorgetti@teamsystem.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-04 13:06:40 -08:00
Jesse Barnes ac1aa47b13 PCI: determine CLS more intelligently
Till now, CLS has been determined either by arch code or as
L1_CACHE_BYTES.  Only x86 and ia64 set CLS explicitly and x86 doesn't
always get it right.  On most configurations, the chance is that
firmware configures the correct value during boot.

This patch makes pci_init() determine CLS by looking at what firmware
has configured.  It scans all devices and if all non-zero values
agree, the value is used.  If none is configured or there is a
disagreement, pci_dfl_cache_line_size is used.  arch can set the dfl
value (via PCI_CACHE_LINE_BYTES or pci_dfl_cache_line_size) or
override the actual one.

ia64, x86 and sparc64 updated to set the default cls instead of the
actual one.

While at it, declare pci_cache_line_size and pci_dfl_cache_line_size
in pci.h and drop private declarations from arch code.

Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: David Miller <davem@davemloft.net>
Acked-by: Greg KH <gregkh@suse.de>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-11-04 08:47:10 -08:00
Shane Huang 5deab53665 ahci / atiixp / pci quirks: rename AMD SB900 into Hudson-2
This patch renames the code name SB900 into Hudson-2

Signed-off-by: Shane Huang <shane.huang@amd.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-10-16 06:21:20 -04:00
Linus Torvalds 80fa680d22 Merge git://git.infradead.org/~dwmw2/iommu-2.6.32
* git://git.infradead.org/~dwmw2/iommu-2.6.32:
  x86: Move pci_iommu_init to rootfs_initcall()
  Run pci_apply_final_quirks() sooner.
  Mark pci_apply_final_quirks() __init rather than __devinit
  Rename pci_init() to pci_apply_final_quirks(), move it to quirks.c
  intel-iommu: Yet another BIOS workaround: Isoch DMAR unit with no TLB space
  intel-iommu: Decode (and ignore) RHSA entries
  intel-iommu: Make "Unknown DMAR structure" message more informative
2009-10-13 10:04:40 -07:00
David Woodhouse cf6f3bf7e5 Run pci_apply_final_quirks() sooner.
Having this as a device_initcall() means that some real device drivers
can actually initialise _before_ the quirks are run, which is wrong.

We want it to run _before_ device_initcall(), but _after_ fs_initcall(),
since some arch-specific PCI initialisation like pcibios_assign_resources()
is done at fs_initcall().

We could use rootfs_initcall() but I actually want to use that for the
IOMMU initialisation, which has to come after the quirks, but still
before the real devices. So use fs_initcall_sync() instead -- since this
is entirely synchronous, it doesn't hurt that it'll escape the
synchronisation.

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-10-12 14:42:09 +01:00
David Woodhouse 0001026884 Mark pci_apply_final_quirks() __init rather than __devinit
It doesn't get invoked on hotplug; it can be thrown away after init.

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-10-12 14:42:06 +01:00
David Woodhouse 8d86fb2c80 Rename pci_init() to pci_apply_final_quirks(), move it to quirks.c
This function may have done more in the past, but all it does now is
apply the PCI_FIXUP_FINAL quirks. So name it sensibly and put it where
it belongs.

Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2009-10-12 14:42:04 +01:00
Gabe Black 1f56f4a2b4 PCI quirk: TI XIO200a erroneously reports support for fast b2b transfers
This quirk will disable fast back to back transfer on the secondary bus
segment of the TI Bridge.

Signed-off-by: Gabe Black <gabe.black@ni.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-10-07 09:28:17 -07:00
Linus Torvalds 4406c56d0a Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (75 commits)
  PCI hotplug: clean up acpi_run_hpp()
  PCI hotplug: acpiphp: use generic pci_configure_slot()
  PCI hotplug: shpchp: use generic pci_configure_slot()
  PCI hotplug: pciehp: use generic pci_configure_slot()
  PCI hotplug: add pci_configure_slot()
  PCI hotplug: clean up acpi_get_hp_params_from_firmware() interface
  PCI hotplug: acpiphp: don't cache hotplug_params in acpiphp_bridge
  PCI hotplug: acpiphp: remove superfluous _HPP/_HPX evaluation
  PCI: Clear saved_state after the state has been restored
  PCI PM: Return error codes from pci_pm_resume()
  PCI: use dev_printk in quirk messages
  PCI / PCIe portdrv: Fix pcie_portdrv_slot_reset()
  PCI Hotplug: convert acpi_pci_detect_ejectable() to take an acpi_handle
  PCI Hotplug: acpiphp: find bridges the easy way
  PCI: pcie portdrv: remove unused variable
  PCI / ACPI PM: Propagate wake-up enable for devices w/o ACPI support
  ACPI PM: Replace wakeup.prepared with reference counter
  PCI PM: Introduce device flag wakeup_prepared
  PCI / ACPI PM: Rework some debug messages
  PCI PM: Simplify PCI wake-up code
  ...

Fixed up conflict in arch/powerpc/kernel/pci_64.c due to OF device tree
scanning having been moved and merged for the 32- and 64-bit cases.  The
'needs_freset' initialization added in 6e19314cc ("PCI/powerpc: support
PCIe fundamental reset") is now in arch/powerpc/kernel/pci_of_scan.c.
2009-09-16 07:49:54 -07:00
Bjorn Helgaas fdcdaf6c4f PCI: use dev_printk in quirk messages
Convert quirk printks to dev_printk().

Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
CC: Olaf Dabrunz <od@suse.de>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-14 13:39:00 -07:00
Shane Huang e2dd90b1ad ahci: Add AMD SB900 SATA/IDE controller device IDs
Add AMD SB900 SATA/IDE controller device IDs.

Signed-off-by: Shane Huang <shane.huang@amd.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
2009-09-11 02:31:27 -04:00
Eric W. Biederman 0ba379ec0f PCI: Simplify hotplug mch quirk.
There is a very old quirk for the intel E7502 E7320 and E7525 memory
controller hubs that disables usage of msi interrupts on pcie hotplug
bridges of those devices, and disables changing the affinity of irqs.

Today all we have to do to disable msi on a specific device is to set
dev->no_msi, which is much more straightforward than the previous
logic.

The re-running of this fixup after pci hotplug happens below these
devices is totally bogus.  All of the state we change is pure software
state and we don't change the hardware at all.  Which means hotplug on
the lower devices doesn't have a chance to change this state.  So we
can safely remove the special case from the pciehp driver and the pcie
portdriver.

I suspect the special case was someone's expermental debug code that
slipped in. Certainly it isn't mentioned in commit
6fb8880a61510295aece04a542767161f624dffe aka BKrev:
41966101LJ_ogfOU0m2aE6teZfQnuQ where the code first appears.

Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-09 14:06:49 -07:00
Alexander Duyck 6f1186be4f PCI quirk: update 82576 device ids in SR-IOV quirks list
This patch adds the most recent additions to the list of 82576 device IDs
to the list of devices needing the SR-IOV quirk.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-09 13:29:43 -07:00
Tejun Heo 6dab62ee5a PCI: apply nv_msi_ht_cap_quirk on resume too
http://bugzilla.kernel.org/show_bug.cgi?id=12542 reports that with the
quirk not applied on resume, msi stops working after resuming and mcp78s
ahci fails due to IRQ mis-delivery.  Apply it on resume too.

Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Peer Chen <pchen@nvidia.com>
Cc: Tj <linux@tjworld.net>
Reported-by: Nicolas Derive <kalon33@ubuntu.com>
Cc: Greg KH <greg@kroah.com>
Cc: <stable@kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-09 13:29:26 -07:00
Jean Delvare 6b5096e4d4 PCI: Unhide the SMBus on the Compaq Evo D510 USDT
One more form factor for Compaq Evo D510, which needs the same quirk
as the other form factors. Apparently there's no hardware monitoring
chip on that one, but SPD EEPROMs, so it's still worth unhiding the
SMBus.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Tested-by: Nuzhna Pomoshch <nuzhna_pomoshch@yahoo.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-09 13:29:24 -07:00
Alan Cox 7a661c6f10 PCI: More PATA quirks for not entering D3
The ALi loses some state if it goes into D3. Unfortunately even with the
chipset documents I can't figure out how to restore some bits of it.

The VIA one saves/restores apparently fine but the ACPI _GTM methods break
on some platforms if we do this and this causes cable misdetections.

These are both effectively regressions as historically nothing matched the
devices and then decided not to bind to them. Nowdays something is binding
to all sorts of devices and a result they get dumped into D3.

Signed-off-by: Alan Cox <alan@linux.intel.com>
Acked-by: Jeff Garzik <jeff@garzik.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-06-29 12:14:04 -07:00
Linus Torvalds 59ef7a83f1 Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (74 commits)
  PCI: make msi_free_irqs() to use msix_mask_irq() instead of open coded write
  PCI: Fix the NIU MSI-X problem in a better way
  PCI ASPM: remove get_root_port_link
  PCI ASPM: cleanup pcie_aspm_sanity_check
  PCI ASPM: remove has_switch field
  PCI ASPM: cleanup calc_Lx_latency
  PCI ASPM: cleanup pcie_aspm_get_cap_device
  PCI ASPM: cleanup clkpm checks
  PCI ASPM: cleanup __pcie_aspm_check_state_one
  PCI ASPM: cleanup initialization
  PCI ASPM: cleanup change input argument of aspm functions
  PCI ASPM: cleanup misc in struct pcie_link_state
  PCI ASPM: cleanup clkpm state in struct pcie_link_state
  PCI ASPM: cleanup latency field in struct pcie_link_state
  PCI ASPM: cleanup aspm state field in struct pcie_link_state
  PCI ASPM: fix typo in struct pcie_link_state
  PCI: drivers/pci/slot.c should depend on CONFIG_SYSFS
  PCI: remove redundant __msi_set_enable()
  PCI PM: consistently use type bool for wake enable variable
  x86/ACPI: Correct maximum allowed _CRS returned resources and warn if exceeded
  ...
2009-06-22 11:59:51 -07:00
Michal Miroslaw 74c5742897 PCI quirk: HP hides SMBus controller in Compaq nx9500 laptops
I found no references to SMBus in ACPI DSDT disassembly on my laptop
so this should be safe.

Signed-off-by: Michal Miroslaw <mirq-linux@rere.qmqm.pl>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-06-16 14:29:28 -07:00
Michal Miroslaw 26c56dc0c4 PCI quirk: unhide 'Overflow' device on i828{6,7}5P/PE chipsets
Some BIOSes hide 'overflow' device (dev #6) for i82875P/PE chipsets.
The same happens for i82865P/PE. Add a quirk to enable this device.
This allows i82875 EDAC driver to bind to chipset's dev #6 and not
dev #0 as the latter is used by AGP driver.

On my laptop (i82865P based) ACPI code is disabling this device
again in \_SB.PCI0._CRS method (called at least at PNP init time).
This can be easily worked around by patching DSDT.

[akpm@linux-foundation.org: coding-style fixes]
Signed-off-by: Michal Miroslaw <mirq-linux@rere.qmqm.pl>
Acked-by: Doug Thompson <norsk5@yahoo.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-06-16 14:29:08 -07:00
Mats Erik Andersson 4096ed0fc7 PCI: expose SMBus on Asus notebook A6L
Addition of one unknown subsystem identifier to the quirks handler for
chipset i82855GM_HB on notebook Asus A6L. This exposes the otherwise
hidden SMBus controller within the south bridge ICH4-M.

Signed-off-by: Mats Erik Andersson <mats.andersson@gisladisker.se>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-06-11 12:04:22 -07:00
David S. Miller bb803cfbec Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
Conflicts:
	drivers/scsi/fcoe/fcoe.c
2009-05-18 21:08:20 -07:00
Alexander Duyck dcb4ea2ea2 pci: update 82576 sr-iov quirk with latest device IDs
The current quirk doesn't include all 82576 device IDs.  This update
resolves that.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2009-05-06 15:33:44 -07:00
Thomas Renninger 162dedd39d PCI quirk: disable MSI on VIA VT3364 chipsets
Without this patch, Broadcom BCM5906 Ethernet controllers set up via MSI
cause the machine to hang.  Tejun agreed that the best is to blacklist
the whole chipset and after adding it, seeing the other VIA quirks
disabling MSI, this very much looks like the right way.

Cc: <stable@kernel.org>
Signed-off-by: Thomas Renninger <trenn@suse.de>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-04-22 13:53:03 -07:00
Yuji Shimada 0cdbe30f0b PCI: don't corrupt enable_cnt when doing manual resource alignment
This patch fixes breakage of of enable_cnt in quirk_resource_alignment.

Currently, quirk_resource_alignment calls pci_disable_device.
pci_disable_device decrements enable_cnt, so that enable_cnt becomes -1.

The patch disables memory decoding, writing command register directly.
So enable_cnt is not broken.

Signed-off-by: Yuji Shimada <shimada-yxb@necst.nec.co.jp>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-04-06 11:27:58 -07:00
Yu Zhao 7eb93b175d PCI: SR-IOV quirk for Intel 82576 NIC
If BIOS doesn't allocate resources for the SR-IOV BARs, zero the Flash
BAR and program the SR-IOV BARs to use the old Flash Memory Space.

Please refer to Intel 82576 Gigabit Ethernet Controller Datasheet
section 7.9.2.14.2 for details.
http://download.intel.com/design/network/datashts/82576_Datasheet.pdf

Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-04-06 11:21:40 -07:00
Yinghai Lu eeafda70bf PCI: fix HT MSI mapping fix
Impact: fix bug

This patch reworks the nv_msi_ht_cap_quirk() and will only try to avoid
to enable ht_msi on device following that root dev, and don't touch that
root dev, but only do that trick with end_device on the chain.

Reported-by: Prakash Punnoor <prakash@punnoor.de>
Tested-by: Prakash Punnoor <prakash@punnoor.de>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-03-30 12:15:52 -07:00
Yinghai Lu de7453065d PCI: don't enable too much HT MSI mapping
Impact: fix bug

Prakash reported that his c51-mcp51 system ondie sound card doesn't work
MSI but if he hack out the HT-MSI on mcp51, the MSI will work well with
sound card.

This patch reworks nv_msi_ht_cap_quirk() and will only avoid enabling
ht_msi on devices following that root device.

Reported-by: Prakash Punnoor <prakash@punnoor.de>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-03-26 16:09:14 -07:00
David O'Shea 8293b0f629 PCI: Compaq Evo D510 SMBus quirk using USB instead of VGA
On the Compaq Evo D510 SFF/CMT, a PCI quirk activated the SMBus device
based on detection of the on-board VGA controller, but the on-board
VGA is disabled if an AGP card is inserted, so look for one of the USB
controllers instead.

Signed-off-by: David O'Shea <dcoshea@hotmail.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-03-20 10:48:19 -07:00
Yuji Shimada 32a9a682be PCI: allow assignment of memory resources with a specified alignment
This patch allows memory resources to be assigned with a specified
alignment at boot-time or run-time. The patch is useful when we use PCI
pass-through, because page-aligned memory resources are required to
securely share PCI resources with guest drivers.

If you want to assign the resource at boot time, please set
"pci=resource_alignment=" boot parameter.

This is format of "pci=resource_alignment=" boot parameter:

        [<order of align>@][<domain>:]<bus>:<slot>.<func>[; ...]
                Specifies alignment and device to reassign
                aligned memory resources.
                If <order of align> is not specified, PAGE_SIZE is
                used as alignment.
                PCI-PCI bridge can be specified, if resource
                windows need to be expanded.

This is example:

        pci=resource_alignment=20@07:00.0;18@0f:00.0;00:1d.7

If you want to assign the resource at run-time, please set
"/sys/bus/pci/resource_alignment" file, and hot-remove the device and
hot-add the device.  For this purpose, fakephp or PCI hotplug interfaces
can be used.

The format of "/sys/bus/pci/resource_alignment" file is the same with
boot parameter. You can use "," instead of ";".

For example:

        # cd /sys/bus/pci
        # echo -n 20@12:00.0 > resource_alignment
        # echo 1 > devices/0000:12:00.0/remove
        # echo 1 > rescan

Reviewed-by: Alex Chiang <achiang@hp.com>
Reviewed-by: Yu Zhao <yu.zhao@intel.com>
Signed-off-by: Yuji Shimada <shimada-yxb@necst.nec.co.jp>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-03-20 10:48:15 -07:00
Jiri Slaby 4c9c16867e PCI quirk: don't mark one netmos as class other
Let it stay as serial, since it doesn't have subdevice in the form of 0x00PS.

Signed-off-by: Jiri Slaby <jirislaby@gmail.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-03-19 19:29:31 -07:00
Prakash Punnoor 6a958d5b28 pci: Fix typo in message while disabling HT MSI mapping
"Enabling" should read "Disabling"

Signed-off-by: Prakash Punnoor <prakash@punnoor.de>
Signed-off-by: Matthew Wilcox <willy@linux.intel.com>
2009-03-12 15:42:29 -04:00
Prakash Punnoor 7726c3308a pci: don't disable too many HT MSI mapping
Prakash's system needs MSI disabled on some bridges, but not all.
This seems to be the minimal fix for 2.6.29, but should be replaced
during 2.6.30.

Signed-off-by: Prakash Punnoor <prakash@punnoor.de>
Signed-off-by: Matthew Wilcox <willy@linux.intel.com>
2009-03-12 15:41:57 -04:00
Alexander Duyck 649426efcf PCI: Add PCI quirk to disable L0s ASPM state for 82575 and 82598
This patch is intended to disable L0s ASPM link state for 82598 (ixgbe)
parts due to the fact that it is possible to corrupt TX data when coming
back out of L0s on some systems.  The workaround had been added for 82575
(igb) previously, but did not use the ASPM api.  This quirk uses the ASPM
api to prevent the ASPM subsystem from re-enabling the L0s state.

Instead of adding the fix in igb to the ixgbe driver as well it was
decided to move it into a pci quirk.  It is necessary to move the fix out
of the driver and into a pci quirk in order to prevent the issue from
occuring prior to driver load to handle the possibility of the device being
passed to a VM via direct assignment.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
CC: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Matthew Wilcox <willy@linux.intel.com>
2009-03-12 15:09:41 -04:00
Stefan Assmann bbe194433b PCI: AMD 813x B2 devices do not need boot interrupt quirk
Turns out that the new AMD 813x devices do not need the
quirk_disable_amd_813x_boot_interrupt quirk to be run on them.  If it
is, no interrupts are seen on the PCI-X adapter.

From: Stefan Assmann <sassmann@novell.com>
Reported-by: Jamie Wellnitz <Jamie.Wellnitz@emulex.com>
Tested-by: Jamie Wellnitz <Jamie.Wellnitz@emulex.com>
Cc: stable <stable@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Jesse Barnes <jbarnes@hobbes.lan>
2009-02-26 14:08:09 -08:00
Yinghai Lu 1dec6b054d PCI: don't enable too many HT MSI mappings
Prakash reported that his c51-mcp51 ondie sound card doesn't work with
MSI.  But if he hacks out the HT-MSI quirk, MSI works fine.

So this patch reworks the nv_msi_ht_cap_quirk().  It will now only
enable ht_msi on own its root device, avoiding enabling it on devices
following that root dev.

Reported-by: Prakash Punnoor <prakash@punnoor.de>
Tested-by: Prakash Punnoor <prakash@punnoor.de>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Jesse Barnes <jbarnes@hobbes.lan>
2009-02-24 09:34:31 -08:00
Yinghai Lu e0ae4f5503 PCI quirk: enable MSI on 8132
David reported that LSI SAS doesn't work with MSI.  It turns out that
his BIOS doesn't enable it, but the HT MSI 8132 does support HT MSI.
Add quirk to enable it

Cc: stable@kernel.org
Reported-by: David Lang <david@lang.hm>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-02-18 10:59:46 -08:00
Adam Jackson 999da9fd48 PCI quirks: piix3: warn softer about enabling passive release
All the other quirks are dev_info() not dev_err(), this one isn't special.
This makes 'quiet' boot in qemu really quiet.

Signed-off-by: Adam Jackson <ajax@redhat.com>
Cc: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Cc: Jeff Garzik <jeff@garzik.org>
Cc: Tejun Heo <htejun@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-01-07 11:12:58 -08:00
Linus Torvalds 894886e5d3 PCI: extend on the ICH motherboard IO decode quirk list
This adds more LPC controller IO range decode quirks for the Intel ICH
family of chipsets. They differ a bit between the older ICH6 chipset and
the more modern layout of the ICH7-ICH10 chipsets.

This patch just prints out the IO decode information found by the quirks,
but eventually we may want to add them to the resource tree, in order to
know to avoid allocating things over them.

That's especially true if it turns out that any firmware ends up putting
the magic motherboard resources in an address range that we use for
dynamic allocations (ie above PCIBIOS_MIN_IO, which is 0x1000 on x86).

Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Rafael J. Wysocki <rjw@sisk.pl>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Greg KH <greg@kroah.com>
Cc: Frans Pop <elendil@planet.nl>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-01-07 11:12:39 -08:00
Jesse Barnes bfb0f330a6 PCI: fixup whitespace in quirks.c
Had a space before tab in do_fixups, prototype wasn't wrapped properly either.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-01-07 11:12:22 -08:00
Ingo Molnar fa623d1b02 Merge branches 'x86/apic', 'x86/cleanups', 'x86/cpufeature', 'x86/crashdump', 'x86/debug', 'x86/defconfig', 'x86/detect-hyper', 'x86/doc', 'x86/dumpstack', 'x86/early-printk', 'x86/fpu', 'x86/idle', 'x86/io', 'x86/memory-corruption-check', 'x86/microcode', 'x86/mm', 'x86/mtrr', 'x86/nmi-watchdog', 'x86/pat2', 'x86/pci-ioapic-boot-irq-quirks', 'x86/ptrace', 'x86/quirks', 'x86/reboot', 'x86/setup-memory', 'x86/signal', 'x86/sparse-fixes', 'x86/time', 'x86/uv' and 'x86/xen' into x86/core 2008-12-23 16:27:23 +01:00
Andreas Petlund 75e07fc3d8 pci: Added quirk to disable msi for MCP55 NIC on Asus P5N32-SLI Premium
Signed-off-by: Andreas Petlund <andreas@petlund.no>
Signed-off-by: David S. Miller <davem@davemloft.net>
2008-11-20 20:42:25 -08:00
Yu Zhao bffadffd43 PCI: fix VPD limit quirk for Broadcom 5708S
VPD quirks need to be called after the VPD capability is initialized.
Since VPD initialization now runs after pci_fixup_header (due to the
capabilities consolidation), VPD quirks should be done at
pci_fixup_final stage correspondingly.

Tested-by: Eric Dumazet <dada1@cosmosbay.com>
Signed-off-by: Yu Zhao <yu.zhao@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-11-03 14:30:27 -08:00
Ingo Molnar 7a9787e1eb Merge commit 'v2.6.28-rc2' into x86/pci-ioapic-boot-irq-quirks 2008-10-28 16:26:12 +01:00
Fenghua Yu 3b15e58198 x86/PCI: build failure at x86/kernel/pci-dma.c with !CONFIG_PCI
On Thu, Oct 23, 2008 at 04:09:52PM -0700, Alexander Beregalov wrote:
> arch/x86/kernel/built-in.o: In function `iommu_setup':
> pci-dma.c:(.init.text+0x36ad): undefined reference to `forbid_dac'
> pci-dma.c:(.init.text+0x36cc): undefined reference to `forbid_dac'
> pci-dma.c:(.init.text+0x3711): undefined reference to `forbid_dac

This patch partially reverts a patch to add IOMMU support to ia64.  The
forbid_dac variable was incorrectly moved to quirks.c, which isn't built
when PCI is disabled.

Tested-by: "Alexander Beregalov" <a.beregalov@gmail.com>
Acked-by: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-10-24 11:09:43 -07:00
David Woodhouse b876d08f81 Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:

	drivers/pci/dmar.c
2008-10-21 19:42:20 +01:00
Jesse Barnes 1543c90c39 PCI: remove #ifdef DEBUG around dev_dbg call
No longer needed since we don't use the function symbol stuff anymore.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-10-20 11:01:50 -07:00
Yinghai Lu c9bbb4abb6 PCI: use %pF instead of print_fn_descriptor_symbol() in quirks.c
Use %pF instead of print_fn_descriptor_symbol() in quirks.c to get the name of
the hook we're calling.

Signed-off-by: Yinghai Lu <yhlu.kernel@gmail.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-10-20 10:54:26 -07:00
Thomas Petazzoni 3d13731024 PCI: allow quirks to be compiled out
This patch adds the CONFIG_PCI_QUIRKS option which allows to remove all
the PCI quirks, which are not necessarily used on embedded systems when
PCI is working properly. As this is a size-reduction option, it depends
on CONFIG_EMBEDDED. It allows to save almost 12 kilobytes of kernel
code:

   text	   data	    bss	    dec	    hex	filename
1287806	 123596	 212992	1624394	 18c94a	vmlinux.old
1275854	 123596	 212992	1612442	 189a9a	vmlinux
 -11952       0       0  -11952   -2EB0 +/-

This patch has originally been written by Zwane Mwaikambo
<zwane@arm.linux.org.uk> and is part of the Linux Tiny project.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-10-20 10:53:40 -07:00
Fenghua Yu 5b6985ce8e intel-iommu: IA64 support
The current Intel IOMMU code assumes that both host page size and Intel
IOMMU page size are 4KiB. The first patch supports variable page size.
This provides support for IA64 which has multiple page sizes.

This patch also adds some other code hooks for IA64 platform including
DMAR_OPERATION_TIMEOUT definition.

[dwmw2: some cleanup]
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2008-10-18 14:29:15 +01:00
Linus Torvalds 2e532d68a2 {pci,pnp} quirks.c: don't use deprecated print_fn_descriptor_symbol()
I dunno how this missed Bjorn and his quest to use %pF in commit
c80cfb0406 ("vsprintf: use new vsprintf
symbolic function pointer format"), but it did.

So use %pF in the two remaining places that still tried to print out
function pointers by hand.

Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-10-16 16:11:43 -07:00
Dean Hildebrand 35405f256d PCI: Limit VPD length for Broadcom 5708S
BCM5706S wont work correctly unless VPD length truncated to 128

Signed-off-by: Dean Hildebrand <dhildeb@us.ibm.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-08-07 17:47:37 -07:00
Eric Dumazet 9d82d8eaec PCI: add Broadcom 5708S to VPD length quirk
BCM5708S wont work correctly unless VPD length truncated to 128

Signed-off-by: Eric Dumazet <dada1@cosmosbay.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-08-07 06:52:01 -07:00
Alan Cox 979b1791e5 PCI: add D3 power state avoidance quirk
Libata has some hacks to deal with certain controllers going silly in D3
state. The right way to handle this is to keep a PCI device flag for
such devices. That can then be generalised for no ATA devices with power
problems.

Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-07-28 15:12:11 -07:00
Stefan Assmann 41b9eb264c x86, pci: introduce config option for pci reroute quirks (was: [PATCH 0/3] Boot IRQ quirks for Broadcom and AMD/ATI)
This is against linux-2.6-tip, branch pci-ioapic-boot-irq-quirks.

From: Stefan Assmann <sassmann@suse.de>
Subject: Introduce config option for pci reroute quirks

The config option X86_REROUTE_FOR_BROKEN_BOOT_IRQS is introduced to
enable (or disable) the redirection of the interrupt handler to the boot
interrupt line by default. Depending on the existence of interrupt
masking / threaded interrupt handling in the kernel (vanilla, rt, ...)
and the maturity of the rerouting patch, users can enable or disable the
redirection by default.

This means that the reroute quirk can be applied to any kernel without
changing it.

Interrupt sharing could be increased if this option is enabled. However this
option is vital for threaded interrupt handling, as done by the RT kernel.
It should simplify the consolidation with the RT kernel.

The option can be overridden by either pci=ioapicreroute or
pci=noioapicreroute.

Signed-off-by: Stefan Assmann <sassmann@suse.de>
Signed-off-by: Olaf Dabrunz <od@suse.de>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: Jon Masters <jonathan@jonmasters.org>
Cc: Ihno Krumreich <ihno@suse.de>
Cc: Sven Dietrich <sdietrich@suse.de>
Cc: Daniel Gollub <dgollub@suse.de>
Cc: Felix Foerster <ffoerster@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-18 19:31:19 +02:00
Ingo Molnar 3e370b29d3 Merge branch 'linus' into x86/pci-ioapic-boot-irq-quirks
Conflicts:

	drivers/pci/quirks.c

Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-18 19:31:12 +02:00
Linus Torvalds dc7c65db28 Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6
* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci-2.6: (72 commits)
  Revert "x86/PCI: ACPI based PCI gap calculation"
  PCI: remove unnecessary volatile in PCIe hotplug struct controller
  x86/PCI: ACPI based PCI gap calculation
  PCI: include linux/pm_wakeup.h for device_set_wakeup_capable
  PCI PM: Fix pci_prepare_to_sleep
  x86/PCI: Fix PCI config space for domains > 0
  Fix acpi_pm_device_sleep_wake() by providing a stub for CONFIG_PM_SLEEP=n
  PCI: Simplify PCI device PM code
  PCI PM: Introduce pci_prepare_to_sleep and pci_back_from_sleep
  PCI ACPI: Rework PCI handling of wake-up
  ACPI: Introduce new device wakeup flag 'prepared'
  ACPI: Introduce acpi_device_sleep_wake function
  PCI: rework pci_set_power_state function to call platform first
  PCI: Introduce platform_pci_power_manageable function
  ACPI: Introduce acpi_bus_power_manageable function
  PCI: make pci_name use dev_name
  PCI: handle pci_name() being const
  PCI: add stub for pci_set_consistent_dma_mask()
  PCI: remove unused arch pcibios_update_resource() functions
  PCI: fix pci_setup_device()'s sprinting into a const buffer
  ...

Fixed up conflicts in various files (arch/x86/kernel/setup_64.c,
arch/x86/pci/irq.c, arch/x86/pci/pci.h, drivers/acpi/sleep/main.c,
drivers/pci/pci.c, drivers/pci/pci.h, include/acpi/acpi_bus.h) from x86
and ACPI updates manually.
2008-07-16 17:25:46 -07:00
Olaf Dabrunz 88d1dce3a7 PCI quirks: call boot IRQ quirks at end of device init and during resume
It is not necessary to call boot IRQ quirks before the BARs of the bridges are
probed. The normal case is to use DECLARE_PCI_FIXUP_FINAL, so we use this
instead now.

After a resume, we need to call the quirks again.

Signed-off-by: Olaf Dabrunz <od@suse.de>
Signed-off-by: Stefan Assmann <sassmann@suse.de>
Cc: Jon Masters <jonathan@jonmasters.org>
Cc: Olaf Dabrunz <od@suse.de>
Cc: Stefan Assmann <sassmann@suse.de>
Cc: Ihno Krumreich <ihno@suse.de>
Cc: Sven Dietrich <sdietrich@suse.de>
Cc: Daniel Gollub <dgollub@suse.de>
Cc: Felix Foerster <ffoerster@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-13 22:59:47 +02:00
Olaf Dabrunz 542622da89 PCI quirks: disable AMD/ATI legacy boot interrupt generation
Add quirks for several AMD/ATI chipsets to prevent generation of legacy boot
interrupts.

Integrates a separate older quirk to make IO-APIC mode work on
AMD 8131 rev. A0 and B0, which was due to an AMD erratum.

Signed-off-by: Olaf Dabrunz <od@suse.de>
Signed-off-by: Stefan Assmann <sassmann@suse.de>
Cc: Jon Masters <jonathan@jonmasters.org>
Cc: Olaf Dabrunz <od@suse.de>
Cc: Stefan Assmann <sassmann@suse.de>
Cc: Ihno Krumreich <ihno@suse.de>
Cc: Sven Dietrich <sdietrich@suse.de>
Cc: Daniel Gollub <dgollub@suse.de>
Cc: Felix Foerster <ffoerster@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-13 22:59:46 +02:00
Olaf Dabrunz 7725118815 PCI quirks: add quirk to disable boot interrupt generation on broadcom HT1000
Signed-off-by: Olaf Dabrunz <od@suse.de>
Signed-off-by: Stefan Assmann <sassmann@suse.de>
Cc: Jon Masters <jonathan@jonmasters.org>
Cc: Olaf Dabrunz <od@suse.de>
Cc: Stefan Assmann <sassmann@suse.de>
Cc: Ihno Krumreich <ihno@suse.de>
Cc: Sven Dietrich <sdietrich@suse.de>
Cc: Daniel Gollub <dgollub@suse.de>
Cc: Felix Foerster <ffoerster@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-13 22:59:46 +02:00
Bernhard Walle b0356cd0e7 pci, acpi: reroute PCI interrupt to legacy boot interrupt equivalent, warning fix
This patch just fixes the compiler warning:

  drivers/pci/quirks.c: In function ‘quirk_reroute_to_boot_interrupts_intel’:
  drivers/pci/quirks.c:1375: warning: unused variable ‘i’

Signed-off-by: Bernhard Walle <bwalle@suse.de>
Cc: sassmann@suse.de
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-08 17:50:55 +02:00
Stefan Assmann e1d3a90846 pci, acpi: reroute PCI interrupt to legacy boot interrupt equivalent
Some chipsets (e.g. intel 6700PXH) generate a legacy INTx when the
IRQ entry in the chipset's IO-APIC is masked (as, e.g. the RT kernel
does during interrupt handling). On chipsets where this INTx generation
cannot be disabled, we reroute the valid interrupts to their legacy
equivalent to get rid of spurious interrupts that might otherwise bring
down (vital) interrupt lines through spurious interrupt detection in
note_interrupt().

This patch benefited from discussions with Alexander Graf, Torsten Duwe,
Ihno Krumreich, Daniel Gollub, Hannes Reinecke. The conclusions we drew
and the patch itself are the authors' responsibility alone.

Signed-off-by: Stefan Assmann <sassmann@suse.de>
Signed-off-by: Olaf Dabrunz <od@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-08 17:50:53 +02:00
Stefan Assmann 426b3b8d53 pci: add quirk to disable boot interrupt generation on intel 6300ESB
Add a quirk to disable legacy boot interrupt generation on intel devices
that support disabling it.

This patch benefited from discussions with Alexander Graf, Torsten Duwe,
Ihno Krumreich, Daniel Gollub, Hannes Reinecke. The conclusions we drew
and the patch itself are the authors' responsibility alone.

Signed-off-by: Stefan Assmann <sassmann@suse.de>
Signed-off-by: Olaf Dabrunz <od@suse.de>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-08 17:50:52 +02:00
Tejun Heo 66d715c95a pci: VT3336 can't do MSI either
It seems VT3336 can't do msi either as with its bro 3351.  Disable it.
Reported in the following SUSE bug.

  https://bugzilla.novell.com/show_bug.cgi?id=300001

Signed-off-by: Tejun Heo <tj@kernel.org>
Acked-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-07-04 10:40:05 -07:00
Benjamin Li 99cb233d60 PCI: Limit VPD read/write lengths for Broadcom 5706, 5708, 5709 rev.
For Broadcom 5706, 5708, 5709 rev. A nics, any read beyond the
VPD end tag will hang the device.  This problem was initially
observed when a vpd entry was created in sysfs
('/sys/bus/pci/devices/<id>/vpd').   A read to this sysfs entry
will dump 32k of data.  Reading a full 32k will cause an access
beyond the VPD end tag causing the device to hang.  Once the device
is hung, the bnx2 driver will not be able to reset the device.
We believe that it is legal to read beyond the end tag and
therefore the solution is to limit the read/write length.

A majority of this patch is from Matthew Wilcox who gave code for
reworking the PCI vpd size information.  A PCI quirk added for the
Broadcom NIC's to limit the read/write's.

Signed-off-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: Matthew Wilcox <willy@linux.intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-07-02 11:25:54 -07:00
Krzysztof Helt 27e4685973 PCI: unhide the SMBus on the Compaq Deskpro EN
This patch unhides the SMBus on Compaq Deskpro EN
SFF P667 with the Intel 815E chipset. Unhiding it reveals
a THMC51 hardware monitoring chip.

Jean Delvare has checked that this machine has no ACPI
magic touching the SMBus nor the hardware monitoring chip,
so this should be safe.

The patch was tested on Fedora Core 9 with 2.6.25.4 kernel.

Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl>
Tested-by: Rafał Haładuda <rh1985@wp.pl>
CC: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-06-10 11:57:26 -07:00
Jean Delvare 10260d9ab7 PCI: Unhide the SMBus on the Compaq Evo D510
One more machine with a hidden Intel SMBus. Unhiding it reveals a SMSC
EMC6D100 hardware monitoring chip. I have checked that this machine
has no ACPI magic touching the SMBus nor the hardware monitoring chip,
so this should be safe.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-06-10 10:59:55 -07:00
Rafael J. Wysocki e1a2a51e68 Suspend/Resume bug in PCI layer wrt quirks
Some quirks should be called with interrupt disabled, we can't directly
call them in .resume_early. Also the patch introduces
pci_fixup_resume_early and pci_fixup_suspend, which matches current
device core callbacks (.suspend/.resume_early).

TBD: Somebody knows why we need quirk resume should double check if a
quirk should be called in resume or resume_early. I changed some per my
understanding, but can't make sure I fixed all.

Signed-off-by: Shaohua Li <shaohua.li@intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-06-10 10:59:46 -07:00
Linus Torvalds a442ac512f Clean up 'print_fn_descriptor_symbol()' types
Everybody wants to pass it a function pointer, and in fact, that is what
you _must_ pass it for it to make sense (since it knows that ia64 and
ppc64 use descriptors for function pointers and fetches the actual
address from there).

So don't make the argument be a 'unsigned long' and force everybody to
add a cast.

Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-05-15 17:50:37 -07:00
Björn Krombholz 439a7733e8 PCI: enable nv_msi_ht_cap_quirk for ALi bridges
This applies the NVidia MSI enabled flag for HT capable devices quirk
to ALi bridges as well.

As described in more detail in http://bugzilla.kernel.org/show_bug.cgi?id=10667
this is required for my board which is using an nForce 3 250Gb chipset with an
ALi M1695 northbridge.

It fixes a regression introduced in 2.6.24 that made the internal NIC of the
board unusable (MSI initialisation of the NIC but disabled MSI on the
northbridge devices.

Signed-off-by: Björn Krombholz <fox.box@gmail.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-05-13 09:51:54 -07:00
Tim Yamin bc04327456 PCI: Update VIA CX700 quirk
This follows up 53a9bf4267. Some newer
CX700 BIOSes from our vendor have PCI Bus Parking disabled but PCI
Master read caching enabled. This creates problems such as system
freezing when both the network controller and the USB controller are
active and one of them is pretty busy (e.g. heavy network traffic).

This patch separates the checks and both the bus parking and the read
caching are disabled independently if either is enabled by the BIOS.

Signed-off-by: Tim Yamin <tim.yamin@zonbu.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-04-20 21:47:07 -07:00
Bjorn Helgaas 0255f543d9 PCI: simplify quirk debug output
print_fn_descriptor_symbol() prints the address if we don't have a symbol,
so no need to print both.

Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-04-20 21:47:06 -07:00
Jean Delvare a99acc832d pci: revert SMBus unhide on HP Compaq nx6110
This reverts commit 3c0a654e39 and
fixes kernel bug #10245:

	http://bugzilla.kernel.org/show_bug.cgi?id=10245

The HP Compaq nc6120 has the same PCI sub-device ID as the nx6110, and the
SMBus is used by ACPI for thermal management on the nc6120, so Linux should
not attach a native driver to it.  This means that this quirk is unsafe and
has to be removed.

I also added a comment to help developers realize that adding new IDs to this
SMBus unhiding quirk table should be done only with great care, and in
particular only after checking that ACPI is not making use of the SMBus.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Cc: Tomasz Koprowski <tomek@koprowski.org>
Acked-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-03-28 14:45:22 -07:00
Bjorn Helgaas 415b6d0e89 PCI: consolidate duplicated MSI enable functions
Two recent patches added basically the same code to turn on
HT MSI mapping:

    http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=6bae1d96c6d7dde078994f6cb98235fd46f8736b
    http://git.kernel.org/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commitdiff;h=9dc625e72309e1c919ea3e7f51d0ffca96123787

There's no need to have both, so this patch removes one copy.

Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-03-04 15:07:03 -08:00
Bjorn Helgaas d6505a5236 PCI: use dev_printk in quirk messages
Convert quirk printks to dev_printk().

Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-03-04 15:07:02 -08:00
Peer Chen 9dc625e723 PCI: quirks: set 'En' bit of MSI Mapping for devices onHT-based nvidia platform
According to HT spec, to get message interrupt from devices mapped to HT
interrupt message, the 'En' bit of MSI Mapping capability need to be set.
The patch do this setting in quirks code for the devices on HT-based nvidia
platform.

[akpm@linux-foundation.org: coding-style fixes]

Signed-off-by: Andy Currid <acurrid@nvidia.com>
Signed-off-by: Peer Chen <pchen@nvidia.com>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-02-21 15:34:37 -08:00
Crane Cai 05a7d22b9f PCI: AMD SATA IDE mode quirk
PCI: modify SATA IDE mode quirk
When initialize and resume, SB600/700/800 need to set SATA mode
correctly.

Signed-off-by: Crane Cai <crane.cai@amd.com>
Acked-by: Jeff Garzik <jeff@garzik.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-02-21 15:34:35 -08:00
Shane Huang 4600c9d74e PCI: modify SB700 SATA MSI quirk
SB700 SATA MSI bug will be fixed in SB700 revision A21 at hardware
level, but the SB700 revision older than A21 will also be found in the
market.  This patch modify the original quirk commit
bc38b411fe instead of withdrawing it.
The patch also removes quirk to 0x4395 because 0x4395 is SB800 device
ID.

Signed-off-by: Shane Huang <shane.huang@amd.com>
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-02-01 15:04:30 -08:00
bjorn.helgaas@hp.com f0fda801da PCI: use dev_printk in quirk messages
Convert quirk printks to dev_printk().

I made the MSI disable messages a little more consistent:

    - always use "disabled", not "deactivated"
    - specify "device MSI disabled" or "subordinate MSI disabled" when
      disabling MSI for only a specific device or subordinate bus

Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-02-01 15:04:26 -08:00
bjorn.helgaas@hp.com 9f23ed3b94 PCI: print quirk name in debug messages
Instead of printing this:

    PCI: Calling quirk c023b250 for 0000:00:00.0

we can print this:

    pci 0000:00:00.0: calling quirk 0xc023b270: quirk_cardbus_legacy+0x0/0x30()

The address is superfluous because sprint_symbol() includes the
address if the symbol lookup fails, but this is the same style used
in do_initcalls() and pnp_fixup_device().

Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-02-01 15:04:26 -08:00
Ivan Kokshaysky e64aeccbec PCI: fix for quirk_e100_interrupt()
Check that the e100 is in the D0 power state. If it's not, it won't
respond to MMIO accesses and we end up with master-abort machine
checks on some platforms.

Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Auke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-02-01 15:04:26 -08:00
Sebastien Dugue 6bae1d96c6 PCI: quirk: enable MSI Mapping on HT1000
Add a quirk to enable the MSI mapping capability on HyperTransport bridges.

Wire Broadcom's HT1000 to use the quirk.

Signed-off-by: Sebastien Dugue <sebastien.dugue@bull.net>
Acked-by: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Andy Currid <acurrid@nvidia.com>
Cc: Peer Chen <pchen@nvidia.com>
Cc: Prakash Punnoor <prakash@punnoor.de>
Cc: Andrew Morton <akpm@linux-foundation.org>
Acked-by: Michael Chan <mchan@broadcom.com>
Cc: Greg KH <greg@kroah.com>
Cc: Andy Currid <acurrid@nvidia.com>
Cc: Peer Chen <pchen@nvidia.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-02-01 15:04:25 -08:00
Jean Delvare 677cc6443b PCI: Unhide the SMBus on the HP xw4100
Unhide the SMBus on the HP xw4100. This gives access to a hardware
monitoring chip (ADT7463) and to the memory module SPD EEPROMs. I
checked that ACPI wasn't accessing the SMBus, so it should be safe.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-02-01 15:04:22 -08:00
Andrew Morton 652c538eb5 PCI: drivers/pci/quirks.c: coding-style cleanup
Remove lots of space-before-) instances.  Perhaps these were a workaround for
problems in some long-dead cpp version.

Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-02-01 15:04:21 -08:00
Tim Yamin 53a9bf4267 PCI: VIA CX700 quirk to disable PCI Bus Parking
PCI Bus Parking and PCI Master read caching on the VIA CX700 is buggy and
can lead to problems such as USB2.0 packet loss if a VT6212L controller
is on the PCI bus. It's disabled by default, but some BIOSes turn these
features on and this patch reverts the configuration to the safe defaults.

Signed-off-by: Tim Yamin <tim.yamin@zonbu.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-02-01 15:04:20 -08:00
Auke Kok 2b1afa87e1 PCI: quirk_vialatency: Omit reading pci revision ID
Don't read the revision ID unnecessary since the PCI subsystem
fills this field in already.

Updated to fix a thinko bug in a previously sent patch.

Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2008-02-01 15:04:20 -08:00
Zhao Yakui d1ec7298fc ACPI: apply quirk_ich6_lpc_acpi to more ICH8 and ICH9
It is important that these resources be reserved
to avoid conflicts with well known ACPI registers.

Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2008-01-11 00:24:55 -05:00
David Miller 5257dca0bd PCI: Remove 3 incorrect MSI quirks.
Now that we have dealt with the real issue, in that some ATI SATA and
USB controllers needed the INTX_DISABLE quirk, we can remove these AMD
chipset global MSI disabling quirks.

This reverts three changesets:

4be8f90643 (PCI: disable MSI on RS690)
aea6a433f5 (PCI: disable MSI on RD580)
f122392f67 (PCI: disable MSI on RX790)

This is based upon testing and feedback from
Shane Huang <Shane.Huang@amd.com>.

Cc: Shane Huang <Shane.Huang@amd.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Acked-by: Jeff Garzik <jgarzik@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-11-05 13:35:17 -08:00
David Miller bc38b411fe PCI: Add MSI INTX_DISABLE quirks for ATI SB700/800 SATA and IXP SB400 USB
Signed-off-by: David S. Miller <davem@davemloft.net>
Acked-by: Jeff Garzik <jgarzik@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-11-05 13:35:16 -08:00
David Miller ba698ad4b7 PCI: Add quirk for devices which disable MSI when INTX_DISABLE is set.
A reasonably common problem with some devices is that they will
disable MSI generation when the INTX_DISABLE bit is set in the
PCI_COMMAND register.

Quirk this explicitly, guarding the pci_intx() calls in msi.c with
this quirk indication.

The first entries for this quirk are for 5714 and 5780 Tigon3 chips,
and thus we can remove the workaround code from the tg3.c driver.

Signed-off-by: David S. Miller <davem@davemloft.net>
Acked-by: Michael Chan <mchan@broadcom.com>
Acked-by: Jeff Garzik <jgarzik@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-11-05 13:35:16 -08:00
David Miller 1d84b5424e PCI: Add MSI quirk for ServerWorks HT1000 PCIX bridge.
This is the fix for the following problem:

https://bugzilla.redhat.com/show_bug.cgi?id=227657

The bnx2 device 5706 complains about MSI not working behind a
ServerWorks HT1000 PCIX bridge. An earlier commit to fix the problem:

e3008dedff4bdc96a5f67224cd3d8d12237082a0:

"PCI: disable MSI by default on systems with Serverworks HT1000 chips"

was not entirely correct, and has been reverted.

MSI does not work on the PCIX bus because the BIOS did not set the
HT_MSI_FLAGS_ENABLE bit in the HyperTransport MSI capability on the
bridge.  We use the existing quirk_msi_ht_cap() to detect the problem
and disable MSI in all buses behind it.

Signed-off-by: Michael Chan <mchan@broadcom.com>
Cc: Anantha Subramanyam <ananth@broadcom.com>
Cc: Naren Sankar <nsankar@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Acked-by: Jeff Garzik <jgarzik@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-11-05 13:35:16 -08:00
David Miller 2cc31879f8 PCI: Revert "PCI: disable MSI by default on systems with Serverworks HT1000 chips"
This reverts commit e3008dedff.

The real bug was an INTX issue in the tg3 ethernet chip, and
cured by commit c129d962a66c76964954a98b38586ada82cf9381

Signed-off-by: David S. Miller <davem@davemloft.net>
Acked-by: Jeff Garzik <jgarzik@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-11-05 13:35:16 -08:00
Tejun Heo 3a9e3a51dd jmicron: update quirk for JMB361/3/5/6
Set bits 0, 4, 5 and 7 of PCI configuration register 0x40 in the
quirk.  This has the following effects and is recommended by the
vendor.

* Force enable of IDE channels (used to be left alone as BIOS
  configured)

* Change initial phase behavior of PIO cycle such that the host pulls
  down the bus instead of tristating it.  Vendor recommends this
  setting.

The above settings are better for the current generation of
controllers and needed for the upcoming next generation.

Tested on JMB363.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Ethan Hsiao <ethanhsiao@jmicron.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-10-23 21:20:02 -04:00
Johannes Goecke 346ca04d05 PCI: re-enable onboard sound on "MSI K8T Neo2-FIR"
On the "MSI K8T Neo2-FIR" board the BIOS disables the onboard
soundcard, if a second PCI soundcard is present.

This patch sets the korrect register bit to enable the onboard sound.

Removed old code in /drivers/pci/quirks.c that only checks for the
PCI-ID and fires on any Board with VIA 8237.

New code in /arch/i386/pci/fixup.c checks the DMI-tables and only runs
on the specific board.


Signed-off-by: Johannes Goecke <goecke@upb.de>
Acked-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-10-12 15:03:16 -07:00
Auke Kok 651472fbff PCI: quirk_vt82c586_acpi: Omit reading PCI revision ID
Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-10-12 15:03:16 -07:00
Auke Kok aa288d4d6b PCI: quirk amd_8131_mmrbc: Omit reading pci revision ID
Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Cc: Peter Oruba <peter.oruba@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-10-12 15:03:16 -07:00
Benjamin Herrenschmidt 1bef7dc00c Fix bogus PCI quirk for e100
Linas reported me that some machines were crashing at boot in
quirk_e100_interrupt. It appears that this quirk is doing an ioremap
directly on a PCI BAR value, which isn't legal and will cause all sorts
of bad things to happen on architectures where PCI BARs don't directly
match processor bus addresses.

This fixes it by using the proper PCI resources instead which is possible
since the quirk has been moved by a previous commit to happen late enough
for that.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: Linas Vepstas <linas@austin.ibm.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-09-28 16:21:10 -07:00
gw.kernel@tnode.com d7698edca8 PCI: unhide SMBus on Compaq Deskpro EP 401963-001 motherboard
PCI quirk to unhide SMBus on Compaq Deskpro EP 401963-001 (PCA# 010174) motherboard.

Signed-off-by: Greg White <gw.kernel@tnode.com>
Acked-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-09-11 04:22:16 -07:00
Jean Delvare 18166c1a50 PCI: Run k8t_sound_hostbridge quirk only when needed
The k8t_sound_hostbridge PCI quick fires on my motherboard (Jetway
K8M8MS) while it shouldn't: the on-board sound chip is not disabled
and is working just fine. Looking at the code, I see that we are
running the quirk for two distinct register values (0x88 and 0xc8)
and then clear bit 6 (0x40). However value 0x88 already has bit 6
cleared so this is a no-op. This is what happens on my board. Thus I
believe that the quirk should only be run for register value 0xc8.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-08-22 14:48:41 -07:00
Tejun Heo f122392f67 PCI: disable MSI on RX790
RX790 can't do MSI like its predecessors.  Disable MSI on RX790.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: stable <stable@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-08-22 14:48:41 -07:00
Tejun Heo aea6a433f5 PCI: disable MSI on RD580
RD580 can't do MSI like its predecessors.  Disable MSI on RD580.

Signed-off-by: Tejun Heo <teheo@suse.de>
CC: stable <stable@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-08-22 14:48:41 -07:00
Tejun Heo 4be8f90643 PCI: disable MSI on RS690
RS690 can't do MSI like its predecessors.  Disable MSI on RS690.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Henry Su <henry.su@amd.com>
Cc: stable <stable@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-08-22 14:48:41 -07:00
Marian Balakowicz 4e68fc97b1 PCI: quirk_e100_interrupt() called too early
quirk_e100_interrupts() is called after PCI controller is initialized
and before PCI bus enumeration is performed. On some powerpc platforms
which modify PCI controller configuration and set different MEM and IO
windows than those set by firmware quirk_e100_interrupt() is causing
kernel panic as it tries to read from device BAR0 offets which at this
time points to a invalid PCI window (set by firmware).

This patch delays the quirk_100_interrupt() to pci_fixup_final phase,
which happens after bus enumeration and before PCI enable and
device driver initialization.

Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-08-22 14:48:40 -07:00
Andrew Morton b7b095c154 PCI: pci-x-pci-express-read-control-interfaces cleanups
- remove unneeded local

- 80-col fix

Cc: Peter Oruba <peter.oruba@amd.com>
Cc: Roland Dreier <rolandd@cisco.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-07-11 16:02:11 -07:00
Auke Kok 44c10138fd PCI: Change all drivers to use pci_device->revision
Instead of all drivers reading pci config space to get the revision
ID, they can now use the pci_device->revision member.

This exposes some issues where drivers where reading a word or a dword
for the revision number, and adding useless error-handling around the
read. Some drivers even just read it for no purpose of all.

In devices where the revision ID is being copied over and used in what
appears to be the equivalent of hotpath, I have left the copy code
and the cached copy as not to influence the driver's performance.

Compile tested with make all{yes,mod}config on x86_64 and i386.

Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Acked-by: Dave Jones <davej@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-07-11 16:02:10 -07:00
Peter Oruba d556ad4bbe PCI: add PCI-X/PCI-Express read control interfaces
This patch introduces an interface to read and write PCI-X / PCI-Express 
maximum read byte count values from PCI config space. There is a second 
function that returns the maximum _designed_ read byte count, which marks the 
maximum value for a device, since some drivers try to set MMRBC to the 
highest allowed value and rely on such a function.

Based on patch set by Stephen Hemminger <shemminger@linux-foundation.org>

Cc: Stephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: Peter Oruba <peter.oruba@amd.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-07-11 16:02:07 -07:00
Jay Cliburn 184b812f7d PCI: quirk disable MSI on via vt3351
The Via VT3351 APIC does not play well with MSI and unleashes a flood
of APIC errors when MSI is used to deliver interrupts.  The problem
was recently exposed when the atl1 network device driver, which enables
MSI by default, stimulated APIC errors on an Asus M2V mainboard, which
employs the Via VT3351.
See http://bugzilla.kernel.org/show_bug.cgi?id=8472 for additional
details on this bug.

Signed-off-by: Jay Cliburn <jacliburn@bellsouth.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-05-31 16:56:37 -07:00
Andy Gospodarek e3008dedff PCI: disable MSI by default on systems with Serverworks HT1000 chips
I've been seeing lots of messages like these:

eth0: No interrupt was generated using MSI, switching to INTx mode.  Please
report this failure to the PCI maintainer and include system chipset
information.

On several systems that use the following Severworks HT1000 (also sometimes
labeled as a Broadcom chipset as well) bridge chips.  It doesn't appear MSI
works well (if at all) on these systems.

Signed-off-by: Andy Gospodarek <andy@greyhouse.net>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-05-31 16:56:36 -07:00
Tejun Heo ebdf7d399e pci-quirks: fix MSI disabling on RS400-200 and RS480
Commit c0affe9db4 doesn't work because
the host controller is being quirked not a PCI bridge.  This patch
reverts the commit, rename quirk_svw_msi() to quirk_disable_all_msi()
and use it instead.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Cc: Matias Alejandro Torres <torresmat@gmail.com>
Cc: Greg K-H <greg@kroah.com>
Cc: Jeff Garzik <jeff@garzik.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-31 07:58:13 -07:00
Henry Su 823777181b Add the combined mode for ATI SB700
Besides those modes in ATI SB600 SATA controller, ATI SB700 supports one
more mode:the combined mode.

The combined mode is a Legacy IDE mode used for compatibility with some old
OS without AHCI driver, but now it is not necessary for Linux since the
kernel has supported AHCI.

Signed-off-by: Luugi Marsan <luugi.marsan@amd.com>
Cc: Jeff Garzik <jeff@garzik.org>
Cc: Tejun Heo <htejun@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-05-11 18:16:01 -04:00
Tejun Heo c0affe9db4 pci-quirks: disable MSI on RS400-200 and RS480
MSI doesn't work on RS400-200 and RS480 requiring pci=nomsi kernel
boot parameter for ahci to work.  This patch disables MSI on those
chips.

  http://thread.gmane.org/gmane.linux.ide/17820
  http://thread.gmane.org/gmane.linux.ide/17516
  https://bugzilla.novell.com/show_bug.cgi?id=263893

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-05-02 19:02:43 -07:00
Jeff Garzik 8cdfb29c0c libata/IDE: remove combined mode quirk
Both old-IDE and libata should be able handle all controllers and
devices found using normal resource reservation methods.

This eliminates the awful, low-performing split-driver configuration
where old-IDE drove the PATA portion of a PCI device, in PIO-only mode,
and libata drove the SATA portion of the /same/ PCI device, in DMA mode.
Typically vendors would ship SATA hard drive / PATA optical
configuration, which would lend itself to slow (PIO-only) CD-ROM
performance.

For Intel users running in combined mode, it is now wholly dependent on
your driver choice (potentially link order, if you compile both drivers
in) whether old-IDE or libata will drive your hardware.

In either case, you will get full performance from both SATA and PATA
ports now, without having to pass a kernel command line parameter.

Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-04-28 14:15:59 -04:00
Jean Delvare 9208ee8286 PCI: Stop unhiding the SMBus on Toshiba laptops
It was found that the Toshiba laptops with hidden Intel SMBus have SMM
code handling the thermal management which accesses the SMBus. Thus it
is not safe to unhide it and let Linux access it. We have to leave the
SMBus hidden. SMM is a pain, really.

This fixes bugs #6315 and #6395, for good this time.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-03-26 14:13:07 -07:00
Eric W. Biederman f5f2b13129 [PATCH] msi: sanely support hardware level msi disabling
In some cases when we are not using msi we need a way to ensure that the
hardware does not have an msi capability enabled.  Currently the code has been
calling disable_msi_mode to try and achieve that.  However disable_msi_mode
has several other side effects and is only available when msi support is
compiled in so it isn't really appropriate.

Instead this patch implements pci_msi_off which disables all msi and msix
capabilities unconditionally with no additional side effects.

pci_disable_device was redundantly clearing the bus master enable flag and
clearing the msi enable bit.  A device that is not allowed to perform bus
mastering operations cannot generate intx or msi interrupt messages as those
are essentially a special case of dma, and require bus mastering.  So the call
in pci_disable_device to disable msi capabilities was redundant.

quirk_pcie_pxh also called disable_msi_mode and is updated to use pci_msi_off.

Signed-off-by: Eric W. Biederman <ebiederm@xmission.com>
Cc: Michael Ellerman <michael@ellerman.id.au>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Greg KH <greg@kroah.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-03-05 07:57:50 -08:00
Tejun Heo e34bb370de ahci/pata_jmicron: match class not function number
Make jmiron_ata quirk update pdev->class after programming the device
and update ahci and pata_jmicron such that they match class code
instead of checking function number manually.  For ahci, it matches
for vendor and class.  For pata_jmicron, it matches vendor, device and
class as IDE class isn't as well defined as AHCI class.

This makes jmicron device matching more conventional and script
friendly.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-03-01 20:19:45 -05:00
Tejun Heo 5ee2ae7fb2 jmicron ATA: reimplement jmicron ATA quirk
Reimplement jmicron ATA quirk.

* renamed to quirk_jmicron_ata()
* quirk is invoked only for the affected controllers
* programming is stricter.  e.g. conf5 bit24 is cleared if
  unnecessary.
* code factored for readability
* JMB360 and JMB368 are programmed into proper mode

Verified on JMB360, 363 and 368.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-03-01 20:19:45 -05:00
Conke Hu c9f89475a5 Add pci class code for SATA & AHCI, and replace some magic numbers.
Signed-off-by: Conke Hu <conke.hu@amd.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-02-09 17:39:29 -05:00
Linus Torvalds 905adce409 Merge master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/bart/ide-2.6: (23 commits)
  ide-acpi support warning fix
  ACPI support for IDE devices
  IDE Driver for Delkin/Lexar/etc.. cardbus CF adapter
  ide: it8213 IDE driver update (version 2)
  ide: add it8213 IDE driver
  tc86c001: add missing __init tag for tc86c001_ide_init()
  tc86c001: mark init_chipset_tc86c001() with __devinit tag
  tc86c001: init_hwif_tc86c001() can be static
  ide: add Toshiba TC86C001 IDE driver (take 2)
  pdc202xx_new: remove check_in_drive_lists abomination
  pdc202xx_new: remove useless code
  slc90e66: carry over fixes from piix driver
  piix: tuneproc() fixes/cleanups
  piix: fix 82371MX enablebits
  hpt366: HPT36x PCI clock detection fix
  hpt366: init code rewrite
  hpt366: clean up DMA timeout handling for HPT370
  hpt366: merge HPT37x speedproc handlers
  hpt366: cache channel's MCR address
  hpt366: switch to using pci_get_slot
  ...
2007-02-07 19:32:36 -08:00
Michael Ellerman 88187dfa4d MSI: Replace pci_msi_quirk with calls to pci_no_msi()
I don't see any reason why we need pci_msi_quirk, quirk code can just
call pci_no_msi() instead.

Remove the check of pci_msi_quirk in msi_init(). This is safe as all
calls to msi_init() are protected by calls to pci_msi_supported(),
which checks pci_msi_enable, which is disabled by pci_no_msi().

The pci_disable_msi routines didn't check pci_msi_quirk, only
pci_msi_enable, but as far as I can see that was a bug not a feature.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-02-07 15:50:06 -08:00
Adrian Bunk 1863100a02 PCI: remove quirk_sis_96x_compatible()
Since 2.6.0-test10, all quirk_sis_96x_compatible() had any effect on
was a printk().

This patch therefore removes it.

Signed-off-by: Adrian Bunk <bunk@stusta.de>
Acked-by: Mark M. Hoffman <mhoffman@lightlink.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-02-07 15:50:06 -08:00
Jean Delvare 2f2d39d284 PCI: Speed up the Intel SMBus unhiding quirk
Speed up the Intel SMBus PCI quirk by avoiding tests which can only
fail. This also makes the compiled code significantly smaller when
using gcc 3.2/3.4. gcc 4.x appears to optimize the code by itself so
this change doesn't make a difference there.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-02-07 15:50:06 -08:00
Daniel Yeisley 15a260d53f PCI Quirk: 1k I/O space IOBL_ADR fix on P64H2
There's an existing quirk for the kernel to use 1k IO space granularity
on the Intel P64H2.  It turns out however that pci_setup_bridge() in
drivers/pci/setup-bus.c reads in the IO base and limit address register
masks it off to the nearest 4k, and writes it back.  This causes the
kernel to be on 1k boundaries and the hardware to be 4k aligned.  The
patch below fixes the problem. 

Signed-off-by: Dan Yeisley <dan.yeisley@unisys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-02-07 15:50:05 -08:00
Adrian Bunk c30ca1db39 PCI: quirks.c: cleanup
This patch contains the following cleanups:
- move all EXPORT_SYMBOL's directly below the code they are exporting
- move all DECLARE_PCI_FIXUP_*'s directly below the functions they
  are calling

Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-02-07 15:50:04 -08:00
Sergei Shtylyov 33dced2ea5 ide: add Toshiba TC86C001 IDE driver (take 2)
This is the driver for the Toshiba TC86C001 GOKU-S PCI IDE controller,
completely reworked from the original brain-damaged Toshiba's 2.4 version.

This single channel UltraDMA/66 controller is very simple in programming,
yet Toshiba managed to plant many interesting bugs in it.  The particularly
nasty "limitation 5" (as they call the errata) caused me to abuse the IDE
core in a possibly most interesting way so far.  However, this is still
better than the #ifdef mess in drivers/ide/ide-io.c that the original
version included (well, it had much more mess)...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Acked-by: Alan Cox <alan@redhat.com>
Cc: Greg KH <greg@kroah.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
2007-02-07 18:18:45 +01:00
Tejun Heo 7728098967 ahci/pata_jmicron: fix JMicron quirk
For all JMicrons except for 361 and 368, AHCI mode enable bits in the
Control(1) should be set.  This used to be done in both ahci and
pata_jmicron but while moving programming to PCI quirk, it was removed
from ahci part while still left in pata_jmicron.

The implemented JMicron PCI quirk was incorrect in that it didn't
program AHCI mode enable bits.  If pata_jmicron is loaded first and
programs those bits, the ahci ports work; otherwise, ahci device
detection fails miserably.

This patch makes JMicron PCI quirk clear SATA IDE mode bits and set
AHCI mode bits and remove the respective part from pata_jmicron.
Tested on JMB361, 363 and 368.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-02-02 11:52:05 -05:00
Jean Delvare cb7468ef4c [PATCH] via quirk update
Add special handling for the VT82C686.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Nick Piggin <nickpiggin@yahoo.com.au>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-02-01 16:22:41 -08:00
Jean Delvare c06bb5d49d [PATCH] Fix VIA quirks
Fix VIA quirks that were recently broken by Alan Cox in the upstream
kernel (commit 1597cacbe3).

My understanding is that pci_find_present() doesn't work yet at the time
the quirks are run.  So I used a two-step quirk as is done for some other
quirks already.  First we detect the VIA south bridges and set the right
low and high device limits, then we are ready to actually run the quirks on
the affected devices.

Signed-off-by: Jean Delvare <jdelvare@suse.de>
Acked-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
Acked-by: Nick Piggin <nickpiggin@yahoo.com.au>
Cc: Greg KH <greg@kroah.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-01-30 16:01:35 -08:00
Jean Delvare 2e45785c52 PCI: Unhide the SMBus on the Asus P4P800-X
Unhide the SMBus on the Asus P4P800-X (and probably some other
models of the family.) This gives access to the memory module SPD
EEPROMs.

Thanks to Winbond for supporting the lm-sensors project with the
donation of this motherboard.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2007-01-22 12:00:54 -08:00
Vivek Goyal 9d24a81e84 [PATCH] x86-64: pci quirks MODPOST warning fix
o MODPOST generates warnings for i386 if kernel is compiled with
  CONFIG_RELOCATABLE=y

WARNING: vmlinux - Section mismatch: reference to .init.data: from .text between 'asus_hides_smbus_lpc_ich6' (at offset 0xc0217d58) and 'quirk_cardbus_legacy'
WARNING: vmlinux - Section mismatch: reference to .init.data: from .text between 'asus_hides_smbus_lpc' (at offset 0xc0217fd9) and 'pci_match_id'

o Two quirk functions which are non __init, are accessing data which is
  of type __init.

Signed-off-by: Vivek Goyal <vgoyal@in.ibm.com>
Signed-off-by: Andi Kleen <ak@suse.de>
2007-01-11 01:52:44 +01:00
Mark M. Hoffman 2f5c33b318 [PATCH] i2c/pci: fix sis96x smbus quirk once and for all
The sis96x SMBus PCI device depends on two different quirks to run
in a specific order.  Apart from being fragile, this was found to
actually break on (at least) recent FC4, FC5, and FC6 kernels.  This
patch fixes the quirks so that they work without relying on the
compiler and/or linker to put them in any specific order.

  http://lists.lm-sensors.org/pipermail/lm-sensors/2006-April/015962.html
  https://bugzilla.redhat.com/bugzilla/show_bug.cgi?id=189719

I tested this patch.

Signed-off-by: Mark M. Hoffman <mhoffman@lightlink.com>
Cc: Andrew Morton <akpm@osdl.org>
Cc: Adrian Bunk <bunk@stusta.de>
Cc: Greg K-H <greg@kroah.com>
Cc: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2007-01-09 09:07:52 -08:00
Conke Hu ab17443a3d PCI: ATI sb600 sata quirk
Acked-by: Jeff Garzik <jeff@garzik.org>
Cc: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-12-20 10:54:44 -08:00
Jesper Juhl 9ac0ce8596 PCI: Be a bit defensive in quirk_nvidia_ck804() so we don't risk dereferencing a NULL pdev.
pci_get_slot() may return NULL if nothing was found.  quirk_nvidia_ck804()
does not check the value returned from pci_get_slot(), so it may end up
causing a NULL pointer deref.

Signed-off-by: Jesper Juhl <jesper.juhl@gmail.com>
Acked-by: Alan Cox <alan@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-12-20 10:54:43 -08:00
Alan Cox 1597cacbe3 PCI: Fix multiple problems with VIA hardware
This patch is designed to fix:
- Disk eating corruptor on KT7 after resume from RAM
- VIA IRQ handling
- VIA fixups for bus lockups after resume from RAM

The core of this is to add a table of resume fixups run at resume time.
We need to do this for a variety of boards and features, but particularly
we need to do this to get various critical VIA fixups done on resume.

The second part of the problem is to handle VIA IRQ number rules which
are a bit odd and need special handling for PIC interrupts. Various
patches broke various boxes and while this one may not be perfect
(hopefully it is) it ensures the workaround is applied to the right
devices only.

From: Jean Delvare <khali@linux-fr.org>

Now that PCI quirks are replayed on software resume, we can safely
re-enable the Asus SMBus unhiding quirk even when software suspend support
is enabled.

[akpm@osdl.org: fix const warning]
Signed-off-by: Alan Cox <alan@redhat.com>
Cc: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-12-20 10:54:43 -08:00
Michael Ellerman 7a380507c4 PCI: Use pci_find_ht_capability() in drivers/pci/quirks.c
Use pci_find_ht_capability() in drivers/pci/quirks.c.

I'm pretty sure the logic is unchanged here, but someone please eye-ball it
for me. I've changed the message to be a little shorter, it's now:

PCI: Found (enabled|disabled) HT MSI mapping on xxxx:xx:xx.x

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-12-20 10:54:43 -08:00
David Rientjes 0c875c2864 PCI quirks: remove redundant check
Removes redundant check for dev->subordinate; if it is NULL, the function
returns before the patch-affected code region.

Signed-off-by: David Rientjes <rientjes@cs.washington.edu>
Acked-by: Brice Goglin <brice@myri.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-12-20 10:54:42 -08:00
Alan Cox 368c73d4f6 PCI: quirks: fix the festering mess that claims to handle IDE quirks
The number of permutations of crap we do is amazing and almost all of it
has the wrong effect in 2.6.

At the heart of this is the PCI SFF magic which says that compatibility
mode PCI IDE controllers use ISA IRQ routing and hard coded addresses
not the BAR values. The old quirks variously clears them, sets them,
adjusts them and then IDE ignores the result.

In order to drive all this garbage out and to do it portably we need to
handle the SFF rules directly and properly. Because we know the device
BAR 0-3 are not used in compatibility mode we load them with the values
that are implied (and indeed which many controllers actually
thoughtfully put there in this mode anyway).

This removes special cases in the IDE layer and libata which now knows
that bar 0/1/2/3 always contain the correct address. It means our
resource allocation map is accurate from boot, not "mostly accurate"
after ide is loaded, and it shoots lots of code. There is also lots more
code and magic constant knowledge to shoot once this is in and settled.

Been in my test tree for a while both with drivers/ide and with libata.
Wants some -mm shakedown in case I've missed something dumb or there are
corner cases lurking.

Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-12-01 14:36:56 -08:00
Andrew Morton d8f7975159 [PATCH] revert "PCI: quirk for IBM Dock II cardbus controllers"
Fix http://bugzilla.kernel.org/show_bug.cgi?id=7264

We need to target this quirk a little more tightly, using the T20 DMI string.

Cc: Pavel Kysilka <goldenfish@bsys.cz>
Acked-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com>
Cc: Greg Kroah-Hartman <gregkh@suse.de>
Cc: Dominik Brodowski <linux@dominikbrodowski.net>
Cc: Daniel Ritz <daniel.ritz@gmx.ch>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-11-14 09:09:27 -08:00
Karsten Wiese 3560cc5ec3 PCI: Remove quirk_via_abnormal_poweroff
My K8T800 mobo resumes fine from suspend to ram with and without patch
applied against 2.6.18.

quirk_via_abnormal_poweroff makes some boards not boot 2.6.18, so IMO patch
should go to head, 2.6.18.2 and everywhere "ACPI: ACPICA 20060623" has been
applied.


Remove quirk_via_abnormal_poweroff

Obsoleted by "ACPI: ACPICA 20060623":
<snip>
    Implemented support for "ignored" bits in the ACPI
    registers.  According to the ACPI specification, these
    bits should be preserved when writing the registers via
    a read/modify/write cycle. There are 3 bits preserved
    in this manner: PM1_CONTROL[0] (SCI_EN), PM1_CONTROL[9],
    and PM1_STATUS[11].
    http://bugzilla.kernel.org/show_bug.cgi?id=3691
</snip>

Signed-off-by: Karsten Wiese <fzu@wemgehoertderstaat.de>
Cc: Bob Moore <robert.moore@intel.com>
Cc: "Brown, Len" <len.brown@intel.com>
Acked-by: Dave Jones <davej@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-10-27 11:20:33 -07:00
Eiichiro Oiwa 6b5c76b8e2 PCI: fix pci_fixup_video as it blows up on sparc64
This reverts much of the original pci_fixup_video change and makes it
work for all arches that need it.

fixed, and tested on x86, x86_64 and IA64 dig.

Signed-off-by: Eiichiro Oiwa <eiichiro.oiwa.nm@hitachi.com>
Acked-by: David Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-10-27 11:20:33 -07:00
Linus Torvalds 0c0e4668e0 Revert unintentional and bogus change to drivers/pci/quirks.c
In commit 4e8a520150 ("[PKT_SCHED] netem:
Orphan SKB when adding to queue.") Davem mistakenly also included a
temporary diff in his tree that disabled the pci_fixup_video VGA quirk,
which broke sparc64.

This reverts that part of the commit. Sayeth Davem:

  "Greg KH has a patch coming to you soon which will move that VGA code
   back into x86/x86_64/IA64 specific areas and will fix the sparc64
   problem properly."

Special thanks to Claudio Martins <ctpm@ist.utl.pt> for noticing the
error in the first place.

Cc: Claudio Martins <ctpm@ist.utl.pt>
Cc: David Miller <davem@davemloft.net>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-10-23 14:25:30 -07:00
David S. Miller 4e8a520150 [PKT_SCHED] netem: Orphan SKB when adding to queue.
The networking emulator can queue SKBs for a very long
time, so if you're using netem on the sender side for
large bandwidth/delay product testing, the SKB socket
send queue sizes become artificially larger.

Correct this by calling skb_orphan() in netem_enqueue().

Signed-off-by: David S. Miller <davem@davemloft.net>
2006-10-22 21:00:33 -07:00
Alan Cox 11f242f04c PCI: quirks: switch quirks code offender to use pci_get API
Signed-off-by: Alan Cox <alan@redhat.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-10-18 11:36:11 -07:00
eiichiro.oiwa.nm@hitachi.com b5e4efe7e0 PCI: Turn pci_fixup_video into generic for embedded VGA
pci_fixup_video turns into generic code because there are many platforms need this fixup
for embedded VGA as well as x86. The Video BIOS integrates into System BIOS on a machine
has embedded VGA although embedded VGA generally don't have PCI ROM. As a result,
embedded VGA need the way that the sysfs rom points to the Video BIOS of System
RAM (0xC0000). PCI-to-PCI Bridge Architecture specification describes the condition whether
or not PCI ROM forwards VGA compatible memory address. fixup_video suits this specification.
Although the Video ROM generally implements in x86 code regardless of platform, some
application such as X Window System can run this code by dosemu86. Therefore,
pci_fixup_video should turn into generic code.


Signed-off-by: Eiichiro Oiwa <eiichiro.oiwa.nm@hitachi.com>
Acked-by: Alan Cox <alan@redhat.com>
Acked-by: Jesse Barnes <jesse.barnes@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-10-18 11:36:11 -07:00
Daniel Ritz bacedce32b PCI: add ICH7/8 ACPI/GPIO io resource quirks
Signed-off-by: Daniel Ritz <daniel.ritz@gmx.ch>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-10-18 11:36:10 -07:00
Daniel Drake 09d6029f43 PCI: VIA IRQ quirk behaviour change
The most recent VIA IRQ quirk changes have broken various VIA devices for
some users.  We are not able to add these devices to the blacklist as they
are also available in PCI-card form, and running the quirk on these devices
brings us back to square one (running the VIA quirk on non-VIA boards where
the quirk is not needed).

This patch, based on suggestions from Sergey Vlasov, implements a scheme
similar to but more restrictive than the scheme we had in 2.6.16 and
earlier.  It runs the quirk on all VIA hardware, but *only* if a VIA
southbridge was detected on the system.

To further reduce the amount of quirked devices, this patch includes a
change suggested by Linus at http://lkml.org/lkml/2005/9/27/113 This
ensures that devices bound to non-legacy IO-APIC interrupt lines are not
quirked.  We have made one change to Linus' suggestion: we do a comparison
of ">15" rather than ">=15", as 15 is still in the legacy interrupt range.

There is still a downside to this patch: if the user inserts a VIA PCI card
into a VIA-based motherboard, in some circumstances the quirk will also run
on the VIA PCI card.  This corner case is hard to avoid.

Signed-off-by: Daniel Drake <dsd@gentoo.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-10-18 11:36:10 -07:00
Alan Cox 236561e5df [PATCH] PCI quirks update
This fixes two things

Firstly someone mistakenly used "errata" for the singular.  This causes
Dave Woodhouse to emit diagnostics whenever the string is read, and so
should be fixed.

Secondly the AMD AGP tunnel has an erratum which causes hangs if you try
and do direct PCI to AGP transfers in some cases.  We have a flag for
PCI/PCI failures but we need a different flag for this really as in this
case we don't want to stop PCI/PCI transfers using things like IOAT and the
new RAID offload work.

I'll post some updates to make proper use of the PCIAGP flag in the
media/video drivers to Mauro.

Signed-off-by: Alan Cox <alan@redhat.com>
Cc: David Woodhouse <dwmw2@infradead.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-10-01 00:39:17 -07:00
Brice Goglin 6397c75cbc MSI: Blacklist PCI-E chipsets depending on Hypertransport MSI capability
Introduce msi_ht_cap_enabled() to check the MSI capability in the
Hypertransport configuration space.
It is used in a generic quirk quirk_msi_ht_cap() to check whether
MSI is enabled on hypertransport chipset, and a nVidia specific quirk
quirk_nvidia_ck804_msi_ht_cap() where two 2 HT MSI mappings have to
be checked.
Both quirks set the PCI_BUS_FLAGS_NO_MSI bus flag when MSI is disabled.

Signed-off-by: Brice Goglin <brice@myri.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-09-26 17:43:52 -07:00
Brice Goglin 3f79e107f7 MSI: Cleanup existing MSI quirks
Move MSI quirks in CONFIG_PCI_MSI, document why the serverworks quirk
does not simply set PCI_BUS_FLAGS_NO_MSI, and create a generic quirk
for other chipsets where setting PCI_BUS_FLAGS_NO_MSI is fine.

Signed-off-by: Brice Goglin <brice@myri.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-09-26 17:43:52 -07:00
Jeff Garzik f9bcda7760 Merge branch 'master' into upstream 2006-09-04 06:41:37 -04:00
Mark Hindley 1ae4f9ba84 USB: Add VIA quirk fixup for VT8235 usb2
Patch to add VIA PCI quirk for Enhanced/Extended USB on VT8235
southbridge. It is needed in order to use EHCI/USB 2.0 with ACPI.
Without it IRQs are not routed correctly, you get an "Unlink after
no-IRQ?" error and the device is unusable.

I belive this could also be a fix for Bugzilla Bug 5835.

Signed-off-by: Mark Hindley <mark@hindley.org.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-08-31 18:04:30 -07:00
Jeff Garzik b01e86fee6 Merge /spare/repo/linux-2.6 into upstream 2006-08-29 17:55:59 -04:00
Daniel Ritz 65ae4dddbb [PATCH] PCI: fix ICH6 quirks
- add the ICH6(R) LPC to the ICH6 ACPI quirks.  currently only the ICH6-M
  is handled.  [ PCI_DEVICE_ID_INTEL_ICH6_1 is the ICH6-M LPC, ICH6_0 is
  the ICH6(R) ]

- remove the wrong quirk calling asus_hides_smbus_lpc() for ICH6.  the
  register modified in asus_hides_smbus_lpc() has a different meaning in
  ICH6.

Signed-off-by: Daniel Ritz <daniel.ritz@gmx.ch>
Acked-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-08-26 13:05:45 -07:00
Len Brown da547d775f Merge trivial low-risk suspend hotkey bugzilla-5918 into release 2006-08-20 21:49:29 -04:00
Tejun Heo 7796705244 [PATCH] libata: s/CONFIG_SCSI_SATA/CONFIG_[S]ATA/g in pci/quirks.c
drivers/pci/quirks.c was not updated when libata config constants were
renamed braking several libata quirks.  Fix it.

Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2006-08-19 17:50:18 -04:00
Jean Delvare 321311af25 PCI: Unhide the SMBus on Asus PU-DLS
Unhide the SMBus controller on the Asus PU-DLS board.
This fixes bug #6763.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-08-03 13:20:06 -07:00
Bjorn Helgaas 16a7474423 PCI: quirk to disable e100 interrupt if RESET failed to
Without this quirk, e100 can be pulling on a shared
interrupt line when another device (eg. USB) loads,
causing the interrupt to scream and get disabled.

http://bugzilla.kernel.org/show_bug.cgi?id=5918

Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2006-07-26 01:19:26 -04:00
Kristen Carlson Accardi ffadcc2ff4 [PATCH] PCI: PCIE power management quirk
When changing power states from D0->DX and then from DX->D0, some
Intel PCIE chipsets will cause a device reset to occur.  This will
cause problems for any D State other than D3, since any state
information that the driver will expect to be present coming from
a D1 or D2 state will have been cleared.  This patch addes a
flag to the pci_dev structure to indicate that devices should
not use states D1 or D2, and will set that flag for the affected
chipsets.  This patch also modifies pci_set_power_state() so that
when a device driver tries to set the power state on
a device that is downstream from an affected chipset, or on one
of the affected devices it only allows state changes to or
from D0 & D3.  In addition, this patch allows the delay time
between D3->D0 to be changed via a quirk.  These chipsets also
need additional time to change states beyond the normal 10ms.

Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-07-12 16:05:48 -07:00
Matthew Garrett 709cf5ea7a [PATCH] PCI: Clear abnormal poweroff flag on VIA southbridges, fix resume
Some VIA southbridges contain a flag in the ACPI register space that
indicates whether an abnormal poweroff has occured, presumably with the
intention that it can be cleared on clean shutdown.  Some BIOSes check this
flag at resume time, and will re-POST the system rather than jump back to
the OS if it's set.  Clearing it at boot time appears to be sufficient.
I'm not sure if drivers/pci/quirks.c is the right place to do it, but I'm
not sure where would be cleaner.

[akpm@osdl.org: cleanups, build fix]
Signed-off-by: Matthew Garrett <mjg59@srcf.ucam.org>
Cc: Greg KH <greg@kroah.com>
Cc: "Brown, Len" <len.brown@intel.com>
Cc: "Yu, Luming" <luming.yu@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-07-12 16:05:48 -07:00
Alan Cox 15e0c69436 [PATCH] ide: fix Jmicron support
Prior to 2.6.18rc1 you could install with devices on a JMicron chipset
using the "all-generic-ide" option. As of this kernel the AHCI driver
grabs the controller and rams it into AHCI mode losing the PATA ports
and making CD drives and the like vanish. The all-generic-ide option
fails because the AHCI driver grabbed the PCI device and reconfigured
it.

To fix this three things are needed.

#1 We must put the chip into dual function mode
#2 The AHCI driver must grab only function 0 (already in your rc1 tree)
#3 Something must grab the PATA ports

The attached patch is the minimal risk edition of this. It puts the chip
into dual function mode so that AHCI will grab the SATA ports without
losing the PATA ports. To keep the risk as low as possible the third
patch adds the PCI identifiers for the PATA port and the FN check to the
ide-generic driver. There is a more featured jmicron driver on its way
but that adds risk and the ide-generic support is sufficient to install
and run a system.

The actual chip setup done by the quirk is the precise setup recommended
by the vendor.

(The JMB368 appears only in the ide-generic entry as it has no AHCI so
does not need the quirk)

Signed-off-by: Alan Cox <alan@redhat.com>
Acked-by: Jeff Garzik <jgarzik@pobox.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-07-12 12:59:35 -07:00
Linus Torvalds c67646641c Add PIIX4 APCI quirk for the 440MX chipset too
This is confirmed to fix a hang due to PCI resource conflicts with
setting up the Cardbus bridge on old laptops with the 440MX chipsets.
Original report by Alessio Sangalli, lspci debugging help by Pekka
Enberg, and trial patch suggested by Daniel Ritz:

  "From the docs available i would _guess_ this thing is really similar
   to the 82443BX/82371AB combination.  at least the SMBus base address
   register is hidden at the very same place (32bit at 0x90 in function
   3 of the "south" brigde)"

The dang thing is largely undocumented, but the patch was corroborated
by Asit Mallick:

  "I am trying to find the register information. 440MX is an integration of
   440BX north-bridge without AGP and PIIX4E (82371EB).  PIIX4 quirk
   should cover the ACPI and SMBus related I/O registers."

and verified to fix the problem by Alessio.

Cc: Daniel Ritz <daniel.ritz-ml@swissonline.ch>
Cc: Asit Mallick <asit.k.mallick@intel.com>
Cc: Pekka Enberg <penberg@cs.helsinki.fi>
Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Dmitry Torokhov <dtor_core@ameritech.net>
Tested-by: Alessio Sangalli <alesan@manoweb.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-07-12 08:29:46 -07:00
Jörn Engel 6ab3d5624e Remove obsolete #include <linux/config.h>
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-06-30 19:25:36 +02:00
Brice Goglin cf34a8e07f [PATCH] PCI: nVidia quirk to make AER PCI-E extended capability visible
The nVidia CK804 PCI-E chipset supports the AER extended capability
but sometimes fails to link it (with some BIOS or after a warm reboot).
It makes the AER cap invisible to pci_find_ext_capability().

The patch adds a quirk to set the missing bit that controls the
linking of the capability.
By the way, it removes the corresponding code in the myri10ge driver.

Signed-off-by: Brice Goglin <brice@myri.com>
Signed-off-by: Loic Prylli <loic@myri.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-06-21 12:00:01 -07:00
Chris Wedgwood bd91fde952 [PATCH] PCI: MSI-K8T-Neo2-Fir: run only where needed
Be more selective when running the MSI-K8T-Neo2Fir soundcard PCI quirk so
as not to run this on hardware where it's probably not needed.

Signed-off-by: Chris Wedgwood <cw@f00f.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-06-21 12:00:01 -07:00
Doug Thompson bd8481e164 [PATCH] PCI Bus Parity Status-broken hardware attribute, EDAC foundation
Currently, the EDAC (error detection and correction) modules that are in
the kernel contain some features that need to be moved. After some good
feedback on the PCI Parity detection code and interface
(http://www.ussg.iu.edu/hypermail/linux/kernel/0603.1/0897.html) this
patch ADDs an new attribute to the pci_dev structure: Namely the
'broken_parity_status' bit.

When set this indicates that the respective hardware generates false
positives of Parity errors.

The EDAC "blacklist" solution was inferior and will be removed in a
future patch.

Also in this patch is a PCI quirk.c entry for an Infiniband PCI-X card
which generates false positive parity errors.

I am requesting comments on this AND on the possibility of a exposing
this 'broken_parity_status' bit to userland via the PCI device sysfs
directory for devices. This access would allow for enabling of this
feature on new devices and for old devices that have their drivers
updated. (SLES 9 SP3 did this on an ATI motherboard video device). There
is a need to update such a PCI attribute between kernel releases.

This patch just adds a storage place for the attribute and a quirk entry
for a known bad PCI device. PCI Parity reaper/harvestor operations are
in EDAC itself and will be refactored to use this PCI attribute instead
of its own mechanisms (which are currently disabled) in the future.

Signed-off-by: Doug Thompson <norsk5@xmission.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-06-21 11:59:59 -07:00
Carl-Daniel Hailfinger ce007ea597 [PATCH] smbus unhiding kills thermal management
Do not enable the SMBus device on Asus boards if suspend is used.  We do
not reenable the device on resume, leading to all sorts of undesirable
effects, the worst being a total fan failure after resume on Samsung P35
laptop.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Pavel Machek <pavel@suse.cz>
Cc: <stable@kernel.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-05-15 11:20:57 -07:00
Chris Wedgwood a7b862f663 [PATCH] VIA quirk fixup, additional PCI IDs
An earlier commit (75cf7456dd) changed an
overly-zealous PCI quirk to only poke those VIA devices that need it.
However, some PCI devices were not included in what I hope is now the full
list.  Consequently we're failing to run the quirk on all machines which need
it, causing IRQ routing failures.

This should I hope correct this.

Thanks to Masoud Sharbiani <masouds@masoud.ir> for pointing this out
and testing the fix.

Signed-off-by: Chris Wedgwood <cw@f00f.org>
Cc: Greg KH <greg@kroah.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-05-15 11:20:55 -07:00
Chris Wedgwood 75cf7456dd [PATCH] PCI quirk: VIA IRQ fixup should only run for VIA southbridges
Alan Cox pointed out that the VIA 'IRQ fixup' was erroneously running
on my system which has no VIA southbridge (but I do have a VIA IEEE
1394 device).

This should address that.  I also changed "Via IRQ" to "VIA IRQ"
(initially I read Via as a capitalized via (by way/means of).

Signed-off-by: Chris Wedgwood <cw@f00f.org>
Acked-by: Jeff Garzik <jeff@garzik.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-04-27 13:00:51 -07:00
Johannes Goecke 7daa0c4f51 [PATCH] MSI-K8T-Neo2-Fir OnboardSound and additional Soundcard
On the MSI-K8T-NEO2 FIR ( Athlon-64, Socket 939 with VIA-K8T800- Chipset
and onboard Sound,...  ) the BIOS lets you choose "DISABLED" or "AUTO" for
the On-Board Sound Device.

If you add another PCI-Sound-Card the BIOS disables the on-board device.

So far I have a Quirk, that does set the correspondent BIT in the
PCI-registers to enable the soundcard.

But how to ensure that the code is executed ONLY on excactly this kind of
boards (not any other with similar Chipset)?

Cc: Jaroslav Kysela <perex@suse.cz>
Acked-by: Takashi Iwai <tiwai@suse.de>
Cc: Lee Revell <rlrevell@joe-job.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-04-20 07:54:04 -07:00
Jean Delvare 2d1e1c754d [PATCH] PCI: Add PCI quirk for SMBus on the Asus A6VA notebook
The Asus A6VA notebook was reported to need a PCI quirk to unhide
the SMBus.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-04-14 12:25:26 -07:00
John W. Linville 5da594b1c5 [PATCH] pci_ids.h: correct naming of 1022:7450 (AMD 8131 Bridge)
The naming of the constant defined for PCI ID 1022:7450 does not seem
to match the information at http://pciids.sourceforge.net/:

	http://pci-ids.ucw.cz/iii/?i=1022

There 1022:7450 is listed as "AMD-8131 PCI-X Bridge" while 1022:7451
is listed as "AMD-8131 PCI-X IOAPIC".  Yet, the current definition for
0x7450 is PCI_DEVICE_ID_AMD_8131_APIC.	It seems to me like that name
should map to 0x7451, while a name like PCI_DEVICE_ID_AMD_8131_BRIDGE
should map to 0x7450.

Signed-off-by: John W. Linville <linville@tuxdriver.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-04-14 12:25:25 -07:00
Michael S. Tsirkin 6e325a62a0 [PATCH] PCI: make MSI quirk inheritable from the pci bus
It turns out AMD 8131 quirk only affects MSI for devices behind the 8131 bridge.
Handle this by adding a flags field in pci_bus, inherited from parent to child.

Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-03-23 14:35:14 -08:00
Bauke Jan Douma e5548e960f [PATCH] PCI: quirk for asus a8v and a8v delux motherboards
On ASUS A8V and A8V Deluxe boards, the onboard AC97 audio controller
and MC97 modem controller are deactivated when a second PCI soundcard
is present.  This patch enables them.

Signed-off-by: Bauke Jan Douma <bjdouma@xs4all.nl>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-03-23 14:35:13 -08:00
tomek@koprowski.org 3c0a654e39 [PATCH] PCI: SMBus unhide on HP Compaq nx6110
I attach a trivial patch for 2.6.15.4 that unhides SMBus controller
on an HP Compaq nx6110 notebook.

Signed-off-by: Tomasz Koprowski <tomek@koprowski.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-03-23 14:35:13 -08:00
Kristen Accardi c408a3794d [PATCH] PCI: quirk for IBM Dock II cardbus controllers
The IBM Dock II cardbus bridges require some extra configuration
before Yenta is loaded in order to setup the Interrupts to be
routed properly.

Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-03-23 14:35:10 -08:00
Jason Gaston 012b265f76 [PATCH] Intel ICH8 SATA: add PCI device IDs
Signed-off-by: Jason Gaston <Jason.d.gaston@intel.com>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2006-01-17 19:31:54 -05:00
Daniel Yeisley 9d265124d0 [PATCH] PCI Quirk: 1K I/O space granularity on Intel P64H2
I've implemented a quirk to take advantage of the 1KB I/O space
granularity option on the Intel P64H2 PCI Bridge.  I had to change
probe.c because it sets the resource start and end to be aligned on 4k
boundaries (after the quirk sets them to 1k boundaries).  I've tested
this patch on a Unisys ES7000-600 both with and without the 1KB option
enabled.  I also tested this on a 2 processor Dell box that doesn't have
a P64H2 to make sure there were no negative affects there.

Signed-off-by: Dan Yeisley <dan.yeisley@unisys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2006-01-09 12:13:18 -08:00
Jesse Barnes 2bd0fa3b62 [PATCH] add boot option to control Intel SATA/PATA combined mode
Combined mode sucks.  Especially when both libata and the legacy IDE
drivers try to drive ports on the same device, since that makes DMA
rather difficult.

This patch addresses the problem by allowing the user to control which
driver binds to the ports in a combined mode configuration.  In many
cases, they'll probably want the libata driver to control both ports
since it can use DMA for talking with ATAPI devices (when
libata.atapi_enabled=1 of course).  It also allows the user to get old
school behavior by letting the legacy IDE driver bind to both ports.
But neither is forced, the patch doesn't change current behavior unless
one of combined_mode=ide or combined_mode=libata is passed
on the boot line.  Either of those options may require you to access
your devices via different device nodes (/dev/hd* in the ide case
and /dev/sd* in the libata case), though of course if you have udev
installed nicely you may not notice anything.  :)

Let me know if the documentation is too cryptic, I'd be happy to expand
on it if necessary.  I think most users will want to boot with
'combined_mode=libata' and add 'options libata atapi_enabled=1'
to their modules.conf to get good DVD playing and disk behavior
(haven't tested CD or DVD writing though).

I'd much rather things behave sanely by default (i.e. DMA for devices on
both ports), but apparently that's difficult given the various chip
bugs and hardware configs out there (not to mention that people's
drives may suddenly change from /dev/hdc to /dev/sdb), so this boot
option may be the correct long term fix.

Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
2005-12-13 03:05:03 -05:00
Ivan Kokshaysky a5312e28c1 [PATCH] PCI: NCR 53c810 quirk
Move the PPC fixup for old NCR 810 controllers to generic quirks -
it's needed for Alpha, x86 and other architectures that use
setup-bus.c.

Thanks to Jay Estabrook for pointing out the issue.

Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2005-11-10 16:09:16 -08:00
Meelis Roos 02f313b2cc [PATCH] PCI: Fix VIA 686 PCI quirk names
The quirk names for VIA 686 are mistyped in 2.6.14 (686 vs 868). S3 868
influence? :) Here is a patch to correct them.

Signed-off-by: Meelis Roos <mroos@linux.ee>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2005-11-10 16:09:16 -08:00
Linus Torvalds 08db2a701b Fix PIIX4 SMB region size
Petr Vandrovec correctly points out that the SMB region of the PIIX4 is
just 16 bytes, not 32.

Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-30 14:40:07 -08:00
David Brownell 7586269c0b [PATCH] USB: move handoff code
This moves the PCI quirk handling for USB host controllers from the
PCI directory to the USB directory.  Follow-on patches will need to:

(a) merge these copies with the originals in the HCD reset methods.
they don't wholly agree, despite doing the very same thing; and

(b) eventually change it so "usb-handoff" is the default, to help
get more robust USB/BIOS/input/... interactions.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

 drivers/Makefile              |    2
 drivers/pci/quirks.c          |  253 ---------------------------------------
 drivers/usb/Makefile          |    1
 drivers/usb/host/Makefile     |    5
 drivers/usb/host/pci-quirks.c |  272 ++++++++++++++++++++++++++++++++++++++++++
 5 files changed, 280 insertions(+), 253 deletions(-)
2005-10-28 16:47:38 -07:00
Jean Delvare e3b1bd572f [PATCH] PCI: Add quirk for SMBus on HP D530
One more SMBus unhiding quirk, this time for the HP D530. Requested and
successfully tested by Ben Cranston.

Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2005-10-28 15:36:59 -07:00
R.Marek@sh.cvut.cz acc06632e3 [PATCH] unhide ICH6 SMBus - take 2
This patch unhides hidden SMBus on ICH6 chipset installed in
Asus M6V notebook. I would like to thank Michal Mleczko for
testing and help.

Signed-Off-By: Rudolf Marek <r.marek@sh.cvut.cz>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

 drivers/pci/quirks.c |   24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
2005-10-28 15:36:58 -07:00
R.Marek@sh.cvut.cz 2cea752f68 [PATCH] PCI: ICH6 ACPI and GPIO quirk
This patch just adds ACPI and GPIO regions to its LPC bridge, similar
way as ICH4 did. I would like to thank Michal Mleczko for testing.

Signed-off-by: Rudolf Marek <r.marek@sh.cvut.cz>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

 drivers/pci/quirks.c |   12 ++++++++++++
 1 file changed, 12 insertions(+)
2005-10-28 15:36:58 -07:00
Linus Torvalds 6693e74a16 PCI: be more verbose about resource quirks
When reserving an PCI quirk, note that in the kernel bootup messages.

Also, parse the strange PIIX4 device resources - they should get their
own PCI resource quirks, but for now just print out what it finds to
verify that the code does the right thing.

Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-10-25 20:40:09 -07:00
Jeff Garzik cc675230a9 [PATCH] Fix and clean up quirk_intel_ide_combined() configuration
This change makes quirk_intel_ide_combined() dependent on the precise
conditions under which it is needed:

* IDE is built in
* IDE SATA option is not set
* ata_piix or ahci drivers are enabled

This fixes an issue where some modular configurations would not cause
the quirk to be enabled.

Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
Signed-off-by: Linus torvalds <torvalds@osdl.org>
2005-10-17 15:01:53 -07:00
Rumen Ivanov Zarev c87f883edb [PATCH] PCI: Unhide SMBus on Compaq Evo N620c
Trivial patch against 2.6.13 to unhide SMBus on Compaq Evo N620c laptop using
Intel 82855PM chipset.

Signed-off-by: Rumen Zarev <rzarev@caltech.edu>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2005-09-09 13:58:41 -07:00
David S. Miller 085ae41f66 [PATCH] Make sparc64 use setup-res.c
There were three changes necessary in order to allow
sparc64 to use setup-res.c:

1) Sparc64 roots the PCI I/O and MEM address space using
   parent resources contained in the PCI controller structure.
   I'm actually surprised no other platforms do this, especially
   ones like Alpha and PPC{,64}.  These resources get linked into the
   iomem/ioport tree when PCI controllers are probed.

   So the hierarchy looks like this:

   iomem --|
	   PCI controller 1 MEM space --|
				        device 1
					device 2
					etc.
	   PCI controller 2 MEM space --|
				        ...
   ioport --|
            PCI controller 1 IO space --|
					...
            PCI controller 2 IO space --|
					...

   You get the idea.  The drivers/pci/setup-res.c code allocates
   using plain iomem_space and ioport_space as the root, so that
   wouldn't work with the above setup.

   So I added a pcibios_select_root() that is used to handle this.
   It uses the PCI controller struct's io_space and mem_space on
   sparc64, and io{port,mem}_resource on every other platform to
   keep current behavior.

2) quirk_io_region() is buggy.  It takes in raw BUS view addresses
   and tries to use them as a PCI resource.

   pci_claim_resource() expects the resource to be fully formed when
   it gets called.  The sparc64 implementation would do the translation
   but that's absolutely wrong, because if the same resource gets
   released then re-claimed we'll adjust things twice.

   So I fixed up quirk_io_region() to do the proper pcibios_bus_to_resource()
   conversion before passing it on to pci_claim_resource().

3) I was mistakedly __init'ing the function methods the PCI controller
   drivers provide on sparc64 to implement some parts of these
   routines.  This was, of course, easy to fix.

So we end up with the following, and that nasty SPARC64 makefile
ifdef in drivers/pci/Makefile is finally zapped.

Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2005-09-08 14:57:25 -07:00
Karsten Wiese a1740913ca [PATCH] via vt8237 apic bypass deassertion quirk
The VIA VT8237's IOAPIC sends 'APIC De-Assert Messages' by default, causing
another CPU interrupt when the IRQ pin is de-asserted.  This feature is
switched off by the patch to get rid of doubled ioapic level interrupt
rates.

Signed-off-by: Karsten Wiese <annabellesgarden@yahoo.de>
Tested-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-05 00:06:10 -07:00
Kristen Accardi 4602b88d97 [PATCH] PCI: 6700/6702PXH quirk
On the 6700/6702 PXH part, a MSI may get corrupted if an ACPI hotplug
driver and SHPC driver in MSI mode are used together.

This patch will prevent MSI from being enabled for the SHPC as part of
an early pci quirk, as well as on any pci device which sets the no_msi
bit.

Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-08-16 21:06:24 -07:00
Ivan Kokshaysky 6d85f29bb5 [PATCH] VIA VT8235 PCI quirk
Like many other southbridges from different manufacturers, VIA VT8235
chip has two non-standard BARs for power management and SMBus registers
(see the datasheet at http://www.via.com.tw).

This new quirk routine fixes boot problem with 2.6.13-rc2/rc6 kernels on
Targa Visionary 811 Athlon64 laptop, as reported by Mikael Pettersson
<mikpe@csd.uu.se>.

Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-08-08 11:46:24 -07:00
Daniele Gaffuri e96e2f1480 [PATCH] PCI: Hidden SMBus bridge on Toshiba Tecra M2
Patch against 2.6.12 to unhide SMBus on Toshiba Centrino laptops using
Intel 82855PM chipset.  Tested on Toshiba Tecra M2.

Signed-off-by: Daniele Gaffuri <d.gaffuri@reply.it>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-07-29 13:12:51 -07:00
Jean Delvare a00db37162 [PATCH] PCI: Add PCI quirk for SMBus on the Asus P4B-LX
One more Asus motherboard requiring the SMBus quirk (P4B-LX). Original
patch from Salah Coronya.

Signed-off-by: Salah Coronya <salahx@yahoo.com>
Signed-off-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2005-07-01 13:35:51 -07:00
Narendra Sankar 1e06276704 [PATCH] PCI: MSI functionality broken on Serverworks GC chipset
MSI functionality is broken on the GC_LE x86 chipset that Serverworks
developed and that is being used in various platforms today. Broadcom is
going to push out to the kernel MSI enabled Gigabit drivers (in the very
near future), and we would like to make sure that MSI does not get
enabled on any platforms using the GC_LE chipset (device id 0x17).
Following the AMD 8131 example, I am including a patch to disable MSI
functionality when a GCNB_LE is detected. Please let me know if there
are any issues with this. This is a permanent fix for this chipset, as
the hardware will not be updated.

Signed-off-by: Narendra Sankar <nsankar@broadcom.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2005-06-09 14:52:30 -07:00
Bjorn Helgaas 93cffffa19 [PATCH] PCI: do VIA IRQ fixup always, not just in PIC mode
At least some VIA chipsets require the fixup even in IO-APIC mode.

This was found and debugged with the patient assistance of Stian
Jordet <liste@jordet.nu> on an Asus CUV266-DLS motherboard.

Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-06-07 13:39:26 -07:00
Alexander Nyberg 9920e91450 [PATCH] Fixup VIA IRQ quirk
quirk_via_irqpic can't be __devinit for swsuspend

Signed-off-by: Alexander Nyberg <alexn@telia.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-05-27 08:15:05 -07:00
Len Brown 25be5e6ccc [PATCH] VIA IRQ quirk
Delete quirk_via_bridge(), restore quirk_via_irqpic() -- but now
improved to be invoked upon device ENABLE, and now only for VIA devices
-- not all devices behind VIA bridges.

Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com>
Signed-off-by: Len Brown <len.brown@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-05-27 08:15:04 -07:00
R.Marek@sh.cvut.cz 3aa8c4febf [PATCH] PCI: Rapid Hance quirk
This patch just adds Intel's Hance Rapid south bridge IDs to ICH4 region quirk.
Patch was successfuly tested by Chunhao Huang from Winbond.

Signed-Off-By: Rudolf Marek <r.marek@sh.cvut.cz>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2005-05-03 23:45:16 -07:00
Greg KH bc56b9e011 [PATCH] PCI: Clean up a lot of sparse "Should it be static?" warnings.
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2005-05-03 23:45:14 -07:00
Jason Gaston c368ca4ef4 [PATCH] ata_piix: IDE mode SATA patch for Intel ESB2
This patch adds the Intel ESB2 DID's to the ata_piix.c and quirks.c file for
IDE mode SATA support.

Signed-off-by: Jason Gaston <Jason.d.gaston@intel.com>
Cc: Jeff Garzik <jgarzik@pobox.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-04-16 15:24:44 -07:00
Linus Torvalds 1da177e4c3 Linux-2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!
2005-04-16 15:20:36 -07:00