Commit Graph

9 Commits

Author SHA1 Message Date
Kedareswara rao Appana 7096f36e53 dmaengine: xilinx_vdma: Improve SG engine handling
The current driver allows user to queue up multiple segments
on to a single transaction descriptor. User will submit this single desc
and in the issue_pending() we decode multiple segments and submit to SG HW engine.
We free up the allocated_desc when it is submitted to the HW.

Existing code prevents the user to prepare multiple trasactions at same time as
we are overwrite with the allocated_desc.

The best utilization of HW SG engine would happen if we collate the pending
list when we start dma this patch updates the same.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2016-03-03 21:02:38 +05:30
Luis de Bethencourt ad577e4642 dmaengine: xilinx: Fix module autoload for OF platform driver
This platform driver has a OF device ID table but the OF module
alias information is not created so module autoloading won't work.

Signed-off-by: Luis de Bethencourt <luisbg@osg.samsung.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-10-01 07:35:39 +05:30
Kedareswara rao Appana 937abe88ae dmaengine: xilinx-dma: move header file to common location
This patch moves the xilinx_dma.h header file
to the include/linux/dma.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2015-03-17 16:23:21 +05:30
Maxime Ripard ba7140462f dmaengine: xilinx: Split device_control
Split the device_control callback of the Xilinx VDMA driver to make use of the
newly introduced callbacks, that will eventually be used to retrieve slave
capabilities.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-12-22 12:33:21 +05:30
Srikanth Thokala 6d80f45f50 dmaengine: xilinx: vdma: icg should be difference of stride and hsize
This patch modifies the icg field to match the description
as mentioned in the DMA Linux framework.

Signed-off-by: Srikanth Thokala <sthokal@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-11-06 13:11:47 +05:30
Srikanth Thokala a5e48e243b dmaengine: xilinx: vdma: Allow only one chunk in a line
This patch adds a sanity check to see if frame_size is 1.

Signed-off-by: Srikanth Thokala <sthokal@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-11-06 13:11:47 +05:30
Srikanth Thokala 049c0d577d dmaengine: xilinx: vdma: Check if the segment list is empty in a descriptor
The segment list in a descriptor should be checked for empty, else
it will try to access invalid address for the first call.  This
patch fixes this issue.

Signed-off-by: Srikanth Thokala <sthokal@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-11-06 13:11:47 +05:30
Michal Simek 29a4bb1431 dma: xilinx: Remove .owner field for driver
There is no need to init .owner field.

Based on the patch from Peter Griffin <peter.griffin@linaro.org>
"mmc: remove .owner field for drivers using module_platform_driver"

This patch removes the superflous .owner field for drivers which
use the module_platform_driver API, as this is overriden in
platform_driver_register anyway."

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Levente Kurusa <lkurusa@redhat.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-08-19 22:36:50 +05:30
Srikanth Thokala 9cd4360de6 dma: Add Xilinx AXI Video Direct Memory Access Engine driver support
This is the driver for the AXI Video Direct Memory Access (AXI
VDMA) core, which is a soft Xilinx IP core that provides high-
bandwidth direct memory access between memory and AXI4-Stream
type video target peripherals. The core provides efficient two
dimensional DMA operations with independent asynchronous read
and write channel operation.

This module works on Zynq (ARM Based SoC) and Microblaze platforms.

Signed-off-by: Srikanth Thokala <sthokal@xilinx.com>
Acked-by: Jassi Brar <jassisinghbrar@gmail.com>
Reviewed-by: Levente Kurusa <levex@linux.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2014-04-30 10:44:13 +05:30