Commit Graph

29 Commits

Author SHA1 Message Date
Hans de Goede 6d55d339fa ARM: dts: sunxi: Fix interrupt-cells for [r]pio on A23/A31/A33/A80
When the gpio interrupt bindings where changed to add a bank to the
specifier list, the r_pio nodes of A23/A31/A33 where not updated to
match and neither was the pio node of the A80, this fixes this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-10-17 18:21:38 +02:00
Maxime Ripard 06f282757a ARM: sun9i: Wrap the clock-indices
Wrap the clock-indices to match the wrapping of the clock-output-names in
order to make it easier to match indices to names.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
2015-08-12 00:59:13 -07:00
Chen-Yu Tsai 6d6693c8a7 ARM: dts: sun9i: Add device node for watchdog
On A80 there are 2 watchdogs, one in the main block, and one in the
R (special) block. We do not have information on the R block watchdog,
other than the register layout is the same, and the interrupt number.
Both are able to reset the whole system.

Add the main watchdog, in case the R block is used for special purposes
like running an RTOS.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-06-01 11:08:43 +02:00
Maxime Ripard d8cacaa34f ARM: sunxi: DT: Fix lines over 80 characters
A few lines in our DTSIs are over the 80 characters limit, making
checkpatch complain about that.

If possible (and relevant), wrap these lines to 80 characters.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-05-10 10:22:23 +02:00
Maxime Ripard c0c2eb2476 ARM: sunxi: dt: Remove the FSF address
The FSF address triggers a warning on checkpatch, saying that the FSF
license is already present in the Linux source code, and that it has
already changed in the past.

Remove it from our DT, as suggested.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-05-10 10:22:23 +02:00
Chen-Yu Tsai 51e9f5ffc5 ARM: dts: sun9i: Enable ARM architected timer on A80
The A80 SoC has the architected timer, but the existing firmware from
Allwinner does not set CNTFRQ at all.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-04-27 08:20:29 +02:00
Hans de Goede 4c1bb9c318 ARM: dts: sunxi: Add address- and size-cells properties to the mmc ctrl nodes
Sometimes we need to specify non-probably information for sdio devices in the
devicetree, this is done through child nodes addressed by the reg property,
whereby the reg property refers to the sdio function number, see;
Documentation/devicetree/bindings/mmc/mmc.txt

This commit adds the necessary address- and size-cells properties to the mmc
controller nodes in the dtsi files, so that dts files needing such a child
node do not need to specify these themselves.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-04-27 08:20:28 +02:00
Chen-Yu Tsai 70472163a7 ARM: dts: sun9i: Add USB host controller nodes to a80 dtsi
The A80 has 3 EHCI/OHCI USB controllers.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-04-27 08:20:18 +02:00
Chen-Yu Tsai 1af5d19269 ARM: dts: sun9i: Add usb phy nodes to a80 dtsi
On sun9i, there are 3 independent usb phys for EHCI/OHCI.
Add device nodes for them.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-04-27 08:20:17 +02:00
Chen-Yu Tsai bc8ffc2de8 ARM: dts: sun9i: Add usb clock nodes to a80 dtsi
The USB controller and phy clocks and resets have a separate address
block and driver. Add the nodes to represent them.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-04-27 08:20:17 +02:00
Linus Torvalds a233bb742a ARM: SoC DT updates
DT changes continue to be the bulk of our merge window contents.
 
 We continue to have a large set of changes across the board as new platforms
 and drivers are added.
 
 Some of the new platforms are:
 - Alphascale ASM9260
 - Marvell Armada 388
 - CSR Atlas7
 - TI Davinci DM816x
 - Hisilicon HiP01
 - ST STiH418
 
 There have also been some sweeping changes, including relicensing of DTS
 contents from GPL to GPLv2+/X11 so that the same files can be reused in
 other non-GPL projects more easily. There's also been changes to the
 DT Makefile to make it a little less conflict-ridden and churny down
 the road.
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Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC DT updates from Olof Johansson:
 "DT changes continue to be the bulk of our merge window contents.

  We continue to have a large set of changes across the board as new
  platforms and drivers are added.

  Some of the new platforms are:
   - Alphascale ASM9260
   - Marvell Armada 388
   - CSR Atlas7
   - TI Davinci DM816x
   - Hisilicon HiP01
   - ST STiH418

  There have also been some sweeping changes, including relicensing of
  DTS contents from GPL to GPLv2+/X11 so that the same files can be
  reused in other non-GPL projects more easily.  There's also been
  changes to the DT Makefile to make it a little less conflict-ridden
  and churny down the road"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (330 commits)
  ARM: dts: Add PPMU node for exynos4412-trats2
  ARM: dts: Add PPMU node for exynos3250-monk and exynos3250-rinato
  ARM: dts: Add PPMU dt node for exynos4 and exynos4210
  ARM: dts: Add PPMU dt node for exynos3250
  ARM: dts: add mipi dsi device node for exynos4415
  ARM: dts: add fimd device node for exynos4415
  ARM: dts: Add syscon phandle to the video-phy node for Exynos4
  ARM: dts: Add sound nodes for exynos4412-trats2
  ARM: dts: Fix CLK_MOUT_CAMn parent clocks assignment for exynos4412-trats2
  ARM: dts: Fix CLK_UART_ISP_SCLK clock assignment in exynos4x12.dtsi
  ARM: dts: Add max77693 charger node for exynos4412-trats2
  ARM: dts: Switch max77686 regulators to GPIO control for exynos4412-trats2
  ARM: dts: Add suspend configuration for max77686 regulators for exynos4412-trats2
  ARM: dts: Add Maxim 77693 fuel gauge node for exynos4412-trats2
  ARM: dts: am57xx-beagle-x15: Fix USB2 mode
  ARM: dts: am57xx-beagle-x15: Add extcon nodes for USB
  ARM: dts: dra72-evm: Add extcon nodes for USB
  ARM: dts: dra7-evm: Add extcon nodes for USB
  ARM: dts: rockchip: move the hdmi ddc-i2c-bus property to the actual boards
  ARM: dts: rockchip: enable vops and hdmi output on rk3288-firefly and -evb
  ...
2015-02-17 09:36:52 -08:00
Maxime Ripard 117a2cc38f ARM: sunxi: dt: Fix aliases
Commit f77d55a3b5 ("serial: 8250_dw: get index of serial line from DT
aliases") made the serial driver now use the serial aliases to get the tty
number, pointing out that our aliases have been wrong all along.

Remove them from the DTSI and add custom ones in the relevant boards.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-25 18:06:34 +01:00
Chen-Yu Tsai 23a602b665 ARM: dts: sun9i: Add 8 bit mmc pinmux setting for mmc2
mmc2 is available on port C. Add a pinmux setting for 8 bit wide eMMC.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21 09:59:22 +01:00
Chen-Yu Tsai 2f6941cd29 ARM: dts: sun9i: Add mmc controller nodes to the A80 dtsi
The A80 has 4 mmc controllers.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21 09:59:21 +01:00
Chen-Yu Tsai 9c56f3f39a ARM: dts: sun9i: Add mmc config clock nodes
Add the device tree nodes for the mmc config clock nodes.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21 09:59:20 +01:00
Chen-Yu Tsai cd23e2e5ce ARM: dts: sun9i: Add pinmux setting for mmc0
mmc0 is only available on port F, and is always used with a 4 bit wide
bus for the onboard micro-sd slot.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21 09:59:16 +01:00
Chen-Yu Tsai 203c6883b8 ARM: dts: sun9i: Add clock-indices property for bus gate clocks
of_clk_get_parent_name() uses the clock-indices property to resolve
clock phandle arguments in case that the argument index does not
match the clock-output-names sequence.

This is the case on sunxi, where we use the actual bit index as the
argument to the phandle. Add the clock-indices property so that
of_clk_get_parent_name() resolves the names correctly.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21 09:59:15 +01:00
Chen-Yu Tsai d2aa6f5400 ARM: dts: sun9i: Add mmc module clock nodes for A80
The mmc module clocks are A80 specific module 0 (storage) type clocks.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21 09:59:15 +01:00
Maxime Ripard 19882b84d7 ARM: sunxi: DT: Convert the DTs to use the GIC headers
The GIC requires some extra opaque arguments to set the IRQ type and flags.

Convert the DTs to using the common defines.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21 09:58:57 +01:00
Maxime Ripard 092a0c3b18 ARM: sunxi: DT: Convert the DTs to use a header for the pinctrl nodes
The pinctrl nodes require some extra opaque arguments for the pull up and drive
strength values.

Introduce a new header file and convert the device trees to replace these
opaque numbers by defines.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21 09:58:57 +01:00
Maxime Ripard 7145570159 ARM: sunxi: DT: Convert to device tree includes
Prepare the device trees to use the C preprocessor.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-21 09:58:55 +01:00
Chen-Yu Tsai 2a950b2ca0 ARM: dts: sun9i: Add uart4 pinmux setting for A80 SoC
uart4 only has one possible pinmux setting on the A80 SoC.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-31 09:25:41 +01:00
Chen-Yu Tsai 6657a05872 ARM: dts: sun9i: Add i2c3 pinmux setting for A80 SoC
i2c3 has only one possible pinmux setting on the A80 SoC.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-31 09:25:11 +01:00
Chen-Yu Tsai e4aa753a72 ARM: dts: sun9i: Add i2c controller nodes to a80 dtsi
The A80 has 5 i2c controllers in the main processor block.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-31 09:25:01 +01:00
Maxime Ripard 888366fa17 ARM: sun9i: optimus: Set UART0 muxing
Enable the UART0 muxing, as set up by the bootloader.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2014-10-30 16:36:49 +01:00
Maxime Ripard 43d024d36a ARM: sun9i: Enable the A80 pinctrl driver
The A80 pinctrl driver is just as usual our pinctrl/gpio/external interrupt
controller.

Nothing really out of the extraordinary here...

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2014-10-30 16:36:45 +01:00
Maxime Ripard 136d18a84b ARM: sunxi: Fix GPLv2 wording
During the GPL to GPL/X11 licensing migration, the GPL notice introduced
mentionned the device trees as a library, which is not really accurate. It
began to spread by copy and paste. Fix all these library mentions to reflect
the file that it's actually just a file.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-27 23:04:41 +01:00
Chen-Yu Tsai ac399a971d ARM: dts: sun9i: Add basic clocks and reset controls
Now that we have driver support for the basic clocks, add them to the
dtsi and update existing peripherals. Also add reset controls to match.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2014-10-21 21:50:39 +02:00
Chen-Yu Tsai 4ab328f06e ARM: dts: sunxi: Add Allwinner A80 dtsi
The Allwinner A80 is a new multi-purpose SoC with 4 Cortex-A7 and
4 Cortex-A15 cores in a big.LITTLE architecture, and a 64-core
PowerVR G6230 GPU.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Tested-by: Andreas Färber <afaerber@suse.de>
2014-10-20 14:52:12 +02:00