Bananapi released an updated revision of the H3/H5 based Bananapi M2+.
Version 1.2 enables voltage control for the CPU's regulator by using
a GPIO line to toggle a MOSFET that can change the effective resistance
value in the regulator's feedback network.
This patch adds a common .dtsi file for this new revision, which
includes the original common sunxi-bananapi-m2-plus.dtsi file, and
adds the GPIO-controlled regulator and a cpu-supply reference. H3
and H5 variant dts files are added as well.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
This adds nodes for the Video Engine and the associated reserved memory
for the H3. Up to 96 MiB of memory are dedicated to the CMA pool.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Three more variants of the Bananapi M2 Plus have been introduced. One
with the H5 instead of the H3, another with the H2+ instead, and the
last with the H3 but with WiFi and eMMC removed.
All these variants use the same board. This patch splits out the
non-SoC-specific parts of the device tree, so that they can be shared
among all the variants. The original Bananapi M2 Plus has been renamed
to Bananapi M2 Plus H3.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The external RTL8211E RGMII Ethernet PHY is configured via external
resistors to use the address 0x1. The 0x0 address is a broadcast address
for this family of PHYs, and should not be used explicitly.
Fixes: 8c7ba536e7 ("ARM: sun8i: bananapi-m2-plus: Enable dwmac-sun8i")
Fixes: 4904337fe3 ("ARM: dts: sunxi: Restore EMAC changes (boards)")
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
The size of the register should be the size of the whole memory block,
not just the registers, that are needed.
Signed-off-by: Philipp Rossak <embed3d@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Orangepi Zero Plus 2 is an open-source single-board computer, available in two
Allwinner SOC variants, H3 and H5. We add support for H3 variant here, as the
H5 is already supported by sun50i-h5-orangepi-zero-plus2.dts.
H3 Orangepi Zero Plus 2 has:
- Quad-core Cortex-A7
- 512MB DDR3
- microSD slot and 8GB eMMC
- Debug TTL UART
- HDMI
- Wifi + BT
- OTG + power supply
Signed-off-by: Diego Rondini <diego.rondini@kynetics.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Looks like we still have two instances of phy_handle that did not
get update by Grygorii's series. Let's replace these too with
standard phy-handle.
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Neeraj Dantu <dantuguf14105@gmail.com>
Reported-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Koen Kooi <koen@dominion.thruhere.net>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add support for Moxa UC-2101 open platform
The UC-2101 computing platform is designed for industrial embedded
data acquisition and processing applications.
The features of UC-2101 are:
* eMMC
* SPI flash
* 1x LAN
* 1x RS-232/422/485 ports, software-selectable
* EEPROM
* TPM 2.0
* Watchdog
* RTC
* User gpio-keys
* User LEDs
* User button
Signed-off-by: Wes Huang (黃淵河) <wes.huang@moxa.com>
Signed-off-by: Fero JD Zhou (周俊達) <FeroJD.Zhou@moxa.com>
Signed-off-by: SZ Lin (林上智) <sz.lin@moxa.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The UC-2100 series consists many boards with different peripheral
devices and wireless modules, hence we fetch common items and
create a common dtsi file to increase reusability. All boards in
UC-2100 series will include this common dtsi file.
Signed-off-by: Wes Huang (黃淵河) <wes.huang@moxa.com>
Signed-off-by: Fero JD Zhou (周俊達) <FeroJD.Zhou@moxa.com>
Signed-off-by: SZ Lin (林上智) <sz.lin@moxa.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
* Rework the PMIC IRQ line quirk to use DT rather than hard coded topology
* Convert to SPDX identifiers
* Convert to using %pOFn instead of device_node.name
* Remove the no longer needed ARCH_SHMOBILE Kconfig symbol
* RZ/G1N (r8a7744) SoC: Add basic SoC and debug-ll support
* R-Car H1 (r8a7779) SoC: remove unused includes
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlut6KwACgkQ189kaWo3
T75p1w//X2WSkdZH5nwHGlVWFMSMbwYdcLMe9yjMPa5Sb8ErkXKAy9VoQszbJxn/
lOsZzt8sFXegErCLfLevlWR1g0OM0OTdLKqCAGOSOapV1u3iwcqqU6r4ThaPjGkf
uWj8gDYPdYrUhVR00Un6SlsH1f7yiGRoj/MNIW9zffMdOnqua/uLhFS8LdtedJKW
6gDvyDEwqA1+yJljmdH7xyX9/X6UwLN40Opq6OBuwKbKgqgySmng0amaF1lLcc6L
DqvZ8kaKHIXmBuFrHOJkSIrcRrUL2DilGGDxXaeV7p3nkICMVWENv6aTeGFF7epX
lka7rBLgEmFfz2OU/D/jDddMLaF4+MgRC4p9tIjN8cAC6QflX0OOjKjvITKrjR+u
jnNr2+f8HwuWg23LpNyYpbSfKM3/jVAc5kTCnvk4EUdcKtkoD/sxgmWnZXgDcjWv
bM3c97ahew12f16TLU0fb2sz2OL1eouKwuy90mfQVXCJY4PneK1wXKVQ2FNjRInM
vcZ9bQedkLqrp2vP39EzkDxBi0wN1OD6ejDx5vW527KFHltyBd3MN0t36g5bUVrq
Rg1nj2QHn2ZN7PhELKj1Asv2rIVKkby7i/lwchuVI8iogV7zIzOQy0145iUCm5az
cup1QHleF1cKkLlz5x3kIKYiT2QX4sHsSgn1wGA2TV3MbqfaVLQ=
=S7TZ
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-soc-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
Renesas ARM Based SoC Updates for v4.20
* Rework the PMIC IRQ line quirk to use DT rather than hard coded topology
* Convert to SPDX identifiers
* Convert to using %pOFn instead of device_node.name
* Remove the no longer needed ARCH_SHMOBILE Kconfig symbol
* RZ/G1N (r8a7744) SoC: Add basic SoC and debug-ll support
* R-Car H1 (r8a7779) SoC: remove unused includes
* tag 'renesas-arm-soc-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: Rework the PMIC IRQ line quirk
ARM: debug-ll: Add support for r8a7744
ARM: shmobile: r8a7744: Basic SoC support
ARM: shmobile: convert to SPDX identifiers
ARM: shmobile: Convert to using %pOFn instead of device_node.name
ARM: shmobile: Remove the ARCH_SHMOBILE Kconfig symbol
ARM: shmobile: r8a7779: Remove unused includes
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Use the for_each_of_cpu_node iterator to iterate over cpu nodes. This
has the side effect of defaulting to iterating using "cpu" node names in
preference to the deprecated (for FDT) device_type == "cpu".
Cc: Magnus Damm <magnus.damm@gmail.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Rob Herring <robh@kernel.org>
Checking for "/cpus" node is not necessary as of_get_cpu_node() will fail
later on anyways. The call to of_find_node_by_path() also leaks a
reference. So just remove the check.
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Use the for_each_of_cpu_node iterator to iterate over cpu nodes. This
has the side effect of defaulting to iterating using "cpu" node names in
preference to the deprecated (for FDT) device_type == "cpu".
Cc: Russell King <linux@armlinux.org.uk>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
Since SMPS10 and OTG cable detection extcon are described here, and
work to enable OTG power when an OTG cable is plugged in, we can
define OTG mode in the controller (which is disabled by default in
omap5.dtsi).
Tested on OMAP5EVM and Pyra.
Suggested-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add ti,syscon-unaligned-access property to PCIe RC nodes to set
appropriate bits in CTRL_CORE_SMA_SW_7 register to enable workaround for
errata i870.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Bit positions of PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE and
PCIE_SS1_AXI2OCP_LEGACY_MODE_ENABLE in CTRL_CORE_SMA_SW_7 are
incorrectly documented in the TRM. In fact, the bit positions are
swapped. Update the DT bindings for PCIe EP to reflect the same.
Fixes: d23f3839fe ("ARM: dts: DRA7: Add pcie1 dt node for EP mode")
Cc: stable@vger.kernel.org
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Janusz Krzysztofik has cleaned up ams-delta gpio usage along with
generic gpio framework improvments. This series contains the omap1
specific clean-up for ams-delta modem and unused gpios.
Note that this conflicts with the gpio-omap changes queued into
an immutable gpio branch ib-omap for the gpio-omap.h header file.
The merge resolution is to drop the IS_BUILTIN(CONFIG_GPIO_OMAP)
section and keep the #endif tagged for __ASSEMBLER__.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlurwEcRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXPk7xAA1BimwbriIuYK5h9j7o74h8nuv7GsFnkH
rvntMWlK/XJ3ickOt1upLUyaITjTcb+FP6rKx7kASFaltzemStBU+E/GoQObQqXT
rCYGcECIn4ffrVYGdvkBzUfTMvCE+OVRh6frenyBEFUxadHeive5h6eENQTuGDvi
yu631PKMuxILNfT05HyZYTJq+hmkmkQjqYWV9rmAFg1DucAcUVsR5V+eYku3ZdC7
SKXJMfigrnvjykLIhNqvLu+BbeZ20yrljcNOFET0t/T+ReFCR3phfL24FEf4NPza
M3FASN+9xezsGfPSTYm6JxdY/oiFzLJ16kp5qqiqgVr4rESMhpGLkie1I7KDUPx8
tnWz9hfH9RYzNjBjj/A4kC4ZA3uEWFKsbtJTj5EXo8um+rkiKOHSP+N/yjQMKglB
odWde4WENqwsr7/N39vRRkVIJGwzK7eA3tQmLoLZJwBPn/gC+MB04CqIAhf+VIIK
ZWyHGU0rQo7WD36GALna6ImvbzBwduzAlbsW3DFzqOH2L9K3d+VgSQjmk7Tk/8Da
Ds4aih/AXq72yPQxvD/e0JSC0VVZn263tWxTl9yzutrSWyYEKdo0DRsaRVrs+9MJ
2YHh5tcdRl5bSzdNLXZ8zM2Q5SdsulzEIph6RALtzJcYjA3uz3mz+G+W7HmjaFAj
hUoMMLJ7Bm0=
=fnSx
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.20/omap1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
A series of omap1 gpio changes for ams-delta
Janusz Krzysztofik has cleaned up ams-delta gpio usage along with
generic gpio framework improvments. This series contains the omap1
specific clean-up for ams-delta modem and unused gpios.
Note that this conflicts with the gpio-omap changes queued into
an immutable gpio branch ib-omap for the gpio-omap.h header file.
The merge resolution is to drop the IS_BUILTIN(CONFIG_GPIO_OMAP)
section and keep the #endif tagged for __ASSEMBLER__.
* tag 'omap-for-v4.20/omap1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP1: ams-delta: Don't request unused GPIOs
ARM: OMAP1: ams-delta-fiq: Use <linux/platform_data/gpio-omap.h>
ARM: OMAP1: ams-delta: register MODEM device earlier
ARM: OMAP1: ams-delta: initialize latch2 pins to safe values
ARM: OMAP1: ams-delta: assign MODEM IRQ from GPIO descriptor
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
These changes improve support for clkctrl clocks to deal with
split memory ranges for clkctrl providers. And to use %pOFn
instead of device_node.name.
-----BEGIN PGP SIGNATURE-----
iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAlurwRQRHHRvbnlAYXRv
bWlkZS5jb20ACgkQG9Q+yVyrpXPtWA//QM4iN9xfn28xvczHk1BgUWnrWEI+1JTb
L5968fKdoFqQ2Dbf0PLkj1z3HX3PYjtpUKM6r4admvZXAxQMwLB/7xO9AR+t7iPV
uu66ccWrJDX+TTlqN/O84R49hAKbRH30Y84TF1FR+z8Q1ywFVEqLkLb4NWXog2EP
eJaT8Ze+6CI92tJnmEJpvjNg6BGIvKVD/TwuKj5X+ii4ErVN5czzmnFmct2yPFD/
N/2Pe+3YxRkPRG0DgDBjkq5OXk5tL8Qy59oscEO0CM1kKbxfjmNWQsX327YUMAwB
cU+KyvrGtVAMAZ0ad79oTpEtNpMgnqNTLfDWYtsl6dnw9iqukC7c36FprD5bV8av
DTL/qj/lwKGsa5aAE/Uk4DJkC4OngKQ2MwMCp/zndN2rj2zNQd3p+Dc0uQOeX1wy
oPu3VvOVtJbmr09rnPfRVV0VYJCe6n3n6rcBNyWPP1sKmTOn32+j8y6kdfbbxwz6
DczLPh2jOelMbyGfuIds+4CMC+k9Q8PiZ5O5/QmK0wByQNaY401nl6EEnT533g1x
mUSchTuqGJz71iQcXJ8UCZ9defL1fklFZssIffCEu7u+Ls0G5EOEU1mMczTPMfZX
bFyR9fO0Am//PFkG4r1CLtrx/OLt7xc+QVNbs0E6WaQlSjW8ygWTZFx/0cRbdjzF
SOsZzVHBA2s=
=M1tU
-----END PGP SIGNATURE-----
Merge tag 'omap-for-v4.20/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc
SoC changes for omap variants
These changes improve support for clkctrl clocks to deal with
split memory ranges for clkctrl providers. And to use %pOFn
instead of device_node.name.
* tag 'omap-for-v4.20/soc-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: OMAP2+: Convert to using %pOFn instead of device_node.name
ARM: OMAP2+: hwmod_core: improve the support for clkctrl clocks
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This architecture, used for running in QEMU, runs just fine when
compiled in big-endian mode. So enable it. This is enabled in exactly
the same way that it is for other platforms (such as vexpress) that also
support big-endian mode in QEMU successfully.
Signed-off-by: Jason A. Donenfeld <Jason@zx2c4.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* RZ/G1M (r8a7743) based iWave G20D-Q7 board and camera daughter board
- Move PCIe node out of common dtsi to allow reuse of the common dtsi
on the iWave RZ/G1N board
* RZ/G1C (r8a77470) SoC: Add I2C4, SDHI2 and SMP support
* R-Car Gen1 based boards and R-Car Gen2 SoCs:
- Enhance top-of-file comments to include SoC name
* RZ/N1D (r9a06g032) SoC:
- Correct UART0 description and add all other UARTs
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEE4nzZofWswv9L/nKF189kaWo3T74FAlut51oACgkQ189kaWo3
T77BKg//fhxvkarcATUM+l5hImWpPqAs2J6/+ymR2tsmY6ei8mWlKKdqHP5TCQUe
nYev93hjOP+MUmMv5Wlgz3Ql6BPyci0nzNGGp53EgADB8ku8olFDXPxykhi3InXc
MYndvUK/hTMdxP20B0Z+ALbfCWccBO7CnT2La+hHS2IkMGHwiOmYj+rXYneX29yA
vUgDY7tzg4qHHUjzWpaCtZxo7P3sD1HPFF5dxel6k8ua2gmYIhZ2NEUQTCBofMSl
186C6KN6x8YnAR3goWf4a1JgzPBlX5U8NZXBOiPgxl8kbxJniXLWtGFs323BK8Sz
09ilSM4w//HWxDK8n9LxIxzMyrMiXblQA4JPdp1q913f6xePryEEYbV2/tPI0XMM
iCnZNfkjqUE5ykADcQmNiWrZTbwxFvpT2L8YW1xspQK8yOEgy9yN/Y12Y7yWQ7jy
dbEVIcxsEm4ccTOed8v5u5SILxujMLhpwUgSvUBIVIPrxAbiO/b/AckykloXX4ej
TbNHig0TnurnDx0XBMDYcOrVnIEtNycEOiU/Dxp+uk5TxjXnTdcEMh7oCNemjm0r
ybU56U0XrMNzjVcEwLR44wCp8TPOqL4lvEXuOAgrN0biyaUWInq5NrSlHKJT667R
7zNtd/TVONUKVZm/xF7p6JGRSlazb9lDkVl9iCO8MBCvPZhGd9Q=
=xv5S
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-dt2-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
Second Round of Renesas ARM Based SoC DT Updates for v4.20
* RZ/G1M (r8a7743) based iWave G20D-Q7 board and camera daughter board
- Move PCIe node out of common dtsi to allow reuse of the common dtsi
on the iWave RZ/G1N board
* RZ/G1C (r8a77470) SoC: Add I2C4, SDHI2 and SMP support
* R-Car Gen1 based boards and R-Car Gen2 SoCs:
- Enhance top-of-file comments to include SoC name
* RZ/N1D (r9a06g032) SoC:
- Correct UART0 description and add all other UARTs
* tag 'renesas-arm-dt2-for-v4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: dts: iwg20d-q7-common: Move pciec node out of common dtsi
ARM: dts: r8a77470: Add I2C4 support
ARM: dts: r8a77470: Add SDHI2 support
ARM: dts: r8a77470: Add SMP support
ARM: dts: R-Car Gen1 board comment update
ARM: dts: Include R-Car Gen2 product name in DTSI files
ARM: dts: r9a06g032: Correct UART and add all other UARTs
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- fix clock controller register sizes
- new board: Endless Mini (EC-100) by Endless Mobile
- add voltage regulators
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAlurT/EACgkQWTcYmtP7
xmXSGA/+PW0Z0oflNIoqwdqy5MIJ53pQjLvNzL7lzWa/l8pYFRyBC5TIatJrOUOL
QwtSnhiCH2nylzlXUwEgWhLq2Zrn/Z9NDNe3lf73alzugAnEwQ9Jzbl3TdQs4Zzu
n8hU/p8BKKkNRXdkjdu+DCd71x6lzt40oVCbQuFqLzFkE/a12GrY98OWmnAG4LWA
muP//fuIKTHd2eosRmVs2vmK3uHOq/JZUaIZJCpNC3SlIM00P5EGzLhQ+2ZoVXfm
FvSFXiSbq6E9lybrTT+exZOdR3S5tcLR+dxzMhcTksz/Ng7euQONfgTew9+UE0ko
ikZwf9KgqWih/eVX7Ut6nwOdhXHMgkw2kIf79qE93Hqt+17eCqcQY9GD5Hqk4Q6S
gDmihGZeUQKg9h0MIrqSBANryx/2TwYpVZORHDeEvT7PENgeDwN7X245fyaz+YkS
xOMPpleQXSgE9iZC+LpRcTOxjo5OuxUzaRBqRp7TTwJnZVr5+KILO58/noSFZl/P
EkzIPIpqQFaEo+mrdypkZ5LOYpfvGMUMWqyhgnFjMqmDCg2yLUEkiWbb/FX1Gb5w
DzLQ7+1ODmsnjoxuOKOTNHX/OPKmSK9ZscZJyZIXxRw8ZP6qPIyIk8AxSWojaqhB
obSMTof8gO5FH5G+wjOzZrDA/0bgtLf0Rsoo5CoieKTsY8OX5o0=
=U6kf
-----END PGP SIGNATURE-----
Merge tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into next/dt
ARM: dts: Amlogic updates for v4.20
- fix clock controller register sizes
- new board: Endless Mini (EC-100) by Endless Mobile
- add voltage regulators
* tag 'amlogic-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic:
ARM: dts: meson8b: odroidc1: add stdout-path property
ARM: dts: meson8b: odroidc1: enable the SAR ADC
ARM: dts: meson8b: odroidc1: add the fixed voltage regulators
ARM: dts: meson8b: odroidc1: add the CPU voltage regulator
ARM: dts: meson8b: Add support for the Endless Mini (EC-100)
ARM: dts: meson8b: add the RMII pins
ARM: dts: meson8b: add the I2C_A, PWM_C and UART_B pins
dt-bindings: arm: amlogic: Add the Endless Mobile Endless Mini (EC-100)
dt-bindings: add vendor prefix for "Endless Mobile, Inc."
ARM: dts: meson8b: fix the clock controller register size
ARM: dts: meson8: fix the clock controller register size
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
SPI controller nodes should be named 'spi' rather than 'ssp'. Fixing the
name enables dtc SPI bus checks.
Cc: Vladimir Zapolskiy <vz@mleia.com>
Cc: Sylvain Lemieux <slemieux.tyco@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
PCIe is not populated by default on iWave RZ/G1N board. RZ/G1N board
is almost identical to RZ/G1M. In order to reuse the common dtsi for
both the boards, it is required to move pcie node from common dtsi
to board specific dts.
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add SoC specific device tree definitions for the SDHI2 interface.
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Add DT node for the Advanced Power Management Unit (APMU), add the
second CPU core, and use "renesas,apmu" as "enable-method".
Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Include R-Car Gen1 product names for Bock-W and Marzen.
The product names are taken from:
Documentation/devicetree/bindings/arm/shmobile.txt
Signed-off-by: Magnus Damm <damm@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Improve the user friendliness of the DTS code base by including the
R-Car product name in each R-Car Gen2 DTSI file.
The product names are taken from:
Documentation/devicetree/bindings/arm/shmobile.txt
Signed-off-by: Magnus Damm <damm@opensource.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
In arm_notify_die call force_sig_fault to let the generic
code handle siginfo generation.
This removes some boiler plate making the code easier to
maintain in the long run.
Signed-off-by: "Eric W. Biederman" <ebiederm@xmission.com>
We have defined a new DTS and it should be compiled.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
The address in the SDRAM node was incorrect. Fix this to agree with the
correct address and to match the reg definition block.
Cc: stable@vger.kernel.org
Fixes: 54b4a8f57848b("arm: socfpga: dts: Add Arria10 SDRAM EDAC DTS support")
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
SPI controller nodes should be named 'spi' rather than 'ssp'. Fixing the
name enables dtc SPI bus checks.
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
The following commits used IRQ_TYPE_NONE since that matched what was
already in the file and I do not have access to the datasheets for
these devices. After these patches were submitted, commit dcf1450114
("ARM: dts: qcom-msm8974: change invalid flag IRQ NONE to valid value")
changed all of these values to IRQ_TYPE_LEVEL_HIGH. This patch corrects
the IRQ type for these two commits:
commit bd93925075 ("ARM: dts: qcom: msm8974-hammerhead: add device
tree bindings for ALS / proximity")
commit fe8d81fe7d ("ARM: dts: qcom: msm8974-hammerhead: add device
tree bindings for mpu6515")
Prior to these patches, I was having issues with the bmp280 sensor
returning temperature / pressure skipped errors, however these errors
have gone away with these patches.
Patches were tested on a LG Nexus 5 (hammerhead) phone.
Signed-off-by: Brian Masney <masneyb@onstation.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
The power key is controlled solely by the EC, which only tiggeres this
gpio after wakeup.
Fixes immediately return to suspend after wake from LP1.
Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
ARM: Xilinx Zynq SoC patches for v4.20
- Convert to using %pOFn instead of device_node.name in slcr driver
* tag 'zynq-soc-for-v4.20' of https://github.com/Xilinx/linux-xlnx:
ARM: zynq: Convert to using %pOFn instead of device_node.name
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fix indentation and alignment when spaces were used instead of tabs.
This fixes checkpatch errors like:
ERROR: code indent should use tabs where possible
#306: FILE: arch/arm/boot/dts/tegra20-paz00.dts:306:
+^I^I <&tegra_car TEGRA20_CLK_PLL_P_OUT3>;$
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add an evaluation board device tree more in-line with all our other
device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rename ac97 label to tegra_ac97 to be more in-line with the device tree
binding documentation.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Get rid of the fake clocks simple bus and use node names as per the
actual schematics.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rename tps6586x@34 to pmic@34 and drop the unused pmic label.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rename i2c_ddc to hdmi_ddc to be more in-line with other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Drop model and compatible nodes from the module level device tree as
they get overridden by the carrier board device tree anyway.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Simplify model and compatible by dropping the 256/512 MB from the model,
-512 from the compatible and rename that property from toradex,iris to
toradex,colibri_t20-iris to be more in-line with all our other device
trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Simplify model and compatible by dropping the 256/512 MB from the model
and -512 from the compatible properties to be more in-line with all our
other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Annotate the SD card, its detect pin and move the SD card detect GPIO
definition from the module to the carrier board more in-line with our
other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add i2c-thermtrip which would set the SLEEP MODE bit in the SUPPLYENE
register of the TPS658643 PMIC.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rename and annotate LM95245 temperature sensor more in-line with our
other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add dr_mode property to the USB controller.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Update sound nvidia,model to be more in-line with our other device
trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Remove the phy-reset-gpio from the USB controller node as it is already
specified in the PHY node.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add missing regulators:
- reg_lan_v_bus being USB Ethernet chip vbus supply
- carrier board reg_3v3 to be used as backlight and panel power supply
- carrier board HDMI supply being reg_5v0
- reg_usbc_vbus being the USB vbus supply of the EHCI instance 0
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Use no-1-8-v property rather than vmmc/vqmmc supplies and drop now
obsolete and anyway non-existent vcc_sd.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Annotate I2C busses: GEN2_I2C and CAM_I2C (I2C3) being unused and
DDC_CLOCK/DATA on X3 pin 15/16 e.g. used for display EDID.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add rtc0 being the ultra low-power I2C one as found on the carrier board
and the 3rd UART being NVIDIA's UARTB.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Integrate support for GEN1_I2C aka I2C_SDA/SCL on SODIMM pin 194/196 and
the M41T0M6 real time clock on the carrier board.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Move RTC aliases from module to carrier board to be more in-line with
all our other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Shorten temperature-sensor node to just temp-sensor as suggested
in the binding documentation.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Get rid of the fake clocks simple bus and use node names as per the
actual schematics.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
As underscores in node names are not recommended replace them all where
possible with dashes.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Drop obsolete spidev device tree nodes as nowadays one should do this
by binding the spidev driver to specific instances/chip selects at
runtime.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Drop model and compatible nodes from the module level device tree as
they get overridden by the carrier board device tree anyway.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The power I2C bus aka PWR_I2C which connects to the audio codec, PMIC,
temperature sensor and touch screen controller is really on-module only.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Both GEN2_I2C as well as CAM_I2C (I2C3) are unused in our design.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the MCP2515 SPI CAN controller's vdd-supply being the regular
carrier board's reg_3v3 and xceiver-supply being reg_5v0.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Get rid of the unused MCP2515 SPI CAN controller can0 label.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Fix the MCP2515 SPI CAN controller interrupt polarity which according
to its datasheet defaults to low-active aka falling edge.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rename a few nodes using more common names:
- rename tps65911@2d to pmic@2d
- rename stmpe811@41 to touchscreen@41
- rename tps62362@60 to regulator@60
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rename hdmiddc to hdmi_ddc to be more in-line with other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Drop obsolete spidev device tree node as nowadays one should do this
by binding the spidev driver to specific instances/chip selects at
runtime.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Drop model and compatible nodes from the module level device tree as
they get overridden by the carrier board device tree anyway.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Get rid of the fake clocks simple bus and use node names as per the
actual schematics.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add i2c-thermtrip which would set the DEV_OFF bit in the DCDC control
register of the TPS65911 PMIC.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Clean-up pinmuxing:
- white-space clean-up
- explicitly disable LCD_M1 in favour of LCD_DE on L_BIAS
- explicitly disable multiplexed SSPFRM and SSPTXD
- get rid of nvidia,lock property
- add missing eMMC sdmmc4_cmd_pt7 and explicitly enable input
- explicitly disable lcd_dc1_pd2 (e.g. LM95245 I2C address pin)
- annotate TOUCH_PEN_INT# being on-module
- As underscores in node names are not recommended replace them all
where possible with dashes.
- Replace underscores in UART annotations (e.g. UART_A) with dashes
(e.g. UART-A) to be more in-line with our Colibri standard.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Drop pwmleds in favour of using regular PWMs.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Annotate UARTs and move the serial UART "nvidia,tegra30-hsuart"
compatible definitions from the carrier board to the module level device
trees. One could still override this in a custom carrier board device
tree if required.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Support the V1.1 hardware revisions with the following change:
Changed power rail for MMC1 interface to a 3.3V/1.8V switchable rail in
order to be able to run UHS SD cards in ultra high speed 1.8V mode.
[ 207.502011] mmc2: host does not support reading read-only switch,
assuming write-enable
[ 207.517011] mmc2: new ultra high speed SDR104 SDHC card at address
aaaa
[ 207.534190] mmcblk2: mmc2:aaaa SE32G 29.7 GiB
[ 207.545096] mmcblk2: p1
root@apalis-t30:~# cat /sys/kernel/debug/mmc2/ios
clock: 208000000 Hz
actual clock: 204000000 Hz
vdd: 21 (3.3 ~ 3.4 V)
bus mode: 2 (push-pull)
chip select: 0 (don't care)
power mode: 2 (on)
bus width: 2 (4 bits)
timing spec: 6 (sd uhs SDR104)
signal voltage: 1 (1.80 V)
driver type: 0 (driver type B)
root@apalis-t30:~# hdparm -t /dev/mmcblk2
/dev/mmcblk2:
Timing buffered disk reads: 256 MB in 3.02 seconds = 84.71 MB/sec
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Move the hda node from the carrier board to the module level device
tree.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Fix the MCP2515 SPI CAN controller interrupt polarity which according
to its datasheet defaults to low-active aka falling edge.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rename a few nodes using more common names:
- rename tps65911@2d to pmic@2d
- rename stmpe811@41 to touchscreen@41
- rename tps62362@60 to regulator@60
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Rename hdmiddc to hdmi_ddc to be more in-line with other device trees.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Apalis Evaluation Board uses Apalis GPIO7 on MXM3 pin 15 as reset
signal for its PLX PEX 8605 PCIe Switch.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Drop obsolete spidev device tree nodes as nowadays one should do this
by binding the spidev driver to specific instances/chip selects at
runtime.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Drop model and compatible nodes from the module level device tree as
they get overridden by the carrier board device tree anyway.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Get rid of the fake clocks simple bus and use node names as per the
actual schematics.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add i2c-thermtrip which would set the DEV_OFF bit in the DCDC control
register of the TPS65911 PMIC.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Clean-up pinmuxing:
- white-space clean-up
- explicitly disable input of BKL1_ON, BKL1_PWM and BKL1_PWM_EN#
- annotate Apalis I2C3 usage for CAM
- get rid of nvidia,lock property
- add missing eMMC sdmmc4_cmd_pt7 and explicitly enable input
- explicitly disable lcd_dc1_pd2 (e.g. LM95245 I2C address pin)
- annotate TOUCH_PEN_INT# being on-module
- As underscores in node names are not recommended replace them all
where possible with dashes.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Drop pwmleds in favour of using regular PWMs.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Annotate UARTs and move the serial UART "nvidia,tegra30-hsuart"
compatible definitions from the carrier board to the module level device
trees. One could still override this in a custom carrier board device
tree if required.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Annotate PCIe port nodes and clean-up PCIe controller/port status' with
respect to carrier board vs. module level device trees. As port 3
connects to the on-module Gigabit Ethernet MACPHY it is always enabled
together with the PCIe controller itself.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
In order to avoid any floating SD card detect pins as may e.g. happen on
Ixora V1.1A pull them all up.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Nothing Xen specific in these headers, which get included from a lot
of code in the kernel. So prune the includes and move them to the
Xen-specific files that actually use them instead.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Take the Xen check into the core code instead of delegating it to
the architectures.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Having multiple externs in arch headers is not a good way to provide
a common interface.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
This is similar to tegra124 and avoids the following being reported
upon boot:
hw perfevents: no interrupt-affinity property for /pmu, guessing.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Thierry Reding <treding@nvidia.com>
There was a dot instead of a comma. Fix this.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the actual dts for the tinker board S, which brings its own emmc
device, not therefore not requiring an sd-card to boot.
Signed-off-by: David Summers <beagleboard@davidjohnsummers.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tinker Board and Tinker Board S share most of their components,
so should also not replicate these for each variant.
So move them to a shared dtsi that then can get included by both
boards.
Signed-off-by: David Summers <beagleboard@davidjohnsummers.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
On the imx6qdl-zii-rdu2 board the RTC functionality is provided via
a DS1341 RTC connected via I2C bus, so we can safely disable the internal
one.
Reported-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to Documentation/devicetree/bindings/rtc/rtc-ds1307.txt the
original compatible "maxim,ds1341" is not a valid entry.
Switch to the documented "dallas,ds1341" compatible.
Reported-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Tested-by: Chris Healy <cphealy@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
On i.MX6UL, accessing OCOTP directly is wrong because the ocotp clock
needs to be enabled first, so use the nvmem-cells binding instead.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
dtc has new checks for SPI buses. Fix the warnings in node names and
unit-addresses.
There's over 100 warnings for FSL boards, a few examples:
arch/arm/boot/dts/imx28-duckbill-2-spi.dtb: Warning (spi_bus_bridge): /apb@80000000/apbh@80000000/ssp@80014000: node name for SPI buses should be 'spi'
arch/arm/boot/dts/imx53-ppd.dtb: Warning (spi_bus_bridge): /soc/aips@50000000/spba@50000000/ecspi@50010000: node name for SPI buses should be 'spi'
arch/arm/boot/dts/imx6dl-colibri-eval-v3.dtb: Warning (spi_bus_reg): /soc/aips-bus@2000000/spba-bus@2000000/spi@2014000/mcp251x@1: SPI bus unit address format error, expected "0"
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Li Yang <leoyang.li@nxp.com>
Cc: Stefan Agner <stefan@agner.ch>
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
To use the "earlycon" kernel command line parameter (without arguments)
we need a stdout-path property under the /chosen node. Add this to make
it easier to spot errors early in the boot process when looking for
them.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Odroid-C1 exposes ADC channels 0 and 1 on the GPIO headers. NOTE: Due
to the SoC design these are limited to 1.8V (instead of 3.3V like all
other pins).
Enable the SAR ADC to enable voltage measurements on these pins.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
There are multiple fixed regulators on the Odroid-C1 board. Add them so
they can be used when we add the devices that need them (SAR ADC needs
the 1.8V IOREF, RTC needs VDD_RTC).
These are:
- P5V0 is the main 5V power input
- VCC3V3 / VDDIO_AO3V3 / VDD3V3: fixed regulator with 3.3V output which
is supplied by P5V0
- IOREF_1V8 / VCC1V8 / VDD1V8: fixed regulator with 1.8V output which is
supplied by P5V0
- VDD_RTC: fixed voltage regulator with 0.9V output which is supplied by
VDDIO_AO3V3
- DDR_VDDC / DDR3_1V5: fixed voltage regulator with 1.5V output which is
supplied by P5V0
- the existing TF_IO and RFLASH_VDD_EN regulators are supplied by
VDDIO_AO3V3
- the existing VCCK regulator is supplied by P5V0
This does not add the missing VDDEE regulator (controlled by PWM_D)
because it's not clear yet how to configure the voltage of that
regulator.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The CPU voltage regulator is a "Monolithic Power Systems MP2161"
(according to the Odroid-C1+'s schematics). It is driven by PWM_C on
GPIODV_9.
Hardkernel's 3.10 kernel (based on the Amlogic GPL kernel sources)
defines a PWM voltage table with the following values:
- 0.86 volts = PWM register value 0x10f001b
- (more values in 0.1 volt increments)
- 1.14 volts = PWM register value 0x000012a
When using the XTAL (24MHz) as input this translates into a PWM period
of 12218ns with 0.86V using a duty cycle of 91% and 1.14V using a duty
cycle of 0%.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
The Endless Mini (EC-100) is a grapefruit-sized computer based on the
Amlogic Meson8b (S805) SoC which comes in two variants.
Both variants have in common:
- Amlogic Meson8b (S805) SoC
- two USB 2.0 ports on the rear, one one the front (connected to the SoC
through an internal hub)
- 3.5mm Stereo out and MIC combo port
- HDMI and CVBS output
- 5V power supply (rated at 3A / 15W)
- an internal embedded micro-controller (called "EC") which implements a
"breathing" effect for the LED and allows shutting down (powering off)
the whole device
- 10/100 Mbit/s Ethernet using an IC Plus IP101A/G PHY (note: the website
incorrectly lists a Gigabit Ethernet port)
- the CPU voltage is regulated using a PWM regulator. The GPL sources of
the EC-100 are using a PWM value of 0x1c0000 for 0.86V and a PWM value
of 0x00001c for 1.14V. When using the XTAL (24MHz) as input this
translates into a PWM period of 1148ns with 0.86V using a duty cycle of
100% and 1.14V using a duty cycle of 0%.
The main differences are:
- the main indicator for the variant is the RAM size: the "cheaper"
variant has 1 GB of RAM, while the more expensive one comes with 2GB
- the storage size differs: 24 GB vs 32 GB
- the "1 GB RAM" variant has Ethernet connectivity only, while the "2 GB"
variant has a Realtek RTL8723BS SDIO chip which adds 802.11b/g/n wifi
and Bluetooth 4.0 support
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Some boards use an RMII Ethernet PHY which requires fewer pins than the
RGMII PHYs. Add a separate eth_rmii_pins node which does not include the
pins which are only required for RGMII (but not for RMII) PHYs.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
These are used for example on the Endless Mini (EC-100):
- I2C_A is connected to the Realtek RT5640 audio codec
- PWM_C (GPIODV_9) is connected to a PWM regulator which is used for
VCCK (CPU voltage supply)
- UART_B is connected to the Bluetooth module (of the RTL8723BS SDIO
wifi and Bluetooth combo chip)
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Remove unused parameter from SPI6 dmas property on stm32mp157c SoC.
Fixes: dc3f8c86c1 ("ARM: dts: stm32: add SPI support on stm32mp157c")
Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
[olof: Without this patch, SPI6 will fall back to interrupt mode with
lower perfmance]
Signed-off-by: Olof Johansson <olof@lixom.net>
Pass the 'no-sd' for esdhc0 controller as it is wired to eMMC.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
No SDIO devices are connected to these ports, so pass the 'no-sdio'
property.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx51-zii-scu2-mezz has an external watchdog in the environment
microcontroller, so disable the internal one.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx51-zii-scu2-mezz does not have any video encoding/decoding needs,
so disable the VPU.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
imx51-zii-scu3-esb does not have any video encoding/decoding needs,
so disable the VPU.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
intended for 4.19, please pull the following:
- Florian fixes the PPI and SPI interrupts in the BCM63138 (DSL) SoC DTS
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAlupKGwACgkQh9CWnEQH
BwTgvQ/+KShazu6K/28nduCtvnDCDbro8UYHxweo97UmeeEYIJ9g41ubKxEtWHUF
s/vNojpv0xlPEDKogHsBfsE6L0S3jNjG5dx1lvJgrJDlaTabtGybM3xRoOkB+xGs
y7QNTfBcVPOBJjOrUSmh/1CIirBm+yQjSYgg8/YLJWZCy/FRgSd7koTKHAql/Ppw
xWjG83djIFnWxTs7Hbp0cHQP9Z4kpWo9tuWkyOXeiDR0CMTtFjdKwMPkw4GHOInQ
68FK75mDROnno9TwtWGylw2op8JRzSqRaX6aDQnXn8xzP7D+ngRRUWlLNOQutuO1
RX8+qx5ItUMi6vTc3zOm4NJk1WvWSyiiTO2fHLjZ29e+ODy0gi6cZCb8E4gSJK1W
nS3KFDdqw0hPh4rCOGKe20KqaY0jd/hN1FLjXIA9YRYQJb0aZR1iW+U8PmahNyEb
9O2zUEUJebFoZWOta4ISnJMKhXNawHGf3f6U24kqMCg/3qJt4NKFn2MjdsXraqij
nd/biK0M6JhlHwHTV4sVEN7f86anESz1H8T9AB9MWkzlTNvW7narWQEJCiVGp/16
FDufrM0cNX9mVcBOprzmDpMiY+YiKOP2nrKIlTPaaa/qsxhOr2qZT8KmzlmdRQWU
Aj/sbaPRPF+882sDSEbLYpl/aE90zYgiLe2S1PfOVRZ5YrJws0E=
=FoxN
-----END PGP SIGNATURE-----
Merge tag 'arm-soc/for-4.19/devicetree-fixes' of https://github.com/Broadcom/stblinux into fixes
This pull request contains Broadcom ARM-based SoCs Device Tree changes
intended for 4.19, please pull the following:
- Florian fixes the PPI and SPI interrupts in the BCM63138 (DSL) SoC DTS
* tag 'arm-soc/for-4.19/devicetree-fixes' of https://github.com/Broadcom/stblinux:
ARM: dts: BCM63xx: Fix incorrect interrupt specifiers
Signed-off-by: Olof Johansson <olof@lixom.net>