Commit Graph

7 Commits

Author SHA1 Message Date
Alison Wang 70b5ea9728 ARM: ls1021a: Add dma-coherent property for eTSEC nodes
This patch adds dma-coherent property for eTSEC nodes, so
coherent DMA operations are supported.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-10-19 22:45:16 +08:00
Horia Geantă 816aa61c33 ARM: dts: ls1021a: add crypto node
Signed-off-by: Horia Geantă <horia.geanta@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-10-19 22:45:14 +08:00
Claudiu Manoil d69cb5d7ea ARM: dts: ls1021a: Add the eTSEC controller nodes
Add basic support for all the eTSEC controllers on the
ls1021a SoC.  Second interrupt group register blocks
and their corresponding Rx/Tx/Err interrupt sources are
included as well for each eTSEC node.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:21 +08:00
Alison Wang 50897cb6fa ARM: dts: ls1021a: Add dts nodes for audio on LS1021A
This patch adds dts nodes for audio on LS1021A.

Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:19 +08:00
Haikun Wang c47d6e380b ARM: dts: ls1021a: Update 'dspi' device node compatible string
Freescale DSPI driver has been updated and supports TCF interrupt type now.
In the new driver we choose the interrupt type according the compatible
string of the device node.
This patch update the compatible string of DSPI device node of LS1021A in
order to use the correct interrupt type.

Signed-off-by: Haikun Wang <haikun.wang@freescale.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2015-08-11 23:15:13 +08:00
Xiubo Li 4fe6be0fe0 ARM: ls1021a: dtsi: add 'big-endian' property for scfg node
On LS1021A SoC, the scfg device is in BE mode.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-12-29 19:22:12 +08:00
Jingchang Lu 7239280cc2 ARM: dts: Add SoC level device tree support for LS1021A
This add Freescale QorIQ LS1021A SoC device tree support.
The QorIQ LS1021A processor incorporates dual ARM Cortex-A7 cores,
providing virtualization support, advanced security features and the
broadest array of high-speed interconnects and optimized peripheral
features.

The LS1021A SoC shares IPs with i.MX, Vybrid and PowerPC platform.

For the detail information about Freescale QorIQ LS1021A SoC,
please refer to the QorIQ LS1021A Reference Manual.

Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>
Signed-off-by: Chenhui Zhao <chenhui.zhao@freescale.com>
Signed-off-by: Suresh Gupta <suresh.gupta@freescale.com>
Signed-off-by: Shaveta Leekha <shaveta@freescale.com>
Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Signed-off-by: Chao Fu <b44548@freescale.com>
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Alison Wang <alison.wang@freescale.com>
Signed-off-by: Jingchang Lu <jingchang.lu@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2014-11-23 15:08:08 +08:00