This is a workaround for what I think is a bug in the 2700G chip.
The PLL output frequency is adustable using 3 values (M, N and P. See code
for formula). The N value range is documented to be 1 to 7 but when it is set
to 1, the output frequency is lower than it should be (divided by 2), giving
unexpected results such as no sync on a CRT display.
This patch prevents N=1 when searching for the best value for the requested
pixclock.
Signed-off-by: Raphael Assenat <raph@8d.com>
Signed-off-by: Antonino Daplas <adaplas@pol.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Add frame buffer driver for the 2700G LCD controller present on CompuLab
CM-X270 computer module.
[adaplas]
- Add more informative help text to Kconfig
- Make DEBUG a Kconfig option as FB_MBX_DEBUG
- Remove #include mbxdebug.c, this is frowned upon
- Remove redundant casts
- Arrange #include's alphabetically
- Trivial whitespace
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Antonino Daplas <adaplas@pol.net>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Raphael Assenat