Commit Graph

16 Commits

Author SHA1 Message Date
Alex Deucher 3c681718b4 drm/amdgpu/dce10: Fold set_cursor() into show_cursor()
Port of radeon commit:
8991668ab4

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:28 -04:00
Alex Deucher f9242d1baf drm/amdgpu/dce10: Clean up reference counting and pinning of the cursor BOs
Take a GEM reference for and pin the new cursor BO, unpin and drop the
GEM reference for the old cursor BO in dce10 crtc_cursor_set2, and use
amdgpu_crtc->cursor_addr in dce10 set_cursor.

This fixes dce10 cursor_reset accidentally incrementing the cursor BO
pin count, and cleans up the code a little.

Port of radeon commit:
cd404af0c9

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:27 -04:00
Alex Deucher ef67e38cfe drm/amdgpu/dce10: Move hotspot handling out of set_cursor
It's only needed in dce10 crtc_cursor_set2.

Port of radeon commit:
2e007e611b

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:26 -04:00
Alex Deucher dd0b5d2f88 drm/amdgpu/dce10: Re-show the cursor after a modeset (v2)
Setting a mode seems to clear the cursor registers, so we need to
re-program them to make sure the cursor is visible.

Port of radeon commit:
6d3759fac6

v2: change radeon reference in error message

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:26 -04:00
Alex Deucher 29275a9b09 drm/amdgpu/dce10: Use cursor_set2 hook for enabling / disabling the HW cursor
The cursor_set2 hook provides the cursor hotspot position within the
cursor image. When the hotspot position changes, we can adjust the cursor
position such that the hotspot doesn't move on the screen. This prevents
the cursor from appearing to intermittently jump around on the screen
when the position of the hotspot within the cursor image changes.

Port of radeon commits:
78b1a6010b
3feba08d79

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-10-14 16:16:25 -04:00
Alex Deucher be9fd2e978 drm/amdgpu: fix typo in dce10 watermark setup
Using the wrong watermwark value for the secondary
watermark.  Copy paste typo.  Noticed by Mykola.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2015-09-03 12:06:01 -04:00
David Zhang 843908604d drm/amdgpu: Add Fiji support to the DCE 10.0 IP module (v2)
v2: agd5f: fix up XDMA golden settings

Signed-off-by: David Zhang <david1.zhang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
2015-08-17 16:50:26 -04:00
Jammy Zhou 2f7d10b393 drm/amdgpu: merge amdgpu_family.h into amd_shared.h (v2)
Make the definitions common for all driver components

v2: fix kfd

Signed-off-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-08-17 16:50:21 -04:00
Michel Dänzer 5e6775abb5 drm/amdgpu/dce10: Re-set VBLANK interrupt state when enabling a CRTC
This doesn't seem strictly necessary with Tonga right now, but that might
change with future power management enhancements.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
2015-07-23 11:09:43 -04:00
Mario Kleiner bd833144a2 drm/amdgpu: Handle irqs only based on irq ring, not irq status regs.
This is a translation of the patch ...
"drm/radeon: Handle irqs only based on irq ring, not irq status regs."
... for the vblank irq handling, to fix the same problem described
in that patch on the new driver.

Only compile tested due to lack of suitable hw.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
CC: Michel Dänzer <michel.daenzer@amd.com>
CC: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-07-08 12:41:37 -04:00
Alex Deucher 633ed3df9a drm/amdgpu: don't enable/disable display twice on suspend/resume
We were doing it in the common code and in the IP specific code.
Remove the IP specific code.  The common code handles the
ordering properly.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10 14:16:48 -04:00
Alex Deucher 5732a94f18 drm/admgpu: move XDMA golden registers to dce code
Already moved other display registers.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-10 09:13:21 -04:00
Chunming Zhou 7e5a547f64 drm/amdgpu: implement the allocation range (v3)
Pass a ttm_placement pointer to amdgpu_bo_create_restricted
add min_offset to amdgpu_bo_pin_restricted.  This makes it
easier to allocate memory with address restrictions.  With
this patch we can also enable 2-ended allocation again.

v2: fix rebase conflicts
v3: memset placements before using

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Chunming Zhou <david1.zhou@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:52 -04:00
yanyang1 5fc3aeeb9e drm/amdgpu: rename amdgpu_ip_funcs to amd_ip_funcs (v2)
The structure is renamed and moved to amd_shared.h to make
the component independent.  This makes it easier to add
new components in the future.

v2: fix include path

Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: yanyang1 <young.yang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:51 -04:00
Marek Olšák fbd76d59ef drm/amdgpu: rework tiling flags
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
2015-06-03 21:03:46 -04:00
Alex Deucher aaa36a976b drm/amdgpu: Add initial VI support
This adds initial support for VI asics.  This
includes Iceland, Tonga, and Carrizo.  Our inital
focus as been Carrizo, so there are still gaps in
support for Tonga and Iceland, notably power
management.

Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2015-06-03 21:03:17 -04:00