mirror of https://gitee.com/openkylin/linux.git
53 Commits
Author | SHA1 | Message | Date |
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Arnd Bergmann | d4e68fa37f |
Add minimal device tree support for dra62x also known j5eco. It is
related to dm814x, just the clocks are a bit different and it has a different set of integrated devices. And let's get some basic dm814x and dra62x devices working as many of the devices are like on am33xx:: - pinctrl using the pinctrl defines as for am33xx - Updated EDMA bindings with support for using exma_xbar - MMC support for dm814x-evm, t410 and dra62x-j5eco-evm - USB support for dm814x-evm, t410 and dra62x-j5eco-evm This branch depends on an earlier omap-for-v4.5/81xx-fixes-signed branch that has dm814x dts fixes interlaced with SoC related fixes to keep things booting. The interlaced SoC and dts fixes were needed because of issues with the device tree defined clocks that just happened to work on bootloader timings for t410 earlier. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJWeewGAAoJEBvUPslcq6Vz+5UQAJDZH9+kELrI1i1ymWg50q2+ HdnswijaQVuX1ZZeyarytvMT00s6bkouaGTLYrPGlifuJuBAAZ3PewZ4FVgIkA4A V4QAl3+vZ0wU+TjwWLlODXwd20xAeGY5LmhLkaHheP8Dbnd1OLm2BxJlps+zK3WJ a9Wv0rcwJuJt9dBGdELDcj04SlHd6oOmy+bHeoUi0VBcb+ZJD8+WaWQB1qkvae46 IitA74nDLY0Ejezf3lJ8Bu+I1NKv5tGg//SEJTZQfaSFxGoYbfcHkOKrBP8MAM8U IQZHxz0izeKaAyra7qrqiHox4GVJpKFVkvHrDlox9GDSUKxP0cRpahLEqjUF1VMm FYE2dh/JjWFhPaGMVIQIiVQNND6NZlycBc1fcEKuT+2tXjqALQ1qDZwb6S44q5/r 1QL+pBIZVMl5YaTpt/yh7COhpMtKbofamzJkzUTVwx6ao/a1uK2G+K83ZB9wkPkw YUBL68oD8EN+fSnZMVlFQkwJGgmoMzaFuqLJMjV0RQWTmzHH43Nyg76muMCIiKwf Xu4ZdNUS7VkHYdjVJXQcXU4igLejj6Q/Qmvw1M+LxsyDH+I4WRgWgYB11T45f0Lf eafwSkAayq7dBzuXJ4kOuK5sR9LOYA7Le9XRvu9f8KOY2aKWoZiVB2KPCz7BaoNs BZH5tf0C7D5mXQz8sXik =W/MF -----END PGP SIGNATURE----- Merge tag 'omap-for-v4.5/81xx-dts-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt Pull "reworked dts changes for ti81xx devices and minimal dra62x j5ec-evm support" from Tony Lindgren: Add minimal device tree support for dra62x also known j5eco. It is related to dm814x, just the clocks are a bit different and it has a different set of integrated devices. And let's get some basic dm814x and dra62x devices working as many of the devices are like on am33xx:: - pinctrl using the pinctrl defines as for am33xx - Updated EDMA bindings with support for using exma_xbar - MMC support for dm814x-evm, t410 and dra62x-j5eco-evm - USB support for dm814x-evm, t410 and dra62x-j5eco-evm This branch depends on an earlier omap-for-v4.5/81xx-fixes-signed branch that has dm814x dts fixes interlaced with SoC related fixes to keep things booting. The interlaced SoC and dts fixes were needed because of issues with the device tree defined clocks that just happened to work on bootloader timings for t410 earlier. * tag 'omap-for-v4.5/81xx-dts-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (21 commits) ARM: dts: Add usb support for j5-eco evm ARM: dts: Add usb support for hp t410 ARM: dts: Add usb support for dm814x-evm ARM: dts: Add usb support for dm814x and dra62x ARM: dts: Enable emmc on hp t410 ARM: dts: Add mmc support for dra62x j5-eco evm ARM: dts: Add mmc support for dm8148-evm ARM: dts: Add mmc device entries for dm814x ARM: dts: Update edma bindings on dm814x to use edma_xbar ARM: dts: Add pinctrl macros for dm814x ARM: dts: Add minimal dra62x j5-eco evm support ARM: dts: Add basic support for dra62x j5-eco SoC ARM: OMAP2+: Remove useless check for legacy booting for dm814x ARM: OMAP2+: Enable GPIO for dm814x ARM: dts: Fix dm814x pinctrl address and mask ARM: dts: Fix dm8148 control modules ranges ARM: OMAP2+: Fix timer entries for dm814x ARM: dts: Fix some mux and divider clocks to get dm814x-evm booting ARM: OMAP2+: Add DPPLS clock manager for dm814x clk: ti: Add few dm814x clock aliases ... |
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Tony Lindgren | b4d6df2a23 |
ARM: dts: Add pinctrl macros for dm814x
Let's add the DM814X_IOPAD macro the same way as we have for dm816x and am33xx as this allows comparing the registers with the documentation easily. The pinctrl bits are yet again different on dm814x. Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com> |
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Javier Martinez Canillas | fc63efdf4b |
pinctrl: Move am4372 and dra7 macros to the the SoC header files
The <dt-bindings/pinctrl/omap.h> header file defines a set of macros for different SoCs families that falls under the OMAP sub-arch, that allow to define the padconf register physical address instead of the register offset from the padconf base. But the am43xx and dra7xx SoCs families have their own pinctrl header file so the DTS using these SoCs aren't able to use the AM4372_IOPAD() and DRA7XX_CORE_IOPAD() macros since <dt-bindings/pinctrl/omap.h> is not included. Move the macros to the correct header files so can be used by the DTS. Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Tony Lindgren <tony@atomide.com> |
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Linus Torvalds | 88a99886c2 |
This is the bulk of pin control changes for the v4.3 development
cycle Core changes: - It is possible configure groups in debugfs. - Consolidation of chained IRQ handler install/remove replacing all call sites where irq_set_handler_data() and irq_set_chained_handler() were done in succession with a combined call to irq_set_chained_handler_and_data(). This series was created by Thomas Gleixner after the problem was observed by Russell King. - Tglx also made another series of patches switching __irq_set_handler_locked() for irq_set_handler_locked() which is way cleaner. - Tglx also wrote a good bunch of patches to make use of irq_desc_get_xxx() accessors and avoid looking up irq_descs from IRQ numbers. The goal is to get rid of the irq number from the handlers in the IRQ flow which is nice. Driver feature enhancements: - Power management support for the SiRF SoC Atlas 7. - Power down support for the Qualcomm driver. - Intel Cherryview and Baytrail: switch drivers to use raw spinlocks in IRQ handlers to play nice with the realtime patch set. - Rework and new modes handling for Qualcomm SPMI-MPP. - Pinconf power source config for SH PFC. New drivers and subdrivers: - A new driver for Conexant Digicolor CX92755. - A new driver for UniPhier PH1-LD4, PH1-Pro4, PH1-sLD8, PH1-Pro5, ProXtream2 and PH1-LD6b SoC pin control support. - Reverse-egineered the S/PDIF settings for the Allwinner sun4i driver. - Support for Qualcomm Technologies QDF2xxx ARM64 SoCs - A new Freescale i.mx6ul subdriver. Cleanup: - Remove platform data support in a number of SH PFC subdrivers. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJV6YzgAAoJEEEQszewGV1zbIAQAILzMrzWkxsy7bhvL4QdP5/K OG3EodE//AE0G5gKugUDjg5t2lftdiIJVhjDA17ruETCSciuAxZSLThlMy1sQgyN LPxy9LlCrmsqrYt9+fmJ9js8j52RBJikKK0RUyUVz0VojTBplRpElyEx/KxwM5sG Hy3+hU61uKO0j9AyIcsa/RKP6SGavwZdHytJBsHNw+pODyE3UZCf52ChAVBsTPfE MV70g3Qzfqur7ZFqcNgtUV7qCyYvlF12ooiihrGFDOsTL3sSq4/OXB7z1z1mGGHL Dgq8pXJ6EIZlCbk+jFMTzPRSzy46dxNai0eErjTUVEldH1tOphzGMvKmOdm/nczH 4M/UOWOKBE1aOYZNPtnUgDy2MRt5K9VJStCNSHEQCB2lGdojNAtmj2cmr8flBN5m gM9FDpIS1/C+OYYTkOY9ftPsH5zOk7sCLEHSH5USYRGJHihzLnkV90eiN6a7vlF1 hyTGrIyl6e//E5JBgamjnR3+fYuxQGr6WeAZEP/gXZRm7BCKCaPwCarq+kPZVG4A nolZ/QQN6XYPSlveSPU97VYvLYEUvXaKN0Hf2DTbwkqvNFp7JORD65QLESPtQoIp x95iHMdB/1+0OfgOqMmlOtKpOKREeQ/R+KWACxsrr5Rfv3/7CP4BMRGypIZ/iPmz HWoyDI4lIebBR+JnjMjK =4QFX -----END PGP SIGNATURE----- Merge tag 'pinctrl-v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "This is the bulk of pin control changes for the v4.3 development cycle. Like with GPIO it's a lot of stuff. If my subsystems are any sign of the overall tempo of the kernel v4.3 will be a gigantic diff. [ It looks like 4.3 is calmer than 4.2 in most other subsystems, but we'll see - Linus ] Core changes: - It is possible configure groups in debugfs. - Consolidation of chained IRQ handler install/remove replacing all call sites where irq_set_handler_data() and irq_set_chained_handler() were done in succession with a combined call to irq_set_chained_handler_and_data(). This series was created by Thomas Gleixner after the problem was observed by Russell King. - Tglx also made another series of patches switching __irq_set_handler_locked() for irq_set_handler_locked() which is way cleaner. - Tglx also wrote a good bunch of patches to make use of irq_desc_get_xxx() accessors and avoid looking up irq_descs from IRQ numbers. The goal is to get rid of the irq number from the handlers in the IRQ flow which is nice. Driver feature enhancements: - Power management support for the SiRF SoC Atlas 7. - Power down support for the Qualcomm driver. - Intel Cherryview and Baytrail: switch drivers to use raw spinlocks in IRQ handlers to play nice with the realtime patch set. - Rework and new modes handling for Qualcomm SPMI-MPP. - Pinconf power source config for SH PFC. New drivers and subdrivers: - A new driver for Conexant Digicolor CX92755. - A new driver for UniPhier PH1-LD4, PH1-Pro4, PH1-sLD8, PH1-Pro5, ProXtream2 and PH1-LD6b SoC pin control support. - Reverse-egineered the S/PDIF settings for the Allwinner sun4i driver. - Support for Qualcomm Technologies QDF2xxx ARM64 SoCs - A new Freescale i.mx6ul subdriver. Cleanup: - Remove platform data support in a number of SH PFC subdrivers" * tag 'pinctrl-v4.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (95 commits) pinctrl: at91: fix null pointer dereference pinctrl: mediatek: Implement wake handler and suspend resume pinctrl: mediatek: Fix multiple registration issue. pinctrl: sh-pfc: r8a7794: add USB pin groups pinctrl: at91: Use generic irq_{request,release}_resources() pinctrl: cherryview: Use raw_spinlock for locking pinctrl: baytrail: Use raw_spinlock for locking pinctrl: imx6ul: Remove .owner field pinctrl: zynq: Fix typos in smc0_nand_grp and smc0_nor_grp pinctrl: sh-pfc: Implement pinconf power-source param for voltage switching clk: rockchip: add pclk_pd_pmu to the list of rk3288 critical clocks pinctrl: sun4i: add spdif to pin description. pinctrl: atlas7: clear ugly branch statements for pull and drivestrength pinctrl: baytrail: Serialize all register access pinctrl: baytrail: Drop FSF mailing address pinctrl: rockchip: only enable gpio clock when it setting pinctrl/mediatek: fix spelling mistake in dev_err error message pinctrl: cherryview: Serialize all register access pinctrl: UniPhier: PH1-Pro5: add I2C ch6 pin-mux setting pinctrl: nomadik: reflect current input value ... |
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Dave Gerlach | 92814c4a2c |
ARM: dts: am43xx: Introduce MUX_MODE9 for pinctrl
Some pins on AM43XX support MODE9 for the pinctrl settings so add a binding to describe this. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> |
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Bjorn Andersson | b4c45fe974 |
pinctrl: qcom: ssbi: Family A gpio & mpp drivers
This introduces pinctrl drivers for gpio and mpp blocks found in family A PMICs. Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Nishanth Menon | 601b29aa48 |
pinctrl: dra: dt-bindings: Add virtual mode configuration option
In addition to the regular mux configuration such as mux mode 1, 2 etc, certain pins of DRA7 require to have "virtual mode" also programmed. This allows for predefined delay characteristics to be used by the SoC to meet timing characterstics needed for the interface. Provide easy to use macro to do the same. It is important to note that the official TI guidelines recommend to do as minimal pin reconfiguration beyond the bootloader given the design of the hardware involved which can result in substantial glitches which may impair functionality of certain peripherals. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> |
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Linus Torvalds | 3d9f96d850 |
ARM: SoC: DT updates for v4.2
As usual, quite a few device-tree updates in ARM land. There was ome minor churn in DTs due to relicensing under a dual-license, and lots of little additions of new peripherals, features etc, but nothing really exciting to call to your attention. Some higlights, focsuing on support for new SoCs and boards: - AT91: new boards: Overkiz, Acme Systems' Arietta G25 - tegra: HDA support - bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS RT-AC87U - mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys boards, DLink DNS-327L - OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill SL50 - ARM: added support for Juno r1 board - sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33, Mele A1000G - imx: i.MX7D SoC support; new boards: Armadeus Systems APF6, Gateworks GW5510, and aristainetos2 boards - hisilicon: hi6220 SoC support; new boards: 96boards hikey Conflicts: None -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJVi4ROAAoJEFk3GJrT+8ZlBcsP/jjXN+pucA3oHE/Jn9j1yF8e aPENC0iXVDr2ru5SikBlgmBYeoZjsXV90HWnEo3RZrF4/zMa8CUOD6UqKZLp7x9d SYEtuFk98VM/7Qtho6qDvZaLTnzWT5CL24E+J899P8V9lWVm3mwklKE9ScmkDd5m kQxtj5rk1HcaDPmtJ0rseqNoaqRSG1UmhAHLkHMYLg5CyQb7L4FZx+l+Zj4FpYFE js9uIVpp2gIuJu3nLRWgkhnoOVQzLAftPnmkbgEYYjqY3/kCtkvRA3g3QoDwn6nc qjI3iFSYudyum9CmCMfvPYFfwXJ7uT3s+GPXJj+vLZomFfQm5g9S0/RGLQh2loi+ zCBeCw63y22qqJfNVLx3yVdyEYslu9RcFeuBzWrQ2R+ZYYq1MBdKeNIUqlnbRAvv gB5jOT5yg5Tzme94Uk2WfTiy5Es2d7KsqlvnKSRuItFI2+LvjfMipV7JLf/5gPE1 1A/A9ALW550kyxVsQtST8wMyTN5ASQ+fyM9MvICgpZa/LBA2hXsO+XCKO0LzOZUg 3ABJVogUpqLwuA6qVAToq4bRNPC7p72odM1tKRHHCNf29r5wtYqu79Eon+3v4Zgf 1wjSJocjJ9yCFxxLMn8PgxcF8Maedp9y/I6dCHEYN5zI6RdwlelUvWcuul6RIEeO +XORenPq9ZRR8tDO+HSU =wWIc -----END PGP SIGNATURE----- Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC DT updates from Kevin Hilman: "As usual, quite a few device-tree updates in ARM land. There was one minor churn in DTs due to relicensing under a dual-license, and lots of little additions of new peripherals, features etc, but nothing really exciting to call to your attention. Some higlights, focsuing on support for new SoCs and boards: - AT91: new boards: Overkiz, Acme Systems' Arietta G25 - tegra: HDA support - bcm: new platforms: Buffalo WXR-1900DHP, SmartRG SR400ac, ASUS RT-AC87U - mvebu: new platforms: Compulab CM-A510, Armada 385-based Linksys boards, DLink DNS-327L - OMAP: new platforms: Baltos IR5221, LogicPD Torpedo, Toby-Churchill SL50 - ARM: added support for Juno r1 board - sunxi: A33 SoC support; new boards: A23 EVB, SinA33, GA10H-A33, Mele A1000G - imx: i.MX7D SoC support; new boards: Armadeus Systems APF6, Gateworks GW5510, and aristainetos2 boards - hisilicon: hi6220 SoC support; new boards: 96boards hikey" * tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (462 commits) ARM: hisi: revert changes from hisi/hip04-dt branch ARM: nomadik: set proper compatible for accelerometer ARM64: juno: add GPIO keys ARM: at91/dt: sama5d4: fix dma conf for aes, sha and tdes nodes ARM: dts: Introduce STM32F429 MCU ARM: socfpga: dts: enable ethernet for Arria10 devkit ARM: dts: k2l: fix the netcp range size ARM: dts: k2e: fix the netcp range size ARM: dts: k2hk: fix the netcp range size ARM: dts: k2l-evm: Add device bindings for netcp driver ARM: dts: k2e-evm: Add device bindings for netcp driver ARM: dts: k2hk-evm: Add device bindings for netcp driver ARM: BCM5301X: Add DT for Asus RT-AC87U ARM: BCM5301X: add IRQ numbers for PCIe controller ARM: BCM5301X: add NAND flash chip description arm64: dts: Add dts files for Hisilicon Hi6220 SoC clk: hi6220: Document devicetree bindings for hi6220 clock arm64: hi6220: Document devicetree bindings for Hisilicon hi6220 SoC ARM: at91/dt: sama5d4ek: mci0 uses slot 0 ARM: at91/dt: kizbox: fix mismatch LED PWM device ... |
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Arnd Bergmann | 542459e7ff |
Device tree related changes for omaps:
- Configure MMC data lines 4..8 for 1.8V IO on boards that are using them as GPIOs instead of MMC data lines - Add support for Baltos IR5221 - Add device tree support for LogicPD Torpedo devkit - Add 3717 core pinctrl region - Add gta04 1w and GSM audio support - Add wilink and ov2659 support for am437x-gp-evm - Add am335x-evm bluetooth and mmc3 support - Enable omap5-uevm uart wakeup interrupt - Enable I2C2 on BeagleBone as it's used for the capes - Use defines for LDP GPIO keys -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJVX46XAAoJEBvUPslcq6Vzd+cQALB8fPAEVrTedwf+7M02SWEl 0z+lrG+VFusfHjqVj7Me26CjQLJet0Ntq+MGSyiInOpO8XhQI6z77EZHD6AOxfGV KDcDHoU4vs6UudyzkECkQ+v47cVCoNIV7lj3VnXvxbykSRSDUpg/xvw5Fj6TQpxW EYY7yOGx096kmtQi1dED1g8cawtsJeb0uRPNm38FzRRPWj5/0+Av5NTAvh7jkd/X hPSOeWST0cvtrXn3xpX9ZM2g+2O5ZMDOyxn6GDZup4WwgQD3pU/HnySckcKnUjPg /UWK7Qw/u/eup2cU2TYJLS5SKIm4EPcWb/qht721Yd2kTT0Yn1/RubWvLxbYHcKr ZFwQ5T5zU0PpoScij4MJuagiEq4sedxkfKbTfckjJgHFubDMiEHV4C7EGkYGDP0i MLS9YdAGWeb/zQ3gedYbup/9gvD5qjMh8q9EHoWovG8ZInqBmzg7xA0QYkY3Tks1 hClQpv+0KGm8PI9Gz/AYf4wxEFgAUzI7Cqh9m+6LW1z/VmOecCcHg3XKO7JVimtk baqLo6/dJCtLqlpI4UHNujmfPdCzH1VjITTpfz2FxFdO9MseL2POJ++POwJvgghH tU1heRVNlSOeYDgWnRChLPyx0Cx/3n5qpfPvumF9W0kpNoOA5dAXkAY979Cm/l46 nSIBsJDsCQJOqBZpqnMF =MmxV -----END PGP SIGNATURE----- Merge tag 'omap-for-v4.2/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt Merge "Device tree related changes for omaps" from Tony Lindgren: - Configure MMC data lines 4..8 for 1.8V IO on boards that are using them as GPIOs instead of MMC data lines - Add support for Baltos IR5221 - Add device tree support for LogicPD Torpedo devkit - Add 3717 core pinctrl region - Add gta04 1w and GSM audio support - Add wilink and ov2659 support for am437x-gp-evm - Add am335x-evm bluetooth and mmc3 support - Enable omap5-uevm uart wakeup interrupt - Enable I2C2 on BeagleBone as it's used for the capes - Use defines for LDP GPIO keys * tag 'omap-for-v4.2/dt-pt1' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: dts: am335x-evm: add mmc3 and wlan definitions to dts ARM: dts: Enable SDIO card interrupt for 37xx-evm ARM: dts: Fix ldp gpio keys to use defines ARM: dts: Beaglebone i2c definitions ARM: dts: am437x-gp-evm: add DT nodes for ov2659 sensor ARM: dts: add DTS for Baltos IR5221 ARM: dts: omap5-uevm: Add Uart wakeup interrupt ARM: dts: omap3-gta04: Add GSM audio support ARM: dts: am335x-evm: add bluetooth support ARM: dts: am437x-gp-evm: add wilink8 support ARM: dts: omap3-gta04: Add hdqw1 support ARM: dts: add core2 padconf region for am3517 ARM: dts: Add minimal support for LogicPD Torpedo DM3730 devkit ARM: OMAP3: Add support for configuring MMC pins as GPIO pins |
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Eyal Reizer | b6bbf59899 |
ARM: dts: am437x-gp-evm: add wilink8 support
enable mmc3 used for wlan and uart3 used for bluetooth configure the gpios used for wlan and bluetooth controls add fixed voltage regulator used for wlan power control Signed-off-by: Eyal Reizer <eyalr@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> |
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Hongzhou Yang | 0dcdbd2b66 |
pinctrl: mt6397: Add pinfunc header file for mt6397.
Add pinfunc header file, mt8135/mt8173 relate dts will include it. Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Stefan Wahren | 62c69d7635 |
ARM: bcm2835: dt: Add header file for pinctrl constants
This new header file defines pincontrol constants to use from bcm2835 DTS files for pincontrol properties option. Reviewed-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Lee Jones <lee.jones@linaro.org> |
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Linus Torvalds | 07e492eb89 |
This is the bulk of pin control changes for the v4.1 development
cycle: New drivers: - Intel Sunrisepoint - AMD KERNCZ GPIO - Broadcom Cygnus IOMUX New subdrivers: - Marvell MVEBU Armada 39x SoCs - Samsung Exynos 5433 - nVidia Tegra 210 - Mediatek MT8135 - Mediatek MT8173 - AMLogic Meson8b - Qualcomm PM8916 On top of this cleanups and development history for the above drivers as issues were fixed after merging. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJVLSiSAAoJEEEQszewGV1z/nMP/jXyxCb8THuAyCFkJoY+Hgzz dj3eMt+TPPyqt6lG3WODq/lQFxEdE28TqHYf2eGVdpriCpuyecFxyf9MPzY3P60E v6XfzIeUOIGovw781qsg9TxJAZ0C+DLmNgpS8kWhnK7Igs3EJrRcz5Zz00F32olv 1dojVIQF6Nsn3M2Cc6bzF2wkJre3tLsUT7KXGZw4e3yA0K1XMZI3jYYXZ25GgLW0 CpZ1vKdKgwuBsgV5waJ8XZuFMqo3FRhjcD/f8ubk5hhMK6Wx6gszBcrLKVlkbz+2 XJzhn5tZSupSKmBtl0gCzP7pgVc0JeV8P12hHv6imT82rCU0YGBidNX2s3GrscnF Nfwpw/BsaOXcu9CttI5LndvDlvCH2hUAal6i4IghiL5sRzlcW4jUoWHkIa8e6dHe e/zjJSo7tXrWio30Dl6++qklcDimP3sbaaFseENhLUSl7hDGJ09Tx8yxEOFN3PX6 29i7ZC+ifZFzS30E3E+MOlFrxp3MB7j/z/ig3HL7XYr/TTiCKMNbKJNOlmGEfiTV VI3GvTAJgt/1U+AOJI7a5xrxivaGL5GWXuoonQHY1gPrvjqkL54w4j+XBpj4tXIV LBh6AS6G6AJDUOEU00EroCxOt1FPMW24zQvTKP18sgXsKWqHTIKT9B5RZbDXM9D7 pLfOIy0H1RWdQGvGgK7X =MGqe -----END PGP SIGNATURE----- Merge tag 'pinctrl-v4.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pincontrol updates from Linus Walleij: "This is the bulk of pin control changes for the v4.1 development cycle. Nothing really exciting this time: we basically added a few new drivers and subdrivers and stabilized them in linux-next. Some cleanups too. With sunrisepoint Intel has a real fine fully featured pin control driver for contemporary hardware, and the AMD driver is also for large deployments. Most of the others are ARM devices. New drivers: - Intel Sunrisepoint - AMD KERNCZ GPIO - Broadcom Cygnus IOMUX New subdrivers: - Marvell MVEBU Armada 39x SoCs - Samsung Exynos 5433 - nVidia Tegra 210 - Mediatek MT8135 - Mediatek MT8173 - AMLogic Meson8b - Qualcomm PM8916 On top of this cleanups and development history for the above drivers as issues were fixed after merging" * tag 'pinctrl-v4.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (71 commits) pinctrl: sirf: move sgpio lock into state container pinctrl: Add support for PM8916 GPIO's and MPP's pinctrl: bcm2835: Fix support for threaded level triggered IRQs sh-pfc: r8a7790: add EtherAVB pin groups pinctrl: Document "function" + "pins" pinmux binding pinctrl: intel: Add Intel Sunrisepoint pin controller and GPIO support pinctrl: fsl: imx: Check for 0 config register pinctrl: Add support for Meson8b documentation: Extend pinctrl docs for Meson8b pinctrl: Cleanup Meson8 driver Fix inconsistent spinlock of AMD GPIO driver which can be recognized by static analysis tool smatch. Declare constant Variables with Sparse's suggestion. pinctrl: at91: convert __raw to endian agnostic IO pinctrl: constify of_device_id array pinctrl: pinconf-generic: add dt node names to error messages pinctrl: pinconf-generic: scan also referenced phandle node pinctrl: mvebu: add suspend/resume support to Armada XP pinctrl driver pinctrl: st: Display pin's function when printing pinctrl debug information pinctrl: st: Show correct pin direction also in GPIO mode pinctrl: st: Supply a GPIO get_direction() call-back pinctrl: st: Move st_get_pio_control() further up the source file ... |
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Ivan T. Ivanov | 7414b0993c |
pinctrl: Add support for PM8916 GPIO's and MPP's
Add compatible string definitions and supported pin functions. Signed-off-by: Ivan T. Ivanov <ivan.ivanov@linaro.org> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
|
Hongzhou Yang | a6df410d42 |
pinctrl: mediatek: Add Pinctrl/GPIO driver for mt8135.
The mediatek SoCs have GPIO controller that handle both the muxing and GPIOs. The GPIO controller have pinmux, pull enable, pull select, direction and output high/low control. This driver include common driver and mt8135 part. The common driver include the pinctrl driver and GPIO driver. The mt8135 part contain its special device data. Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
|
Dave Gerlach | 10b2185514 |
ARM: dts: am43xx: fix SLEWCTRL_FAST pinctrl binding
According to AM437x TRM, Document SPRUHL7B, Revised December 2014, Section 7.2.1 Pad Control Registers, setting bit 19 of the pad control registers actually sets the SLEWCTRL value to slow rather than fast as the current macro indicates. Introduce a new macro, SLEWCTRL_SLOW, that sets the bit, and modify SLEWCTRL_FAST to 0 but keep it for completeness. Current users of the macro (i2c, mdio, and uart) are left unmodified as SLEWCTRL_FAST was the macro used and actual desired state. Tested on am437x-gp-evm with no difference in software performance seen. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> |
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Dave Gerlach | 424e0f039b |
ARM: dts: am33xx: fix SLEWCTRL_FAST pinctrl binding
According to AM335x TRM, Document spruh73l, Revised February 2015, Section 9.2.2 Pad Control Registers, setting bit 6 of the pad control registers actually sets the SLEWCTRL value to slow rather than fast as the current macro indicates. Introduce a new macro, SLEWCTRL_SLOW, that sets the bit, and modify SLEWCTRL_FAST to 0 but keep it for completeness. Current users of the macro (i2c and mdio) are left unmodified as SLEWCTRL_FAST was the macro used and actual desired state. Tested on am335x-gp-evm with no difference in software performance seen. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> |
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Olof Johansson | 8749f9f3cf |
Allwinner device tree changes for 3.20
A lot of changes to the device tree for the 3.20 merge window, mostly with: - More DT license convertions, only two DTS and two DTSI are still uncertain and have not been converted yet - Use the C-preprocessor includes in the device trees. - Add support for the A31s SoC and improve the A80 support - Add IR receiver, lradc, PS/2 support - Add cpufreq support for all SoCs but the A23 and A80. - And a lot of new boards -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUxSjgAAoJEBx+YmzsjxAgfNcQAJdm22JbZ8T8elBXA5bU/V7e 35eM9r+osTM25w/kZaQKQ3RMhQNuBmM6BBTXX5BRYBRKBx+YL791repfa6LEH15W ZVQ4+Iqsa3FrDiVnMGqOb+idjMuWKtluu6SBkZFeeCB7qN56zMFuEKgQaT/ICrmD E5fG/Z91nGCVaHnvDEUCeWb+snDxlMD8E54QpUwLqnkQHvylujnY8DMSopZJuqzK OABiBkHr9TZYFfsr9JIuKSMI3lFHtEf6RbcvLcyTbqXSvm6t/qR02ip1SIunVD/K 2MUyVuewh3VGZZgZTVPITHTWDfMIYU3BZc8lWSPDTXo55vMB5Q7UfdeyAWUEaWkI cIVyHeOJ2442XDhqvkWHEFNZlfQl8i3nU+xmINVjp0KqcemoD2cjn9ZmKCnaoLkV kB7VxF1e2GKOm7qnAB1qo5xRmyi2wLZsRecXdeSHYiiO2DZtSCa4E1vMqo5U01mX 0+8sKFEY+w+G/2dgoEXTsp08Yqsgd0fjCD6F8sxZdlskRsgBuBYS4s54xyrGr72b Lo6WxUrc1GKEh7N3RvVqidXdYL6nUr/Pfg4n0LMwQPwWPUzXlpBeFQiHkVDl9/Mh Bqb/GqYB5brw8KELb5blKuwzNQy6yP3K4glf2Rz3JfuPLr2y54/BaXGg66fS0ijP Y1NkkG2AVh9lamtyHYBI =pWBS -----END PGP SIGNATURE----- Merge tag 'sunxi-dt-for-3.20' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt Merge "Allwinner device tree changes for 3.20" from Maxime Ripard: A lot of changes to the device tree for the 3.20 merge window, mostly with: - More DT license convertions, only two DTS and two DTSI are still uncertain and have not been converted yet - Use the C-preprocessor includes in the device trees. - Add support for the A31s SoC and improve the A80 support - Add IR receiver, lradc, PS/2 support - Add cpufreq support for all SoCs but the A23 and A80. - And a lot of new boards * tag 'sunxi-dt-for-3.20' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (64 commits) ARM: dts: sun5i: Enable axp209 support on A13-OLinuxIno ARM: sunxi: dts: Add A10/A20 PS2 pin muxing options ARM: sunxi: dts: Add PS2 nodes to dtsi for A10,A20 ARM: dts: sun6i: Add resistive touchscreen controller node to dtsi ARM: dts: sun4i: Add Hyundau A7HD board ARM: dts: sun4i: Add Marsboard A10 board ARM: dts: sun9i: Enable mmc2 on A80 Optimus Board ARM: dts: sun9i: Add 8 bit mmc pinmux setting for mmc2 ARM: dts: sun9i: Enable mmc0 on A80 Optimus Board ARM: dts: sun9i: Convert a80 optimus board dts to label referencing ARM: dts: sun9i: Add mmc controller nodes to the A80 dtsi ARM: dts: sun9i: Add mmc config clock nodes ARM: dts: sunxi: Add missing mdio label ARM: dts: sun5i: Add mk802_a10s board ARM: dts: sun4i: Add mk802ii board ARM: dts: sun4i: Add mk802 board ARM: dts: sun4i: Add dts file for Chuwi V7 CW0825 tablet ARM: dts: sun7i: Add dts file for Bananapro board ARM: sun6i: Enable ARM arch timers ARM: dts: sun6i: Convert hummingbird a31 dts to label references ... Signed-off-by: Olof Johansson <olof@lixom.net> |
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Maxime Ripard | 092a0c3b18 |
ARM: sunxi: DT: Convert the DTs to use a header for the pinctrl nodes
The pinctrl nodes require some extra opaque arguments for the pull up and drive strength values. Introduce a new header file and convert the device trees to replace these opaque numbers by defines. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> |
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Tony Lindgren | ac7452cee7 |
ARM: dts: Add minimal support for dm8168-evm
This allows booting the device with basic functionality. Note that at least on my revision c board the DDR3 does not seem to work properly and only some of the memory can be reliably used. Also, the mainline u-boot does not seem to properly initialize the ethernet, so I've been using the old TI u-boot at: http://arago-project.org/git/projects/?p=u-boot-omap3.git;a=summary Cc: Brian Hutchinson <b.hutchman@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> |
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Linus Torvalds | c1b30e4d94 |
Pin control changes for the v3.19 series:
- Force conversion of the ux500 pin control device trees and parsers to use the generic pin control bindings. - New driver and device tree bindings for the Qualcomm PMIC MPP pin controller and GPIO. - Some ACPI infrastructure for pin controllers. - New driver for the Intel CherryView/Braswell pin controller, the first Intel pin controller to fully take advantage of the pin control subsystem. - Support the Freescale i.MX VF610 variant. - Support the sunxi A80 variant. - Support the Samsung Exynos 4415 and Exynos 7 variants. - Split out Intel pin controllers to their own subdirectory. - A large slew of rockchip pin control updates, including suspend/resume support. - A large slew of Samsung Exynos pin controller updates. - Various minor updates and fixes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJUhrHUAAoJEEEQszewGV1zPZsQAMzWjGKcZhyBDWyTsHM/E9nN csRIcVdXs+OggH0nr2YNm2AAh+nRlp4DAQCB7S83SLfKFHF4oWT8SlornEl7WKdN zcVUbV29LtHkotjtVoGQZmjuJx+uvHlWJt7moTKJsAMTeNyXv25jEp0LGETji24A xsIQ+Bp+G9IYZqK1dlJFPva1YMjjt9sBhJqKnOhh5Z+wjj3YdT7z5LW1x001GPju kwKumgxOL7qKjvyaI7n2z+9VhGu9zAvoxK2gLOgjgtFQODASLS/gk2oCuRi/fIpn RqE+YyfrNSeMKpOjZOXc/R0SRtOkhyvMBYbgQrAX04nio4pbT6x2XgclAe6v7O5Q T3GmOR2JZblwrzEPRs5mGBC9p7fd488ToHAPg5ojNH5F70hDkC8wSYYJZmaL+ORw umyxRlRjIbQ4vs6cZMlz/NksqpQyqCTMuBRLllo/jsSQlk0Vo3Gdci5J/T10lKd2 ciX6AxlRKaRyRo+W6/i01xcX7SzzmNZoOCMXWSjsPv7Th+Gm7vIKyVeNOUkiqUXH 1fVjw/M0AhIttVRbx1qTPsqFaDI/WPPk9EUvVm3W7DFuf0/w9B0HkZe6KpXdp33K GV6gEMvmTObvUpwYrYEi7hhKVl+cJ902ZMR/LSmK0QdADhI98pjsokDrigl+Jy93 U1OepT70fw4mgJnqnevZ =sxpe -----END PGP SIGNATURE----- Merge tag 'pinctrl-v3.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control changes from Linus Walleij: "Here is a stash of pin control changes I have collected for the v3.19 series. Mainly new hardware support, with Intels new embedded SoC as the especially interesting thing standing out, fully using the subsystem. - Force conversion of the ux500 pin control device trees and parsers to use the generic pin control bindings. - New driver and device tree bindings for the Qualcomm PMIC MPP pin controller and GPIO. - Some ACPI infrastructure for pin controllers. - New driver for the Intel CherryView/Braswell pin controller, the first Intel pin controller to fully take advantage of the pin control subsystem. - Support the Freescale i.MX VF610 variant. - Support the sunxi A80 variant. - Support the Samsung Exynos 4415 and Exynos 7 variants. - Split out Intel pin controllers to their own subdirectory. - A large slew of rockchip pin control updates, including suspend/resume support. - A large slew of Samsung Exynos pin controller updates. - Various minor updates and fixes" * tag 'pinctrl-v3.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (49 commits) pinctrl: at91: enhance (debugfs) at91_gpio_dbg_show pinctrl: meson: add device tree bindings documentation gpio: tz1090: Fix error handling of irq_of_parse_and_map pinctrl: tz1090-pinctrl.txt: Fix typo in binding pinctrl: pinconf-generic: Declare dt_params/conf_items const pinctrl: exynos: Add support for Exynos4415 pinctrl: exynos: Add initial driver data for Exynos7 pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts pinctrl: exynos: Consolidate irq domain callbacks pinctrl: exynos: Generalize the eint16_31 demux code pinctrl: samsung: Separate per-bank init and runtime data pinctrl: samsung: Constify samsung_pin_ctrl struct pinctrl: samsung: Constify samsung_pin_bank_type struct pinctrl: samsung: Drop unused label field in samsung_pin_ctrl struct pinctrl: samsung: Make samsung_pinctrl_get_soc_data use ERR_PTR() pinctrl: Add Intel Cherryview/Braswell pin controller support gpio / ACPI: Add knowledge about pin controllers to acpi_get_gpiod() pinctrl: Fix path error in documentation pinctrl: rockchip: save and restore gpio6_c6 pinmux in suspend/resume pinctrl: rockchip: add suspend/resume functions ... |
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Roger Quadros | 73b3a6657a |
pinctrl: dra: dt-bindings: Fix output pull up/down
For PIN_OUTPUT_PULLUP and PIN_OUTPUT_PULLDOWN we must not set the
PULL_DIS bit which disables the PULLs.
PULL_ENA is a 0 and using it in an OR operation is a NOP, so don't
use it in the PIN_OUTPUT_PULLUP/DOWN macros.
Fixes:
|
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Ivan T. Ivanov | 89a7117d56 |
pinctrl: Device tree bindings for Qualcomm PMIC MPP block
DeviceTree binding documentation for Qualcomm SPMI PMIC MPP pinctrl drivers. Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Acked-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Bjorn Andersson | 43059f6ba2 |
pinctrl: Device tree bindings for Qualcomm PMIC GPIO block
This introduced the device tree bindings for the GPIO block found in PMIC's from Qualcomm. Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com> Signed-off-by: Ivan T. Ivanov <iivanov@mm-sol.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Marek Roszko | 4334ac2db2 |
pinctrl: at91: add drive strength configuration
The SAMA5 and SAM9x5 series both have drive strength options for the PIOs. This patch adds the ability to set one of three hardware options for drive strengths of low, medium or high for the each pin. The actual current output of the chip based on the setting is defined in the datasheets and varies per pins separate from banks and with supply voltage. This patch adds three new dt-bindings that allow setting the strength when configuring pins. By default, no change will be made to the drive strength of a pin from its reset value. Due to the difference between the register addresses of the SAMA5 and SAM9x5 series, a new sama5d3-pinctrl id was added. Signed-off-by: Marek Roszko <mark.roszko@gmail.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Doug Anderson | f3ababa8ba |
pinctrl: Add mux options 3 and 4 for rockchip pinctrl
Newer Rockchip SoCs have more muxing slots. Add slots 3 and 4 since the rk3288 table goes all the way up to 4. Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Linus Torvalds | d4e1f5a14e |
ARM: SoC device-tree changes for 3.17
Unlike the board branch, this keeps having large sets of changes for every release, but that's quite expected and is so far working well. Most of this is plumbing for various device bindings and new platforms, but there's also a bit of cleanup and code removal for things that are moved from platform code to DT contents (some OMAP clock code in particular). There's also a pinctrl driver for tegra here (appropriately acked), that's introduced this way to make it more bisectable. I'm happy to say that there were no conflicts at all with this branch this release, which means that changes are flowing through our tree as expected instead of merged through driver maintainers (or at least not done with conflicts). There are several new boards added, and a couple of SoCs. In no particular order: * Rockchip RK3288 SoC support, including DTS for a dev board that they have seeded with some community developers. * Better support for Hardkernel Exynos4-based ODROID boards. * CCF conversions (and dtsi contents) for several Renesas platforms. * Gumstix Pepper (TI AM335x) board support * TI eval board support for AM437x * Allwinner A23 SoC, very similar to existing ones which mostly has resulted in DT changes for support. Also includes support for an Ippo tablet with the chipset. * Allwinner A31 Hummingbird board support, not to be confused with the SolidRun i.MX-based Hummingboard. * Tegra30 Apalis board support -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJT5DqvAAoJEIwa5zzehBx3tm0QAJk8zFyZuMhUPz6SoZTtO9ti zojZ2218oqLRDfLSYdJx/3QE7gb2ef0e2S6FrthecdAY8sqZzDddL7M/cCf1WSgy +D4dD1UEq+W/hOeEwIWyo3GR/71exgo/LMTIw8HOJh5c9fanQ2wNChNetCgh8b4u sVOEMmP1UTO2W7mH9cCRhWXFifBNi0yNl1QBYnLPzM2CbSEa4qQRarTn/94NSEiY U9XgzysklvYEW/30wcEkz8ZonKbJrtP+zEjODU4wN/muhHECeTehDrkJq0WEK/3C 3ptko2xQGURNaLM6HVvQS9qkXxyhCeZxqkELpjkjjM+YPFN8wdHu7gDctGZlDr39 LQ2pZF6K8vaFvxp3UM2wzdDeoNi3rxguzpFoBmfRP5NWguDrOvjT3w8W4hO9q04J 8SqMGca0av9myHmeSjtRRg5rmcC3kBbOgSN6siVJ8W80rHT7tnFjl6eCawDreQzn szFzGaOOUnf/kJ/00vzm1dCuluowFPdSYgW3aamZhfkqu2qYJ8Ztuooz5eZGKtex zlUfKtpL26gnamoUT42K7E8J968AjHjUc/zimwYzIgHCzTTApYGJQcbD/Y28b8QH gTvhRxP+0kFb+NNq4IHStVMvJrFOPvzOHXcL8x07HqTxrl7W4XoW+KJxCJOk433W 5NJ9s4tEmiTRMtFL1kv6 =xxlY -----END PGP SIGNATURE----- Merge tag 'dt-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC device-tree changes from Olof Johansson: "Unlike the board branch, this keeps having large sets of changes for every release, but that's quite expected and is so far working well. Most of this is plumbing for various device bindings and new platforms, but there's also a bit of cleanup and code removal for things that are moved from platform code to DT contents (some OMAP clock code in particular). There's also a pinctrl driver for tegra here (appropriately acked), that's introduced this way to make it more bisectable. I'm happy to say that there were no conflicts at all with this branch this release, which means that changes are flowing through our tree as expected instead of merged through driver maintainers (or at least not done with conflicts). There are several new boards added, and a couple of SoCs. In no particular order: - Rockchip RK3288 SoC support, including DTS for a dev board that they have seeded with some community developers. - Better support for Hardkernel Exynos4-based ODROID boards. - CCF conversions (and dtsi contents) for several Renesas platforms. - Gumstix Pepper (TI AM335x) board support - TI eval board support for AM437x - Allwinner A23 SoC, very similar to existing ones which mostly has resulted in DT changes for support. Also includes support for an Ippo tablet with the chipset. - Allwinner A31 Hummingbird board support, not to be confused with the SolidRun i.MX-based Hummingboard. - Tegra30 Apalis board support" * tag 'dt-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (334 commits) ARM: dts: Enable USB host0 (EHCI) on rk3288-evb ARM: dts: add rk3288 ehci usb devices ARM: dts: Turn on USB host vbus on rk3288-evb ARM: tegra: apalis t30: fix device tree compatible node ARM: tegra: paz00: Fix some indentation inconsistencies ARM: zynq: DT: Clarify Xilinx Zynq platform ARM: dts: rockchip: add watchdog node ARM: dts: rockchip: remove pinctrl setting from radxarock uart2 ARM: dts: Add missing pinctrl for uart0/1 for exynos3250 ARM: dts: Remove duplicate 'interrput-parent' property for exynos3250 ARM: dts: Add TMU dt node to monitor the temperature for exynos3250 ARM: dts: Specify MAX77686 pmic interrupt for exynos5250-smdk5250 ARM: dts: cypress,cyapa trackpad is exynos5250-Snow only ARM: dts: max77686 is exynos5250-snow only ARM: zynq: DT: Remove DMA from board DTs ARM: zynq: DT: Add CAN node ARM: EXYNOS: Add exynos5260 PMU compatible string to DT match table ARM: dts: Add PMU DT node for exynos5260 SoC ARM: EXYNOS: Add support for Exynos5410 PMU ARM: dts: Add PMU to exynos5410 ... |
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Nishanth Menon | 23d9cec07c |
pinctrl: dra: dt-bindings: Fix pull enable/disable
The DRA74/72 control module pins have a weak pull up and pull down.
This is configured by bit offset 17. if BIT(17) is 1, a pull up is
selected, else a pull down is selected.
However, this pull resisstor is applied based on BIT(16) -
PULLUDENABLE - if BIT(18) is *0*, then pull as defined in BIT(17) is
applied, else no weak pulls are applied. We defined this in reverse.
Reference: Table 18-5 (Description of the pad configuration register
bits) in Technical Reference Manual Revision (DRA74x revision Q:
SPRUHI2Q Revised June 2014 and DRA72x revision F: SPRUHP2F - Revised
June 2014)
Fixes:
|
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Thierry Reding | be306dac53 |
of: Add NVIDIA Tegra XUSB pad controller binding
This patch adds the device tree binding documentation for the XUSB pad controller found on NVIDIA Tegra SoCs. It exposes both pinmuxing and PHY capabilities. Tested-by: Mikko Perttunen <mperttunen@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Thierry Reding <treding@nvidia.com> |
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Linus Torvalds | 755a9ba7bf |
ARM: SoC devicetree updates for 3.16
As with previous release, this continues to be among the largest branches we merge, with lots of new contents. New things for this release are among other things: - DTSI contents for the new SoCs supported in 3.16 (see SoC pull request) - Qualcomm APQ8064 and APQ8084 SoCs and eval boards - Nvidia Jetson TK1 development board (Tegra T124-based) Two new SoCs that didn't need enough new platform code to stand out enough for me to notice when writing the SoC tag, but that adds new DT contents are: - TI DRA72 - Marvell Berlin 2Q -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJTjNNQAAoJEIwa5zzehBx3KyYP/3TEJcXXEYDURXDB0SktPNyy cKp5HUnsu4+aq/Ae6jdjVGiX5FZa64Xije9b0kP3oxoPS+fuODvzhlnoEsT84Ab5 /jeygWJZYUIWAQTxShPT55K8WAEtL7H1WcvswdCZoTDxPBNCLR/nLzv084nv9Die IOUWDTKW4qB8+KYQxh2TBx0E1TorZ0J5OWf6qqepZ0i4J5dhL1VYtc/ZNU5C37V5 rZyyBQNOCBE/MK/Dw9CnResQf4f8DigHBYgpl7VxB+bBqfgzFuSSEPvg21MXLkfi ln64yYTVvqhleVjGriDV+mUHOCZr4sUWZPDzeF5HzpvqDAMDWTsWlHNh6WDU6dgo b+zFPqqnWaBiWrinY+o7MVvjVzu3Nf8id/GyjnDJEFbSc9ka/8uiC3v9UJXAFawF 3Huc3K6BC/3qOoCPfnBotzx7Xxxvjk2lPRfnonhSvBoSzPeFc6vz2k4USX1GbdkB y/v+Q+n52VebxiKknTMv9HOI06yTOJo2ji+2iKIULb+W86HzNRZL8ZlmNib4WysF z/OgHZl+YzbhJQJtvfBecCIH2Hu+A4GD2ES8hhklA0QhFHPiDfB9cqcsthSGS5oL dDaGv6XGpHoySlEm1ybgWhvH96dc7lTR+nPGZqCKtRBn5pJiEHczxQ2Jz3aBHYeW PUPlrVfYXzIKsh+OU1HO =OvOG -----END PGP SIGNATURE----- Merge tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc into next Pull ARM SoC devicetree updates from Olof Johansson: "As with previous release, this continues to be among the largest branches we merge, with lots of new contents. New things for this release are among other things: - DTSI contents for the new SoCs supported in 3.16 (see SoC pull request) - Qualcomm APQ8064 and APQ8084 SoCs and eval boards - Nvidia Jetson TK1 development board (Tegra T124-based) Two new SoCs that didn't need enough new platform code to stand out enough for me to notice when writing the SoC tag, but that adds new DT contents are: - TI DRA72 - Marvell Berlin 2Q" * tag 'dt-for-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (500 commits) ARM: dts: add secure firmware support for exynos5420-arndale-octa ARM: dts: add pmu sysreg node to exynos3250 ARM: dts: correct the usb phy node in exynos5800-peach-pi ARM: dts: correct the usb phy node in exynos5420-peach-pit ARM: dts: add dts files for exynos5410 and exynos5410-smdk5410 ARM: dts: add dts files for exynos3250 SoC ARM: dts: add mfc node for exynos5800 ARM: dts: add Vbus regulator for USB 3.0 on exynos5800-peach-pi ARM: dts: enable fimd for exynos5800-peach-pi ARM: dts: enable display controller for exynos5800-peach-pi ARM: dts: enable hdmi for exynos5800-peach-pi ARM: dts: add dts file for exynos5800-peach-pi board ARM: dts: add dts file for exynos5800 SoC ARM: dts: add dts file for exynos5260-xyref5260 board ARM: dts: add dts files for exynos5260 SoC ARM: dts: update watchdog node name in exynos5440 ARM: dts: use key code macros on Origen and Arndale boards ARM: dts: enable RTC and WDT nodes on Origen boards ARM: dts: qcom: Add APQ8084-MTP board support ARM: dts: qcom: Add APQ8084 SoC support ... |
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Joachim Eastwood | 4b466297f0 |
ARM: dts: Change IOPAD macro's for OMAP4/5
The OMAP4/5 TRMs primarily list address offsets from the padconf physical address (which is not driver base address) and not always the absolute physical address for padconf registers like some other OMAP TRMs. So create a new macro to use this offset and to avoid confusion between different OMAP parts. For more information, see the tables in TRM for named something like "Device Core Control Module Pad Configuration Register Fields" and "Device Wake-Up Control Module Pad Configuration Register Fields" Note that we now also have to update cm-t54 for the fixed up offsets. Signed-off-by: Joachim Eastwood <manabian@gmail.com> [tony@atomide.com: updated comments, updated cm-t54] Signed-off-by: Tony Lindgren <tony@atomide.com> |
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Tony Lindgren | 31f0820a67 |
ARM: dts: Fix omap serial wake-up when booted with device tree
We've had deeper idle states working on omaps for few years now, but only in the legacy mode. When booted with device tree, the wake-up events did not have a chance to work until commit |
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Darren Etheridge | dfc9d3f1c5 |
pinctrl: am43xx: dt-bindings: add MUX_MODE8
AM43xx devices have an extra MUX_MODE for certain pins. Updating dt include to have MUX_MODE8 which maps to 0x8. Signed-off-by: Darren Etheridge <detheridge@ti.com> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com> |
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Linus Torvalds | 903a9f77d1 |
ARM: SoC board updates for 3.14
This branch is reducing in size for every release since most board-related changes have started happening in devicetrees now. Still, we have some things going on here. * Renesas platforms are still adding a bit more legacy device support, something that should trail off shortly as they move to full DT. * We group most defconfig updates into this branch out of old habits * Removal of legacy OMAP2 platforms over to DT continues, and a handful of old code is being removed here. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJS4VhpAAoJEIwa5zzehBx3dgMP/2qc+pY4Sx13x5gWMyj29kQd LF6JeGLbj3+F+brPh8nXg6feOcsqVN9lpQ7v4+u1tLv6XfYe5kzBTDwF9MFbZi4I lV9o4cehcZWjCEx+JIbg1MvuNUCU2k1H7HmDIiOQIuoL9j58f2ZywlH/HmLuo2iZ j5Aly006x0s1lUIDhw2w9PJZzzSRBfPr8hW8q+JdLZinlA5Nd4jSxDX0QoSZE+2t 2GJMb//Ej1KbLO7fcM6BImNtB0kz4xRkPvINJwh1xGHYKY0BzMCYS3K2zBgoeyut /olOK2xpnSjzcp1ToVQSAa7Mr1zbiyxQTKkqRHMnKyD/BTMzgoSVHxCA7yGYsCjz mc6AW4v1ucfvXrz0qPXd9fHCIYMyvn6PPv3DmRFU/tR3zJaakI2RvYZFaeyK3RIn 0NGwMQBe3gGIHFAK5Q9hrPyZtbtGicKHjd6eNrNIVeSyTi1njbviTFRHA5yMqWBL eHRM5KxCnp7+6ES61J0YCSF121/V3GT1rJyJnABl3B2UYj/qKXUBAJ2aPqCspWOG pcbI7fdeyV67YJvgrV5s8eO7HtPJs9KtOw7Fng4P4Kgjy2XLNfVhQRkaAwe4P914 HCtZfKCVe4xOWLFHDWApaRpfeOFXZgd0hLOG5jiAEhBRZbRALS044Ta9mAFKqQxx v0mqo85bCHixiFWz1UVc =wLdE -----END PGP SIGNATURE----- Merge tag 'boards-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC board updates from Olof Johansson: "This branch is reducing in size for every release since most board-related changes have started happening in devicetrees now. Still, we have some things going on here. * Renesas platforms are still adding a bit more legacy device support, something that should trail off shortly as they move to full DT * We group most defconfig updates into this branch out of old habits * Removal of legacy OMAP2 platforms over to DT continues, and a handful of old code is being removed here" * tag 'boards-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (94 commits) ARM: dts: OMAP2: fix interrupt number for rng ARM: dts: Split omap3 pinmux core device ARM: dts: Add omap specific pinctrl defines to use padconf addresses ARM: bcm2835: bcm2835_defconfig updates ARM: msm_defconfig: Enable restart driver defconfig: msm_defconfig: Enable CONFIG_ARCH_MSM8974 ARM: msm: Add support for APQ8074 Dragonboard ARM: exynos_defconfig: Enable S2MPS11 voltage regulator ARM: tegra: Enable DRM panel support ARM: shmobile: mackerel: Fix USBHS pinconf entry ARM: shmobile: Let Koelsch multiplatform boot with Koelsch DTB ARM: shmobile: Let Lager multiplatform boot with Lager DTB ARM: shmobile: Remove non-multiplatform Koelsch reference support ARM: shmobile: Remove non-multiplatform Lager reference support ARM: shmobile: koelsch-reference: Instantiate clkdevs for SCIF and CMT ARM: shmobile: lager-reference: Instantiate clkdevs for SCIF and CMT ARM: shmobile: koelsch-reference: Remove duplicate CCF initialization ARM: shmobile: lager-reference: Enable multiplaform kernel support ARM: shmobile: armadillo: Set backlight enable GPIO ARM: shmobile: Koelsch: add Ether support ... Conflicts: arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c |
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Tony Lindgren | 43a348ea53 |
ARM: dts: Add omap specific pinctrl defines to use padconf addresses
As we have one to three pinctrl-single instances for each SoC it is a bit confusing to configure the padconf register offset from the base of the padconf register base. Let's add macros that allow using the physical address of the padconf register directly, or in most cases, just the last 16-bits of the address as they are shown in the documentation. Note that most documentation shows two padconf registers for each 32-bit address, so adding 2 to the documentation address is needed for the second padconf register as we treat them as 16-bit registers for omap3+. For example, omap36xx documentation shows sdmmc2_clk at 0x48002158, so we can just use the last 16-bits of that value: pinctrl-single,pins = < OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0) ... >; And we don't need to separately calculate the offset from the 0x2030 base: pinctrl-single,pins = < 0x128 (PIN_INPUT_PULLUP | MUX_MODE0) ... >; Naturally both ways of defining the registers can be used, and I'm not saying we should replace all the existing defines. But it may be handy to use these macros for new entries and when doing other related .dts file clean-up. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> [tony@atomide.com: updated for 3430 vs 3630 core2 range] Signed-off-by: Tony Lindgren <tony@atomide.com> |
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Laxman Dewangan | b758df2e2a |
ARM: tegra: Add header file for pinctrl constants
This new header file defines pincontrol constants for Tegra to use from Tegra's DTS file for pincontrol properties option. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com> |
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Linus Torvalds | 8a5dc585d5 |
Main pin control pull request for the v3.13 cycle:
- Blackfin ADI pin control driver, we move yet another architecture under this subsystem umbrella. - Incremental updates to the Renesas Super-H PFC pin control driver. New subdriver for the r8a7791 SoC. - Non-linear GPIO ranges from the gpiolib side of things, this enabled simplified device tree bindings by referring entire groups of pins on some pin controller to act as back-end for a certain GPIO-chip driver. - Add the Abilis TB10x pin control driver used on the ARC architecture. Also the corresponding GPIO driver is merged through this tree, so the ARC has full support for pins and GPIOs after this. - Subdrivers for Freescale i.MX1, i.MX27 and i.MX50 pin controller instances. The i.MX1 and i.MX27 is an entirely new family (silicon) of controllers whereas i.MX50 is a variant of the previous supported controller. - Then the usual slew of fixes, cleanups and incremental updates. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.15 (GNU/Linux) iQIcBAABAgAGBQJSgHrbAAoJEEEQszewGV1zX/gP/R4mAl5rixzu7RDC0nlUHz2S F7zf3nhtsAM9GnvJjh9lE43nrisDdCnnBMFeqb7fEr3sp3j+BjQZLp4w/gbkakfY 6xx6dQ+1+fGojd/gqZI9Le6afpBasAz2E8trariOXW5TmET9ai1y9JCmE2l9K3xA jX3h138iUZ4SihBW7c/Ib46TWfe7vaeAF0WKpfNie/uMHYyc+nXQXNNvtzxtk+N3 +MMuxr9io+d3OyORHD5PlbwWs+jhEPKXfy/isudlkeGbPrA+CMxTCmRc5iu8AvTv L0wE6FnBhrdbTUHp9fGmdo1sxmIsijYbbc16yVQOn5kAr/hZvmltjV8efBytEep/ 268ruds2l3TWypaPotuj8Z3Fxm0Jr/+tcQ9Ck8CTMdrGG3J5D78U8fLwVKTcfzJ5 QjaG0c39MYBbDPO29wfr93MJF7BoNm0D4AyypOCQiH17jL0Q7sXMpeW2WYqlgFf7 uIWnN3Vsh5V4DcYSCrXoHtts1Wn7i8QEkjyj5gQYvXBU47vGToX5xO6Llvr34lVV VGMhivC3f5Z1UmTImwhi+FkfdDVwBYEuiAo3J9ezGvls4Ywq4AjZV/QZB563CztE riZ/Xpw3djrxMLKMjGvebTRGpFHcVoh9XV3FetIk+2SCyK7DK1jyYRE1+tvKudAF TEIV8476kb7xIVbKt8Oy =z9SM -----END PGP SIGNATURE----- Merge tag 'pinctrl-for-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Main pin control pull request for the v3.13 cycle. The changes hitting arch/blackfin are ACKed by the Blackfin maintainer, and the device tree bindings are ACKed to the extent possible by someone from the device tree maintainers group. - Blackfin ADI pin control driver, we move yet another architecture under this subsystem umbrella. - Incremental updates to the Renesas Super-H PFC pin control driver. New subdriver for the r8a7791 SoC. - Non-linear GPIO ranges from the gpiolib side of things, this enabled simplified device tree bindings by referring entire groups of pins on some pin controller to act as back-end for a certain GPIO-chip driver. - Add the Abilis TB10x pin control driver used on the ARC architecture. Also the corresponding GPIO driver is merged through this tree, so the ARC has full support for pins and GPIOs after this. - Subdrivers for Freescale i.MX1, i.MX27 and i.MX50 pin controller instances. The i.MX1 and i.MX27 is an entirely new family (silicon) of controllers whereas i.MX50 is a variant of the previous supported controller. - Then the usual slew of fixes, cleanups and incremental updates" The ARC DT changes are apparently still pending, that hopefully gets sorted out in a timely manner. * tag 'pinctrl-for-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (48 commits) pinctrl: imx50: add pinctrl support code for the IMX50 SoC pinctrl: at91: copy define to driver pinctrl: remove minor dead code pinctrl: imx: fix using pin->input_val wrongly pinctrl: imx1: fix return value check in imx1_pinctrl_core_probe() gpio: tb10x: fix return value check in tb10x_gpio_probe() gpio: tb10x: use module_platform_driver to simplify the code pinctrl: imx27: imx27 pincontrol driver pinctrl: imx1 core driver pinctrl: sh-pfc: r8a7791 PFC support sh-pfc: r8a7778: Add CAN pin groups gpio: add TB10x GPIO driver pinctrl: at91: correct a few typos pinctrl: mvebu: remove redundant of_match_ptr pinctrl: tb10x: use module_platform_driver to simplify the code pinctrl: tb10x: fix the error handling in tb10x_pinctrl_probe() pinctrl: add documentation for pinctrl_get_group_pins() pinctrl: rockchip: emulate both edge triggered interrupts pinctrl: rockchip: add rk3188 specifics pinctrl: rockchip: remove redundant check ... |
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Olof Johansson | 5f55c317e4 |
Some more dts changes via Benoit Cousson <bcousson@baylibre.com>:
Add a lot of N900 nodes Add OPP table to OMAP5/DRA7 Add support for Newflow NanoBone board Add i2c aliases Add McASP and audio support Add reset/idle on init bindings for OMAP Add more nodes for AM4272 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.15 (GNU/Linux) iQIcBAABAgAGBQJSZ6KqAAoJEBvUPslcq6VzXQ8P/2FfipJA3iJkI69sqghLDFqt Gx9cen4CzEsMv/9sLYQxkxw01xYUivHLFAQGL593aJTobbaSeyYCcfvJPB8Y9Jel jwoDxF3KbhnqT6PpJild+uJYeWg5UsiZcbreGgpxXj15KYSiwCUY97ga6iCQrUYt pqzC39DP1eViynaRYSIZjxOKKxpfUS5XWAMCsEsMr8UU9p15BsgZTbg2hwgVX3PG +e9/Mpfp7T1Tf6c85mCfCKjvVr4zvdJTgqphYfQFySzyPIww0FoHLjGoCZB8PjxG WSVw+i+yMCIZcAq90JIzgJ2PyD65ZKMRv9/5vxAh2UHXu7xxO8gLG3KWonN5ogMT xTiw+dPTZC8h12i2uFYxutLhV7nLVe3PKbjWMsdV7qXPVpZw9L8DmcHmIyzakKb6 jkHk6vQfR2pFw8B93TzptziQULS8TIVc3aKwalELm+4LtMkhAJIrv81BTMAb/zC6 moskG5/YbVEh6NR7x53aIXWfm2uUfLo/rRWp8kwmRQWDKe8bjZg+HGzp5/aKdqrh /ane2I0g5qVqB3Ivn7bNTWl4rN+NlTYFKZQ653fbFPbtVeTUh6gvAo5LYdwuJzvc DmhG176wbmkhBH2IoJKqwr9JsMTuuFKH1adT9WKi2PWvseX8Z0iwf+1dpm0l8sNl xlxoKEHneJjVEtEq8T5K =8KX8 -----END PGP SIGNATURE----- Merge tag 'omap-for-v3.13/dt-late' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt Some more dts changes from Benoit Cousson <bcousson@baylibre.com> via Tony Lindgren: - Add a lot of N900 nodes - Add OPP table to OMAP5/DRA7 - Add support for Newflow NanoBone board - Add i2c aliases - Add McASP and audio support - Add reset/idle on init bindings for OMAP - Add more nodes for AM4272 * tag 'omap-for-v3.13/dt-late' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (42 commits) ARM: dts: omap5-uevm: Remove pinmux for dmic pins ARM: dts: omap5-uevm: Correct twl6040 reset GPIO pinmux ARM: dts: TWL4030: Add power button support ARM: dts: omap3-n900: Add LP5523 support ARM: dts: omap3-n900: Add TLV320AIC3X support ARM: dts: omap3-n900:: Mux RX51_LCD_RESET_GPIO in DTS ARM: dts: omap3-n900: Add NAND support ARM: dts: omap3-n900: Specify regulator info ARM: dts: TWL4030: Add missing regulators ARM: dts: omap3-n900: Add LP5523 support ARM: dts: omap3-n900: Add vibrator device ARM: dts: omap3-n900: GPIO key definitions ARM: dts: omap3-n900: Add support for SD cards ARM: dts: omap3-n900: Add UART support ARM: dts: omap3-n900: Fix i2c bus speed ARM: dts: omap3-n900: Add pinctrl for i2c devices ARM: dts: DRA7: Add CPU OPP table ARM: dts: OMAP5: Add CPU OPP table ARM: dts: dra7-evm: add smps123 supply for CPU ARM: dts: omap5-uevm: add smps123 supply for CPU ... Signed-off-by: Olof Johansson <olof@lixom.net> |
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Mugunthan V N | e54686e4c7 |
ARM: dts: AM4372: Update Support for EPOS EVM
-> Adding pinmux for cpsw, i2c0. -> Enabling the modules that are present in AM4372 EPOS EVM These modules are tested on AM4372 EPOS EVM. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com> |
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Tony Lindgren | f41509ad0d |
Merge branches 'omap-for-v3.13/dt' and 'omap-for-v3.13/quirk' into omap-for-v3.13/board-removal
We need the fixes in v3.12-rc5, dts changes in omap-for-v3.13/dt, and the platform data quirk changes in omap-for-v3.13/quirk to start removing omap3 board files without breaking things. |
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Tony Lindgren | d623a0e19d |
ARM: dts: Fix pinctrl mask for omap3
The wake-up interrupt bit is available on omap3/4/5 processors unlike what we claim. Without fixing it we cannot use it on omap3 and the system configured for wake-up events will just hang on wake-up. Cc: Grygorii Strashko <grygorii.strashko@ti.com> Cc: Benoît Cousson <bcousson@baylibre.com> Cc: devicetree@vger.kernel.org Signed-off-by: Tony Lindgren <tony@atomide.com> |
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R Sricharan | 6e58b8f1da |
ARM: dts: DRA7: Add the dts files for dra7 SoC and dra7-evm board
Add minimal device tree source needed for DRA7 based SoCs. Also add a board dts file for the dra7-evm (based on dra752) which contains 1.5G of memory with 1G interleaved and 512MB non-interleaved. Also added in the board file are pin configuration details for i2c, mcspi and uart devices on board. Signed-off-by: R Sricharan <r.sricharan@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Benoit Cousson <bcousson@baylibre.com> |
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Boris BREZILLON | 77966ad7b6 |
pinctrl: at91: fix typos
Fix AT91_PINCTRL_DEBOUNCE_VAL dt macro typo. Fix at91_pinctrl_mux_ops callback typos. Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Kevin Hilman | 4cb635d705 |
Ux500 device tree enablement base for the v3.12
development cycle: - Various cleanups like remove non-existant hardware from the Snowball device tree, prefix all files with "ste-*" - External regulators - Documentation updates - Delete some minor dangling platform data - Pin control settings for U8540 through DT -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.13 (GNU/Linux) iQIcBAABAgAGBQJSDfMsAAoJEEEQszewGV1zg+cQAJBUM8IRpck+wgYyhEL9TsfO Lt98kq8fw2iiC3wYbC6VtGVTocOuaum6wchwuOPjK2bylPggrzCwjD3cLaNTUymD 8wy/fZtWF0KEWa81pkpDDVFqWa6gc9H5UIPVFknf4wDaxb+vvw12o3wApKh/ThC/ 8j0zE5gXQMmRehLRaM/cXqK1QBcFPZxL060e8s5N4CE47JeaLHn1GAlbYCi0QXmg rV0trMaZhRQvj+FCJe1vHaf32rjjE071feFnqq3Q519puQulVQI/ULIP4zE584UO Vu4Wys5SAiqJuj2IbnTxYJRvP1Xbr/rHTOhXIoh2Zy52JXm9fvCASTJ4GvUxHHeR UXnwiaiyp03qDiwB/EKb5dpINqiwAY64I+jkN9sj2LULTwtVR6wsV4jMuIAHAPfz w1ZU8Ea4U4dgF9XzWIs5nYNDxoHaBK8m/uj6qETcCjTKuGGixP6ziNgobH8g3DMZ KxklRVFozyZwrC7MMk8vgEqhNtFUrnl3sQw/SUCUSMRk4PzWOCSaAvPFicpRXT8D FmmG8h4jf95GaA+ndF3i92NCk2R6PO04SUlMGlBNEjc+okyGHkLnL7v1MkIom6EB nM1+DaY4urYSeKdA72I4VG/RJBjToAdk2qysJ9xQtWOqAx1C3diL/57QKkltC+d7 7tETJOTTm42QtgmTQmQq =Wm2y -----END PGP SIGNATURE----- Merge tag 'ux500-devicetree-for-v3.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/dt From: Linus Walleij: Ux500 device tree enablement base for the v3.12 development cycle: - Various cleanups like remove non-existant hardware from the Snowball device tree, prefix all files with "ste-*" - External regulators - Documentation updates - Delete some minor dangling platform data - Pin control settings for U8540 through DT * tag 'ux500-devicetree-for-v3.12-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (22 commits) ARM: ux500: fix devicetree builds ARM: ux500: Remove u9540.dts as it's been replaced ARM: ux500: Apply a ste-* prefix onto dbx5x0.dtsi ARM: ux500: Apply a ste-* prefix onto stuib.dtsi ARM: ux500: Apply a ste-* prefix onto hrefv60plus.dts ARM: ux500: Apply a ste-* prefix onto hrefprev60.dts Signed-off-by: Lee Jones <lee.jones@linaro.org> ARM: ux500: Apply a ste-* prefix onto href.dtsi ARM: ux500: Apply a ste-* prefix onto ccu9540.dts ARM: ux500: Apply a ste-* prefix onto ccu8540.dts ARM: ux500: Apply a ste-* prefix onto snowball.dts ARM: ux500: Remove Snowball DTS entry for ROHM BH1780GLI ambient light sensor ARM: ux500: Remove Snowball DTS entry for TPS61052 chip ARM: ux500: Remove Snowball DTS entry for National Semiconductor LP5521 LED chip ARM: ux500: Remove Toshiba TC35892 I/O Expander's DT entry from Snowball's DTS ARM: u8540: DT: Set pinctrl mapping to i2c0,1,2,4 & 5 ARM: u8540: Add Pinctrl Device Tree settings for uart0, uart2 ARM: ux500: Stop passing MMC's platform data for Device Tree boots Documentation: Update binding for Nomadik and DBx5x based platforms ARM: ux500: Supply external regulator names for Snowball's DT ARM: ux500: Provide a supply name for the AB8500 AUX regulators to use ... |
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Gabriel Fernandez | 3d0899e8da |
ARM: u8540: Add Pinctrl Device Tree settings for uart0, uart2
This patch adds pinctrl device tree settings for uart0 and uart2 for ccu8540 board. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Ian Campbell | c5f167d315 |
pinctrl: am33xx dt binding: correct include path
Using #include <include/...> is a bit odd. It happens to work because the DTC flags include -Iarch/FOO/boot/dts as well as arch/FOO/boot/dts/include and arch/FOO/boot/dts/include/dt-bindings is a symlink to include/dt-bindings. Signed-off-by: Ian Campbell <ian.campbell@citrix.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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Linus Torvalds | 3dbde57ad9 |
Pin control changes for the v3.11 kernel cycle:
- A large slew of improvements of the Genric pin configuration support, and deployment in four different platforms: Rockchip, Super-H PFC, ABx500 and TZ1090. Support BIAS_BUS_HOLD, get device tree parsing and debugfs support into shape. - We also have device tree support with generic naming conventions for the generic pin configuration. - Delete the unused and confusing direct pinconf API. Now state transitions is *the* way to control pins and multiplexing. - New drivers for Rockchip, TZ1090, and TZ1090 PDC. - Two pin control states related to power management are now handled in the device core: "sleep" and "idle", removing a lot of boilerplate code in drivers. We do not yet know if this is the final word for pin PM, but it already make things a lot easier to handle. - Handle sparse GPIO ranges passing a list of disparate pins, and utilize these in the new BayTrail (x86 Atom SoC) driver. - Make the sunxi (AllWinner) driver handle external interrupts. - Make it possible for pinctrl-single to handle the case where several pins are managed by a single register, and augment it to handle sleep modes. - Cleanups and improvements for the abx500 drivers. - Move Sirf pin control drivers to their own directory, support save/restore of context and add support for the SiRFatlas6 SoC. - PMU muxing for the Dove pinctrl driver. - Finalization and support for VF610 in the i.MX6 pinctrl driver. - Smoothen out various Exynos rough edges. - Generic cleanups of various kinds. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.10 (GNU/Linux) iQIcBAABAgAGBQJR0Z07AAoJEEEQszewGV1zx+oP/j+bh39e1Fc8ySFNvpwLFFRb EbQZx21XsK+d4fUVYQJ1IBh3e5FTqkmvHarbO1aNttqyk7eN5P4EFb3dLExIX+81 6SJYtldH5ZdvLpJNvSXAX6fUjTD1CtBCDs5z5AvDQjqUArQ2tKlzJJgFXW8MSd3B 5hd7XdU5g30GbVzFwrPbVUZwRM12YVs/HACkP6uFqDjB8KX6nXpETlqeeFW+ApvW RPT7iN/CsFls7gl6mHsPvScdfXar0ilZfu0hTf3EmhlVK1/iPOV6aqAF9z4j2Yxf ICL/x3phJ0Q7yNeZslif0KN3iJnrRGbdNvBi6wim35Ds5Uf3lY2SAhSvxNmkjT8n DB9oBTvQzr5OEv8fstWJAT+BWIdZ6Z91IqJ5Gy40A91oVUU9NDDBR3ur2gIneEUz 51kOUhucCzpiht5A/7djAx6MYYOEUwjGNzjOs7tGcxCxz4+Rb2DbAXZ3Cew45ddh 1QsfL3588A0DTp7ccw7f4QwYveX/cquzia/MD8AtdrUSYFEPfkexEo540/VqMl8j aMJ8Uuca9GSnyXDk+ziwkzLg2DjTw+p+6IygNr2GLrXFH2LTAKRpz/SidyLArDsw 0sTFan0sdU3497rHX5Xc8yCyDY4sXCdQm3/er+TE+Z7V2dS99GuEysCAInIdvM1I Wupqaxw4A25YSmbRFVpR =EbAf -----END PGP SIGNATURE----- Merge tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control changes from Linus Walleij: - A large slew of improvements of the Genric pin configuration support, and deployment in four different platforms: Rockchip, Super-H PFC, ABx500 and TZ1090. Support BIAS_BUS_HOLD, get device tree parsing and debugfs support into shape. - We also have device tree support with generic naming conventions for the generic pin configuration. - Delete the unused and confusing direct pinconf API. Now state transitions is *the* way to control pins and multiplexing. - New drivers for Rockchip, TZ1090, and TZ1090 PDC. - Two pin control states related to power management are now handled in the device core: "sleep" and "idle", removing a lot of boilerplate code in drivers. We do not yet know if this is the final word for pin PM, but it already make things a lot easier to handle. - Handle sparse GPIO ranges passing a list of disparate pins, and utilize these in the new BayTrail (x86 Atom SoC) driver. - Make the sunxi (AllWinner) driver handle external interrupts. - Make it possible for pinctrl-single to handle the case where several pins are managed by a single register, and augment it to handle sleep modes. - Cleanups and improvements for the abx500 drivers. - Move Sirf pin control drivers to their own directory, support save/restore of context and add support for the SiRFatlas6 SoC. - PMU muxing for the Dove pinctrl driver. - Finalization and support for VF610 in the i.MX6 pinctrl driver. - Smoothen out various Exynos rough edges. - Generic cleanups of various kinds. * tag 'pinctrl-for-v3.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (82 commits) pinctrl: vt8500: wmt: remove redundant dev_err call in wmt_pinctrl_probe() pinctrl: remove bindings for pinconf options needing more thought pinctrl: remove slew-rate parameter from tz1090 pinctrl: set unit for debounce time pinconfig to usec pinctrl: more clarifications for generic pull configs pinctrl: rip out the direct pinconf API pinctrl-tz1090-pdc: add TZ1090 PDC pinctrl driver pinctrl-tz1090: add TZ1090 pinctrl driver pinctrl: samsung: Staticize drvdata_list pinctrl: rockchip: Add missing irq_gc_unlock() call before return error pinctrl: abx500: rework error path pinctrl: abx500: suppress hardcoded value pinctrl: abx500: factorize code pinctrl: abx500: fix abx500_gpio_get() pinctrl: abx500: fix abx500_pin_config_set() pinctrl: abx500: Add device tree support sh-pfc: Guard DT parsing with #ifdef CONFIG_OF pinctrl: add Intel BayTrail GPIO/pinctrl support pinctrl: fix pinconf_ops::pin_config_dbg_parse_modify kerneldoc pinctrl: Staticize local symbols ... Conflicts: drivers/net/ethernet/ti/davinci_mdio.c drivers/pinctrl/Makefile |
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Arnd Bergmann | 076919a6e0 |
Merge branch 'for_3.11/dts' of git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt into next/dt
From Benoit Cousson: omap devicetree changes for v3.11 merge window - Add mandatory DT support for missing IPs, like USB host, bandgap, LED, NAND, LAN, CPSW, PWM for OMAP and AMXX devices. - Introduce new AM43x silicon. * 'for_3.11/dts' of git://git.kernel.org/pub/scm/linux/kernel/git/bcousson/linux-omap-dt: (52 commits) ARM: dts: omap5-uevm: Provide USB Host PHY clock frequency ARM: dts: omap4-panda: Fix DVI EDID reads ARM: dts: omap4-panda: Add USB Host support ARM: dts: AM43x EPOS EVM support ARM: dts: OMAP5: Add bandgap DT entry ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone ARM: dts: omap3-overo: Add default trigger for TWL4030 LED ARM: dts: omap3-tobi: Correct polarity for GPIO LED ARM: dts: omap3-tobi: Add SMSC911X node ARM: dts: OMAP3: Include IRQ header ARM: dts: Protect pinctrl headers against multiple inclusions ARM: AM33XX: clock data: Enable clkout2 as part of init ARM: AM33XX: clock: Add debugSS clock nodes ARM: dts: OMAP5: Add Palmas MFD node and regulator nodes ARM: dts: AM33XX: Add PWM backlight DT data to am335x-evmsk ARM: dts: AM33XX: Add PWM backlight DT data to am335x-evm ARM: dts: AM33XX: Add PWMSS device tree nodes ARM: dts: OMAP4460: Add bandgap entry for OMAP4460 devices ... Signed-off-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Tony Lindgren <tony@atomide.com> |
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Florian Vaussard | ac25da7f30 |
ARM: dts: Protect pinctrl headers against multiple inclusions
Pinctrl headers were not protected with #ifndef. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org> |
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Florian Vaussard | 3f2d1658a7 |
ARM: dts: AM33XX: Specific pinctrl header
The pinctrl IP inside the AM33XX family differs slightly from what is found on OMAP2+. Define a specific header to take account of the differences. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> Tested-by: Afzal Mohammed <afzal@ti.com> Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org> |