Commit Graph

15452 Commits

Author SHA1 Message Date
Maxime Ripard 960ebc8ac6 dt-bindings: net: mdio: Add address and size cells
MDIO controllers should have child nodes with a singe value in their reg
properties being the ID of the PHY in the bus.

Let's add the proper constraints on #address-cells and #size-cells.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-07-03 13:18:03 -06:00
Maxime Ripard 4c2c04c27d dt-bindings: net: mdio: Add a nodename pattern
The node name of an MDIO controller should be MDIO. Let's add a rule for
this.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-07-03 13:17:57 -06:00
Rob Herring e6ed646711 dt-bindings: mtd: sunxi-nand: Drop 'maxItems' from child 'reg' property
Mixing 'maxItems' and scalar properties doesn't make much sense, so drop
'maxItems' as a single item is implied.

Cc: David Woodhouse <dwmw2@infradead.org>
Cc: Brian Norris <computersforpeace@gmail.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Richard Weinberger <richard@nod.at>
Cc: Vignesh Raghavendra <vigneshr@ti.com>
Cc: Maxime Ripard <maxime.ripard@bootlin.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: linux-mtd@lists.infradead.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-28 14:29:56 -06:00
Rob Herring 9ea6b821ce dt-bindings: arm: Limit cpus schema to only check Arm 'cpu' nodes
Matching on the 'cpus' node was a bad choice because the schema is
incorrectly applied to non-Arm cpus nodes. As we now have a common cpus
schema which checks the general structure, it is also redundant to do so
in the Arm CPU schema.

The downside is one could conceivably mix different architecture's cpu
nodes or have typos in the compatible string. The latter problem pretty
much exists for every schema.

Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-28 14:29:56 -06:00
Brian Masney ef4db28c1f dt-bindings: backlight: lm3630a: correct schema validation
The '#address-cells' and '#size-cells' properties were not defined in
the lm3630a bindings and would cause the following error when
attempting to validate the examples against the schema:

Documentation/devicetree/bindings/leds/backlight/lm3630a-backlight.example.dt.yaml:
'#address-cells', '#size-cells' do not match any of the regexes:
'^led@[01]$', 'pinctrl-[0-9]+'

Correct this by adding those two properties.

While we're here, move the ti,linear-mapping-mode property to the
led@[01] child nodes to correct the following validation error:

Documentation/devicetree/bindings/leds/backlight/lm3630a-backlight.example.dt.yaml:
led@0: 'ti,linear-mapping-mode' does not match any of the regexes:
'pinctrl-[0-9]+'

Fixes: 32fcb75c66 ("dt-bindings: backlight: Add lm3630a bindings")
Signed-off-by: Brian Masney <masneyb@onstation.org>
Reported-by: Rob Herring <robh+dt@kernel.org>
Acked-by: Daniel Thompson <daniel.thompson@linaro.org>
Acked-by: Dan Murphy <dmurphy@ti.com>
[robh: also drop maxItems from child reg]
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-28 13:27:47 -06:00
Maxime Ripard f80b1dfc56 dt-bindings: net: dwmac: Deprecate the PHY reset properties
Even though the DWMAC driver uses some driver specific properties, the PHY
core has a bunch of generic properties and can deal with them nicely.

Let's deprecate our specific properties.

Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-28 13:27:47 -06:00
Maxime Ripard 0569929d97 dt-bindings: net: sun8i-emac: Convert the binding to a schemas
Switch our Allwinner H3 EMAC controller binding to a YAML schema to enable
the DT validation. Since that controller is based on a Synopsys IP, let's
add the validation to that schemas with a bunch of conditionals.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-28 13:27:47 -06:00
Maxime Ripard 4b859450fa dt-bindings: net: sun7i-gmac: Convert the binding to a schemas
Switch our Allwinner A20 GMAC controller binding to a YAML schema to enable
the DT validation. Since that controller is based on a Synopsys IP, let's
add the validation to that schemas with a bunch of conditionals.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-28 13:27:46 -06:00
Maxime Ripard 7db3545aef dt-bindings: net: stmmac: Convert the binding to a schemas
Switch the STMMAC / Synopsys DesignWare MAC controller binding to a YAML
schema to enable the DT validation.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-28 13:27:46 -06:00
Maxime Ripard 7a47b90815 dt-bindings: net: sun4i-mdio: Convert the binding to a schemas
Switch our Allwinner A10 MDIO controller binding to a YAML schema to enable
the DT validation.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-28 13:27:46 -06:00
Maxime Ripard 8c5b094476 dt-bindings: net: sun4i-emac: Convert the binding to a schemas
Switch our Allwinner A10 EMAC controller binding to a YAML schema to enable
the DT validation.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-28 13:27:46 -06:00
Maxime Ripard 4abe7a3a09 dt-bindings: net: phy: The interrupt property is not mandatory
Unlike what was initially claimed in the PHY binding, the interrupt
property of a PHY can be omitted, and the OS will turn to polling instead.

Document that.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-28 13:27:46 -06:00
Maxime Ripard 62d77ff7ec dt-bindings: net: Add a YAML schemas for the generic MDIO options
The MDIO buses have a number of available device tree properties that can
be used in their device tree node. Add a YAML schemas for those.

Suggested-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-28 13:27:45 -06:00
Maxime Ripard d8704342c1 dt-bindings: net: Add a YAML schemas for the generic PHY options
The networking PHYs have a number of available device tree properties that
can be used in their device tree node. Add a YAML schemas for those.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
[robh: drop maxItems from reg]
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-28 13:27:45 -06:00
Maxime Ripard 9d3de3c583 dt-bindings: net: Add YAML schemas for the generic Ethernet options
The Ethernet controllers have a good number of generic options that can be
needed in a device tree. Add a YAML schemas for those.

Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-28 13:27:45 -06:00
Rob Herring 5025ef8b7a dt-bindings: arm: Convert PSCI binding to json-schema
Convert the PSCI binding to use DT schema format.

Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Will Deacon <will@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-27 11:32:51 -06:00
Rob Herring c875a3f847 dt-bindings: arm: Convert Conexant Digicolor board/soc bindings to json-schema
Convert Conexant Digicolor SoC bindings to DT schema format using json-schema.

Acked-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-27 11:24:39 -06:00
Rob Herring 26fd07e2e7 dt-bindings: arm: Convert NXP LPC32xx board/soc bindings to json-schema
Convert NXP LPC32xx SoC bindings to DT schema format using json-schema.

Cc: Roland Stigge <stigge@antcom.de>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-27 11:24:34 -06:00
Rob Herring 7eefa9047e dt-bindings: arm: Convert MOXA ART board/soc bindings to json-schema
Convert MOXA ART SoC bindings to DT schema format using json-schema.

Cc: Jonas Jensen <jonas.jensen@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-27 11:24:33 -06:00
Rob Herring 2c73aea7da dt-bindings: arm: Convert Axxia board/soc bindings to json-schema
Convert Axxia SoC bindings to DT schema format using json-schema.

Cc: Anders Berg <anders.berg@lsi.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-27 11:24:32 -06:00
Rob Herring 5732bea634 dt-bindings: arm: qcom: Add missing schema for IPQ4019 boards
The board bindings for IPQ4019 are undocumented. Add the missing bindings
to the schema.

Cc: Andy Gross <agross@kernel.org>
Cc: David Brown <david.brown@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-27 11:22:58 -06:00
Rob Herring e5dad30bc7 dt-bindings: arm: qcom: Add missing schema for MSM8974
The SoC/board bindings for MSM8974 are undocumented. Add the missing
bindings to the schema.

Cc: Andy Gross <agross@kernel.org>
Cc: David Brown <david.brown@linaro.org>
Cc: linux-arm-msm@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-27 11:22:57 -06:00
Rob Herring b061e4e8f0 dt-bindings: arm: Convert Alpine board/soc bindings to json-schema
Convert Alpine SoC bindings to DT schema format using json-schema.

Cc: Tsahee Zidenberg <tsahee@annapurnalabs.com>
Cc: Antoine Tenart <antoine.tenart@free-electrons.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-27 11:22:00 -06:00
Geert Uytterhoeven 1bdd44579a dt-bindings: Add missing newline at end of file
"git diff" says:

    \ No newline at end of file

after modifying the files.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-18 08:11:57 -06:00
Marco Felsch 2554fcb8cc dt-bindings: add Kontron vendor prefix
Kontron is a leading embedded computer supplier. More information can be
found on: https://www.kontron.de/

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-18 08:02:38 -06:00
Erwan Le Ray 1419f64ef5 dt-bindings: stm32: serial: Add optional reset
STM32 serial can be reset via reset controller.
Add an optional reset property to stm32 usart bindings.

Signed-off-by: Erwan Le Ray <erwan.leray@st.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-14 11:51:48 -06:00
Amit Kucheria 4c0a59e112 Documentation: arm: Link idle-states binding to "enable-method" property
The "enable-method" property for cpu nodes needs to be "psci" for CPU
idle management to be setup correctly.

Add a note to the binding documentation to this effect to make it
obvious.

Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-13 17:13:32 -06:00
Geert Uytterhoeven 573748081a dt-bindings: property-units: Sanitize unit naming
Make the naming of units consistent with common practices:
  - Do not capitalize the first character of units ("Celsius" is
    special, as it is not the unit name, but a reference to its
    proposer),
  - Do not use plural for units,
  - Do not abbreviate "ampere",
  - Concatenate prefixes and units (no spaces or hyphens),
  - Separate units by spaces not hyphens,
  - "milli" applies to "degree", not to "Celsius".

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-13 14:29:43 -06:00
Hannes Schmelzer 630eccfd0a Documentation: devicetree: Add vendor prefix for B&R Industrial Automation GmbH
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
[robh: rework for schema]
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-13 12:02:47 -06:00
Rob Herring 837158b847 dt-bindings: Check the examples against the schemas
Currently, the binding examples are just built with dtc. dtc recently
gained the support necessary to output the examples in YAML format
(commit 87963ee20693 ("livetree: add missing type markers in generated
overlay properties"). Now just switch the output format and the examples
will be checked against the schema.

Reviewed-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-13 11:00:14 -06:00
Rob Herring f7a6463e38 dt-bindings: vendor-prefixes: Also allow node names starting with '_'
Generated nodes for overlays begin with '_'. The binding examples are
built as overlays in order to allow unresolved phandles, so we need to
allow the generated node names.

Reviewed-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-13 10:59:58 -06:00
Maxime Ripard 73c699ffe5 dt-bindings: vendor: Add a bunch of vendors
Add all the missing vendors used in Allwinner DTS.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-06-11 08:17:10 -06:00
Maxime Ripard b361797f3d dt-bindings: vendor: Fix simtek vendor compatible
In the text file, simtek didn't have any description and apparently this
confused the conversion script. Fix the simtek entry and add a proper
description.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-05-26 11:05:06 -05:00
Maxime Ripard 8e2c67f996 dt-bindings: vendor: Escape single quote
Single quotes need to be escaped in YAML, make sure it's the case.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-05-26 11:04:39 -05:00
Stephen Boyd 253a41c6fb dt-bindings: Remove Linuxisms from common-properties binding
We shouldn't reference Linux kernel functions or Linux itself in proper
bindings. It's OK to reference functions in the kernel when explaining
examples, but otherwise we shouldn't reference functions to describe
what the binding means.

Cc: Hsin-Yi Wang <hsinyi@chromium.org>
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-05-24 16:38:45 -05:00
Maxime Ripard 2496f17772 dt-bindings: Add vendor prefix for Espressif
Add Espressif Systems DT vendor prefix. That prefix has been used for quite
some time for WiFi chips, but has never been documented.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-05-24 15:50:38 -05:00
Kamal Dasu a5f2246fb9 dt: bindings: mtd: replace references to nand.txt with nand-controller.yaml
nand-controller.yaml replaced nand.txt however the references to it were
not updated. This change updates these references wherever it appears in
bindings documentation.

Fixes: 212e496935 ("dt-bindings: mtd: Add YAML schemas for the generic NAND options")
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-05-22 09:08:20 -05:00
Rob Herring 8d665693c2 dt-bindings: interrupt-controller: arm,gic: Fix schema errors in example
Validating the examples against the schema have a few errors:

arm,gic.example.dt.yaml: 'ranges' does not match any of the regexes: '^v2m@[0-9a-f]+$', 'pinctrl-[0-9]+'
arm,gic.example.dt.yaml: #address-cells:0:0: 2 is not one of [0, 1]
arm,gic.example.dt.yaml: #size-cells:0:0: 1 was expected

'ranges' is valid, but missing from the schema, so add it. The reg
addresses and sizes don't match the schema requirements and the example
template. We could just override the example template to use 64-bit
addresses, but there's not really any value showing that in the example.

Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-05-22 09:06:11 -05:00
Robin Murphy 31910f4476 dt-bindings: arm: Clean up CPU binding examples
Following commit 31af04cd60 ("arm64: dts: Remove inconsistent use of
'arm,armv8' compatible string"), clean up these binding examples in case
anyone is tempted to copy them.

CC: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-05-22 09:01:02 -05:00
Mauro Carvalho Chehab dfab99544c dt: fix refs that were renamed to json with the same file name
These files were converted to json-schema, but the references weren't
renamed.

Fixes: 66ed144f14 ("dt-bindings: interrupt-controller: Convert ARM GIC to json-schema")
(and other similar commits)

Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
2019-05-22 09:01:01 -05:00
Rob Herring 05aeca7cb0 dt-bindings: Pass binding directory to validation tools
In order to have $ref's to schema files within the kernel, we need to
pass the base path of bindings to the schema validation tools.

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Michal Marek <michal.lkml@markovi.net>
Cc: devicetree@vger.kernel.org
Cc: linux-kbuild@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
2019-05-22 09:01:01 -05:00
Paul Walmsley f08ff9c525 dt-bindings: sifive: describe sifive-blocks versioning
For IP blocks that are generated from the public, open-source
sifive-blocks repository, describe the version numbering policy
that its maintainers intend to use, upon request from Rob
Herring <robh@kernel.org>.

Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Megan Wachs <megan@sifive.com>
Cc: Wesley Terpstra <wesley@sifive.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: linux-riscv@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
2019-05-22 09:01:00 -05:00
Linus Torvalds a13f950ef1 Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull clocksource updates from Ingo Molnar:
 "Misc clocksource/clockevent driver updates that came in a bit late but
  are ready for v5.2"

* 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  misc: atmel_tclib: Do not probe already used TCBs
  clocksource/drivers/timer-atmel-tcb: Convert tc_clksrc_suspend|resume() to static
  clocksource/drivers/tcb_clksrc: Rename the file for consistency
  clocksource/drivers/timer-atmel-pit: Rework Kconfig option
  clocksource/drivers/tcb_clksrc: Move Kconfig option
  ARM: at91: Implement clocksource selection
  clocksource/drivers/tcb_clksrc: Use tcb as sched_clock
  clocksource/drivers/tcb_clksrc: Stop depending on atmel_tclib
  ARM: at91: move SoC specific definitions to SoC folder
  clocksource/drivers/timer-milbeaut: Cleanup common register accesses
  clocksource/drivers/timer-milbeaut: Add shutdown function
  clocksource/drivers/timer-milbeaut: Fix to enable one-shot timer
  clocksource/drivers/tegra: Rework for compensation of suspend time
  clocksource/drivers/sp804: Add COMPILE_TEST to CONFIG_ARM_TIMER_SP804
  clocksource/drivers/sun4i: Add a compatible for suniv
  dt-bindings: timer: Add Allwinner suniv timer
2019-05-19 11:11:20 -07:00
Linus Torvalds d9351ea14d Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull IRQ chip updates from Ingo Molnar:
 "A late irqchips update:

   - New TI INTR/INTA set of drivers

   - Rewrite of the stm32mp1-exti driver as a platform driver

   - Update the IOMMU MSI mapping API to be RT friendly

   - A number of cleanups and other low impact fixes"

* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (34 commits)
  iommu/dma-iommu: Remove iommu_dma_map_msi_msg()
  irqchip/gic-v3-mbi: Don't map the MSI page in mbi_compose_m{b, s}i_msg()
  irqchip/ls-scfg-msi: Don't map the MSI page in ls_scfg_msi_compose_msg()
  irqchip/gic-v3-its: Don't map the MSI page in its_irq_compose_msi_msg()
  irqchip/gicv2m: Don't map the MSI page in gicv2m_compose_msi_msg()
  iommu/dma-iommu: Split iommu_dma_map_msi_msg() in two parts
  genirq/msi: Add a new field in msi_desc to store an IOMMU cookie
  arm64: arch_k3: Enable interrupt controller drivers
  irqchip/ti-sci-inta: Add msi domain support
  soc: ti: Add MSI domain bus support for Interrupt Aggregator
  irqchip/ti-sci-inta: Add support for Interrupt Aggregator driver
  dt-bindings: irqchip: Introduce TISCI Interrupt Aggregator bindings
  irqchip/ti-sci-intr: Add support for Interrupt Router driver
  dt-bindings: irqchip: Introduce TISCI Interrupt router bindings
  gpio: thunderx: Use the default parent apis for {request,release}_resources
  genirq: Introduce irq_chip_{request,release}_resource_parent() apis
  firmware: ti_sci: Add helper apis to manage resources
  firmware: ti_sci: Add RM mapping table for am654
  firmware: ti_sci: Add support for IRQ management
  firmware: ti_sci: Add support for RM core ops
  ...
2019-05-19 10:58:45 -07:00
Linus Torvalds 4c4a5c99af ARM: SoC: late updates
This is some material that we picked up into our tree late. Most of it
 are smaller fixes and additions, some defconfig updates due to recent
 development, etc.
 
 Code-wise the largest portion is a series of PM updates for the at91
 platform, and those have been in linux-next a while through the at91
 tree before we picked them up.
 -----BEGIN PGP SIGNATURE-----
 
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Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC late updates from Olof Johansson:
 "This is some material that we picked up into our tree late. Most of it
  are smaller fixes and additions, some defconfig updates due to recent
  development, etc.

  Code-wise the largest portion is a series of PM updates for the at91
  platform, and those have been in linux-next a while through the at91
  tree before we picked them up"

* tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (29 commits)
  arm64: dts: sprd: Add clock properties for serial devices
  Opt out of scripts/get_maintainer.pl
  ARM: ixp4xx: Remove duplicated include from common.c
  soc: ixp4xx: qmgr: Fix an NULL vs IS_ERR() check in probe
  arm64: tegra: Disable XUSB support on Jetson TX2
  arm64: tegra: Enable SMMU translation for PCI on Tegra186
  arm64: tegra: Fix insecure SMMU users for Tegra186
  arm64: tegra: Select ARM_GIC_PM
  amba: tegra-ahb: Mark PM functions as __maybe_unused
  ARM: dts: logicpd-som-lv: Fix MMC1 card detect
  ARM: mvebu: drop return from void function
  ARM: mvebu: prefix coprocessor operand with p
  ARM: mvebu: drop unnecessary label
  ARM: mvebu: fix a leaked reference by adding missing of_node_put
  ARM: socfpga_defconfig: enable LTC2497
  ARM: mvebu: kirkwood: remove error message when retrieving mac address
  ARM: at91: sama5: make ov2640 as a module
  ARM: OMAP1: ams-delta: fix early boot crash when LED support is disabled
  ARM: at91: remove HAVE_FB_ATMEL for sama5 SoC as they use DRM
  soc/fsl/qe: Fix an error code in qe_pin_request()
  ...
2019-05-19 10:16:39 -07:00
Linus Torvalds b0bb1269b9 RISC-V Patches for the 5.2 Merge Window, Part 1 v3
This patch set contains an assortment of RISC-V related patches that I'd
 like to target for the 5.2 merge window.  Most of the patches are
 cleanups, but there are a handful of user-visible changes:
 
 * The nosmp and nr_cpus command-line arguments are now supported, which
   work like normal.
 * The SBI console no longer installs itself as a preferred console, we
   rely on standard mechanisms (/chosen, command-line, hueristics)
   instead.
 * sfence_remove_sfence_vma{,_asid} now pass their arguments along to the
   SBI call.
 * Modules now support BUG().
 * A missing sfence.vma during boot has been added.  This bug only
   manifests during boot.
 * The arch/riscv support for SiFive's L2 cache controller has been
   merged, which should un-block the EDAC framework work.
 
 I've only tested this on QEMU again, as I didn't have time to get things
 running on the Unleashed.  The latest master from this morning merges in
 cleanly and passes the tests as well.
 
 This patch set rebased my "5.2 MW, Part 1" patch set which includes an
 erronous empty file.  It's also a rebase of my "5.2 MW, Part 2" patch
 set, in which I managed to create another file while attempting to
 remove the empty file.
 
 Sorry for all the noise!
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Merge tag 'riscv-for-linus-5.2-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux

Pull RISC-V updates from Palmer Dabbelt:
 "This contains an assortment of RISC-V related patches that I'd like to
  target for the 5.2 merge window. Most of the patches are cleanups, but
  there are a handful of user-visible changes:

   - The nosmp and nr_cpus command-line arguments are now supported,
     which work like normal.

   - The SBI console no longer installs itself as a preferred console,
     we rely on standard mechanisms (/chosen, command-line, hueristics)
     instead.

   - sfence_remove_sfence_vma{,_asid} now pass their arguments along to
     the SBI call.

   - Modules now support BUG().

   - A missing sfence.vma during boot has been added. This bug only
     manifests during boot.

   - The arch/riscv support for SiFive's L2 cache controller has been
     merged, which should un-block the EDAC framework work.

  I've only tested this on QEMU again, as I didn't have time to get
  things running on the Unleashed. The latest master from this morning
  merges in cleanly and passes the tests as well"

* tag 'riscv-for-linus-5.2-mw2' of git://git.kernel.org/pub/scm/linux/kernel/git/palmer/riscv-linux: (31 commits)
  riscv: fix locking violation in page fault handler
  RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs
  RISC-V: Add DT documentation for SiFive L2 Cache Controller
  RISC-V: Avoid using invalid intermediate translations
  riscv: Support BUG() in kernel module
  riscv: Add the support for c.ebreak check in is_valid_bugaddr()
  riscv: support trap-based WARN()
  riscv: fix sbi_remote_sfence_vma{,_asid}.
  riscv: move switch_mm to its own file
  riscv: move flush_icache_{all,mm} to cacheflush.c
  tty: Don't force RISCV SBI console as preferred console
  RISC-V: Access CSRs using CSR numbers
  RISC-V: Add interrupt related SCAUSE defines in asm/csr.h
  RISC-V: Use tabs to align macro values in asm/csr.h
  RISC-V: Fix minor checkpatch issues.
  RISC-V: Support nr_cpus command line option.
  RISC-V: Implement nosmp commandline option.
  RISC-V: Add RISC-V specific arch_match_cpu_phys_id
  riscv: vdso: drop unnecessary cc-ldoption
  riscv: call pm_power_off from machine_halt / machine_power_off
  ...
2019-05-19 09:56:36 -07:00
Yash Shah 5545b6d1ba
RISC-V: Add DT documentation for SiFive L2 Cache Controller
Add device tree bindings for SiFive FU540 L2 cache controller driver

Signed-off-by: Yash Shah <yash.shah@sifive.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-05-16 20:42:13 -07:00
Rob Herring 8122de5460 dt-bindings: Convert vendor prefixes to json-schema
Convert the vendor prefix registry to a schema. This will enable checking
that new vendor prefixes are added (in addition to the less than perfect
checkpatch.pl check) and will also check against adding other prefixes
which are not vendors.

Converted vendor-prefixes.txt using the following sed script:

sed -e 's/\([a-zA-Z0-9\-]*\)[[:space:]]*\([a-zA-Z0-9].*\)/  "^\1,\.\*\":\n    description: \2/'

Signed-off-by: Rob Herring <robh@kernel.org>
2019-05-16 15:27:21 -05:00
Olof Johansson faff3fcf01 AT91 SoC for 5.2
- PM changes for SAM9X60
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Merge tag 'at91-5.2-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/late

AT91 SoC for 5.2

 - PM changes for SAM9X60

* tag 'at91-5.2-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: at91: pm: do not disable/enable PLLA for ULP modes
  ARM: at91: pm: disable RC oscillator in ULP0
  ARM: at91: pm: add ULP1 support for SAM9X60
  ARM: at91: pm: add support for per SoC wakeup source configuration
  ARM: at91: pm: keep at91_pm_backup_init() only for SAMA5D2 SoCs
  ARM: at91: pm: initial PM support for SAM9X60
  dt-bindings: arm: atmel: add binding for SAM9X60 SoC
  ARM: at91: pm: introduce at91_soc_pm structure

Signed-off-by: Olof Johansson <olof@lixom.net>
2019-05-16 11:05:11 -07:00
Linus Torvalds dc413a90ed ARM: SoC-related driver updates
Various driver updates for platforms and a couple of the small driver
 subsystems we merge through our tree:
 
 Among the larger pieces:
 
  - Power management improvements for TI am335x and am437x (RTC suspend/wake)
  - Misc new additions for Amlogic (socinfo updates)
  - ZynqMP FPGA manager
  - Nvidia improvements for reset/powergate handling
  - PMIC wrapper for Mediatek MT8516
  - Misc fixes/improvements for ARM SCMI, TEE, NXP i.MX SCU drivers
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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC-related driver updates from Olof Johansson:
 "Various driver updates for platforms and a couple of the small driver
  subsystems we merge through our tree:

  Among the larger pieces:

   - Power management improvements for TI am335x and am437x (RTC
     suspend/wake)

   - Misc new additions for Amlogic (socinfo updates)

   - ZynqMP FPGA manager

   - Nvidia improvements for reset/powergate handling

   - PMIC wrapper for Mediatek MT8516

   - Misc fixes/improvements for ARM SCMI, TEE, NXP i.MX SCU drivers"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (57 commits)
  soc: aspeed: fix Kconfig
  soc: add aspeed folder and misc drivers
  spi: zynqmp: Fix build break
  soc: imx: Add generic i.MX8 SoC driver
  MAINTAINERS: Update email for Qualcomm SoC maintainer
  memory: tegra: Fix a typos for "fdcdwr2" mc client
  Revert "ARM: tegra: Restore memory arbitration on resume from LP1 on Tegra30+"
  memory: tegra: Replace readl-writel with mc_readl-mc_writel
  memory: tegra: Fix integer overflow on tick value calculation
  memory: tegra: Fix missed registers values latching
  ARM: tegra: cpuidle: Handle tick broadcasting within cpuidle core on Tegra20/30
  optee: allow to work without static shared memory
  soc/tegra: pmc: Move powergate initialisation to probe
  soc/tegra: pmc: Remove reset sysfs entries on error
  soc/tegra: pmc: Fix reset sources and levels
  soc: amlogic: meson-gx-pwrc-vpu: Add support for G12A
  soc: amlogic: meson-gx-pwrc-vpu: Fix power on/off register bitmask
  fpga manager: Adding FPGA Manager support for Xilinx zynqmp
  dt-bindings: fpga: Add bindings for ZynqMP fpga driver
  firmware: xilinx: Add fpga API's
  ...
2019-05-16 09:19:14 -07:00