sram driver can be used by many chips besides CPU_MMP2, and so build
it alone. Also need to select MMP_SRAM for MMP_TDMA driver.
Reported-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: Qiao Zhou <zhouqiao@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Move irq-mmp driver from mach-mmp directory into irqchip directory.
It's used to support multiple platform.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
move mmp2 clock definition to another file. Then mmp2 can
choose common clock framework or private clock framework.
Signed-off-by: Chao Xie <xiechao.mail@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
move pxa910 clock definition to another file. Then pxa910 can
choose common clock framework or private clock framework.
Signed-off-by: Chao Xie <xiechao.mail@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
move pxa168 clock definition to another file. Then pxa168 can
choose common clock framework or private clock framework.
Signed-off-by: Chao Xie <xiechao.mail@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
the clock.c is mmp private implementation, make it excluded
from common clock framework
Signed-off-by: Chao Xie <xiechao.mail@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
MMP2 can enter system sleep level during suspend.
It can be waken up by PMIC interrupt, RTC/ALARM.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Merge irq-pxa168 and irq-mmp2. And support device tree also.
Since CONFIG_SPARSE_IRQ is enabled in arch-mmp, base irq starts from
NR_IRQS_LEGACY.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
* 'next/devel2' of git://git.linaro.org/people/arnd/arm-soc: (30 commits)
ARM: mmp: register internal sram bank
ARM: mmp: register audio sram bank
ARM: mmp: add sram allocator
gpio/samsung: Complain loudly if we don't know the SoC
ARM: S3C64XX: Fix SoC identification for S3C64xx devices
ARM: S3C2443: Remove redundant s3c_register_clocks call for init_clocks
ARM: S3C24XX: Add devname for hsmmc1 pclk
ARM: S3C24XX: use clk_get_rate to init fclk in common_setup_clocks
ARM: S3C2443: Accommodate cpufreq frequency scheme in armdiv
ARM: S3C2443: handle unset armdiv values gracefully
ARM: S3C2443: Add get_rate operation for clk_armdiv
ARM: S3C2416: Add comment describing the armdiv/armclk
ARM: S3C2443: Move clk_arm and clk_armdiv to common code
ARM: S3C24XX: Add infrastructure to transmit armdiv to common code
ARM: S3C2416: Add armdiv_mask constant
ARM: EXYNOS4: Add support for M-5MOLS camera on Nuri board
ARM: EXYNOS4: Enable MFC on ORIGEN
ARM: SAMSUNG: Add support s3c2416-adc for S3C2416/S3C2450
ARM: SAMSUNG: Add support s3c2443-adc for S3C2443
ARM: SAMSUNG: Allow overriding of adc device name for S3C24XX
...
On mmp platform, there have two sram banks:
audio sram and internal sram. The audio sram is mainly for audio;
the internal sram is for video, wtm and power management.
So add the sram allocator using genalloc to manage them.
Every sram bank will register its own platform device
info, after the sram allocator create the generic pool
for the sram bank, the user module can use the pool's
name to get the pool handler; then it can use the handler
to alloc/free memory with genalloc APIs.
Signed-off-by: Leo Yan <leoy@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
GuruPlugD was initially named to be SHEEVAD, and it's causing naming
confusion in the mach-types database. Make it consistent by renaming
to GPLUGD.
Reported-and-Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Tanmay Upadhyay <tanmay.upadhyay@einfochips.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Added board defintion, header, and debug UART support.
Signed-off-by: Mark F. Brown <mark.brown314@gmail.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Marvell MMP2 (aka ARMADA610) is a SoC based on PJ4 core. It's
ARMv6 compatible. Support basic interrupt handler and timer,
and basic support for MMP2 based FLINT platform.
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
"""The Marvell® PXA168 processor is the first in a family of application
processors targeted at mass market opportunities in computing and consumer
devices. It balances high computing and multimedia performance with low
power consumption to support extended battery life, and includes a wealth
of integrated peripherals to reduce overall BOM cost .... """
See http://www.marvell.com/featured/pxa168.jsp for more information.
1. Marvell Mohawk core is a hybrid of xscale3 and its own ARM core,
there are many enhancements like instructions for flushing the
whole D-cache, and so on
2. Clock reuses Russell's common clkdev, and added the basic support
for UART1/2.
3. Devices are a bit different from the 'mach-pxa' way, the platform
devices are now dynamically allocated only when necessary (i.e.
when pxa_register_device() is called). Description for each device
are stored in an array of 'struct pxa_device_desc'. Now that:
a. this array of device description is marked with __initdata and
can be freed up system is fully up
b. which means board code has to add all needed devices early in
his initializing function
c. platform specific data can now be marked as __initdata since
they are allocated and copied by platform_device_add_data()
4. only the basic UART1/2/3 are added, more devices will come later.
Signed-off-by: Jason Chagas <chagas@marvell.com>
Signed-off-by: Eric Miao <eric.miao@marvell.com>
Qiao Zhou