2 Commits

Author	SHA1	Message	Date
Ryder Lee	936ceb12c5	clk: mediatek: update missing clock data for MT7622 audsys ... Add missing clock data 'CLK_AUDIO_AFE_CONN' for MT7622 audsys. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>	2018-03-19 13:40:57 -07:00
Sean Wang	2fc0a509e4	clk: mediatek: add clock support for MT7622 SoC ... Add all supported clocks exported from every susbystem found on MT7622 SoC such as topckgen, apmixedsys, infracfg, pericfg , pciessys, ssusbsys, ethsys and audsys. Signed-off-by: Chen Zhong <chen.zhong@mediatek.com> Signed-off-by: Sean Wang <sean.wang@mediatek.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>	2017-11-02 01:10:12 -07:00